dts: arm: st: stm32f2: remove U suffix from "resets" in DTSI
STM32 reset controller position argument provided to STM32_RESET()
macro sometime uses an unnecessary U suffix. Remove these useless
suffixes for this series for consistency among STM32 SoCs DTSI files.
No functional change.
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
diff --git a/dts/arm/st/f2/stm32f2.dtsi b/dts/arm/st/f2/stm32f2.dtsi
index 03deb03..6b98772 100644
--- a/dts/arm/st/f2/stm32f2.dtsi
+++ b/dts/arm/st/f2/stm32f2.dtsi
@@ -235,7 +235,7 @@
compatible = "st,stm32-usart", "st,stm32-uart";
reg = <0x40011000 0x400>;
clocks = <&rcc STM32_CLOCK(APB2, 4)>;
- resets = <&rctl STM32_RESET(APB2, 4U)>;
+ resets = <&rctl STM32_RESET(APB2, 4)>;
interrupts = <37 0>;
status = "disabled";
};
@@ -244,7 +244,7 @@
compatible = "st,stm32-usart", "st,stm32-uart";
reg = <0x40004400 0x400>;
clocks = <&rcc STM32_CLOCK(APB1, 17)>;
- resets = <&rctl STM32_RESET(APB1, 17U)>;
+ resets = <&rctl STM32_RESET(APB1, 17)>;
interrupts = <38 0>;
status = "disabled";
};
@@ -253,7 +253,7 @@
compatible = "st,stm32-usart", "st,stm32-uart";
reg = <0x40004800 0x400>;
clocks = <&rcc STM32_CLOCK(APB1, 18)>;
- resets = <&rctl STM32_RESET(APB1, 18U)>;
+ resets = <&rctl STM32_RESET(APB1, 18)>;
interrupts = <39 0>;
status = "disabled";
};
@@ -262,7 +262,7 @@
compatible = "st,stm32-usart", "st,stm32-uart";
reg = <0x40011400 0x400>;
clocks = <&rcc STM32_CLOCK(APB2, 5)>;
- resets = <&rctl STM32_RESET(APB2, 5U)>;
+ resets = <&rctl STM32_RESET(APB2, 5)>;
interrupts = <71 0>;
status = "disabled";
};
@@ -271,7 +271,7 @@
compatible = "st,stm32-uart";
reg = <0x40004c00 0x400>;
clocks = <&rcc STM32_CLOCK(APB1, 19)>;
- resets = <&rctl STM32_RESET(APB1, 19U)>;
+ resets = <&rctl STM32_RESET(APB1, 19)>;
interrupts = <52 0>;
status = "disabled";
};
@@ -280,7 +280,7 @@
compatible = "st,stm32-uart";
reg = <0x40005000 0x400>;
clocks = <&rcc STM32_CLOCK(APB1, 20)>;
- resets = <&rctl STM32_RESET(APB1, 20U)>;
+ resets = <&rctl STM32_RESET(APB1, 20)>;
interrupts = <53 0>;
status = "disabled";
};
@@ -415,7 +415,7 @@
reg = <0x40010000 0x400>;
clocks = <&rcc STM32_CLOCK(APB2, 0)>,
<&rcc STM32_SRC_TIMPCLK2 NO_SEL>;
- resets = <&rctl STM32_RESET(APB2, 0U)>;
+ resets = <&rctl STM32_RESET(APB2, 0)>;
interrupts = <24 0>, <25 0>, <26 0>, <27 0>;
interrupt-names = "brk", "up", "trgcom", "cc";
st,prescaler = <0>;
@@ -439,7 +439,7 @@
reg = <0x40000000 0x400>;
clocks = <&rcc STM32_CLOCK(APB1, 0)>,
<&rcc STM32_SRC_TIMPCLK1 NO_SEL>;
- resets = <&rctl STM32_RESET(APB1, 0U)>;
+ resets = <&rctl STM32_RESET(APB1, 0)>;
interrupts = <28 0>;
interrupt-names = "global";
st,prescaler = <0>;
@@ -463,7 +463,7 @@
reg = <0x40000400 0x400>;
clocks = <&rcc STM32_CLOCK(APB1, 1)>,
<&rcc STM32_SRC_TIMPCLK1 NO_SEL>;
- resets = <&rctl STM32_RESET(APB1, 1U)>;
+ resets = <&rctl STM32_RESET(APB1, 1)>;
interrupts = <29 0>;
interrupt-names = "global";
st,prescaler = <0>;
@@ -492,7 +492,7 @@
reg = <0x40000800 0x400>;
clocks = <&rcc STM32_CLOCK(APB1, 2)>,
<&rcc STM32_SRC_TIMPCLK1 NO_SEL>;
- resets = <&rctl STM32_RESET(APB1, 2U)>;
+ resets = <&rctl STM32_RESET(APB1, 2)>;
interrupts = <30 0>;
interrupt-names = "global";
st,prescaler = <0>;
@@ -521,7 +521,7 @@
reg = <0x40000c00 0x400>;
clocks = <&rcc STM32_CLOCK(APB1, 3)>,
<&rcc STM32_SRC_TIMPCLK1 NO_SEL>;
- resets = <&rctl STM32_RESET(APB1, 3U)>;
+ resets = <&rctl STM32_RESET(APB1, 3)>;
interrupts = <50 0>;
interrupt-names = "global";
st,prescaler = <0>;
@@ -550,7 +550,7 @@
reg = <0x40001000 0x400>;
clocks = <&rcc STM32_CLOCK(APB1, 4)>,
<&rcc STM32_SRC_TIMPCLK1 NO_SEL>;
- resets = <&rctl STM32_RESET(APB1, 4U)>;
+ resets = <&rctl STM32_RESET(APB1, 4)>;
interrupts = <54 0>;
interrupt-names = "global";
st,prescaler = <0>;
@@ -567,7 +567,7 @@
reg = <0x40001400 0x400>;
clocks = <&rcc STM32_CLOCK(APB1, 5)>,
<&rcc STM32_SRC_TIMPCLK1 NO_SEL>;
- resets = <&rctl STM32_RESET(APB1, 5U)>;
+ resets = <&rctl STM32_RESET(APB1, 5)>;
interrupts = <55 0>;
interrupt-names = "global";
st,prescaler = <0>;
@@ -584,7 +584,7 @@
reg = <0x40010400 0x400>;
clocks = <&rcc STM32_CLOCK(APB2, 1)>,
<&rcc STM32_SRC_TIMPCLK2 NO_SEL>;
- resets = <&rctl STM32_RESET(APB2, 1U)>;
+ resets = <&rctl STM32_RESET(APB2, 1)>;
interrupts = <43 0>, <44 0>, <45 0>, <46 0>;
interrupt-names = "brk", "up", "trgcom", "cc";
st,prescaler = <0>;
@@ -608,7 +608,7 @@
reg = <0x40014000 0x400>;
clocks = <&rcc STM32_CLOCK(APB2, 16)>,
<&rcc STM32_SRC_TIMPCLK2 NO_SEL>;
- resets = <&rctl STM32_RESET(APB2, 16U)>;
+ resets = <&rctl STM32_RESET(APB2, 16)>;
interrupts = <24 0>;
interrupt-names = "global";
st,prescaler = <0>;
@@ -631,7 +631,7 @@
reg = <0x40014400 0x400>;
clocks = <&rcc STM32_CLOCK(APB2, 17)>,
<&rcc STM32_SRC_TIMPCLK2 NO_SEL>;
- resets = <&rctl STM32_RESET(APB2, 17U)>;
+ resets = <&rctl STM32_RESET(APB2, 17)>;
interrupts = <25 0>;
interrupt-names = "global";
st,prescaler = <0>;
@@ -654,7 +654,7 @@
reg = <0x40014800 0x400>;
clocks = <&rcc STM32_CLOCK(APB2, 18)>,
<&rcc STM32_SRC_TIMPCLK2 NO_SEL>;
- resets = <&rctl STM32_RESET(APB2, 18U)>;
+ resets = <&rctl STM32_RESET(APB2, 18)>;
interrupts = <26 0>;
interrupt-names = "global";
st,prescaler = <0>;
@@ -677,7 +677,7 @@
reg = <0x40001800 0x400>;
clocks = <&rcc STM32_CLOCK(APB1, 6)>,
<&rcc STM32_SRC_TIMPCLK1 NO_SEL>;
- resets = <&rctl STM32_RESET(APB1, 6U)>;
+ resets = <&rctl STM32_RESET(APB1, 6)>;
interrupts = <43 0>;
interrupt-names = "global";
st,prescaler = <0>;
@@ -700,7 +700,7 @@
reg = <0x40001c00 0x400>;
clocks = <&rcc STM32_CLOCK(APB1, 7)>,
<&rcc STM32_SRC_TIMPCLK1 NO_SEL>;
- resets = <&rctl STM32_RESET(APB1, 7U)>;
+ resets = <&rctl STM32_RESET(APB1, 7)>;
interrupts = <44 0>;
interrupt-names = "global";
st,prescaler = <0>;
@@ -723,7 +723,7 @@
reg = <0x40002000 0x400>;
clocks = <&rcc STM32_CLOCK(APB1, 8)>,
<&rcc STM32_SRC_TIMPCLK1 NO_SEL>;
- resets = <&rctl STM32_RESET(APB1, 8U)>;
+ resets = <&rctl STM32_RESET(APB1, 8)>;
interrupts = <45 0>;
interrupt-names = "global";
st,prescaler = <0>;
