commit 6e5e7c16403ae1b03ba74d998e18491e5a0ff175
author Julien Massot <julien.massot@iot.bzh> Thu Jan 14 16:04:46 2021 +0100
committer Kumar Gala <kumar.gala@gmail.com> Thu Jan 14 12:44:34 2021 -0600
tree 176836df5ef5d8dc0446989c6dc9e57b23333887
parent 32f23059a2e2f9127754079d07d0c1e2d68bb0d9

west.yml: Update cmsis revision

DSP: Fix invalid CMakeList configuration for arm_sin_cos
Core-R: Make GIC and TIM configurable

Signed-off-by: Julien Massot <julien.massot@iot.bzh>

west.yml

diff --git a/west.yml b/west.yml
index 12f9393..563fdfe 100644
--- a/west.yml
+++ b/west.yml
@@ -26,7 +26,7 @@
   # Please add items below based on alphabetical order
   projects:
     - name: cmsis
-      revision: 542b2296e6d515b265e25c6b7208e8fea3014f90
+      revision: 421dcf358fa420e9721a8452c647f0d42af8d68c
       path: modules/hal/cmsis
     - name: hal_atmel
       revision: 9f0a699a2f0253dc9688211ef696daa7b8fadb75