| commit | 75f5d98002f1ae0b12f57e4ba77468fb18453b4d | [log] [tgz] |
|---|---|---|
| author | Marcin Szymczyk <marcin.szymczyk@nordicsemi.no> | Wed Apr 03 15:36:59 2024 +0200 |
| committer | Carles Cufí <carles.cufi@nordicsemi.no> | Mon Apr 22 06:50:12 2024 -0700 |
| tree | c7d1f2ba626e968eeb6ea5d8f0158fb6ef6d677a | |
| parent | 030a8b183089dbb5ee7f0dd7d40b3186fde46a1f [diff] |
soc: riscv-privileged: support SoCs without reset vector RISCV_PRIVILEGED implicitly depends on INCLUDE_RESET_VECTOR. Remove that dependency by adding support for SoCs that do not need the `__reset` stub. Signed-off-by: Marcin Szymczyk <marcin.szymczyk@nordicsemi.no>