| commit | 78627a5febcd4f3dcd3cabfe07185272267585ab | [log] [tgz] |
|---|---|---|
| author | Attie Grande <attie.grande@argentum-systems.co.uk> | Wed Nov 13 11:28:03 2019 +0000 |
| committer | Anas Nashif <anas.nashif@intel.com> | Sun Jan 10 12:42:40 2021 -0500 |
| tree | ccfd8e331c459778ca9333832401292b7f2a6794 | |
| parent | 65e259fb484a474280a96f3051c3217e4edce491 [diff] |
usb: stm32: added support for USB Device mode on STM32F105xx parts
The STM32F105xx USB clock goes through a prescaler either PLL1 x2 /2
or PLL1 x2 /3, the output of this must be 48 MHz. As such, the output
of PLL1 must be 48 MHz or 72 MHz.
NOTE: This requires that the system is running from PLL1 (PLLCLK).
Support for running from PLL2 will be implemented in the future.
Signed-off-by: Attie Grande <attie.grande@argentum-systems.co.uk>