dts: fix location of stm32-specific property
The max-erase-time property was introduced for the STM32 flash driver,
but it was inserted as an optional property in the generic
soc-nv-flash binding which is used by other SoCs.
Make it a required property in a new st,stm32-nv-flash binding
instead, since it is at present a vendor specific property.
Update the DTS files accordingly. Keep the existing "soc-nv-flash"
value in the compatible list in each case, so that DT_HAS_COMPAT(...
soc_nv_flash) tests on these nodes will still succeed, but put it
after a newly added "st,stm32-nv-flash" compatible, so that the
SoC-specific binding will be used as it is discovered first by the DT
tooling.
Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
diff --git a/drivers/flash/flash_stm32.c b/drivers/flash/flash_stm32.c
index af8272c..4f9e6f1 100644
--- a/drivers/flash/flash_stm32.c
+++ b/drivers/flash/flash_stm32.c
@@ -27,7 +27,8 @@
/* Let's wait for double the max erase time to be sure that the operation is
* completed.
*/
-#define STM32_FLASH_TIMEOUT (2 * DT_PROP(DT_INST(0, soc_nv_flash), max_erase_time))
+#define STM32_FLASH_TIMEOUT \
+ (2 * DT_PROP(DT_INST(0, st_stm32_nv_flash), max_erase_time))
#if defined(FLASH_NSSR_NSBSY) /* For STM32L5x in non-secure mode */
#define FLASH_SECURITY_NS
diff --git a/dts/arm/st/f0/stm32f0.dtsi b/dts/arm/st/f0/stm32f0.dtsi
index 1ddb51d..28178fe 100644
--- a/dts/arm/st/f0/stm32f0.dtsi
+++ b/dts/arm/st/f0/stm32f0.dtsi
@@ -79,7 +79,7 @@
#size-cells = <1>;
flash0: flash@8000000 {
- compatible = "soc-nv-flash";
+ compatible = "st,stm32-nv-flash", "soc-nv-flash";
label = "FLASH_STM32";
write-block-size = <2>;
diff --git a/dts/arm/st/f1/stm32f1.dtsi b/dts/arm/st/f1/stm32f1.dtsi
index 92e95fe..b4a675d 100644
--- a/dts/arm/st/f1/stm32f1.dtsi
+++ b/dts/arm/st/f1/stm32f1.dtsi
@@ -80,7 +80,7 @@
#size-cells = <1>;
flash0: flash@8000000 {
- compatible = "soc-nv-flash";
+ compatible = "st,stm32-nv-flash", "soc-nv-flash";
label = "FLASH_STM32";
write-block-size = <2>;
diff --git a/dts/arm/st/f2/stm32f2.dtsi b/dts/arm/st/f2/stm32f2.dtsi
index 3cecaa3..2a1b6f8 100644
--- a/dts/arm/st/f2/stm32f2.dtsi
+++ b/dts/arm/st/f2/stm32f2.dtsi
@@ -79,7 +79,7 @@
#size-cells = <1>;
flash0: flash@8000000 {
- compatible = "soc-nv-flash";
+ compatible = "st,stm32-nv-flash", "soc-nv-flash";
label = "FLASH_STM32";
write-block-size = <1>;
diff --git a/dts/arm/st/f3/stm32f3.dtsi b/dts/arm/st/f3/stm32f3.dtsi
index 797b753..bc9d1de 100644
--- a/dts/arm/st/f3/stm32f3.dtsi
+++ b/dts/arm/st/f3/stm32f3.dtsi
@@ -80,7 +80,7 @@
#size-cells = <1>;
flash0: flash@8000000 {
- compatible = "soc-nv-flash";
+ compatible = "st,stm32-nv-flash", "soc-nv-flash";
label = "FLASH_STM32";
write-block-size = <2>;
diff --git a/dts/arm/st/f4/stm32f4.dtsi b/dts/arm/st/f4/stm32f4.dtsi
index 60c1d08..ea97053 100644
--- a/dts/arm/st/f4/stm32f4.dtsi
+++ b/dts/arm/st/f4/stm32f4.dtsi
@@ -78,7 +78,7 @@
#size-cells = <1>;
flash0: flash@8000000 {
- compatible = "soc-nv-flash";
+ compatible = "st,stm32-nv-flash", "soc-nv-flash";
label = "FLASH_STM32";
write-block-size = <1>;
diff --git a/dts/arm/st/f7/stm32f7.dtsi b/dts/arm/st/f7/stm32f7.dtsi
index 9dc80b6..92303d9 100644
--- a/dts/arm/st/f7/stm32f7.dtsi
+++ b/dts/arm/st/f7/stm32f7.dtsi
@@ -83,7 +83,7 @@
#size-cells = <1>;
flash0: flash@8000000 {
- compatible = "soc-nv-flash";
+ compatible = "st,stm32-nv-flash", "soc-nv-flash";
label = "FLASH_STM32";
write-block-size = <1>;
diff --git a/dts/arm/st/g0/stm32g0.dtsi b/dts/arm/st/g0/stm32g0.dtsi
index d0bdfcc..7f38bd2 100644
--- a/dts/arm/st/g0/stm32g0.dtsi
+++ b/dts/arm/st/g0/stm32g0.dtsi
@@ -82,7 +82,7 @@
#size-cells = <1>;
flash0: flash@8000000 {
- compatible = "soc-nv-flash";
+ compatible = "st,stm32-nv-flash", "soc-nv-flash";
label = "FLASH_STM32";
write-block-size = <8>;
diff --git a/dts/arm/st/g4/stm32g4.dtsi b/dts/arm/st/g4/stm32g4.dtsi
index f03157f..e2061cd 100644
--- a/dts/arm/st/g4/stm32g4.dtsi
+++ b/dts/arm/st/g4/stm32g4.dtsi
@@ -121,7 +121,7 @@
#size-cells = <1>;
flash0: flash@8000000 {
- compatible = "soc-nv-flash";
+ compatible = "st,stm32-nv-flash", "soc-nv-flash";
label = "FLASH_STM32";
write-block-size = <8>;
diff --git a/dts/arm/st/l0/stm32l0.dtsi b/dts/arm/st/l0/stm32l0.dtsi
index c2b80d8..a36e017 100644
--- a/dts/arm/st/l0/stm32l0.dtsi
+++ b/dts/arm/st/l0/stm32l0.dtsi
@@ -95,7 +95,7 @@
#size-cells = <1>;
flash0: flash@8000000 {
- compatible = "soc-nv-flash";
+ compatible = "st,stm32-nv-flash", "soc-nv-flash";
label = "FLASH_STM32";
write-block-size = <4>;
diff --git a/dts/arm/st/l1/stm32l1.dtsi b/dts/arm/st/l1/stm32l1.dtsi
index 39643a7..18e6ecd 100644
--- a/dts/arm/st/l1/stm32l1.dtsi
+++ b/dts/arm/st/l1/stm32l1.dtsi
@@ -87,7 +87,7 @@
#size-cells = <1>;
flash0: flash@8000000 {
- compatible = "soc-nv-flash";
+ compatible = "st,stm32-nv-flash", "soc-nv-flash";
label = "FLASH_STM32";
write-block-size = <4>;
diff --git a/dts/arm/st/l4/stm32l4.dtsi b/dts/arm/st/l4/stm32l4.dtsi
index f1c1f8d..b74dba4 100644
--- a/dts/arm/st/l4/stm32l4.dtsi
+++ b/dts/arm/st/l4/stm32l4.dtsi
@@ -88,7 +88,7 @@
#size-cells = <1>;
flash0: flash@8000000 {
- compatible = "soc-nv-flash";
+ compatible = "st,stm32-nv-flash", "soc-nv-flash";
label = "FLASH_STM32";
write-block-size = <8>;
diff --git a/dts/arm/st/l5/stm32l5.dtsi b/dts/arm/st/l5/stm32l5.dtsi
index 5ca9ccb..d066df9 100644
--- a/dts/arm/st/l5/stm32l5.dtsi
+++ b/dts/arm/st/l5/stm32l5.dtsi
@@ -95,7 +95,7 @@
#size-cells = <1>;
flash0: flash@8000000 {
- compatible = "soc-nv-flash";
+ compatible = "st,stm32-nv-flash";
label = "FLASH_STM32";
write-block-size = <8>;
erase-block-size = <2048>;
diff --git a/dts/arm/st/wb/stm32wb.dtsi b/dts/arm/st/wb/stm32wb.dtsi
index f635163..17a1979 100644
--- a/dts/arm/st/wb/stm32wb.dtsi
+++ b/dts/arm/st/wb/stm32wb.dtsi
@@ -106,7 +106,7 @@
#size-cells = <1>;
flash0: flash@8000000 {
- compatible = "soc-nv-flash";
+ compatible = "st,stm32-nv-flash", "soc-nv-flash";
label = "FLASH_STM32";
write-block-size = <8>;
diff --git a/dts/arm/st/wl/stm32wl.dtsi b/dts/arm/st/wl/stm32wl.dtsi
index 1c81327..789a1da 100644
--- a/dts/arm/st/wl/stm32wl.dtsi
+++ b/dts/arm/st/wl/stm32wl.dtsi
@@ -88,7 +88,7 @@
#size-cells = <1>;
flash0: flash@8000000 {
- compatible = "soc-nv-flash";
+ compatible = "st,stm32-nv-flash", "soc-nv-flash";
label = "FLASH_STM32";
write-block-size = <8>;
diff --git a/dts/bindings/mtd/soc-nv-flash.yaml b/dts/bindings/mtd/soc-nv-flash.yaml
index d54529b..1fd67b3 100644
--- a/dts/bindings/mtd/soc-nv-flash.yaml
+++ b/dts/bindings/mtd/soc-nv-flash.yaml
@@ -17,8 +17,3 @@
type: int
description: address alignment required by flash write operations
required: false
-
- max-erase-time:
- type: int
- description: max erase time(millisecond) of a flash sector or page or half-page
- required: false
diff --git a/dts/bindings/mtd/st,stm32-nv-flash.yaml b/dts/bindings/mtd/st,stm32-nv-flash.yaml
new file mode 100644
index 0000000..08e89ef
--- /dev/null
+++ b/dts/bindings/mtd/st,stm32-nv-flash.yaml
@@ -0,0 +1,14 @@
+description: |
+ STM32 flash memory. This binding is for the flash memory itself, not
+ the flash controller peripheral. For that, see the
+ "st,stm32-flash-controller" binding.
+
+include: soc-nv-flash.yaml
+
+compatible: st,stm32-nv-flash
+
+properties:
+ max-erase-time:
+ type: int
+ description: max erase time(millisecond) of a flash sector or page or half-page
+ required: true
