drivers: peci: xec: Fix error recovery handling
Fix the error recovery mechanism that makes use of a temp variable
to avoid coverity issue without breaking error recovery.
Signed-off-by: Rajavardhan Gundi <rajavardhan.gundi@intel.com>
diff --git a/drivers/peci/peci_mchp_xec.c b/drivers/peci/peci_mchp_xec.c
index 626ac9b..43ff5a7 100644
--- a/drivers/peci/peci_mchp_xec.c
+++ b/drivers/peci/peci_mchp_xec.c
@@ -244,7 +244,7 @@
ARG_UNUSED(dev);
int ret;
PECI_Type *base = peci_xec_config.base;
- uint8_t err_val = base->ERROR;
+ uint8_t err_val;
ret = peci_xec_write(dev, msg);
if (ret) {
@@ -267,6 +267,7 @@
}
/* Check for error conditions and perform bus recovery if necessary */
+ err_val = base->ERROR;
if (err_val) {
if (base->ERROR & MCHP_PECI_ERR_RDOV) {
LOG_WRN("Read buffer is not empty\n");
@@ -280,15 +281,15 @@
LOG_WRN("Write buffer is not empty\n");
}
+ /* ERROR is a clear-on-write register, need to clear errors
+ * occurring at the end of a transaction. A temp variable is
+ * used to overcome complaints by the static code analyzer
+ */
+ base->ERROR = err_val;
LOG_WRN("Transaction error %x\n", base->ERROR);
return -EIO;
}
- /* ERROR is a clear-on-write register, need to clear errors occurred
- * at the end of a transaction.
- */
- base->ERROR = err_val;
-
return 0;
}
