clock_control: Add MCO support for STM32 U5 series
Add microcontroller clock output (MCO) support for the STM32
U5 series of devices.
Signed-off-by: Joakim Andersson <joerchan@gmail.com>
diff --git a/drivers/clock_control/Kconfig.stm32 b/drivers/clock_control/Kconfig.stm32
index 484b331..8dffa9b 100644
--- a/drivers/clock_control/Kconfig.stm32
+++ b/drivers/clock_control/Kconfig.stm32
@@ -70,7 +70,8 @@
SOC_SERIES_STM32L4X || \
SOC_SERIES_STM32H7X || \
SOC_SERIES_STM32H7RSX || \
- SOC_SERIES_STM32H5X
+ SOC_SERIES_STM32H5X || \
+ SOC_SERIES_STM32U5X
help
Use LSE as source of MCO1
@@ -82,13 +83,15 @@
SOC_SERIES_STM32L4X || \
SOC_SERIES_STM32H7X || \
SOC_SERIES_STM32H7RSX || \
- SOC_SERIES_STM32H5X
+ SOC_SERIES_STM32H5X || \
+ SOC_SERIES_STM32U5X
help
Use HSE as source of MCO1
config CLOCK_STM32_MCO1_SRC_LSI
bool "LSI"
- depends on SOC_SERIES_STM32L4X
+ depends on SOC_SERIES_STM32L4X || \
+ SOC_SERIES_STM32U5X
help
Use LSI as source of MCO1
@@ -98,6 +101,18 @@
help
Use MSI as source of MCO1
+config CLOCK_STM32_MCO1_SRC_MSIK
+ bool "MSIK"
+ depends on SOC_SERIES_STM32U5X
+ help
+ Use MSIK as source of MCO1
+
+config CLOCK_STM32_MCO1_SRC_MSIS
+ bool "MSIS"
+ depends on SOC_SERIES_STM32U5X
+ help
+ Use MSIS as source of MCO1
+
config CLOCK_STM32_MCO1_SRC_HSI
bool "HSI"
depends on SOC_SERIES_STM32F1X || \
@@ -111,7 +126,8 @@
config CLOCK_STM32_MCO1_SRC_HSI16
bool "HSI16"
- depends on SOC_SERIES_STM32L4X
+ depends on SOC_SERIES_STM32L4X || \
+ SOC_SERIES_STM32U5X
help
Use HSI16 as source of MCO1
@@ -120,13 +136,17 @@
depends on SOC_SERIES_STM32L4X || \
SOC_SERIES_STM32H7X || \
SOC_SERIES_STM32H7RSX || \
- SOC_SERIES_STM32H5X
+ SOC_SERIES_STM32H5X || \
+ SOC_SERIES_STM32U5X
help
Use HSI48 as source of MCO1
config CLOCK_STM32_MCO1_SRC_PLLCLK
bool "PLLCLK"
- depends on SOC_SERIES_STM32F4X || SOC_SERIES_STM32F7X || SOC_SERIES_STM32L4X
+ depends on SOC_SERIES_STM32F4X || \
+ SOC_SERIES_STM32F7X || \
+ SOC_SERIES_STM32L4X || \
+ SOC_SERIES_STM32U5X
help
Use PLLCLK as source of MCO1
@@ -164,7 +184,9 @@
config CLOCK_STM32_MCO1_SRC_SYSCLK
bool "SYSCLK"
- depends on SOC_SERIES_STM32F1X || SOC_SERIES_STM32L4X
+ depends on SOC_SERIES_STM32F1X || \
+ SOC_SERIES_STM32L4X || \
+ SOC_SERIES_STM32U5X
help
Use SYSCLK as source of MCO1
endchoice
@@ -177,12 +199,13 @@
SOC_SERIES_STM32L4X || \
SOC_SERIES_STM32H7X || \
SOC_SERIES_STM32H7RSX || \
- SOC_SERIES_STM32H5X \
+ SOC_SERIES_STM32H5X || \
+ SOC_SERIES_STM32U5X \
)
default 1
range 1 5 if SOC_SERIES_STM32F4X || SOC_SERIES_STM32F7X
range 1 15 if SOC_SERIES_STM32H7X || SOC_SERIES_STM32H7RSX || SOC_SERIES_STM32H5X
- range 1 16 if SOC_SERIES_STM32L4X
+ range 1 16 if SOC_SERIES_STM32L4X || SOC_SERIES_STM32U5X
help
Prescaler for MCO1 output clock
diff --git a/drivers/clock_control/clock_stm32_ll_mco.h b/drivers/clock_control/clock_stm32_ll_mco.h
index b526f13..22e2043 100644
--- a/drivers/clock_control/clock_stm32_ll_mco.h
+++ b/drivers/clock_control/clock_stm32_ll_mco.h
@@ -22,6 +22,10 @@
#define MCO1_SOURCE LL_RCC_MCO1SOURCE_LSI
#elif CONFIG_CLOCK_STM32_MCO1_SRC_MSI
#define MCO1_SOURCE LL_RCC_MCO1SOURCE_MSI
+#elif CONFIG_CLOCK_STM32_MCO1_SRC_MSIK
+ #define MCO1_SOURCE LL_RCC_MCO1SOURCE_MSIK
+#elif CONFIG_CLOCK_STM32_MCO1_SRC_MSIS
+ #define MCO1_SOURCE LL_RCC_MCO1SOURCE_MSIS
#elif CONFIG_CLOCK_STM32_MCO1_SRC_HSI
#define MCO1_SOURCE LL_RCC_MCO1SOURCE_HSI
#elif CONFIG_CLOCK_STM32_MCO1_SRC_HSI16
diff --git a/drivers/clock_control/clock_stm32_ll_u5.c b/drivers/clock_control/clock_stm32_ll_u5.c
index bec41e2..0c5d587 100644
--- a/drivers/clock_control/clock_stm32_ll_u5.c
+++ b/drivers/clock_control/clock_stm32_ll_u5.c
@@ -17,6 +17,7 @@
#include <zephyr/drivers/clock_control.h>
#include <zephyr/sys/util.h>
#include <zephyr/drivers/clock_control/stm32_clock_control.h>
+#include "clock_stm32_ll_mco.h"
/* Macros to fill up prescaler values */
#define z_ahb_prescaler(v) LL_RCC_SYSCLK_DIV_ ## v
@@ -895,6 +896,9 @@
/* Update CMSIS variable */
SystemCoreClock = CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC;
+ /* configure MCO1/MCO2 based on Kconfig */
+ stm32_clock_control_mco_init();
+
return 0;
}
