7732e6672345de6000d9d64645706965e2d3e604 - third_party/github/zephyrproject-rtos/zephyr

commit	7732e6672345de6000d9d64645706965e2d3e604	[log] [tgz]
author	Jimmy Zheng <jimmyzhe@andestech.com>	Thu Jul 24 22:01:26 2025 +0800
committer	Chris Friedt <chrisfriedt@gmail.com>	Mon Oct 13 11:26:28 2025 -0400
tree	45af88724d4ab2ea9e05db1d21244a57ee164274
parent	a6a11cc57d86d577be16a1f2738e9928e09f674a [diff]

arch: riscv: custom: add OpenISA RI5CY and Zero-RISCY CSR support

Update OpenISA RI5CY and Zero-RISCY CSR handling to use RISC-V custom
CSR common code. Move these stuff to 'arch/riscv/custom/openisa':

1. Rename 'soc_ri5cy.h' to 'ri5cy_csr.h' for CSR definitions.
2. Rename 'soc_zero_riscy.h' to 'zero_riscy_csr.h' for CSR definitions.
3. Move CSR context to common macro '__custom_csr_save/restore_context'.
4. Move compiler option '-march=rv32imcxpulpv2' to common code.

Signed-off-by: Jimmy Zheng <jimmyzhe@andestech.com>

arch/riscv/custom/openisa/ri5cy/CMakeLists.txt[Added - diff]
arch/riscv/custom/openisa/ri5cy/csr_context.h[Added - diff]
arch/riscv/custom/openisa/ri5cy/csr_irq.inc[Added - diff]
arch/riscv/custom/openisa/ri5cy/csr_offsets.h[Added - diff]
arch/riscv/custom/openisa/ri5cy/ri5cy_csr.h[Renamed from soc/openisa/rv32m1/soc_ri5cy.h - diff]
arch/riscv/custom/openisa/zero_riscy/CMakeLists.txt[Added - diff]
arch/riscv/custom/openisa/zero_riscy/zero_riscy_csr.h[Renamed from soc/openisa/rv32m1/soc_zero_riscy.h - diff]
soc/openisa/rv32m1/CMakeLists.txt[diff]
soc/openisa/rv32m1/soc.h[diff]
soc/openisa/rv32m1/soc_context.h[diff]
soc/openisa/rv32m1/soc_irq.S[diff]
soc/openisa/rv32m1/soc_offsets.h[diff]

12 files changed