| commit | 7edcd8d364469c20395a268598d546e2e1730a48 | [log] [tgz] |
|---|---|---|
| author | Francois Ramu <francois.ramu@st.com> | Thu Jul 21 15:28:28 2022 +0200 |
| committer | Carles Cufí <carles.cufi@nordicsemi.no> | Wed Aug 10 14:32:14 2022 +0200 |
| tree | c71549ee92ea4f45ade204eb32c118f2515bd592 | |
| parent | dcfb98a182cddc099a865948e9fa70f8d2a631b8 [diff] |
drivers: clock control: stm32U5 set regulator voltage before clocks The regulator voltage should be set before the clocks are enabled. This is especially the case when the MSIS at 48MHz is selected as SYSCLK. Signed-off-by: Francois Ramu <francois.ramu@st.com>