| commit | 92c93b1b7fbae1b7623c6423b203d2504c0157aa | [log] [tgz] |
|---|---|---|
| author | Daniel Leung <daniel.leung@intel.com> | Wed Feb 03 14:00:00 2021 -0800 |
| committer | Anas Nashif <anas.nashif@intel.com> | Thu Feb 04 20:58:56 2021 -0500 |
| tree | cdd8d667d4920f30d57735c49a278d6a02ff4a01 | |
| parent | d162e9e1ff40bc0911ca6c643943c15bebbba343 [diff] |
xtensa: fix hard-coded interrupt value for PS register There is a hard-coded value of PS_INTLEVEL(15) to set the PS register. The correct way is actually to use XCHAL_EXCM_LEVEL with PS_INTLEVEL() to setup the register. So fix it. Fixes #31858 Signed-off-by: Daniel Leung <daniel.leung@intel.com>