| commit | 9a27cc3867918b750f228604d63b5c2209a1b599 | [log] [tgz] |
|---|---|---|
| author | TLIG Dhaou <dhaou.tlig-ext@st.com> | Wed Jun 22 10:52:03 2022 +0200 |
| committer | Carles Cufí <carles.cufi@nordicsemi.no> | Mon Jul 04 15:20:06 2022 +0200 |
| tree | eae98a199e6c6d9e4c53ff42b6950256b00167bb | |
| parent | 0df7203aeee5edee3301d87323606f584050338a [diff] |
drivers: clock_control: clock stm32 set up the hsi div clock source Add the hsi divider as a clock source when is ready. Signed-off-by: TLIG Dhaou <dhaou.tlig-ext@st.com>