| commit | a189e93a44c0399ab2fdd328863f25871d0a7353 | [log] [tgz] |
|---|---|---|
| author | Manuel Arguelles <manuel.arguelles@nxp.com> | Wed Jul 13 22:54:45 2022 +0700 |
| committer | Fabio Baltieri <fabio.baltieri@gmail.com> | Tue Jul 26 11:09:42 2022 +0000 |
| tree | 39c098781b3f31e16db1297c89f95a3d74afc4aa | |
| parent | 3d3b5a0f4be9720014f1297a9dda669ba6336cf4 [diff] |
arm: mpu: dsb after writing to SCTLR on MPU enable Execute data and instruction sync barriers after writing to SCTLR to enable the MPU, to ensure the registers are set before proceeding and that the new changes are seen by the instructions that follow. Signed-off-by: Manuel Arguelles <manuel.arguelles@nxp.com>