ARC: forbid FIRQ or multiple register banks w/ 1 IRQ priority level

Don't allow to enable multiple register banks / fast
interrupts if we have only one interrupt priority level.

NOTE: we duplicate some checks by adding dependencies to ARC
Kconfig and adding build-time checks in C code. We do it
intentionally as for some reason we can violate dependencies
in architecture-level Kconfig by adding incorrect default in
SoC-level Kconfig. Such violation happens without any
warnings / errors from the Kconfig.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Evgeniy Paltsev <PaltsevEvgeniy@gmail.com>
diff --git a/arch/arc/Kconfig b/arch/arc/Kconfig
index 5b0dff0..5fd90cb 100644
--- a/arch/arc/Kconfig
+++ b/arch/arc/Kconfig
@@ -136,6 +136,7 @@
 config RGF_NUM_BANKS
 	int "Number of General Purpose Register Banks"
 	depends on ARC_FIRQ
+	depends on NUM_IRQ_PRIO_LEVELS > 1
 	range 1 2
 	default 2
 	help
@@ -145,10 +146,15 @@
 	  If fast interrupts are supported but there is only 1
 	  register bank, the fast interrupt handler must save
 	  and restore general purpose registers.
+	  NOTE: it's required to have more than one interrupt priority level
+	  to use second register bank - otherwise all interrupts will use
+	  same register bank. Such configuration isn't supported in software
+	  and it is not beneficial from the performance point of view.
 
 config ARC_FIRQ
 	bool "FIRQ enable"
 	depends on ISA_ARCV2
+	depends on NUM_IRQ_PRIO_LEVELS > 1
 	default y
 	help
 	  Fast interrupts are supported (FIRQ). If FIRQ enabled, for interrupts
@@ -156,6 +162,10 @@
 	  other regs will be saved according to the number of register bank;
 	  If FIRQ is disabled, the handle of interrupts with highest priority
 	  will be same with other interrupts.
+	  NOTE: we don't allow the configuration with FIRQ enabled and only one
+	  interrupt priority level (so all interrupts are FIRQ). Such
+	  configuration isn't supported in software and it is not beneficial
+	  from the performance point of view.
 
 config ARC_FIRQ_STACK
 	bool "Enable separate firq stack"
diff --git a/include/arch/arc/arch.h b/include/arch/arc/arch.h
index a7441f8..5eed07a 100644
--- a/include/arch/arc/arch.h
+++ b/include/arch/arc/arch.h
@@ -43,6 +43,40 @@
 #endif
 #endif
 
+#if defined(CONFIG_ARC_FIRQ) && defined(CONFIG_ISA_ARCV3)
+#error "Unsupported configuration: ARC_FIRQ and ISA_ARCV3"
+#endif
+
+/*
+ * We don't allow the configuration with FIRQ enabled and only one interrupt priority level
+ * (so all interrupts are FIRQ). Such configuration isn't supported in software and it is not
+ * beneficial from the performance point of view.
+ */
+#if defined(CONFIG_ARC_FIRQ) && CONFIG_NUM_IRQ_PRIO_LEVELS < 2
+#error "Unsupported configuration: ARC_FIRQ and (NUM_IRQ_PRIO_LEVELS < 2)"
+#endif
+
+#if CONFIG_RGF_NUM_BANKS > 1 && !defined(CONFIG_ARC_FIRQ)
+#error "Unsupported configuration: (RGF_NUM_BANKS > 1) and !ARC_FIRQ"
+#endif
+
+/*
+ * It's required to have more than one interrupt priority level to use second register bank
+ * - otherwise all interrupts will use same register bank. Such configuration isn't supported in
+ * software and it is not beneficial from the performance point of view.
+ */
+#if CONFIG_RGF_NUM_BANKS > 1 && CONFIG_NUM_IRQ_PRIO_LEVELS < 2
+#error "Unsupported configuration: (RGF_NUM_BANKS > 1) and (NUM_IRQ_PRIO_LEVELS < 2)"
+#endif
+
+#if defined(CONFIG_ARC_FIRQ_STACK) && !defined(CONFIG_ARC_FIRQ)
+#error "Unsupported configuration: ARC_FIRQ_STACK and !ARC_FIRQ"
+#endif
+
+#if defined(CONFIG_ARC_FIRQ_STACK) && CONFIG_RGF_NUM_BANKS < 2
+#error "Unsupported configuration: ARC_FIRQ_STACK and (RGF_NUM_BANKS < 2)"
+#endif
+
 #ifndef _ASMLANGUAGE
 
 #ifdef __cplusplus