soc: power: npcx: Clear host access IRQ pending bit before enabling
NPCX host access IRQ enables before entering deep sleep. The pending
bit lets chip wake up from sleep immediately. Clear host access IRQ
pending bit before enabling.
Signed-off-by: Wealian Liao <WHLIAO@nuvoton.com>
diff --git a/drivers/interrupt_controller/intc_miwu.c b/drivers/interrupt_controller/intc_miwu.c
index 29ee1a7..541a6ec 100644
--- a/drivers/interrupt_controller/intc_miwu.c
+++ b/drivers/interrupt_controller/intc_miwu.c
@@ -177,6 +177,18 @@
return IS_BIT_SET(NPCX_WKEN(base, wui->group), wui->bit);
}
+bool npcx_miwu_irq_get_and_clear_pending(const struct npcx_wui *wui)
+{
+ const uint32_t base = DRV_CONFIG(miwu_devs[wui->table])->base;
+ bool pending = IS_BIT_SET(NPCX_WKPND(base, wui->group), wui->bit);
+
+ if (pending) {
+ NPCX_WKPCL(base, wui->group) = BIT(wui->bit);
+ }
+
+ return pending;
+}
+
int npcx_miwu_interrupt_configure(const struct npcx_wui *wui,
enum miwu_int_mode mode, enum miwu_int_trig trig)
{
