drivers: stm32: fix MSI PLL mode enabling
1. clock: move the call for MSI hardware auto calibration enabling
before the control of MSI enable to ensure its execution in all
cases.
2. counter: add call for MSI hardware auto calibration enabling after
the LSE enabling and after possible backup domain reset that may
clear MSIPLLEN.
Signed-off-by: Giancarlo Stasi <giancarlo.stasi.co@gmail.com>
diff --git a/drivers/clock_control/clock_stm32_ll_common.c b/drivers/clock_control/clock_stm32_ll_common.c
index e9aecfc..cf62128 100644
--- a/drivers/clock_control/clock_stm32_ll_common.c
+++ b/drivers/clock_control/clock_stm32_ll_common.c
@@ -485,6 +485,11 @@
LL_RCC_MSI_EnableRangeSelection();
LL_RCC_MSI_SetRange(CONFIG_CLOCK_STM32_MSI_RANGE << RCC_CR_MSIRANGE_Pos);
+#if defined(CONFIG_CLOCK_STM32_MSI_PLL_MODE)
+ /* Enable MSI hardware auto calibration */
+ LL_RCC_MSI_EnablePLLMode();
+#endif
+
/* Enable MSI if not enabled */
if (LL_RCC_MSI_IsReady() != 1) {
/* Enable MSI */
@@ -492,10 +497,6 @@
while (LL_RCC_MSI_IsReady() != 1) {
/* Wait for HSI ready */
}
-#ifdef CONFIG_CLOCK_STM32_MSI_PLL_MODE
- /* Enable MSI hardware auto calibration */
- LL_RCC_MSI_EnablePLLMode();
-#endif
}
/* Set MSI as SYSCLCK source */
diff --git a/drivers/counter/counter_ll_stm32_rtc.c b/drivers/counter/counter_ll_stm32_rtc.c
index 69d798e..860fafc 100644
--- a/drivers/counter/counter_ll_stm32_rtc.c
+++ b/drivers/counter/counter_ll_stm32_rtc.c
@@ -333,6 +333,11 @@
while (LL_RCC_LSE_IsReady() != 1) {
}
+#if defined(CONFIG_CLOCK_STM32_MSI_PLL_MODE)
+ /* Enable MSI hardware auto calibration */
+ LL_RCC_MSI_EnablePLLMode();
+#endif
+
LL_RCC_SetRTCClockSource(LL_RCC_RTC_CLKSOURCE_LSE);
#endif /* CONFIG_COUNTER_RTC_STM32_CLOCK_SRC */
