| commit | 1c7c4506d85cf0f2bdacdbd6e4dfc9dc45badbde | [log] [tgz] |
|---|---|---|
| author | Francois Ramu <francois.ramu@st.com> | Mon Feb 28 16:23:14 2022 +0100 |
| committer | Maureen Helm <maureen.helm@intel.com> | Mon Mar 14 08:56:19 2022 -0500 |
| tree | d4fd536bee30870f51de71a66f6dbf08fc2a7bde | |
| parent | 7f4471c84e044b3b495f422fee49b143f119b29a [diff] |
drivers: clock_control of the stm32l0x or stm32l1x devices Fix register bit field when clock source is MSI on the stm32L0x or stm32L1x mcus Use RCC_CR_MSIRGSEL bit field instead of not soc stm32wbx serie That bit of the RCC CR is common to several stm32 mcus Signed-off-by: Francois Ramu <francois.ramu@st.com>