| commit | c626bac01624697756ab0718c82cc7d9c2e63a66 | [log] [tgz] |
|---|---|---|
| author | Qipeng Zha <qipeng.zha@intel.com> | Fri May 05 11:48:57 2023 +0800 |
| committer | Anas Nashif <anas.nashif@intel.com> | Mon May 08 16:55:27 2023 -0400 |
| tree | d0fe06df94fdf95f99921006239128a5274da8b8 | |
| parent | 985d6be5e57af5285b7e14289103e117814e0a17 [diff] |
arch: x86: fix SSE init issue when enable paging With paging config, need to use physical address as paging is not enabled here. From IA manual, LDMXCSR instruction description is, Loads the source operand into the MXCSR control/status register, the source operand is a 32-bit memory location. Signed-off-by: Qipeng Zha <qipeng.zha@intel.com>