driver: peci: Wait until rx fifo gets filled up
While running certain peci command, observed when FW attempts
to read last byte (Response FCS), PECI host controller returned
“Read FIFO” empty. Since “Read FIFO” is empty FW didn’t read
the response FCS.
Due to this issue, FW getting corrupted response from the PECI
controller for all the subsequent PECI commands.
To address this issue, FW waits for “Read FIFO” filled up by
the PECI controller.
Signed-off-by: Diwakar C <diwakar.c@intel.com>
1 file changed
