drivers: ethernet: stm32: add support for DT pinctrl Add support for configuring Ethernet pins using DT pinctrl entries. Note that F1 series pinctrl support is not handled as the driver does not support F1. Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>

diff --git a/drivers/ethernet/eth_stm32_hal.c b/drivers/ethernet/eth_stm32_hal.c
index 3a6a92a..46b5020 100644
--- a/drivers/ethernet/eth_stm32_hal.c
+++ b/drivers/ethernet/eth_stm32_hal.c

@@ -26,6 +26,7 @@
 #include <sys/printk.h>
 #include <drivers/clock_control.h>
 #include <drivers/clock_control/stm32_clock_control.h>
+#include <pinmux/stm32/pinmux_stm32.h>
 
 #include "eth.h"
 #include "eth_stm32_hal_priv.h"
@@ -654,6 +655,14 @@
 		return -EIO;
 	}
 
+	/* configure pinmux */
+	ret = stm32_dt_pinctrl_configure(cfg->pinctrl, cfg->pinctrl_len,
+					 (uint32_t)dev_data->heth.Instance);
+	if (ret < 0) {
+		LOG_ERR("Could not configure ethernet pins");
+		return ret;
+	}
+
 	heth = &dev_data->heth;
 
 #if defined(CONFIG_ETH_STM32_HAL_RANDOM_MAC)
@@ -852,6 +861,8 @@
 	irq_enable(DT_INST_IRQN(0));
 }
 
+static const struct soc_gpio_pinctrl eth0_pins[] = ST_STM32_DT_INST_PINCTRL(0, 0);
+
 static const struct eth_stm32_hal_dev_cfg eth0_config = {
 	.config_func = eth0_irq_config,
 	.pclken = {.bus = DT_INST_CLOCKS_CELL_BY_NAME(0, stmmaceth, bus),
@@ -864,6 +875,8 @@
 	.pclken_ptp = {.bus = DT_INST_CLOCKS_CELL_BY_NAME(0, mac_clk_ptp, bus),
 		       .enr = DT_INST_CLOCKS_CELL_BY_NAME(0, mac_clk_ptp, bits)},
 #endif /* !CONFIG_SOC_SERIES_STM32H7X */
+	.pinctrl = eth0_pins,
+	.pinctrl_len = ARRAY_SIZE(eth0_pins),
 };
 
 static struct eth_stm32_hal_dev_data eth0_data = {

diff --git a/drivers/ethernet/eth_stm32_hal_priv.h b/drivers/ethernet/eth_stm32_hal_priv.h
index f2a5c1f..b000b36 100644
--- a/drivers/ethernet/eth_stm32_hal_priv.h
+++ b/drivers/ethernet/eth_stm32_hal_priv.h

@@ -29,6 +29,8 @@
 #if !defined(CONFIG_SOC_SERIES_STM32H7X)
 	struct stm32_pclken pclken_ptp;
 #endif /* !defined(CONFIG_SOC_SERIES_STM32H7X) */
+	const struct soc_gpio_pinctrl *pinctrl;
+	size_t pinctrl_len;
 };
 
 /* Device run time data */

diff --git a/dts/bindings/ethernet/st,stm32-ethernet.yaml b/dts/bindings/ethernet/st,stm32-ethernet.yaml
index 7c9a604..330aa81 100644
--- a/dts/bindings/ethernet/st,stm32-ethernet.yaml
+++ b/dts/bindings/ethernet/st,stm32-ethernet.yaml

@@ -16,3 +16,12 @@
       required: true
     clock-names:
       required: true
+
+    pinctrl-0:
+      type: phandles
+      required: false
+      description: |
+        GPIO pin configuration for Ethernet signals. We expect that the phandles
+        will reference pinctrl nodes, e.g.
+
+           pinctrl-0 = <&eth_ref_clk_pa1 &eth_mdio_pa2 ...>;