| commit | c9c88a4368f5d23a513d1f6391f9a760c90066b7 | [log] [tgz] |
|---|---|---|
| author | Daniel Leung <daniel.leung@intel.com> | Mon Mar 27 16:27:34 2023 -0700 |
| committer | Carles Cufí <carles.cufi@nordicsemi.no> | Tue Nov 21 15:49:48 2023 +0100 |
| tree | 00ab1391af80712ec03f352fc21b2a57077a945c | |
| parent | 81ea43692cf855c4ee5af2cd828eafe3785e889b [diff] |
xtensa: mmu: cache and TLB actions when adding thread to domain When adding a thread to a memory domain, we need to also update the mapped page table if it is the current running thread on the same CPU. If it's not on the same CPU, we need to notify the other CPUs in case the thread is running in one of them. Signed-off-by: Daniel Leung <daniel.leung@intel.com> Signed-off-by: Anas Nashif <anas.nashif@intel.com> Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>