| commit | d7141c96f4f78a7bfd336b812d7aafe970c2dd6d | [log] [tgz] |
|---|---|---|
| author | Khor Swee Aun <swee.aun.khor@intel.com> | Thu Jun 08 10:39:21 2023 +0800 |
| committer | Anas Nashif <anas.nashif@intel.com> | Sat Jun 17 07:34:05 2023 -0400 |
| tree | 6e0f4e3e3e2e3d11c9cbbb3a4eacd48c4c705a0e | |
| parent | d4df89ab8fc61045d2722fadb2b216f15c67ca2e [diff] |
codeowners: Add code owner for INTEL FPGA Nios V/g Add code owner for INTEL FPGA Nios V/g dts, SoC and board. Signed-off-by: Khor Swee Aun <swee.aun.khor@intel.com>