drivers: spi: spi_sam: rework device tree support
Reworked spi_sam driver to utilize new DT_INST macros as part of
this rework we also now get pin ctrl/mux configuration information
from the device tree instead of via Kconfig and defines in soc_pinmap.h
We remove defines from dts_fixup.h and soc_pinmap.h and associated
Kconfig symbols that are no longer needed due to getting all that
information from devicetree.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
diff --git a/boards/arm/sam_e70_xplained/Kconfig.defconfig b/boards/arm/sam_e70_xplained/Kconfig.defconfig
index 3425f6a..257bb15 100644
--- a/boards/arm/sam_e70_xplained/Kconfig.defconfig
+++ b/boards/arm/sam_e70_xplained/Kconfig.defconfig
@@ -57,10 +57,4 @@
endif # NETWORKING
-config SPI_SAME70_PORT_0_PIN_CS3
- bool
- default y
- depends on SPI
- depends on SPI_SAM_PORT_0
-
endif # BOARD_SAM_E70_XPLAINED
diff --git a/boards/arm/sam_e70_xplained/sam_e70_xplained-common.dtsi b/boards/arm/sam_e70_xplained/sam_e70_xplained-common.dtsi
index edcd010..73c2fbf 100644
--- a/boards/arm/sam_e70_xplained/sam_e70_xplained-common.dtsi
+++ b/boards/arm/sam_e70_xplained/sam_e70_xplained-common.dtsi
@@ -67,6 +67,7 @@
&spi0 {
status = "okay";
+ pinctrl-0 = <&pc26c_spi1_miso &pc27c_spi1_mosi &pc24c_spi1_spck &pd27b_spi0_npcs3>;
};
&usart1 {
diff --git a/boards/arm/sam_v71_xult/Kconfig.defconfig b/boards/arm/sam_v71_xult/Kconfig.defconfig
index c88d1f0..4976f84 100644
--- a/boards/arm/sam_v71_xult/Kconfig.defconfig
+++ b/boards/arm/sam_v71_xult/Kconfig.defconfig
@@ -57,10 +57,4 @@
endif # NETWORKING
-config SPI_SAMV71_PORT_0_PIN_CS1
- bool
- default y
- depends on SPI
- depends on SPI_SAM_PORT_0
-
endif # BOARD_SAM_V71_XULT
diff --git a/drivers/spi/Kconfig.sam b/drivers/spi/Kconfig.sam
index 798efea..ab866ec 100644
--- a/drivers/spi/Kconfig.sam
+++ b/drivers/spi/Kconfig.sam
@@ -4,217 +4,9 @@
# Copyright (c) 2018 qianfan Zhao
# SPDX-License-Identifier: Apache-2.0
-menuconfig SPI_SAM
+config SPI_SAM
bool "Atmel SAM series SPI driver"
default y
depends on SOC_FAMILY_SAM
help
Enable support for the SAM SPI driver.
-
-config SPI_SAM_PORT_0
- bool "Enable SPI0"
- depends on SPI_SAM
- select SPI_0
- help
- Enable SPI0 at boot
-
-if SPI_SAM_PORT_0
-
-choice SPI_SAM_PORT_0_PIN_CS0
- bool "CS0 pin"
- optional
- depends on SOC_SERIES_SAM4S || \
- SOC_SERIES_SAM4E || \
- SOC_SERIES_SAME70 || \
- SOC_SERIES_SAMV71
-
- config SPI_SAM_PORT_0_PIN_CS0_PA11
- bool "PA11"
- depends on SOC_SERIES_SAM4S || \
- SOC_SERIES_SAM4E
-
- config SPI_SAM_PORT_0_PIN_CS0_PB2
- bool "PB2"
- depends on SOC_SERIES_SAME70 || \
- SOC_SERIES_SAMV71
-
-endchoice
-
-choice SPI_SAM_PORT_0_PIN_CS1
- bool "CS1 pin"
- optional
- depends on SOC_SERIES_SAM4S || \
- SOC_SERIES_SAM4E || \
- SOC_SERIES_SAME70 || \
- SOC_SERIES_SAMV71
-
- config SPI_SAM_PORT_0_PIN_CS1_PA9
- bool "PA9"
- depends on SOC_SERIES_SAM4S || \
- SOC_SERIES_SAM4E
-
- config SPI_SAM_PORT_0_PIN_CS1_PA31
- bool "PA31"
- depends on SOC_SERIES_SAM4S || \
- SOC_SERIES_SAM4E || \
- SOC_SERIES_SAME70 || \
- SOC_SERIES_SAMV71
-
- config SPI_SAM_PORT_0_PIN_CS1_PB14
- bool "PB14"
- depends on SOC_SERIES_SAM4S || \
- SOC_SERIES_SAM4E
-
- config SPI_SAM_PORT_0_PIN_CS1_PC4
- bool "PC4"
- depends on SOC_SERIES_SAM4S || \
- SOC_SERIES_SAM4E
-
- config SPI_SAM_PORT_0_PIN_CS1_PD25
- bool "PD25"
- depends on SOC_SERIES_SAME70 || \
- SOC_SERIES_SAMV71
-
-endchoice
-
-choice SPI_SAM_PORT_0_PIN_CS2
- bool "CS2 pin"
- optional
- depends on SOC_SERIES_SAM4S || \
- SOC_SERIES_SAM4E || \
- SOC_SERIES_SAME70 || \
- SOC_SERIES_SAMV71
-
- config SPI_SAM_PORT_0_PIN_CS2_PA10
- bool "PA10"
- depends on SOC_SERIES_SAM4S || \
- SOC_SERIES_SAM4E
-
- config SPI_SAM_PORT_0_PIN_CS2_PA30
- bool "PA30"
- depends on SOC_SERIES_SAM4S || \
- SOC_SERIES_SAM4E
-
- config SPI_SAM_PORT_0_PIN_CS2_PB2
- bool "PB2"
- depends on SOC_SERIES_SAM4S || \
- SOC_SERIES_SAM4E
-
- config SPI_SAM_PORT_0_PIN_CS2_PD12
- bool "PD12"
- depends on SOC_SERIES_SAME70 || \
- SOC_SERIES_SAMV71
-
-endchoice
-
-choice SPI_SAM_PORT_0_PIN_CS3
- bool "CS3 pin"
- optional
- depends on SOC_SERIES_SAM4S || \
- SOC_SERIES_SAM4E || \
- SOC_SERIES_SAME70 || \
- SOC_SERIES_SAMV71
-
- config SPI_SAM_PORT_0_PIN_CS3_PA3
- bool "PA3"
- depends on SOC_SERIES_SAM4S || \
- SOC_SERIES_SAM4E
-
- config SPI_SAM_PORT_0_PIN_CS3_PA5
- bool "PA5"
- depends on SOC_SERIES_SAM4S || \
- SOC_SERIES_SAM4E
-
- config SPI_SAM_PORT_0_PIN_CS3_PA22
- bool "PA22"
- depends on SOC_SERIES_SAM4S || \
- SOC_SERIES_SAM4E
-
- config SPI_SAM_PORT_0_PIN_CS3_PD27
- bool "PD27"
- depends on SOC_SERIES_SAME70 || \
- SOC_SERIES_SAMV71
-
-endchoice
-
-endif # SPI_SAM_PORT_0
-
-config SPI_SAM_PORT_1
- bool "Enable SPI1"
- depends on SPI_SAM && \
- (SOC_SERIES_SAME70 || \
- SOC_SERIES_SAMV71)
- select SPI_1
- help
- Enable SPI1 at boot
-
-if SPI_SAM_PORT_1
-
-choice SPI_SAM_PORT_1_PIN_CS0
- bool "CS0 pin"
- optional
- depends on SOC_SERIES_SAME70 || \
- SOC_SERIES_SAMV71
-
- config SPI_SAM_PORT_1_PIN_CS0_PC25
- bool "PC25"
- depends on SOC_SERIES_SAME70 || \
- SOC_SERIES_SAMV71
-
-endchoice
-
-choice SPI_SAM_PORT_1_PIN_CS1
- prompt "CS1 pin"
- optional
- depends on SOC_SERIES_SAME70 || \
- SOC_SERIES_SAMV71
-
- config SPI_SAM_PORT_1_PIN_CS1_PC28
- bool "PC28"
- depends on SOC_SERIES_SAME70 || \
- SOC_SERIES_SAMV71
-
- config SPI_SAM_PORT_1_PIN_CS1_PD0
- bool "PD0"
- depends on SOC_SERIES_SAME70 || \
- SOC_SERIES_SAMV71
-
-endchoice
-
-choice SPI_SAM_PORT_1_PIN_CS2
- prompt "CS2 pin"
- optional
- depends on SOC_SERIES_SAME70 || \
- SOC_SERIES_SAMV71
-
- config SPI_SAM_PORT_1_PIN_CS2_PC29
- bool "PC29"
- depends on SOC_SERIES_SAME70 || \
- SOC_SERIES_SAMV71
-
- config SPI_SAM_PORT_1_PIN_CS2_PD1
- bool "PD1"
- depends on SOC_SERIES_SAME70 || \
- SOC_SERIES_SAMV71
-
-endchoice
-
-choice SPI_SAM_PORT_1_PIN_CS3
- prompt "CS3 pin"
- optional
- depends on SOC_SERIES_SAME70 || \
- SOC_SERIES_SAMV71
-
- config SPI_SAM_PORT_1_PIN_CS3_PC30
- bool "PC30"
- depends on SOC_SERIES_SAME70 || \
- SOC_SERIES_SAMV71
-
- config SPI_SAM_PORT_1_PIN_CS3_PD2
- bool "PD2"
- depends on SOC_SERIES_SAME70 || \
- SOC_SERIES_SAMV71
-
-endchoice
-
-endif # SPI_SAM_PORT_1
diff --git a/drivers/spi/spi_sam.c b/drivers/spi/spi_sam.c
index 54be46b..107da95 100644
--- a/drivers/spi/spi_sam.c
+++ b/drivers/spi/spi_sam.c
@@ -5,6 +5,8 @@
* SPDX-License-Identifier: Apache-2.0
*/
+#define DT_DRV_COMPAT atmel_sam_spi
+
#define LOG_LEVEL CONFIG_SPI_LOG_LEVEL
#include <logging/log.h>
LOG_MODULE_REGISTER(spi_sam);
@@ -21,8 +23,8 @@
struct spi_sam_config {
Spi *regs;
u32_t periph_id;
- struct soc_gpio_pin pins;
- struct soc_gpio_pin cs[SAM_SPI_CHIP_SELECT_COUNT];
+ u32_t num_pins;
+ struct soc_gpio_pin pins[];
};
/* Device run time data */
@@ -429,16 +431,10 @@
{
const struct spi_sam_config *cfg = dev->config->config_info;
struct spi_sam_data *data = dev->driver_data;
- int i;
soc_pmc_peripheral_enable(cfg->periph_id);
- soc_gpio_configure(&cfg->pins);
- for (i = 0; i < SAM_SPI_CHIP_SELECT_COUNT; i++) {
- if (cfg->cs[i].regs) {
- soc_gpio_configure(&cfg->cs[i]);
- }
- }
+ soc_gpio_list_configure(cfg->pins, cfg->num_pins);
spi_context_unlock_unconditionally(&data->ctx);
@@ -457,48 +453,12 @@
.release = spi_sam_release,
};
-#ifndef PIN_SPI0_CS0
-#define PIN_SPI0_CS0 {0, (Pio *)0, 0, 0}
-#endif
-
-#ifndef PIN_SPI0_CS1
-#define PIN_SPI0_CS1 {0, (Pio *)0, 0, 0}
-#endif
-
-#ifndef PIN_SPI0_CS2
-#define PIN_SPI0_CS2 {0, (Pio *)0, 0, 0}
-#endif
-
-#ifndef PIN_SPI0_CS3
-#define PIN_SPI0_CS3 {0, (Pio *)0, 0, 0}
-#endif
-
-#define PINS_SPI0_CS { PIN_SPI0_CS0, PIN_SPI0_CS1, PIN_SPI0_CS2, PIN_SPI0_CS3 }
-
-#ifndef PIN_SPI1_CS0
-#define PIN_SPI1_CS0 {0, (Pio *)0, 0, 0}
-#endif
-
-#ifndef PIN_SPI1_CS1
-#define PIN_SPI1_CS1 {0, (Pio *)0, 0, 0}
-#endif
-
-#ifndef PIN_SPI1_CS2
-#define PIN_SPI1_CS2 {0, (Pio *)0, 0, 0}
-#endif
-
-#ifndef PIN_SPI1_CS3
-#define PIN_SPI1_CS3 {0, (Pio *)0, 0, 0}
-#endif
-
-#define PINS_SPI1_CS { PIN_SPI1_CS0, PIN_SPI1_CS1, PIN_SPI1_CS2, PIN_SPI1_CS3 }
-
#define SPI_SAM_DEFINE_CONFIG(n) \
static const struct spi_sam_config spi_sam_config_##n = { \
- .regs = (Spi *)DT_SPI_##n##_BASE_ADDRESS, \
- .periph_id = DT_SPI_##n##_PERIPHERAL_ID, \
- .pins = PINS_SPI##n, \
- .cs = PINS_SPI##n##_CS, \
+ .regs = (Spi *)DT_INST_REG_ADDR(n), \
+ .periph_id = DT_INST_PROP(n, peripheral_id), \
+ .num_pins = ATMEL_SAM_DT_NUM_PINS(n), \
+ .pins = ATMEL_SAM_DT_PINS(n), \
}
#define SPI_SAM_DEVICE_INIT(n) \
@@ -508,15 +468,9 @@
SPI_CONTEXT_INIT_SYNC(spi_sam_dev_data_##n, ctx), \
}; \
DEVICE_AND_API_INIT(spi_sam_##n, \
- DT_SPI_##n##_NAME, \
+ DT_INST_LABEL(n), \
&spi_sam_init, &spi_sam_dev_data_##n, \
&spi_sam_config_##n, POST_KERNEL, \
CONFIG_SPI_INIT_PRIORITY, &spi_sam_driver_api)
-#if DT_SPI_0_BASE_ADDRESS
-SPI_SAM_DEVICE_INIT(0);
-#endif
-
-#if DT_SPI_1_BASE_ADDRESS
-SPI_SAM_DEVICE_INIT(1);
-#endif
+DT_INST_FOREACH(SPI_SAM_DEVICE_INIT)
diff --git a/samples/net/sockets/echo_client/boards/sam4s_xplained.conf b/samples/net/sockets/echo_client/boards/sam4s_xplained.conf
index 61239ff..26f91d3 100644
--- a/samples/net/sockets/echo_client/boards/sam4s_xplained.conf
+++ b/samples/net/sockets/echo_client/boards/sam4s_xplained.conf
@@ -14,5 +14,3 @@
CONFIG_GPIO_SAM=y
CONFIG_GPIO=y
-CONFIG_SPI_SAM_PORT_0=y
-CONFIG_SPI_SAM_PORT_0_PIN_CS1_PA31=y
diff --git a/samples/net/sockets/echo_client/boards/sam4s_xplained.overlay b/samples/net/sockets/echo_client/boards/sam4s_xplained.overlay
index 5a46616..f1bd25c 100644
--- a/samples/net/sockets/echo_client/boards/sam4s_xplained.overlay
+++ b/samples/net/sockets/echo_client/boards/sam4s_xplained.overlay
@@ -8,6 +8,7 @@
status = "okay";
label = "SPI_RF2XX";
cs-gpios = <&pioa 31 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
+ pinctrl-0 = <&pa12a_spi_miso &pa13a_spi_mosi &pa14a_spi_spck &pa31a_spi_npcs1>;
rf2xx@0 {
compatible = "atmel,rf2xx";
diff --git a/samples/net/sockets/echo_client/boards/sam_v71_xult.conf b/samples/net/sockets/echo_client/boards/sam_v71_xult.conf
index 1a7657f..26f91d3 100644
--- a/samples/net/sockets/echo_client/boards/sam_v71_xult.conf
+++ b/samples/net/sockets/echo_client/boards/sam_v71_xult.conf
@@ -14,5 +14,3 @@
CONFIG_GPIO_SAM=y
CONFIG_GPIO=y
-CONFIG_SPI_SAM_PORT_0=y
-CONFIG_SPI_SAM_PORT_0_PIN_CS1_PD25=y
diff --git a/samples/net/sockets/echo_client/boards/sam_v71_xult.overlay b/samples/net/sockets/echo_client/boards/sam_v71_xult.overlay
index 73ac341..16f820b 100644
--- a/samples/net/sockets/echo_client/boards/sam_v71_xult.overlay
+++ b/samples/net/sockets/echo_client/boards/sam_v71_xult.overlay
@@ -8,6 +8,7 @@
status = "okay";
label = "SPI_RF2XX";
cs-gpios = <&piod 25 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
+ pinctrl-0 = <&pc26c_spi1_miso &pc27c_spi1_mosi &pc24c_spi1_spck &pd25b_spi0_npcs1>;
rf2xx@0 {
compatible = "atmel,rf2xx";
diff --git a/samples/net/sockets/echo_server/boards/sam4e_xpro.conf b/samples/net/sockets/echo_server/boards/sam4e_xpro.conf
index e6a0da9..c216684 100644
--- a/samples/net/sockets/echo_server/boards/sam4e_xpro.conf
+++ b/samples/net/sockets/echo_server/boards/sam4e_xpro.conf
@@ -20,5 +20,3 @@
CONFIG_GPIO_SAM=y
CONFIG_GPIO=y
-CONFIG_SPI_SAM_PORT_0=y
-CONFIG_SPI_SAM_PORT_0_PIN_CS1_PB14=y
diff --git a/samples/net/sockets/echo_server/boards/sam4e_xpro.overlay b/samples/net/sockets/echo_server/boards/sam4e_xpro.overlay
index 40d3ce5..558ec41 100644
--- a/samples/net/sockets/echo_server/boards/sam4e_xpro.overlay
+++ b/samples/net/sockets/echo_server/boards/sam4e_xpro.overlay
@@ -8,6 +8,7 @@
status = "okay";
label = "SPI_RF2XX";
cs-gpios = <&piob 14 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
+ pinctrl-0 = <&pa12a_spi_miso &pa13a_spi_mosi &pa14a_spi_spck &pb14a_spi_npcs1>;
rf2xx@0 {
compatible = "atmel,rf2xx";
diff --git a/samples/net/sockets/echo_server/boards/sam_v71_xult.conf b/samples/net/sockets/echo_server/boards/sam_v71_xult.conf
index 6ec4b75..e883f51 100644
--- a/samples/net/sockets/echo_server/boards/sam_v71_xult.conf
+++ b/samples/net/sockets/echo_server/boards/sam_v71_xult.conf
@@ -16,5 +16,3 @@
CONFIG_I2C=n
CONFIG_GPIO_SAM=y
CONFIG_GPIO=y
-CONFIG_SPI_SAM_PORT_0=y
-CONFIG_SPI_SAM_PORT_0_PIN_CS1_PD25=y
diff --git a/samples/net/sockets/echo_server/boards/sam_v71_xult.overlay b/samples/net/sockets/echo_server/boards/sam_v71_xult.overlay
index 73ac341..5f8a1b7 100644
--- a/samples/net/sockets/echo_server/boards/sam_v71_xult.overlay
+++ b/samples/net/sockets/echo_server/boards/sam_v71_xult.overlay
@@ -7,6 +7,7 @@
&spi0 {
status = "okay";
label = "SPI_RF2XX";
+ pinctrl-0 = <&pc26c_spi1_miso &pc27c_spi1_mosi &pc24c_spi1_spck &pd25b_spi0_npcs1>;
cs-gpios = <&piod 25 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
rf2xx@0 {
diff --git a/soc/arm/atmel_sam/sam4e/soc_pinmap.h b/soc/arm/atmel_sam/sam4e/soc_pinmap.h
index 47144c5..13bc86e 100644
--- a/soc/arm/atmel_sam/sam4e/soc_pinmap.h
+++ b/soc/arm/atmel_sam/sam4e/soc_pinmap.h
@@ -17,46 +17,6 @@
#include <soc.h>
-/* Serial Peripheral Interface (SPI) */
-
-#ifdef CONFIG_SPI_SAM_PORT_0_PIN_CS0_PA11
-#define PIN_SPI0_CS0 {PIO_PA11A_NPCS0, PIOA, ID_PIOA, SOC_GPIO_FUNC_A}
-#endif
-#ifdef CONFIG_SPI_SAM_PORT_0_PIN_CS1_PA9
-#define PIN_SPI0_CS1 {PIO_PA9B_NPCS1, PIOA, ID_PIOA, SOC_GPIO_FUNC_B}
-#endif
-#ifdef CONFIG_SPI_SAM_PORT_0_PIN_CS1_PA31
-#define PIN_SPI0_CS1 {PIO_PA31A_NPCS1, PIOA, ID_PIOA, SOC_GPIO_FUNC_A}
-#endif
-#ifdef CONFIG_SPI_SAM_PORT_0_PIN_CS1_PB14
-#define PIN_SPI0_CS1 {PIO_PB14A_NPCS1, PIOB, ID_PIOB, SOC_GPIO_FUNC_A}
-#endif
-#ifdef CONFIG_SPI_SAM_PORT_0_PIN_CS1_PC4
-#define PIN_SPI0_CS1 {PIO_PC4B_NPCS1, PIOC, ID_PIOC, SOC_GPIO_FUNC_B}
-#endif
-#ifdef CONFIG_SPI_SAM_PORT_0_PIN_CS2_PA10
-#define PIN_SPI0_CS2 {PIO_PA10B_NPCS2, PIOA, ID_PIOA, SOC_GPIO_FUNC_B}
-#endif
-#ifdef CONFIG_SPI_SAM_PORT_0_PIN_CS2_PA30
-#define PIN_SPI0_CS2 {PIO_PA30B_NPCS2, PIOA, ID_PIOA, SOC_GPIO_FUNC_B}
-#endif
-#ifdef CONFIG_SPI_SAM_PORT_0_PIN_CS2_PB2
-#define PIN_SPI0_CS2 {PIO_PB2B_NPCS2, PIOB, ID_PIOB, SOC_GPIO_FUNC_B}
-#endif
-#ifdef CONFIG_SPI_SAM_PORT_0_PIN_CS3_PA3
-#define PIN_SPI0_CS3 {PIO_PA3B_NPCS3, PIOA, ID_PIOA, SOC_GPIO_FUNC_B}
-#endif
-#ifdef CONFIG_SPI_SAM_PORT_0_PIN_CS3_PA5
-#define PIN_SPI0_CS3 {PIO_PA5B_NPCS3, PIOA, ID_PIOA, SOC_GPIO_FUNC_B}
-#endif
-#ifdef CONFIG_SPI_SAM_PORT_0_PIN_CS3_PA22
-#define PIN_SPI0_CS3 {PIO_PA22B_NPCS3, PIOA, ID_PIOA, SOC_GPIO_FUNC_B}
-#endif
-
-#define PINS_SPI0_MASK \
- (PIO_PA12A_MISO | PIO_PA13A_MOSI | PIO_PA14A_SPCK)
-#define PINS_SPI0 {PINS_SPI0_MASK, PIOA, ID_PIOA, SOC_GPIO_FUNC_A}
-
/* Ethernet MAC (GMAC) */
#define PINS_GMAC_MASK (PIO_PD0A_GTXCK | PIO_PD1A_GTXEN | \
diff --git a/soc/arm/atmel_sam/sam4s/soc_pinmap.h b/soc/arm/atmel_sam/sam4s/soc_pinmap.h
index d69c939..36f18e5 100644
--- a/soc/arm/atmel_sam/sam4s/soc_pinmap.h
+++ b/soc/arm/atmel_sam/sam4s/soc_pinmap.h
@@ -16,44 +16,4 @@
#include <soc.h>
-/* Serial Peripheral Interface (SPI) */
-
-#ifdef CONFIG_SPI_SAM_PORT_0_PIN_CS0_PA11
-#define PIN_SPI0_CS0 {PIO_PA11A_NPCS0, PIOA, ID_PIOA, SOC_GPIO_FUNC_A}
-#endif
-#ifdef CONFIG_SPI_SAM_PORT_0_PIN_CS1_PA9
-#define PIN_SPI0_CS1 {PIO_PA9B_NPCS1, PIOA, ID_PIOA, SOC_GPIO_FUNC_B}
-#endif
-#ifdef CONFIG_SPI_SAM_PORT_0_PIN_CS1_PA31
-#define PIN_SPI0_CS1 {PIO_PA31A_NPCS1, PIOA, ID_PIOA, SOC_GPIO_FUNC_A}
-#endif
-#ifdef CONFIG_SPI_SAM_PORT_0_PIN_CS1_PB14
-#define PIN_SPI0_CS1 {PIO_PB14A_NPCS1, PIOB, ID_PIOB, SOC_GPIO_FUNC_A}
-#endif
-#ifdef CONFIG_SPI_SAM_PORT_0_PIN_CS1_PC4
-#define PIN_SPI0_CS1 {PIO_PC4B_NPCS1, PIOC, ID_PIOC, SOC_GPIO_FUNC_B}
-#endif
-#ifdef CONFIG_SPI_SAM_PORT_0_PIN_CS2_PA10
-#define PIN_SPI0_CS2 {PIO_PA10B_NPCS2, PIOA, ID_PIOA, SOC_GPIO_FUNC_B}
-#endif
-#ifdef CONFIG_SPI_SAM_PORT_0_PIN_CS2_PA30
-#define PIN_SPI0_CS2 {PIO_PA30B_NPCS2, PIOA, ID_PIOA, SOC_GPIO_FUNC_B}
-#endif
-#ifdef CONFIG_SPI_SAM_PORT_0_PIN_CS2_PB2
-#define PIN_SPI0_CS2 {PIO_PB2B_NPCS2, PIOB, ID_PIOB, SOC_GPIO_FUNC_B}
-#endif
-#ifdef CONFIG_SPI_SAM_PORT_0_PIN_CS3_PA3
-#define PIN_SPI0_CS3 {PIO_PA3B_NPCS3, PIOA, ID_PIOA, SOC_GPIO_FUNC_B}
-#endif
-#ifdef CONFIG_SPI_SAM_PORT_0_PIN_CS3_PA5
-#define PIN_SPI0_CS3 {PIO_PA5B_NPCS3, PIOA, ID_PIOA, SOC_GPIO_FUNC_B}
-#endif
-#ifdef CONFIG_SPI_SAM_PORT_0_PIN_CS3_PA22
-#define PIN_SPI0_CS3 {PIO_PA22B_NPCS3, PIOA, ID_PIOA, SOC_GPIO_FUNC_B}
-#endif
-
-#define PINS_SPI0_MASK \
- (PIO_PA12A_MISO | PIO_PA13A_MOSI | PIO_PA14A_SPCK)
-#define PINS_SPI0 {PINS_SPI0_MASK, PIOA, ID_PIOA, SOC_GPIO_FUNC_A}
-
#endif /* _ATMEL_SAM4S_SOC_PINMAP_H_ */
diff --git a/soc/arm/atmel_sam/same70/soc_pinmap.h b/soc/arm/atmel_sam/same70/soc_pinmap.h
index c56fbe1..298c3a5 100644
--- a/soc/arm/atmel_sam/same70/soc_pinmap.h
+++ b/soc/arm/atmel_sam/same70/soc_pinmap.h
@@ -43,52 +43,4 @@
#define PINS_SSC0 {PIN_SSC0_RD, PIN_SSC0_RF, PIN_SSC0_RK, PIN_SSC0_TD, \
PIN_SSC0_TF, PIN_SSC0_TK}
-/* Serial Peripheral Interface (SPI) */
-
-#ifdef CONFIG_SPI_SAM_PORT_0_PIN_CS0_PB2
-#define PIN_SPI0_CS0 {PIO_PB2D_SPI0_NPCS0, PIOB, ID_PIOB, SOC_GPIO_FUNC_D}
-#endif
-#ifdef CONFIG_SPI_SAM_PORT_0_PIN_CS1_PA31
-#define PIN_SPI0_CS1 {PIO_PA31A_SPI0_NPCS1, PIOA, ID_PIOA, SOC_GPIO_FUNC_A}
-#endif
-#ifdef CONFIG_SPI_SAM_PORT_0_PIN_CS1_PD25
-#define PIN_SPI0_CS1 {PIO_PD25B_SPI0_NPCS1, PIOD, ID_PIOD, SOC_GPIO_FUNC_B}
-#endif
-#ifdef CONFIG_SPI_SAM_PORT_0_PIN_CS2_PD12
-#define PIN_SPI0_CS2 {PIO_PD12C_SPI0_NPCS2, PIOD, ID_PIOD, SOC_GPIO_FUNC_C}
-#endif
-#ifdef CONFIG_SPI_SAM_PORT_0_PIN_CS3_PD27
-#define PIN_SPI0_CS3 {PIO_PD27B_SPI0_NPCS3, PIOD, ID_PIOD, SOC_GPIO_FUNC_B}
-#endif
-
-#define PINS_SPI0_MASK \
- (PIO_PD20B_SPI0_MISO | PIO_PD21B_SPI0_MOSI | PIO_PD22B_SPI0_SPCK)
-#define PINS_SPI0 {PINS_SPI0_MASK, PIOD, ID_PIOD, SOC_GPIO_FUNC_B}
-
-#ifdef CONFIG_SPI_SAM_PORT_1_PIN_CS0_PC25
-#define PIN_SPI1_CS0 {PIO_PC25C_SPI1_NPCS0, PIOC, ID_PIOC, SOC_GPIO_FUNC_C}
-#endif
-#ifdef CONFIG_SPI_SAM_PORT_1_PIN_CS1_PC28
-#define PIN_SPI1_CS1_PC28 {PIO_PC28C_SPI1_NPCS1, PIOC, ID_PIOC, SOC_GPIO_FUNC_C}
-#endif
-#ifdef CONFIG_SPI_SAM_PORT_1_PIN_CS1_PD0
-#define PIN_SPI1_CS1_PD0 {PIO_PD0C_SPI1_NPCS1, PIOD, ID_PIOD, SOC_GPIO_FUNC_C}
-#endif
-#ifdef CONFIG_SPI_SAM_PORT_1_PIN_CS2_PC29
-#define PIN_SPI1_CS2_PC29 {PIO_PC29C_SPI1_NPCS2, PIOC, ID_PIOC, SOC_GPIO_FUNC_C}
-#endif
-#ifdef CONFIG_SPI_SAM_PORT_1_PIN_CS2_PD1
-#define PIN_SPI1_CS2_PD1 {PIO_PD1C_SPI1_NPCS2, PIOD, ID_PIOD, SOC_GPIO_FUNC_C}
-#endif
-#ifdef CONFIG_SPI_SAM_PORT_1_PIN_CS3_PC30
-#define PIN_SPI1_CS3_PC30 {PIO_PC30C_SPI1_NPCS3, PIOC, ID_PIOC, SOC_GPIO_FUNC_C}
-#endif
-#ifdef CONFIG_SPI_SAM_PORT_1_PIN_CS3_PD2
-#define PIN_SPI1_CS3_PD2 {PIO_PD2C_SPI1_NPCS3, PIOD, ID_PIOD, SOC_GPIO_FUNC_C}
-#endif
-
-#define PINS_SPI1_MASK \
- (PIO_PC26C_SPI1_MISO | PIO_PC27C_SPI1_MOSI | PIO_PC24C_SPI1_SPCK)
-#define PINS_SPI1 {PINS_SPI1_MASK, PIOC, ID_PIOC, SOC_GPIO_FUNC_C}
-
#endif /* _ATMEL_SAM_SOC_PINMAP_H_ */
diff --git a/soc/arm/atmel_sam/samv71/soc_pinmap.h b/soc/arm/atmel_sam/samv71/soc_pinmap.h
index 1cb2708..573bfa6 100644
--- a/soc/arm/atmel_sam/samv71/soc_pinmap.h
+++ b/soc/arm/atmel_sam/samv71/soc_pinmap.h
@@ -44,52 +44,4 @@
#define PINS_SSC0 {PIN_SSC0_RD, PIN_SSC0_RF, PIN_SSC0_RK, PIN_SSC0_TD, \
PIN_SSC0_TF, PIN_SSC0_TK}
-/* Serial Peripheral Interface (SPI) */
-
-#ifdef CONFIG_SPI_SAM_PORT_0_PIN_CS0_PB2
-#define PIN_SPI0_CS0 {PIO_PB2D_SPI0_NPCS0, PIOB, ID_PIOB, SOC_GPIO_FUNC_D}
-#endif
-#ifdef CONFIG_SPI_SAM_PORT_0_PIN_CS1_PA31
-#define PIN_SPI0_CS1 {PIO_PA31A_SPI0_NPCS1, PIOA, ID_PIOA, SOC_GPIO_FUNC_A}
-#endif
-#ifdef CONFIG_SPI_SAM_PORT_0_PIN_CS1_PD25
-#define PIN_SPI0_CS1 {PIO_PD25B_SPI0_NPCS1, PIOD, ID_PIOD, SOC_GPIO_FUNC_B}
-#endif
-#ifdef CONFIG_SPI_SAM_PORT_0_PIN_CS2_PD12
-#define PIN_SPI0_CS2 {PIO_PD12C_SPI0_NPCS2, PIOD, ID_PIOD, SOC_GPIO_FUNC_C}
-#endif
-#ifdef CONFIG_SPI_SAM_PORT_0_PIN_CS3_PD27
-#define PIN_SPI0_CS3 {PIO_PD27B_SPI0_NPCS3, PIOD, ID_PIOD, SOC_GPIO_FUNC_B}
-#endif
-
-#define PINS_SPI0_MASK \
- (PIO_PD20B_SPI0_MISO | PIO_PD21B_SPI0_MOSI | PIO_PD22B_SPI0_SPCK)
-#define PINS_SPI0 {PINS_SPI0_MASK, PIOD, ID_PIOD, SOC_GPIO_FUNC_B}
-
-#ifdef CONFIG_SPI_SAM_PORT_1_PIN_CS0_PC25
-#define PIN_SPI1_CS0 {PIO_PC25C_SPI1_NPCS0, PIOC, ID_PIOC, SOC_GPIO_FUNC_C}
-#endif
-#ifdef CONFIG_SPI_SAM_PORT_1_PIN_CS1_PC28
-#define PIN_SPI1_CS1_PC28 {PIO_PC28C_SPI1_NPCS1, PIOC, ID_PIOC, SOC_GPIO_FUNC_C}
-#endif
-#ifdef CONFIG_SPI_SAM_PORT_1_PIN_CS1_PD0
-#define PIN_SPI1_CS1_PD0 {PIO_PD0C_SPI1_NPCS1, PIOD, ID_PIOD, SOC_GPIO_FUNC_C}
-#endif
-#ifdef CONFIG_SPI_SAM_PORT_1_PIN_CS2_PC29
-#define PIN_SPI1_CS2_PC29 {PIO_PC29C_SPI1_NPCS2, PIOC, ID_PIOC, SOC_GPIO_FUNC_C}
-#endif
-#ifdef CONFIG_SPI_SAM_PORT_1_PIN_CS2_PD1
-#define PIN_SPI1_CS2_PD1 {PIO_PD1C_SPI1_NPCS2, PIOD, ID_PIOD, SOC_GPIO_FUNC_C}
-#endif
-#ifdef CONFIG_SPI_SAM_PORT_1_PIN_CS3_PC30
-#define PIN_SPI1_CS3_PC30 {PIO_PC30C_SPI1_NPCS3, PIOC, ID_PIOC, SOC_GPIO_FUNC_C}
-#endif
-#ifdef CONFIG_SPI_SAM_PORT_1_PIN_CS3_PD2
-#define PIN_SPI1_CS3_PD2 {PIO_PD2C_SPI1_NPCS3, PIOD, ID_PIOD, SOC_GPIO_FUNC_C}
-#endif
-
-#define PINS_SPI1_MASK \
- (PIO_PC26C_SPI1_MISO | PIO_PC27C_SPI1_MOSI | PIO_PC24C_SPI1_SPCK)
-#define PINS_SPI1 {PINS_SPI1_MASK, PIOC, ID_PIOC, SOC_GPIO_FUNC_C}
-
#endif /* _ATMEL_SAM_SOC_PINMAP_H_ */
