commit | e039b8d59ce182ea40c933827e79b763143aa621 | [log] [tgz] |
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author | Michael Hope <michaelh@juju.nz> | Thu May 01 08:11:15 2025 +0000 |
committer | Benjamin Cabé <kartben@gmail.com> | Fri May 09 01:40:22 2025 +0200 |
tree | 80a43d347a4a61e73a978674aae8f90dc1523e93 | |
parent | 3dbf080698aa6cb5568d52ca9edf508712fa585e [diff] |
drivers: clock_control: set the flash wait state to match the RM The flash latency needs to be configured before switching to the high speed clock. Set the latency based on the CH32V003 and CH32V00x reference manual. Signed-off-by: Michael Hope <michaelh@juju.nz>