| commit | e2881fe61aa6d387aa7d96374026e5295df913fa | [log] [tgz] |
|---|---|---|
| author | Jaroslaw Stelter <Jaroslaw.Stelter@intel.com> | Mon Sep 19 16:57:08 2022 +0200 |
| committer | Carles Cufí <carles.cufi@nordicsemi.no> | Mon Apr 03 15:17:21 2023 +0200 |
| tree | 46bafafc8f04d2a39c9cdf36ab03408080243bb5 | |
| parent | f5728c298dce210cf72e1ab5dc9cd7174a299c8a [diff] |
intel_adsp: ace20_lnl: add soc definitions for LNL platform. LNL platform is ACE 2.0 series with changes in shim registers and HW features. Initial definition replicates MTL as much as possible, however it will vary after enabling LNL platform. Signed-off-by: Jaroslaw Stelter <Jaroslaw.Stelter@intel.com> Signed-off-by: Anas Nashif <anas.nashif@intel.com>