soc: atmel: sam: Fix cache management

The current platform initialization do not take in consideration cache
management for historic reasons. This fixes any miss configuration and
allow users to enable/disable caches at board definition. The default
value is cache disabled and the below examples are for SAMV71 which
have both I/D Cache available:

I Cache only:
CONFIG_CACHE_MANAGEMENT=y
CONFIG_DCACHE=n

D Cache only:
CONFIG_CACHE_MANAGEMENT=y
CONFIG_ICACHE=n

I/D Cache disabled:
CONFIG_ICACHE=n
CONFIG_DCACHE=n

I/D Cache Enabled:
CONFIG_CACHE_MANAGEMENT=y

Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
8 files changed