arch: xtensa: add macros for user registers

This patch adds RUR and WUR macros to read and write user special
registers.

Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>

include/zephyr/arch/xtensa/arch_inlines.h

diff --git a/include/zephyr/arch/xtensa/arch_inlines.h b/include/zephyr/arch/xtensa/arch_inlines.h
index c723b42..027342d 100644
--- a/include/zephyr/arch/xtensa/arch_inlines.h
+++ b/include/zephyr/arch/xtensa/arch_inlines.h
@@ -23,6 +23,16 @@
 		__asm__ volatile ("wsr." sr " %0" : : "r"(v)); \
 	} while (false)
 
+#define RUR(ur) \
+	({uint32_t v; \
+	 __asm__ volatile ("rur." ur " %0" : "=a"(v)); \
+	 v; })
+
+#define WUR(ur, v) \
+	do { \
+		__asm__ volatile ("wur." ur " %0" : : "r"(v)); \
+	} while (false)
+
 static ALWAYS_INLINE _cpu_t *arch_curr_cpu(void)
 {
 	_cpu_t *cpu;