| commit | f062490c7eb206be0679a79d83081fec6996e485 | [log] [tgz] |
|---|---|---|
| author | Nicolas Pitre <npitre@baylibre.com> | Fri Feb 26 13:51:30 2021 -0500 |
| committer | Anas Nashif <anas.nashif@intel.com> | Tue Mar 16 08:43:19 2021 -0400 |
| tree | 7fe7419486ac1d1d626d178d0ed10d000bac4ed6 | |
| parent | a010651c65f517be53b268d8f32fe550d638faef [diff] |
aarch64: mmu: add TLB flushing on mapping changes Pretty crude for now, as we always invalidate the entire set. It remains to be seen if more fined grained TLB flushing is worth the added complexity given this ought to be a relatively rare event. Signed-off-by: Nicolas Pitre <npitre@baylibre.com>