| commit | f668474e4d5fa378612699a850dd351356e85d62 | [log] [tgz] |
|---|---|---|
| author | Immo Birnbaum <Immo.Birnbaum@weidmueller.com> | Thu Jul 15 13:05:54 2021 +0200 |
| committer | Carles Cufí <carles.cufi@nordicsemi.no> | Thu Oct 28 15:26:50 2021 +0200 |
| tree | c40ce66d3ef241f5400a7d632041d21216ae1c12 | |
| parent | 315ad1d6e6d2d62af05a1a213d23a723dcf20771 [diff] |
soc: arm: dts: arm: xilinx: Zynq-7000 SoC init code, device tree data Add SoC-specific code, the basic device tree and Kconfig data as well as the corresponding linker command file for the Xilinx Zynq-7000 family of SoCs. This SoC - either as a QEMU simulation or on actual hardware such as the Avnet/Digilent ZedBoard - is suitable as an ini- tial target for the ARMv7 Cortex-A support. Signed-off-by: Immo Birnbaum <Immo.Birnbaum@weidmueller.com>