| commit | f6f2e57ab96fc880a4592fc63a93db4b9767202c | [log] [tgz] |
|---|---|---|
| author | Martino Facchin <m.facchin@arduino.cc> | Wed Feb 05 18:03:21 2025 +0100 |
| committer | Benjamin Cabé <kartben@gmail.com> | Thu Mar 27 17:18:13 2025 +0100 |
| tree | aeaa6a617299d5e574f92916ef0ca94398db8840 | |
| parent | 67834a84c9f21abf36a93b4a094d07c4e11b7c2f [diff] |
soc: renesas: ra: ra6m5: clear NVIC->ITNS at startup for non TZ Otherwise, interrupts will trigger a very funny fault See https://github.com/arduino/ArduinoCore-renesas/blob/main/cores/arduino/main.cpp#L49-L57 Signed-off-by: Martino Facchin <m.facchin@arduino.cc>