| commit | f8b7aabd1290b73f2424268ad840f8c6577236e0 | [log] [tgz] |
|---|---|---|
| author | Kumar Gala <kumar.gala@linaro.org> | Wed Feb 03 10:45:48 2021 -0600 |
| committer | Anas Nashif <anas.nashif@intel.com> | Wed Feb 03 13:41:47 2021 -0500 |
| tree | 2e16772fc9313f73bb8cf08d81c5e4f4c51e9bb8 | |
| parent | 3035d75fe29dbf31e0f63e6c91734c2e731947ed [diff] |
dts: bindings: Remove defaults for cache lines from cpu binding The default values for i/d-cache line size doesnt make sense. These shouldn't use defaults. Signed-off-by: Kumar Gala <kumar.gala@linaro.org>