arch: nxp: lpc54xxx: Rename SoC bits from LPC54114 to LPC54114_M4

Rename various SoC related defines and files from just being LPC54114
to LPC54114_M4.  This is in prep for supporting a build for the second
core on the LPC54114 (the Cortex-M0+).

* Renamed Kconfig SOC_LPC54114 to SOC_LPC54114_M4
* Renamed Kconfig.defconfig.lpc54114 to Kconfig.defconfig.lpc54114_m4
* Introduced nxp_lpc54xxx_m4.dtsi based on nxp_lpc54xxx.dtsi
* Moved some pinmux related defines into SoC code.

Signed-off-by: Stanislav Poboril <stanislav.poboril@nxp.com>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
diff --git a/arch/arm/soc/nxp_lpc/lpc54xxx/Kconfig.defconfig.lpc54114 b/arch/arm/soc/nxp_lpc/lpc54xxx/Kconfig.defconfig.lpc54114_m4
similarity index 88%
rename from arch/arm/soc/nxp_lpc/lpc54xxx/Kconfig.defconfig.lpc54114
rename to arch/arm/soc/nxp_lpc/lpc54xxx/Kconfig.defconfig.lpc54114_m4
index 6d4809a..383b1e7 100644
--- a/arch/arm/soc/nxp_lpc/lpc54xxx/Kconfig.defconfig.lpc54114
+++ b/arch/arm/soc/nxp_lpc/lpc54xxx/Kconfig.defconfig.lpc54114_m4
@@ -5,7 +5,7 @@
 # SPDX-License-Identifier: Apache-2.0
 #
 
-if SOC_LPC54114
+if SOC_LPC54114_M4
 
 config SOC
 	string
@@ -32,4 +32,4 @@
 
 endif # SERIAL
 
-endif # SOC_LPC54114
+endif # SOC_LPC54114_M4
diff --git a/arch/arm/soc/nxp_lpc/lpc54xxx/Kconfig.series b/arch/arm/soc/nxp_lpc/lpc54xxx/Kconfig.series
index 506754c..a09ab55 100644
--- a/arch/arm/soc/nxp_lpc/lpc54xxx/Kconfig.series
+++ b/arch/arm/soc/nxp_lpc/lpc54xxx/Kconfig.series
@@ -7,7 +7,7 @@
 
 config SOC_SERIES_LPC54XXX
 	bool "LPC LPC54xxx Series MCU"
-	select CPU_CORTEX_M4
+	select HAS_MCUX
 	select SOC_FAMILY_LPC
 	select SYS_POWER_LOW_POWER_STATE_SUPPORTED
 	select CPU_HAS_SYSTICK
diff --git a/arch/arm/soc/nxp_lpc/lpc54xxx/Kconfig.soc b/arch/arm/soc/nxp_lpc/lpc54xxx/Kconfig.soc
index aec026e..1c3a030 100644
--- a/arch/arm/soc/nxp_lpc/lpc54xxx/Kconfig.soc
+++ b/arch/arm/soc/nxp_lpc/lpc54xxx/Kconfig.soc
@@ -9,9 +9,9 @@
 prompt "LPC LPC54XXX MCU Selection"
 depends on SOC_SERIES_LPC54XXX
 
-config SOC_LPC54114
-	bool "SOC_LPC54114"
-	select HAS_MCUX
+config SOC_LPC54114_M4
+	bool "SOC_LPC54114_M4"
+	select CPU_CORTEX_M4
 
 endchoice
 
diff --git a/arch/arm/soc/nxp_lpc/lpc54xxx/soc.h b/arch/arm/soc/nxp_lpc/lpc54xxx/soc.h
index acac873..6131a70 100644
--- a/arch/arm/soc/nxp_lpc/lpc54xxx/soc.h
+++ b/arch/arm/soc/nxp_lpc/lpc54xxx/soc.h
@@ -25,6 +25,17 @@
 #include <fsl_common.h>
 #endif /* !_ASMLANGUAGE */
 
+#define IOCON_PIO_DIGITAL_EN	0x80u
+#define IOCON_PIO_FUNC0		0x00u
+#define IOCON_PIO_FUNC1		0x01u
+#define IOCON_PIO_FUNC2		0x02u
+#define IOCON_PIO_INPFILT_OFF	0x0100u
+#define IOCON_PIO_INV_DI	0x00u
+#define IOCON_PIO_MODE_INACT	0x00u
+#define IOCON_PIO_OPENDRAIN_DI	0x00u
+#define IOCON_PIO_SLEW_STANDARD	0x00u
+#define IOCON_PIO_MODE_PULLUP	0x10u
+
 #ifdef __cplusplus
 }
 #endif
diff --git a/boards/arm/lpcxpresso54114/lpcxpresso54114.dts b/boards/arm/lpcxpresso54114/lpcxpresso54114.dts
index 0443804..c9b2395 100644
--- a/boards/arm/lpcxpresso54114/lpcxpresso54114.dts
+++ b/boards/arm/lpcxpresso54114/lpcxpresso54114.dts
@@ -6,7 +6,7 @@
 
 /dts-v1/;
 
-#include <nxp/nxp_lpc54xxx.dtsi>
+#include <nxp/nxp_lpc54xxx_m4.dtsi>
 
 / {
 	model = "NXP LPCXpresso54114 board";
diff --git a/boards/arm/lpcxpresso54114/lpcxpresso54114_defconfig b/boards/arm/lpcxpresso54114/lpcxpresso54114_defconfig
index aa35e07..0fb0c71 100644
--- a/boards/arm/lpcxpresso54114/lpcxpresso54114_defconfig
+++ b/boards/arm/lpcxpresso54114/lpcxpresso54114_defconfig
@@ -5,7 +5,7 @@
 #
 
 CONFIG_ARM=y
-CONFIG_SOC_LPC54114=y
+CONFIG_SOC_LPC54114_M4=y
 CONFIG_SOC_SERIES_LPC54XXX=y
 CONFIG_BOARD_LPCXPRESSO54114=y
 CONFIG_CONSOLE=y
diff --git a/boards/arm/lpcxpresso54114/pinmux.c b/boards/arm/lpcxpresso54114/pinmux.c
index a08d224..4d816a4 100644
--- a/boards/arm/lpcxpresso54114/pinmux.c
+++ b/boards/arm/lpcxpresso54114/pinmux.c
@@ -7,17 +7,7 @@
 #include <pinmux.h>
 #include <fsl_common.h>
 #include <fsl_iocon.h>
-
-#define IOCON_PIO_DIGITAL_EN	0x80u
-#define IOCON_PIO_FUNC0		0x00u
-#define IOCON_PIO_FUNC1		0x01u
-#define IOCON_PIO_FUNC2		0x02u
-#define IOCON_PIO_INPFILT_OFF	0x0100u
-#define IOCON_PIO_INV_DI	0x00u
-#define IOCON_PIO_MODE_INACT	0x00u
-#define IOCON_PIO_OPENDRAIN_DI	0x00u
-#define IOCON_PIO_SLEW_STANDARD	0x00u
-#define IOCON_PIO_MODE_PULLUP	0x10u
+#include <soc.h>
 
 static int lpcxpresso_54114_pinmux_init(struct device *dev)
 {
diff --git a/dts/arm/nxp/nxp_lpc54xxx.dtsi b/dts/arm/nxp/nxp_lpc54xxx.dtsi
index ffc756a..388083d 100644
--- a/dts/arm/nxp/nxp_lpc54xxx.dtsi
+++ b/dts/arm/nxp/nxp_lpc54xxx.dtsi
@@ -4,7 +4,6 @@
  * SPDX-License-Identifier: Apache-2.0
  */
 
-#include <arm/armv7-m.dtsi>
 #include <dt-bindings/gpio/gpio.h>
 
 / {
diff --git a/dts/arm/nxp/nxp_lpc54xxx_m4.dtsi b/dts/arm/nxp/nxp_lpc54xxx_m4.dtsi
new file mode 100644
index 0000000..11cd017
--- /dev/null
+++ b/dts/arm/nxp/nxp_lpc54xxx_m4.dtsi
@@ -0,0 +1,22 @@
+/*
+ * Copyright (c) 2018 Linaro Limited
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include <arm/armv7-m.dtsi>
+#include <nxp/nxp_lpc54xxx.dtsi>
+
+/ {
+	cpus {
+		cpu@0 {
+			compatible = "arm,cortex-m4f";
+		};
+
+		/delete-node/ cpu@1;
+	};
+};
+
+&nvic {
+	arm,num-irq-priority-bits = <3>;
+};