pw_cpu_exception_cortex_m: Reword docs for clarity
Rewords some of the module RST docs to be more succinct.
Change-Id: Ie8c09fd4880363b1925a81e55be31657fda6ef06
Reviewed-on: https://pigweed-review.googlesource.com/c/pigweed/pigweed/+/40784
Reviewed-by: Keir Mierle <keir@google.com>
Commit-Queue: Armando Montanez <amontanez@google.com>
diff --git a/pw_cpu_exception_cortex_m/docs.rst b/pw_cpu_exception_cortex_m/docs.rst
index 3b7c9be..2cb3064 100644
--- a/pw_cpu_exception_cortex_m/docs.rst
+++ b/pw_cpu_exception_cortex_m/docs.rst
@@ -117,17 +117,16 @@
Exception Analysis
==================
This module provides Python tooling to analyze CPU state captured by a Cortex-M
-core during an exception. This can be particularly useful as part of a larger
-crash report analyzer.
+core during an exception. This can be useful as part of a crash report analyzer.
CFSR decoder
------------
The ARMv7-M and ARMv8-M architectures have a Configurable Fault Status Register
-(CFSR) that explains what illegal behavior caused a fault. Even with no
-additional context, it can provide quite a bit of insight into what caused the
-CPU to fault. This module provides a simple command-line tool to decode raw CFSR
-contents (e.g. 0x00010000) as human-readable information (e.g. "Encountered
-invalid instruction"). An example of this tool in use is provided below:
+(CFSR) that explains what illegal behavior caused a fault. This module provides
+a simple command-line tool to decode CFSR contents (e.g. 0x00010000) as
+human-readable information (e.g. "Encountered invalid instruction").
+
+For example:
.. code-block::
