Style: Add uncrustify guards, fix asm (#136)
Co-authored-by: Alfred Gedeon <gedeonag@amazon.com>
diff --git a/portable/RVDS/ARM7_LPC21xx/portmacro.h b/portable/RVDS/ARM7_LPC21xx/portmacro.h
index 47b7d05..ab2093b 100644
--- a/portable/RVDS/ARM7_LPC21xx/portmacro.h
+++ b/portable/RVDS/ARM7_LPC21xx/portmacro.h
@@ -22,16 +22,17 @@
* https://www.FreeRTOS.org
* https://github.com/FreeRTOS
*
- * 1 tab == 4 spaces!
*/
#ifndef PORTMACRO_H
#define PORTMACRO_H
+/* *INDENT-OFF* */
#ifdef __cplusplus
-extern "C" {
+ extern "C" {
#endif
+/* *INDENT-ON* */
/*-----------------------------------------------------------
* Port specific definitions.
@@ -138,9 +139,11 @@
#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void *pvParameters )
#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void *pvParameters )
+/* *INDENT-OFF* */
#ifdef __cplusplus
-}
+ }
#endif
+/* *INDENT-ON* */
#endif /* PORTMACRO_H */
diff --git a/portable/RVDS/ARM_CA9/portmacro.h b/portable/RVDS/ARM_CA9/portmacro.h
index 0ecd6d5..46ac64f 100644
--- a/portable/RVDS/ARM_CA9/portmacro.h
+++ b/portable/RVDS/ARM_CA9/portmacro.h
@@ -22,7 +22,6 @@
* https://www.FreeRTOS.org
* https://github.com/FreeRTOS
*
- * 1 tab == 4 spaces!
*/
#ifndef PORTMACRO_H
diff --git a/portable/RVDS/ARM_CM0/port.c b/portable/RVDS/ARM_CM0/port.c
index fe2af50..60589dd 100644
--- a/portable/RVDS/ARM_CM0/port.c
+++ b/portable/RVDS/ARM_CM0/port.c
@@ -176,7 +176,7 @@
/* The MSP stack is not reset as, unlike on M3/4 parts, there is no vector
* table offset register that can be used to locate the initial stack value.
* Not all M0 parts have the application vector table at address 0. */
- /* *INDENT-OFF* */
+/* *INDENT-OFF* */
ldr r3, = pxCurrentTCB /* Obtain location of pxCurrentTCB. */
ldr r1, [ r3 ]
@@ -186,16 +186,10 @@
movs r0, # 2 /* Switch to the psp stack. */
msr CONTROL, r0
isb
- pop {
- r0 - r5
- } /* Pop the registers that are saved automatically. */
+ pop { r0 - r5 } /* Pop the registers that are saved automatically. */
mov lr, r5 /* lr is now in r5. */
- pop {
- r3
- } /* The return address is now in r3. */
- pop {
- r2
- } /* Pop and discard the XPSR. */
+ pop { r3 } /* The return address is now in r3. */
+ pop { r2 } /* Pop and discard the XPSR. */
cpsie i /* The first task has its context and interrupts can be enabled. */
bx r3 /* Finally, jump to the user defined task code. */
@@ -272,16 +266,20 @@
__asm uint32_t ulSetInterruptMaskFromISR( void )
{
+/* *INDENT-OFF* */
mrs r0, PRIMASK
cpsid i
bx lr
+/* *INDENT-ON* */
}
/*-----------------------------------------------------------*/
__asm void vClearInterruptMaskFromISR( uint32_t ulMask )
{
+/* *INDENT-OFF* */
msr PRIMASK, r0
bx lr
+/* *INDENT-ON* */
}
/*-----------------------------------------------------------*/
@@ -300,33 +298,23 @@
subs r0, # 32 /* Make space for the remaining low registers. */
str r0, [ r2 ] /* Save the new top of stack. */
- stmia r0 !, {
- r4 - r7
- } /* Store the low registers that are not saved automatically. */
+ stmia r0 !, { r4 - r7 } /* Store the low registers that are not saved automatically. */
mov r4, r8 /* Store the high registers. */
mov r5, r9
mov r6, r10
mov r7, r11
- stmia r0 !, {
- r4 - r7
- }
+ stmia r0 !, { r4 - r7 }
- push {
- r3, r14
- }
+ push { r3, r14 }
cpsid i
bl vTaskSwitchContext
cpsie i
- pop {
- r2, r3
- } /* lr goes in r3. r2 now holds tcb pointer. */
+ pop { r2, r3 } /* lr goes in r3. r2 now holds tcb pointer. */
ldr r1, [ r2 ]
ldr r0, [ r1 ] /* The first item in pxCurrentTCB is the task top of stack. */
adds r0, # 16 /* Move to the high registers. */
- ldmia r0 !, {
- r4 - r7
- } /* Pop the high registers. */
+ ldmia r0 !, { r4 - r7 } /* Pop the high registers. */
mov r8, r4
mov r9, r5
mov r10, r6
@@ -335,9 +323,7 @@
msr psp, r0 /* Remember the new top of stack for the task. */
subs r0, # 32 /* Go back for the low registers that are not automatically restored. */
- ldmia r0 !, {
- r4 - r7
- } /* Pop low registers. */
+ ldmia r0 !, { r4 - r7 } /* Pop low registers. */
bx r3
ALIGN
diff --git a/portable/RVDS/ARM_CM0/portmacro.h b/portable/RVDS/ARM_CM0/portmacro.h
index c1adb6b..8064eab 100644
--- a/portable/RVDS/ARM_CM0/portmacro.h
+++ b/portable/RVDS/ARM_CM0/portmacro.h
@@ -22,16 +22,17 @@
* https://www.FreeRTOS.org
* https://github.com/FreeRTOS
*
- * 1 tab == 4 spaces!
*/
#ifndef PORTMACRO_H
- #define PORTMACRO_H
+#define PORTMACRO_H
- #ifdef __cplusplus
- extern "C" {
- #endif
+/* *INDENT-OFF* */
+#ifdef __cplusplus
+ extern "C" {
+#endif
+/* *INDENT-ON* */
/*-----------------------------------------------------------
* Port specific definitions.
@@ -113,8 +114,10 @@
#define portNOP()
- #ifdef __cplusplus
- }
- #endif
+/* *INDENT-OFF* */
+#ifdef __cplusplus
+ }
+#endif
+/* *INDENT-ON* */
#endif /* PORTMACRO_H */
diff --git a/portable/RVDS/ARM_CM3/port.c b/portable/RVDS/ARM_CM3/port.c
index cccfe4d..918c80f 100644
--- a/portable/RVDS/ARM_CM3/port.c
+++ b/portable/RVDS/ARM_CM3/port.c
@@ -218,9 +218,7 @@
ldr r3, = pxCurrentTCB /* Restore the context. */
ldr r1, [ r3 ] /* Use pxCurrentTCBConst to get the pxCurrentTCB address. */
ldr r0, [ r1 ] /* The first item in pxCurrentTCB is the task top of stack. */
- ldmia r0 !, {
- r4 - r11
- } /* Pop the registers that are not automatically saved on exception entry and the critical nesting count. */
+ ldmia r0 !, { r4 - r11 } /* Pop the registers that are not automatically saved on exception entry and the critical nesting count. */
msr psp, r0 /* Restore the task stack pointer. */
isb
mov r0, # 0
@@ -237,7 +235,7 @@
PRESERVE8
/* Use the NVIC offset register to locate the stack. */
- ldr r0, = 0xE000ED08
+ ldr r0, =0xE000ED08
ldr r0, [ r0 ]
ldr r0, [ r0 ]
@@ -400,14 +398,10 @@
ldr r3, =pxCurrentTCB /* Get the location of the current TCB. */
ldr r2, [ r3 ]
- stmdb r0 !, {
- r4 - r11
- } /* Save the remaining registers. */
+ stmdb r0 !, { r4 - r11 } /* Save the remaining registers. */
str r0, [ r2 ] /* Save the new top of stack into the first member of the TCB. */
- stmdb sp !, {
- r3, r14
- }
+ stmdb sp !, { r3, r14 }
mov r0, #configMAX_SYSCALL_INTERRUPT_PRIORITY
msr basepri, r0
dsb
@@ -415,15 +409,11 @@
bl vTaskSwitchContext
mov r0, #0
msr basepri, r0
- ldmia sp !, {
- r3, r14
- }
+ ldmia sp !, { r3, r14 }
ldr r1, [ r3 ]
ldr r0, [ r1 ] /* The first item in pxCurrentTCB is the task top of stack. */
- ldmia r0 !, {
- r4 - r11
- } /* Pop the registers and the critical nesting count. */
+ ldmia r0 !, { r4 - r11 } /* Pop the registers and the critical nesting count. */
msr psp, r0
isb
bx r14
diff --git a/portable/RVDS/ARM_CM3/portmacro.h b/portable/RVDS/ARM_CM3/portmacro.h
index 17a84ec..95d0825 100644
--- a/portable/RVDS/ARM_CM3/portmacro.h
+++ b/portable/RVDS/ARM_CM3/portmacro.h
@@ -22,16 +22,17 @@
* https://www.FreeRTOS.org
* https://github.com/FreeRTOS
*
- * 1 tab == 4 spaces!
*/
#ifndef PORTMACRO_H
- #define PORTMACRO_H
+#define PORTMACRO_H
- #ifdef __cplusplus
- extern "C" {
- #endif
+/* *INDENT-OFF* */
+#ifdef __cplusplus
+ extern "C" {
+#endif
+/* *INDENT-ON* */
/*-----------------------------------------------------------
* Port specific definitions.
@@ -170,7 +171,9 @@
{
/* Barrier instructions are not used as this function is only used to
* lower the BASEPRI value. */
+/* *INDENT-OFF* */
msr basepri, ulBASEPRI
+/* *INDENT-ON* */
}
}
/*-----------------------------------------------------------*/
@@ -183,9 +186,11 @@
{
/* Set BASEPRI to the max syscall priority to effect a critical
* section. */
+/* *INDENT-OFF* */
msr basepri, ulNewBASEPRI
dsb
- isb
+ isb
+/* *INDENT-ON* */
}
}
/*-----------------------------------------------------------*/
@@ -197,7 +202,9 @@
/* Set BASEPRI to 0 so no interrupts are masked. This function is only
* used to lower the mask in an interrupt, so memory barriers are not
* used. */
+/* *INDENT-OFF* */
msr basepri, # 0
+/* *INDENT-ON* */
}
}
/*-----------------------------------------------------------*/
@@ -210,10 +217,12 @@
{
/* Set BASEPRI to the max syscall priority to effect a critical
* section. */
+/* *INDENT-OFF* */
mrs ulReturn, basepri
msr basepri, ulNewBASEPRI
dsb
- isb
+ isb
+/* *INDENT-ON* */
}
return ulReturn;
@@ -228,7 +237,9 @@
/* Obtain the number of the currently executing interrupt. */
__asm
{
+/* *INDENT-OFF* */
mrs ulCurrentInterrupt, ipsr
+/* *INDENT-ON* */
}
if( ulCurrentInterrupt == 0 )
@@ -244,8 +255,10 @@
}
- #ifdef __cplusplus
- }
- #endif
+/* *INDENT-OFF* */
+#ifdef __cplusplus
+ }
+#endif
+/* *INDENT-ON* */
#endif /* PORTMACRO_H */
diff --git a/portable/RVDS/ARM_CM4F/port.c b/portable/RVDS/ARM_CM4F/port.c
index fe66c4f..6e20556 100644
--- a/portable/RVDS/ARM_CM4F/port.c
+++ b/portable/RVDS/ARM_CM4F/port.c
@@ -244,12 +244,10 @@
/* Get the location of the current TCB. */
ldr r3, = pxCurrentTCB
- ldr r1, [ r3 ]
+ ldr r1, [ r3 ]
ldr r0, [ r1 ]
/* Pop the core registers. */
- ldmia r0 !, {
- r4 - r11, r14
- }
+ ldmia r0 !, {r4-r11,r14}
msr psp, r0
isb
mov r0, # 0
@@ -300,7 +298,7 @@
ldr r1, [ r0 ]
/* Enable CP10 and CP11 coprocessors, then save back. */
- orr r1, r1, # ( 0xf << 20 )
+ orr r1, r1, #( 0xf << 20 )
str r1, [ r0 ]
bx r14
nop
@@ -470,21 +468,15 @@
/* Is the task using the FPU context? If so, push high vfp registers. */
tst r14, #0x10
it eq
- vstmdbeq r0 !, {
- s16 - s31
- }
+ vstmdbeq r0!, {s16-s31}
/* Save the core registers. */
- stmdb r0 !, {
- r4 - r11, r14
- }
+ stmdb r0!, {r4-r11, r14}
/* Save the new top of stack into the first member of the TCB. */
str r0, [ r2 ]
- stmdb sp !, {
- r0, r3
- }
+ stmdb sp!, {r0, r3}
mov r0, # configMAX_SYSCALL_INTERRUPT_PRIORITY
msr basepri, r0
dsb
@@ -492,37 +484,27 @@
bl vTaskSwitchContext
mov r0, # 0
msr basepri, r0
- ldmia sp !, {
- r0, r3
- }
+ ldmia sp!, {r0, r3}
/* The first item in pxCurrentTCB is the task top of stack. */
ldr r1, [ r3 ]
ldr r0, [ r1 ]
/* Pop the core registers. */
- ldmia r0 !, {
- r4 - r11, r14
- }
+ ldmia r0!, {r4-r11, r14}
/* Is the task using the FPU context? If so, pop the high vfp registers
* too. */
tst r14, # 0x10
it eq
- vldmiaeq r0 !, {
- s16 - s31
- }
+ vldmiaeq r0!, {s16-s31}
msr psp, r0
isb
#ifdef WORKAROUND_PMU_CM001 /* XMC4000 specific errata */
#if WORKAROUND_PMU_CM001 == 1
- push {
- r14
- }
- pop {
- pc
- }
+ push { r14 }
+ pop { pc }
nop
#endif
#endif
diff --git a/portable/RVDS/ARM_CM4F/portmacro.h b/portable/RVDS/ARM_CM4F/portmacro.h
index 17a84ec..c37a1cd 100644
--- a/portable/RVDS/ARM_CM4F/portmacro.h
+++ b/portable/RVDS/ARM_CM4F/portmacro.h
@@ -27,11 +27,13 @@
#ifndef PORTMACRO_H
- #define PORTMACRO_H
+#define PORTMACRO_H
+/* *INDENT-OFF* */
- #ifdef __cplusplus
- extern "C" {
- #endif
+#ifdef __cplusplus
+ extern "C" {
+#endif
+/* *INDENT-ON* */
/*-----------------------------------------------------------
* Port specific definitions.
@@ -170,7 +172,9 @@
{
/* Barrier instructions are not used as this function is only used to
* lower the BASEPRI value. */
- msr basepri, ulBASEPRI
+/* *INDENT-OFF* */
+ msr basepri, ulBASEPRI
+/* *INDENT-ON* */
}
}
/*-----------------------------------------------------------*/
@@ -183,9 +187,11 @@
{
/* Set BASEPRI to the max syscall priority to effect a critical
* section. */
+/* *INDENT-OFF* */
msr basepri, ulNewBASEPRI
dsb
- isb
+ isb
+/* *INDENT-ON* */
}
}
/*-----------------------------------------------------------*/
@@ -197,7 +203,9 @@
/* Set BASEPRI to 0 so no interrupts are masked. This function is only
* used to lower the mask in an interrupt, so memory barriers are not
* used. */
+/* *INDENT-OFF* */
msr basepri, # 0
+/* *INDENT-ON* */
}
}
/*-----------------------------------------------------------*/
@@ -210,10 +218,12 @@
{
/* Set BASEPRI to the max syscall priority to effect a critical
* section. */
+/* *INDENT-OFF* */
mrs ulReturn, basepri
msr basepri, ulNewBASEPRI
dsb
- isb
+ isb
+/* *INDENT-ON* */
}
return ulReturn;
@@ -228,7 +238,9 @@
/* Obtain the number of the currently executing interrupt. */
__asm
{
+/* *INDENT-OFF* */
mrs ulCurrentInterrupt, ipsr
+/* *INDENT-ON* */
}
if( ulCurrentInterrupt == 0 )
@@ -243,9 +255,10 @@
return xReturn;
}
-
- #ifdef __cplusplus
- }
- #endif
+/* *INDENT-OFF* */
+#ifdef __cplusplus
+ }
+#endif
+/* *INDENT-ON* */
#endif /* PORTMACRO_H */
diff --git a/portable/RVDS/ARM_CM4_MPU/port.c b/portable/RVDS/ARM_CM4_MPU/port.c
index ee7e11d..0adb3a1 100644
--- a/portable/RVDS/ARM_CM4_MPU/port.c
+++ b/portable/RVDS/ARM_CM4_MPU/port.c
@@ -281,9 +281,11 @@
{
__asm
{
+/* *INDENT-OFF* */
mrs ulReg, control /* Obtain current control value. */
bic ulReg, # 1 /* Set privilege bit. */
msr control, ulReg /* Write back new control value. */
+/* *INDENT-ON* */
}
}
@@ -292,9 +294,11 @@
case portSVC_RAISE_PRIVILEGE:
__asm
{
+/* *INDENT-OFF* */
mrs ulReg, control /* Obtain current control value. */
bic ulReg, # 1 /* Set privilege bit. */
msr control, ulReg /* Write back new control value. */
+/* *INDENT-ON* */
}
break;
#endif /* #if( configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY == 1 ) */
@@ -338,36 +342,24 @@
msr msp, r0 /* Set the msp back to the start of the stack. */
ldr r3, =pxCurrentTCB /* Restore the context. */
ldr r1, [ r3 ]
- ldr r0, [ r1 ] /* The first item in the TCB is the task top of stack. */
+ ldr r0, [ r1 ] /* The first item in the TCB is the task top of stack. */
add r1, r1, #4 /* Move onto the second item in the TCB... */
- dmb /* Complete outstanding transfers before disabling MPU. */
+ dmb /* Complete outstanding transfers before disabling MPU. */
ldr r2, =0xe000ed94 /* MPU_CTRL register. */
ldr r3, [ r2 ] /* Read the value of MPU_CTRL. */
bic r3, r3, # 1 /* r3 = r3 & ~1 i.e. Clear the bit 0 in r3. */
str r3, [ r2 ] /* Disable MPU. */
ldr r2, =0xe000ed9c /* Region Base Address register. */
- ldmia r1 !, {
- r4 - r11
- } /* Read 4 sets of MPU registers [MPU Region # 4 - 7]. */
- stmia r2, {
- r4 - r11
- } /* Write 4 sets of MPU registers [MPU Region # 4 - 7]. */
+ ldmia r1 !, { r4 - r11 } /* Read 4 sets of MPU registers [MPU Region # 4 - 7]. */
+ stmia r2, { r4 - r11 } /* Write 4 sets of MPU registers [MPU Region # 4 - 7]. */
#if ( portTOTAL_NUM_REGIONS == 16 )
- ldmia r1 !, {
- r4 - r11
- } /* Read 4 sets of MPU registers [MPU Region # 8 - 11]. */
- stmia r2, {
- r4 - r11
- } /* Write 4 sets of MPU registers. [MPU Region # 8 - 11]. */
- ldmia r1 !, {
- r4 - r11
- } /* Read 4 sets of MPU registers [MPU Region # 12 - 15]. */
- stmia r2, {
- r4 - r11
- } /* Write 4 sets of MPU registers. [MPU Region # 12 - 15]. */
+ ldmia r1 !, { r4 - r11 } /* Read 4 sets of MPU registers [MPU Region # 8 - 11]. */
+ stmia r2, { r4 - r11 } /* Write 4 sets of MPU registers. [MPU Region # 8 - 11]. */
+ ldmia r1 !, { r4 - r11 } /* Read 4 sets of MPU registers [MPU Region # 12 - 15]. */
+ stmia r2, { r4 - r11 } /* Write 4 sets of MPU registers. [MPU Region # 12 - 15]. */
#endif /* portTOTAL_NUM_REGIONS == 16. */
ldr r2, =0xe000ed94 /* MPU_CTRL register. */
@@ -376,9 +368,7 @@
str r3, [ r2 ] /* Enable MPU. */
dsb /* Force memory writes before continuing. */
- ldmia r0 !, {
- r3 - r11, r14
- } /* Pop the registers that are not automatically saved on exception entry. */
+ ldmia r0 !, { r3 - r11, r14 } /* Pop the registers that are not automatically saved on exception entry. */
msr control, r3
msr psp, r0 /* Restore the task stack pointer. */
mov r0, #0
@@ -571,19 +561,13 @@
tst r14, #0x10 /* Is the task using the FPU context? If so, push high vfp registers. */
it eq
- vstmdbeq r0 !, {
- s16 - s31
- }
+ vstmdbeq r0 !, { s16 - s31 }
mrs r1, control
- stmdb r0 !, {
- r1, r4 - r11, r14
- } /* Save the remaining registers. */
+ stmdb r0 !, { r1, r4 - r11, r14 } /* Save the remaining registers. */
str r0, [ r2 ] /* Save the new top of stack into the first member of the TCB. */
- stmdb sp !, {
- r0, r3
- }
+ stmdb sp !, { r0, r3 }
mov r0, # configMAX_SYSCALL_INTERRUPT_PRIORITY
msr basepri, r0
dsb
@@ -591,9 +575,7 @@
bl vTaskSwitchContext
mov r0, #0
msr basepri, r0
- ldmia sp !, {
- r0, r3
- }
+ ldmia sp !, { r0, r3 }
/* Restore the context. */
ldr r1, [ r3 ]
ldr r0, [ r1 ] /* The first item in the TCB is the task top of stack. */
@@ -606,26 +588,14 @@
str r3, [ r2 ] /* Disable MPU. */
ldr r2, =0xe000ed9c /* Region Base Address register. */
- ldmia r1 !, {
- r4 - r11
- } /* Read 4 sets of MPU registers [MPU Region # 4 - 7]. */
- stmia r2, {
- r4 - r11
- } /* Write 4 sets of MPU registers [MPU Region # 4 - 7]. */
+ ldmia r1 !, { r4 - r11 } /* Read 4 sets of MPU registers [MPU Region # 4 - 7]. */
+ stmia r2, { r4 - r11 } /* Write 4 sets of MPU registers [MPU Region # 4 - 7]. */
#if ( portTOTAL_NUM_REGIONS == 16 )
- ldmia r1 !, {
- r4 - r11
- } /* Read 4 sets of MPU registers [MPU Region # 8 - 11]. */
- stmia r2, {
- r4 - r11
- } /* Write 4 sets of MPU registers. [MPU Region # 8 - 11]. */
- ldmia r1 !, {
- r4 - r11
- } /* Read 4 sets of MPU registers [MPU Region # 12 - 15]. */
- stmia r2, {
- r4 - r11
- } /* Write 4 sets of MPU registers. [MPU Region # 12 - 15]. */
+ ldmia r1 !, { r4 - r11 } /* Read 4 sets of MPU registers [MPU Region # 8 - 11]. */
+ stmia r2, { r4 - r11 } /* Write 4 sets of MPU registers. [MPU Region # 8 - 11]. */
+ ldmia r1 !, { r4 - r11 } /* Read 4 sets of MPU registers [MPU Region # 12 - 15]. */
+ stmia r2, { r4 - r11 } /* Write 4 sets of MPU registers. [MPU Region # 12 - 15]. */
#endif /* portTOTAL_NUM_REGIONS == 16. */
ldr r2, =0xe000ed94 /* MPU_CTRL register. */
@@ -634,16 +604,12 @@
str r3, [ r2 ] /* Enable MPU. */
dsb /* Force memory writes before continuing. */
- ldmia r0 !, {
- r3 - r11, r14
- } /* Pop the registers that are not automatically saved on exception entry. */
+ ldmia r0 !, { r3 - r11, r14 } /* Pop the registers that are not automatically saved on exception entry. */
msr control, r3
tst r14, #0x10 /* Is the task using the FPU context? If so, pop the high vfp registers too. */
it eq
- vldmiaeq r0 !, {
- s16 - s31
- }
+ vldmiaeq r0 !, { s16 - s31 }
msr psp, r0
bx r14
@@ -687,14 +653,14 @@
__asm void vPortSwitchToUserMode( void )
{
- /* *INDENT-OFF* */
+/* *INDENT-OFF* */
PRESERVE8
mrs r0, control
orr r0, #1
msr control, r0
bx r14
- /* *INDENT-ON* */
+/* *INDENT-ON* */
}
/*-----------------------------------------------------------*/
diff --git a/portable/RVDS/ARM_CM7/r0p1/port.c b/portable/RVDS/ARM_CM7/r0p1/port.c
index 118c8f6..a2662cd 100644
--- a/portable/RVDS/ARM_CM7/r0p1/port.c
+++ b/portable/RVDS/ARM_CM7/r0p1/port.c
@@ -241,9 +241,7 @@
ldr r1, [ r3 ]
ldr r0, [ r1 ]
/* Pop the core registers. */
- ldmia r0 !, {
- r4 - r11, r14
- }
+ ldmia r0 !, { r4 - r11, r14 }
msr psp, r0
isb
mov r0, #0
@@ -277,7 +275,7 @@
dsb
isb
/* Call SVC to start the first task. */
- svc 0
+ svc 0
nop
nop
/* *INDENT-ON* */
@@ -455,21 +453,15 @@
/* Is the task using the FPU context? If so, push high vfp registers. */
tst r14, #0x10
it eq
- vstmdbeq r0 !, {
- s16 - s31
- }
+ vstmdbeq r0 !, { s16 - s31 }
/* Save the core registers. */
- stmdb r0 !, {
- r4 - r11, r14
- }
+ stmdb r0 !, { r4 - r11, r14 }
/* Save the new top of stack into the first member of the TCB. */
str r0, [ r2 ]
- stmdb sp !, {
- r0, r3
- }
+ stmdb sp !, { r0, r3 }
mov r0, #configMAX_SYSCALL_INTERRUPT_PRIORITY
cpsid i
msr basepri, r0
@@ -479,37 +471,27 @@
bl vTaskSwitchContext
mov r0, #0
msr basepri, r0
- ldmia sp !, {
- r0, r3
- }
+ ldmia sp !, { r0, r3 }
/* The first item in pxCurrentTCB is the task top of stack. */
ldr r1, [ r3 ]
ldr r0, [ r1 ]
/* Pop the core registers. */
- ldmia r0 !, {
- r4 - r11, r14
- }
+ ldmia r0 !, { r4 - r11, r14 }
/* Is the task using the FPU context? If so, pop the high vfp registers
* too. */
tst r14, #0x10
it eq
- vldmiaeq r0 !, {
- s16 - s31
- }
+ vldmiaeq r0 !, { s16 - s31 }
msr psp, r0
isb
#ifdef WORKAROUND_PMU_CM001 /* XMC4000 specific errata */
#if WORKAROUND_PMU_CM001 == 1
- push {
- r14
- }
- pop {
- pc
- }
+ push { r14 }
+ pop { pc }
nop
#endif
#endif
diff --git a/portable/RVDS/ARM_CM7/r0p1/portmacro.h b/portable/RVDS/ARM_CM7/r0p1/portmacro.h
index 151ff19..d089eb6 100644
--- a/portable/RVDS/ARM_CM7/r0p1/portmacro.h
+++ b/portable/RVDS/ARM_CM7/r0p1/portmacro.h
@@ -170,7 +170,9 @@
{
/* Barrier instructions are not used as this function is only used to
* lower the BASEPRI value. */
+/* *INDENT-OFF* */
msr basepri, ulBASEPRI
+/* *INDENT-ON* */
}
}
/*-----------------------------------------------------------*/
@@ -183,11 +185,13 @@
{
/* Set BASEPRI to the max syscall priority to effect a critical
* section. */
+/* *INDENT-OFF* */
cpsid i
msr basepri, ulNewBASEPRI
dsb
isb
cpsie i
+/* *INDENT-ON* */
}
}
/*-----------------------------------------------------------*/
@@ -199,7 +203,9 @@
/* Set BASEPRI to 0 so no interrupts are masked. This function is only
* used to lower the mask in an interrupt, so memory barriers are not
* used. */
+/* *INDENT-OFF* */
msr basepri, # 0
+/* *INDENT-ON* */
}
}
/*-----------------------------------------------------------*/
@@ -212,12 +218,14 @@
{
/* Set BASEPRI to the max syscall priority to effect a critical
* section. */
+/* *INDENT-OFF* */
mrs ulReturn, basepri
cpsid i
msr basepri, ulNewBASEPRI
dsb
isb
cpsie i
+/* *INDENT-ON* */
}
return ulReturn;
@@ -232,7 +240,9 @@
/* Obtain the number of the currently executing interrupt. */
__asm
{
+/* *INDENT-OFF* */
mrs ulCurrentInterrupt, ipsr
+/* *INDENT-ON* */
}
if( ulCurrentInterrupt == 0 )
