/* ---------------------------------------------------------------------------- */ | |
/* Atmel Microcontroller Software Support */ | |
/* SAM Software Package License */ | |
/* ---------------------------------------------------------------------------- */ | |
/* Copyright (c) 2014, Atmel Corporation */ | |
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/* ---------------------------------------------------------------------------- */ | |
#ifndef _SAMV71_RTT_COMPONENT_ | |
#define _SAMV71_RTT_COMPONENT_ | |
/* ============================================================================= */ | |
/** SOFTWARE API DEFINITION FOR Real-time Timer */ | |
/* ============================================================================= */ | |
/** \addtogroup SAMV71_RTT Real-time Timer */ | |
/*@{*/ | |
#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) | |
/** \brief Rtt hardware registers */ | |
typedef struct { | |
__IO uint32_t RTT_MR; /**< \brief (Rtt Offset: 0x00) Mode Register */ | |
__IO uint32_t RTT_AR; /**< \brief (Rtt Offset: 0x04) Alarm Register */ | |
__I uint32_t RTT_VR; /**< \brief (Rtt Offset: 0x08) Value Register */ | |
__I uint32_t RTT_SR; /**< \brief (Rtt Offset: 0x0C) Status Register */ | |
} Rtt; | |
#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */ | |
/* -------- RTT_MR : (RTT Offset: 0x00) Mode Register -------- */ | |
#define RTT_MR_RTPRES_Pos 0 | |
#define RTT_MR_RTPRES_Msk (0xffffu << RTT_MR_RTPRES_Pos) /**< \brief (RTT_MR) Real-time Timer Prescaler Value */ | |
#define RTT_MR_RTPRES(value) ((RTT_MR_RTPRES_Msk & ((value) << RTT_MR_RTPRES_Pos))) | |
#define RTT_MR_ALMIEN (0x1u << 16) /**< \brief (RTT_MR) Alarm Interrupt Enable */ | |
#define RTT_MR_RTTINCIEN (0x1u << 17) /**< \brief (RTT_MR) Real-time Timer Increment Interrupt Enable */ | |
#define RTT_MR_RTTRST (0x1u << 18) /**< \brief (RTT_MR) Real-time Timer Restart */ | |
#define RTT_MR_RTTDIS (0x1u << 20) /**< \brief (RTT_MR) Real-time Timer Disable */ | |
#define RTT_MR_RTC1HZ (0x1u << 24) /**< \brief (RTT_MR) Real-Time Clock 1Hz Clock Selection */ | |
/* -------- RTT_AR : (RTT Offset: 0x04) Alarm Register -------- */ | |
#define RTT_AR_ALMV_Pos 0 | |
#define RTT_AR_ALMV_Msk (0xffffffffu << RTT_AR_ALMV_Pos) /**< \brief (RTT_AR) Alarm Value */ | |
#define RTT_AR_ALMV(value) ((RTT_AR_ALMV_Msk & ((value) << RTT_AR_ALMV_Pos))) | |
/* -------- RTT_VR : (RTT Offset: 0x08) Value Register -------- */ | |
#define RTT_VR_CRTV_Pos 0 | |
#define RTT_VR_CRTV_Msk (0xffffffffu << RTT_VR_CRTV_Pos) /**< \brief (RTT_VR) Current Real-time Value */ | |
/* -------- RTT_SR : (RTT Offset: 0x0C) Status Register -------- */ | |
#define RTT_SR_ALMS (0x1u << 0) /**< \brief (RTT_SR) Real-time Alarm Status (cleared on read) */ | |
#define RTT_SR_RTTINC (0x1u << 1) /**< \brief (RTT_SR) Prescaler Roll-over Status (cleared on read) */ | |
/*@}*/ | |
#endif /* _SAMV71_RTT_COMPONENT_ */ |