RISC-V: No #error on RV64 regarding byte alignment (#367)
Co-authored-by: Joseph Julicher <jjulicher@mac.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
diff --git a/portable/GCC/RISC-V/portmacro.h b/portable/GCC/RISC-V/portmacro.h
index fe93dc2..dd56dcb 100644
--- a/portable/GCC/RISC-V/portmacro.h
+++ b/portable/GCC/RISC-V/portmacro.h
@@ -81,12 +81,7 @@
/* Architecture specifics. */
#define portSTACK_GROWTH ( -1 )
#define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
-#ifdef __riscv64
- #error This is the RV32 port that has not yet been adapted for 64.
- #define portBYTE_ALIGNMENT 16
-#else
- #define portBYTE_ALIGNMENT 16
-#endif
+#define portBYTE_ALIGNMENT 16
/*-----------------------------------------------------------*/
