fix: Add big-endian support to ARM_CRx_No_GIC port (#1355)

This change makes sure the Data endianness bit is set in the SPSR
register when the program is being compiled for big-endian.

Signed-off-by: Maxim De Clercq <maximdeclercq00@gmail.com>
diff --git a/.github/.cSpellWords.txt b/.github/.cSpellWords.txt
index 2fc0d14..07af92a 100644
--- a/.github/.cSpellWords.txt
+++ b/.github/.cSpellWords.txt
@@ -29,6 +29,7 @@
 APROCFREQ
 APSR
 ARMCM
+ARMEB
 Armv
 ARMVFP
 ASTRINGZ
diff --git a/portable/GCC/ARM_CRx_No_GIC/port.c b/portable/GCC/ARM_CRx_No_GIC/port.c
index bd5a19a..81b16dc 100644
--- a/portable/GCC/ARM_CRx_No_GIC/port.c
+++ b/portable/GCC/ARM_CRx_No_GIC/port.c
@@ -61,7 +61,11 @@
 #define portNO_FLOATING_POINT_CONTEXT    ( ( StackType_t ) 0 )
 
 /* Constants required to setup the initial task context. */
-#define portINITIAL_SPSR                 ( ( StackType_t ) 0x1f ) /* System mode, ARM mode, IRQ enabled FIQ enabled. */
+#ifdef __ARMEB__
+    #define portINITIAL_SPSR             ( ( StackType_t ) 0x21f ) /* System mode, ARM mode, IRQ enabled FIQ enabled, Big-endian. */
+#else
+    #define portINITIAL_SPSR             ( ( StackType_t ) 0x01f ) /* System mode, ARM mode, IRQ enabled FIQ enabled, Little-endian. */
+#endif
 #define portTHUMB_MODE_BIT               ( ( StackType_t ) 0x20 )
 #define portTHUMB_MODE_ADDRESS           ( 0x01UL )