| /* |
| * FreeRTOS Kernel <DEVELOPMENT BRANCH> |
| * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. |
| * |
| * SPDX-License-Identifier: MIT |
| * |
| * Permission is hereby granted, free of charge, to any person obtaining a copy of |
| * this software and associated documentation files (the "Software"), to deal in |
| * the Software without restriction, including without limitation the rights to |
| * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of |
| * the Software, and to permit persons to whom the Software is furnished to do so, |
| * subject to the following conditions: |
| * |
| * The above copyright notice and this permission notice shall be included in all |
| * copies or substantial portions of the Software. |
| * |
| * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS |
| * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR |
| * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER |
| * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN |
| * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. |
| * |
| * https://www.FreeRTOS.org |
| * https://github.com/FreeRTOS |
| * |
| */ |
| |
| |
| /* Standard includes. */ |
| #include <stdlib.h> |
| |
| /* Scheduler includes. */ |
| #include "FreeRTOS.h" |
| #include "task.h" |
| |
| /* Constants required to setup the initial task context. */ |
| #define portINITIAL_SPSR ( ( StackType_t ) 0x1f ) /* System mode, ARM mode, interrupts enabled. */ |
| #define portTHUMB_MODE_BIT ( ( StackType_t ) 0x20 ) |
| #define portINSTRUCTION_SIZE ( ( StackType_t ) 4 ) |
| #define portNO_CRITICAL_SECTION_NESTING ( ( StackType_t ) 0 ) |
| |
| /* Constants required to setup the tick ISR. */ |
| #define portENABLE_TIMER ( ( uint8_t ) 0x01 ) |
| #define portPRESCALE_VALUE 0x00 |
| #define portINTERRUPT_ON_MATCH ( ( uint32_t ) 0x01 ) |
| #define portRESET_COUNT_ON_MATCH ( ( uint32_t ) 0x02 ) |
| |
| /* Constants required to setup the VIC for the tick ISR. */ |
| #define portTIMER_VIC_CHANNEL ( ( uint32_t ) 0x0004 ) |
| #define portTIMER_VIC_CHANNEL_BIT ( ( uint32_t ) 0x0010 ) |
| #define portTIMER_VIC_ENABLE ( ( uint32_t ) 0x0020 ) |
| |
| /* Constants required to handle interrupts. */ |
| #define portTIMER_MATCH_ISR_BIT ( ( uint8_t ) 0x01 ) |
| #define portCLEAR_VIC_INTERRUPT ( ( uint32_t ) 0 ) |
| |
| /*-----------------------------------------------------------*/ |
| |
| /* The code generated by the Keil compiler does not maintain separate |
| stack and frame pointers. The portENTER_CRITICAL macro cannot therefore |
| use the stack as per other ports. Instead a variable is used to keep |
| track of the critical section nesting. This variable has to be stored |
| as part of the task context and must be initialised to a non zero value. */ |
| |
| #define portNO_CRITICAL_NESTING ( ( uint32_t ) 0 ) |
| volatile uint32_t ulCriticalNesting = 9999UL; |
| |
| /*-----------------------------------------------------------*/ |
| |
| /* Setup the timer to generate the tick interrupts. */ |
| static void prvSetupTimerInterrupt( void ); |
| |
| /* |
| * The scheduler can only be started from ARM mode, so |
| * vPortStartFirstSTask() is defined in portISR.c. |
| */ |
| extern __asm void vPortStartFirstTask( void ); |
| |
| /*-----------------------------------------------------------*/ |
| |
| /* |
| * See header file for description. |
| */ |
| StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters ) |
| { |
| StackType_t *pxOriginalTOS; |
| |
| /* Setup the initial stack of the task. The stack is set exactly as |
| expected by the portRESTORE_CONTEXT() macro. |
| |
| Remember where the top of the (simulated) stack is before we place |
| anything on it. */ |
| pxOriginalTOS = pxTopOfStack; |
| |
| /* To ensure asserts in tasks.c don't fail, although in this case the assert |
| is not really required. */ |
| pxTopOfStack--; |
| |
| /* First on the stack is the return address - which in this case is the |
| start of the task. The offset is added to make the return address appear |
| as it would within an IRQ ISR. */ |
| *pxTopOfStack = ( StackType_t ) pxCode + portINSTRUCTION_SIZE; |
| pxTopOfStack--; |
| |
| *pxTopOfStack = ( StackType_t ) 0xaaaaaaaa; /* R14 */ |
| pxTopOfStack--; |
| *pxTopOfStack = ( StackType_t ) pxOriginalTOS; /* Stack used when task starts goes in R13. */ |
| pxTopOfStack--; |
| *pxTopOfStack = ( StackType_t ) 0x12121212; /* R12 */ |
| pxTopOfStack--; |
| *pxTopOfStack = ( StackType_t ) 0x11111111; /* R11 */ |
| pxTopOfStack--; |
| *pxTopOfStack = ( StackType_t ) 0x10101010; /* R10 */ |
| pxTopOfStack--; |
| *pxTopOfStack = ( StackType_t ) 0x09090909; /* R9 */ |
| pxTopOfStack--; |
| *pxTopOfStack = ( StackType_t ) 0x08080808; /* R8 */ |
| pxTopOfStack--; |
| *pxTopOfStack = ( StackType_t ) 0x07070707; /* R7 */ |
| pxTopOfStack--; |
| *pxTopOfStack = ( StackType_t ) 0x06060606; /* R6 */ |
| pxTopOfStack--; |
| *pxTopOfStack = ( StackType_t ) 0x05050505; /* R5 */ |
| pxTopOfStack--; |
| *pxTopOfStack = ( StackType_t ) 0x04040404; /* R4 */ |
| pxTopOfStack--; |
| *pxTopOfStack = ( StackType_t ) 0x03030303; /* R3 */ |
| pxTopOfStack--; |
| *pxTopOfStack = ( StackType_t ) 0x02020202; /* R2 */ |
| pxTopOfStack--; |
| *pxTopOfStack = ( StackType_t ) 0x01010101; /* R1 */ |
| pxTopOfStack--; |
| *pxTopOfStack = ( StackType_t ) pvParameters; /* R0 */ |
| pxTopOfStack--; |
| |
| /* The last thing onto the stack is the status register, which is set for |
| system mode, with interrupts enabled. */ |
| *pxTopOfStack = ( StackType_t ) portINITIAL_SPSR; |
| |
| if( ( ( uint32_t ) pxCode & 0x01UL ) != 0x00UL ) |
| { |
| /* We want the task to start in thumb mode. */ |
| *pxTopOfStack |= portTHUMB_MODE_BIT; |
| } |
| |
| pxTopOfStack--; |
| |
| /* The code generated by the Keil compiler does not maintain separate |
| stack and frame pointers. The portENTER_CRITICAL macro cannot therefore |
| use the stack as per other ports. Instead a variable is used to keep |
| track of the critical section nesting. This variable has to be stored |
| as part of the task context and is initially set to zero. */ |
| *pxTopOfStack = portNO_CRITICAL_SECTION_NESTING; |
| |
| return pxTopOfStack; |
| } |
| /*-----------------------------------------------------------*/ |
| |
| BaseType_t xPortStartScheduler( void ) |
| { |
| /* Start the timer that generates the tick ISR. */ |
| prvSetupTimerInterrupt(); |
| |
| /* Start the first task. This is done from portISR.c as ARM mode must be |
| used. */ |
| vPortStartFirstTask(); |
| |
| /* Should not get here! */ |
| return 0; |
| } |
| /*-----------------------------------------------------------*/ |
| |
| void vPortEndScheduler( void ) |
| { |
| /* It is unlikely that the ARM port will require this function as there |
| is nothing to return to. If this is required - stop the tick ISR then |
| return back to main. */ |
| } |
| /*-----------------------------------------------------------*/ |
| |
| #if configUSE_PREEMPTION == 0 |
| |
| /* |
| * The cooperative scheduler requires a normal IRQ service routine to |
| * simply increment the system tick. |
| */ |
| void vNonPreemptiveTick( void ) __irq; |
| void vNonPreemptiveTick( void ) __irq |
| { |
| /* Increment the tick count - this may make a delaying task ready |
| to run - but a context switch is not performed. */ |
| xTaskIncrementTick(); |
| |
| T0IR = portTIMER_MATCH_ISR_BIT; /* Clear the timer event */ |
| VICVectAddr = portCLEAR_VIC_INTERRUPT; /* Acknowledge the Interrupt */ |
| } |
| |
| #else |
| |
| /* |
| ************************************************************************** |
| * The preemptive scheduler ISR is written in assembler and can be found |
| * in the portASM.s file. This will only get used if portUSE_PREEMPTION |
| * is set to 1 in portmacro.h |
| ************************************************************************** |
| */ |
| |
| void vPreemptiveTick( void ); |
| |
| #endif |
| /*-----------------------------------------------------------*/ |
| |
| static void prvSetupTimerInterrupt( void ) |
| { |
| uint32_t ulCompareMatch; |
| |
| /* A 1ms tick does not require the use of the timer prescale. This is |
| defaulted to zero but can be used if necessary. */ |
| T0PR = portPRESCALE_VALUE; |
| |
| /* Calculate the match value required for our wanted tick rate. */ |
| ulCompareMatch = configCPU_CLOCK_HZ / configTICK_RATE_HZ; |
| |
| /* Protect against divide by zero. Using an if() statement still results |
| in a warning - hence the #if. */ |
| #if portPRESCALE_VALUE != 0 |
| { |
| ulCompareMatch /= ( portPRESCALE_VALUE + 1 ); |
| } |
| #endif |
| |
| T0MR0 = ulCompareMatch; |
| |
| /* Generate tick with timer 0 compare match. */ |
| T0MCR = portRESET_COUNT_ON_MATCH | portINTERRUPT_ON_MATCH; |
| |
| /* Setup the VIC for the timer. */ |
| VICIntSelect &= ~( portTIMER_VIC_CHANNEL_BIT ); |
| VICIntEnable |= portTIMER_VIC_CHANNEL_BIT; |
| |
| /* The ISR installed depends on whether the preemptive or cooperative |
| scheduler is being used. */ |
| #if configUSE_PREEMPTION == 1 |
| { |
| VICVectAddr0 = ( uint32_t ) vPreemptiveTick; |
| } |
| #else |
| { |
| VICVectAddr0 = ( uint32_t ) vNonPreemptiveTick; |
| } |
| #endif |
| |
| VICVectCntl0 = portTIMER_VIC_CHANNEL | portTIMER_VIC_ENABLE; |
| |
| /* Start the timer - interrupts are disabled when this function is called |
| so it is okay to do this here. */ |
| T0TCR = portENABLE_TIMER; |
| } |
| /*-----------------------------------------------------------*/ |
| |
| void vPortEnterCritical( void ) |
| { |
| /* Disable interrupts as per portDISABLE_INTERRUPTS(); */ |
| __disable_irq(); |
| |
| /* Now interrupts are disabled ulCriticalNesting can be accessed |
| directly. Increment ulCriticalNesting to keep a count of how many times |
| portENTER_CRITICAL() has been called. */ |
| ulCriticalNesting++; |
| } |
| /*-----------------------------------------------------------*/ |
| |
| void vPortExitCritical( void ) |
| { |
| if( ulCriticalNesting > portNO_CRITICAL_NESTING ) |
| { |
| /* Decrement the nesting count as we are leaving a critical section. */ |
| ulCriticalNesting--; |
| |
| /* If the nesting level has reached zero then interrupts should be |
| re-enabled. */ |
| if( ulCriticalNesting == portNO_CRITICAL_NESTING ) |
| { |
| /* Enable interrupts as per portEXIT_CRITICAL(). */ |
| __enable_irq(); |
| } |
| } |
| } |
| /*-----------------------------------------------------------*/ |