FreeRTOS/Demo/MicroBlaze_Kintex7_EthernetLite/Hardware/base_microblaze_design_wrapper.mmi

<?xml version="1.0" encoding="UTF-8"?>
<MemInfo Version="1" Minor="0">
  <Processor Endianness="Little" InstPath="base_microblaze_design_i/microblaze_0">
    <AddressSpace Name="base_microblaze_design_i_microblaze_0.base_microblaze_design_i_microblaze_0_local_memory_dlmb_bram_if_cntlr" Begin="0" End="262143">
      <BusBlock>
        <BitLane MemType="RAMB32" Placement="X1Y4">
          <DataWidth MSB="7" LSB="7"/>
          <AddressRange Begin="0" End="32767"/>
          <Parity ON="false" NumBits="0"/>
        </BitLane>
        <BitLane MemType="RAMB32" Placement="X1Y8">
          <DataWidth MSB="6" LSB="6"/>
          <AddressRange Begin="0" End="32767"/>
          <Parity ON="false" NumBits="0"/>
        </BitLane>
        <BitLane MemType="RAMB32" Placement="X0Y8">
          <DataWidth MSB="5" LSB="5"/>
          <AddressRange Begin="0" End="32767"/>
          <Parity ON="false" NumBits="0"/>
        </BitLane>
        <BitLane MemType="RAMB32" Placement="X4Y0">
          <DataWidth MSB="4" LSB="4"/>
          <AddressRange Begin="0" End="32767"/>
          <Parity ON="false" NumBits="0"/>
        </BitLane>
        <BitLane MemType="RAMB32" Placement="X1Y12">
          <DataWidth MSB="3" LSB="3"/>
          <AddressRange Begin="0" End="32767"/>
          <Parity ON="false" NumBits="0"/>
        </BitLane>
        <BitLane MemType="RAMB32" Placement="X2Y5">
          <DataWidth MSB="2" LSB="2"/>
          <AddressRange Begin="0" End="32767"/>
          <Parity ON="false" NumBits="0"/>
        </BitLane>
        <BitLane MemType="RAMB32" Placement="X3Y17">
          <DataWidth MSB="1" LSB="1"/>
          <AddressRange Begin="0" End="32767"/>
          <Parity ON="false" NumBits="0"/>
        </BitLane>
        <BitLane MemType="RAMB32" Placement="X3Y6">
          <DataWidth MSB="0" LSB="0"/>
          <AddressRange Begin="0" End="32767"/>
          <Parity ON="false" NumBits="0"/>
        </BitLane>
        <BitLane MemType="RAMB32" Placement="X2Y1">
          <DataWidth MSB="15" LSB="15"/>
          <AddressRange Begin="0" End="32767"/>
          <Parity ON="false" NumBits="0"/>
        </BitLane>
        <BitLane MemType="RAMB32" Placement="X2Y3">
          <DataWidth MSB="14" LSB="14"/>
          <AddressRange Begin="0" End="32767"/>
          <Parity ON="false" NumBits="0"/>
        </BitLane>
        <BitLane MemType="RAMB32" Placement="X6Y7">
          <DataWidth MSB="13" LSB="13"/>
          <AddressRange Begin="0" End="32767"/>
          <Parity ON="false" NumBits="0"/>
        </BitLane>
        <BitLane MemType="RAMB32" Placement="X5Y2">
          <DataWidth MSB="12" LSB="12"/>
          <AddressRange Begin="0" End="32767"/>
          <Parity ON="false" NumBits="0"/>
        </BitLane>
        <BitLane MemType="RAMB32" Placement="X2Y13">
          <DataWidth MSB="11" LSB="11"/>
          <AddressRange Begin="0" End="32767"/>
          <Parity ON="false" NumBits="0"/>
        </BitLane>
        <BitLane MemType="RAMB32" Placement="X4Y13">
          <DataWidth MSB="10" LSB="10"/>
          <AddressRange Begin="0" End="32767"/>
          <Parity ON="false" NumBits="0"/>
        </BitLane>
        <BitLane MemType="RAMB32" Placement="X5Y0">
          <DataWidth MSB="9" LSB="9"/>
          <AddressRange Begin="0" End="32767"/>
          <Parity ON="false" NumBits="0"/>
        </BitLane>
        <BitLane MemType="RAMB32" Placement="X4Y2">
          <DataWidth MSB="8" LSB="8"/>
          <AddressRange Begin="0" End="32767"/>
          <Parity ON="false" NumBits="0"/>
        </BitLane>
        <BitLane MemType="RAMB32" Placement="X5Y8">
          <DataWidth MSB="23" LSB="23"/>
          <AddressRange Begin="0" End="32767"/>
          <Parity ON="false" NumBits="0"/>
        </BitLane>
        <BitLane MemType="RAMB32" Placement="X2Y7">
          <DataWidth MSB="22" LSB="22"/>
          <AddressRange Begin="0" End="32767"/>
          <Parity ON="false" NumBits="0"/>
        </BitLane>
        <BitLane MemType="RAMB32" Placement="X1Y10">
          <DataWidth MSB="21" LSB="21"/>
          <AddressRange Begin="0" End="32767"/>
          <Parity ON="false" NumBits="0"/>
        </BitLane>
        <BitLane MemType="RAMB32" Placement="X4Y7">
          <DataWidth MSB="20" LSB="20"/>
          <AddressRange Begin="0" End="32767"/>
          <Parity ON="false" NumBits="0"/>
        </BitLane>
        <BitLane MemType="RAMB32" Placement="X2Y11">
          <DataWidth MSB="19" LSB="19"/>
          <AddressRange Begin="0" End="32767"/>
          <Parity ON="false" NumBits="0"/>
        </BitLane>
        <BitLane MemType="RAMB32" Placement="X3Y0">
          <DataWidth MSB="18" LSB="18"/>
          <AddressRange Begin="0" End="32767"/>
          <Parity ON="false" NumBits="0"/>
        </BitLane>
        <BitLane MemType="RAMB32" Placement="X6Y11">
          <DataWidth MSB="17" LSB="17"/>
          <AddressRange Begin="0" End="32767"/>
          <Parity ON="false" NumBits="0"/>
        </BitLane>
        <BitLane MemType="RAMB32" Placement="X3Y2">
          <DataWidth MSB="16" LSB="16"/>
          <AddressRange Begin="0" End="32767"/>
          <Parity ON="false" NumBits="0"/>
        </BitLane>
        <BitLane MemType="RAMB32" Placement="X1Y6">
          <DataWidth MSB="31" LSB="31"/>
          <AddressRange Begin="0" End="32767"/>
          <Parity ON="false" NumBits="0"/>
        </BitLane>
        <BitLane MemType="RAMB32" Placement="X2Y9">
          <DataWidth MSB="30" LSB="30"/>
          <AddressRange Begin="0" End="32767"/>
          <Parity ON="false" NumBits="0"/>
        </BitLane>
        <BitLane MemType="RAMB32" Placement="X4Y15">
          <DataWidth MSB="29" LSB="29"/>
          <AddressRange Begin="0" End="32767"/>
          <Parity ON="false" NumBits="0"/>
        </BitLane>
        <BitLane MemType="RAMB32" Placement="X6Y3">
          <DataWidth MSB="28" LSB="28"/>
          <AddressRange Begin="0" End="32767"/>
          <Parity ON="false" NumBits="0"/>
        </BitLane>
        <BitLane MemType="RAMB32" Placement="X3Y15">
          <DataWidth MSB="27" LSB="27"/>
          <AddressRange Begin="0" End="32767"/>
          <Parity ON="false" NumBits="0"/>
        </BitLane>
        <BitLane MemType="RAMB32" Placement="X5Y13">
          <DataWidth MSB="26" LSB="26"/>
          <AddressRange Begin="0" End="32767"/>
          <Parity ON="false" NumBits="0"/>
        </BitLane>
        <BitLane MemType="RAMB32" Placement="X6Y9">
          <DataWidth MSB="25" LSB="25"/>
          <AddressRange Begin="0" End="32767"/>
          <Parity ON="false" NumBits="0"/>
        </BitLane>
        <BitLane MemType="RAMB32" Placement="X6Y5">
          <DataWidth MSB="24" LSB="24"/>
          <AddressRange Begin="0" End="32767"/>
          <Parity ON="false" NumBits="0"/>
        </BitLane>
      </BusBlock>
      <BusBlock>
        <BitLane MemType="RAMB32" Placement="X1Y5">
          <DataWidth MSB="7" LSB="7"/>
          <AddressRange Begin="32768" End="65535"/>
          <Parity ON="false" NumBits="0"/>
        </BitLane>
        <BitLane MemType="RAMB32" Placement="X1Y9">
          <DataWidth MSB="6" LSB="6"/>
          <AddressRange Begin="32768" End="65535"/>
          <Parity ON="false" NumBits="0"/>
        </BitLane>
        <BitLane MemType="RAMB32" Placement="X0Y9">
          <DataWidth MSB="5" LSB="5"/>
          <AddressRange Begin="32768" End="65535"/>
          <Parity ON="false" NumBits="0"/>
        </BitLane>
        <BitLane MemType="RAMB32" Placement="X4Y1">
          <DataWidth MSB="4" LSB="4"/>
          <AddressRange Begin="32768" End="65535"/>
          <Parity ON="false" NumBits="0"/>
        </BitLane>
        <BitLane MemType="RAMB32" Placement="X1Y13">
          <DataWidth MSB="3" LSB="3"/>
          <AddressRange Begin="32768" End="65535"/>
          <Parity ON="false" NumBits="0"/>
        </BitLane>
        <BitLane MemType="RAMB32" Placement="X2Y6">
          <DataWidth MSB="2" LSB="2"/>
          <AddressRange Begin="32768" End="65535"/>
          <Parity ON="false" NumBits="0"/>
        </BitLane>
        <BitLane MemType="RAMB32" Placement="X3Y18">
          <DataWidth MSB="1" LSB="1"/>
          <AddressRange Begin="32768" End="65535"/>
          <Parity ON="false" NumBits="0"/>
        </BitLane>
        <BitLane MemType="RAMB32" Placement="X3Y7">
          <DataWidth MSB="0" LSB="0"/>
          <AddressRange Begin="32768" End="65535"/>
          <Parity ON="false" NumBits="0"/>
        </BitLane>
        <BitLane MemType="RAMB32" Placement="X2Y2">
          <DataWidth MSB="15" LSB="15"/>
          <AddressRange Begin="32768" End="65535"/>
          <Parity ON="false" NumBits="0"/>
        </BitLane>
        <BitLane MemType="RAMB32" Placement="X2Y4">
          <DataWidth MSB="14" LSB="14"/>
          <AddressRange Begin="32768" End="65535"/>
          <Parity ON="false" NumBits="0"/>
        </BitLane>
        <BitLane MemType="RAMB32" Placement="X6Y8">
          <DataWidth MSB="13" LSB="13"/>
          <AddressRange Begin="32768" End="65535"/>
          <Parity ON="false" NumBits="0"/>
        </BitLane>
        <BitLane MemType="RAMB32" Placement="X5Y3">
          <DataWidth MSB="12" LSB="12"/>
          <AddressRange Begin="32768" End="65535"/>
          <Parity ON="false" NumBits="0"/>
        </BitLane>
        <BitLane MemType="RAMB32" Placement="X2Y14">
          <DataWidth MSB="11" LSB="11"/>
          <AddressRange Begin="32768" End="65535"/>
          <Parity ON="false" NumBits="0"/>
        </BitLane>
        <BitLane MemType="RAMB32" Placement="X4Y14">
          <DataWidth MSB="10" LSB="10"/>
          <AddressRange Begin="32768" End="65535"/>
          <Parity ON="false" NumBits="0"/>
        </BitLane>
        <BitLane MemType="RAMB32" Placement="X5Y1">
          <DataWidth MSB="9" LSB="9"/>
          <AddressRange Begin="32768" End="65535"/>
          <Parity ON="false" NumBits="0"/>
        </BitLane>
        <BitLane MemType="RAMB32" Placement="X4Y3">
          <DataWidth MSB="8" LSB="8"/>
          <AddressRange Begin="32768" End="65535"/>
          <Parity ON="false" NumBits="0"/>
        </BitLane>
        <BitLane MemType="RAMB32" Placement="X5Y9">
          <DataWidth MSB="23" LSB="23"/>
          <AddressRange Begin="32768" End="65535"/>
          <Parity ON="false" NumBits="0"/>
        </BitLane>
        <BitLane MemType="RAMB32" Placement="X2Y8">
          <DataWidth MSB="22" LSB="22"/>
          <AddressRange Begin="32768" End="65535"/>
          <Parity ON="false" NumBits="0"/>
        </BitLane>
        <BitLane MemType="RAMB32" Placement="X1Y11">
          <DataWidth MSB="21" LSB="21"/>
          <AddressRange Begin="32768" End="65535"/>
          <Parity ON="false" NumBits="0"/>
        </BitLane>
        <BitLane MemType="RAMB32" Placement="X4Y8">
          <DataWidth MSB="20" LSB="20"/>
          <AddressRange Begin="32768" End="65535"/>
          <Parity ON="false" NumBits="0"/>
        </BitLane>
        <BitLane MemType="RAMB32" Placement="X2Y12">
          <DataWidth MSB="19" LSB="19"/>
          <AddressRange Begin="32768" End="65535"/>
          <Parity ON="false" NumBits="0"/>
        </BitLane>
        <BitLane MemType="RAMB32" Placement="X3Y1">
          <DataWidth MSB="18" LSB="18"/>
          <AddressRange Begin="32768" End="65535"/>
          <Parity ON="false" NumBits="0"/>
        </BitLane>
        <BitLane MemType="RAMB32" Placement="X6Y12">
          <DataWidth MSB="17" LSB="17"/>
          <AddressRange Begin="32768" End="65535"/>
          <Parity ON="false" NumBits="0"/>
        </BitLane>
        <BitLane MemType="RAMB32" Placement="X3Y3">
          <DataWidth MSB="16" LSB="16"/>
          <AddressRange Begin="32768" End="65535"/>
          <Parity ON="false" NumBits="0"/>
        </BitLane>
        <BitLane MemType="RAMB32" Placement="X1Y7">
          <DataWidth MSB="31" LSB="31"/>
          <AddressRange Begin="32768" End="65535"/>
          <Parity ON="false" NumBits="0"/>
        </BitLane>
        <BitLane MemType="RAMB32" Placement="X2Y10">
          <DataWidth MSB="30" LSB="30"/>
          <AddressRange Begin="32768" End="65535"/>
          <Parity ON="false" NumBits="0"/>
        </BitLane>
        <BitLane MemType="RAMB32" Placement="X4Y16">
          <DataWidth MSB="29" LSB="29"/>
          <AddressRange Begin="32768" End="65535"/>
          <Parity ON="false" NumBits="0"/>
        </BitLane>
        <BitLane MemType="RAMB32" Placement="X6Y4">
          <DataWidth MSB="28" LSB="28"/>
          <AddressRange Begin="32768" End="65535"/>
          <Parity ON="false" NumBits="0"/>
        </BitLane>
        <BitLane MemType="RAMB32" Placement="X3Y16">
          <DataWidth MSB="27" LSB="27"/>
          <AddressRange Begin="32768" End="65535"/>
          <Parity ON="false" NumBits="0"/>
        </BitLane>
        <BitLane MemType="RAMB32" Placement="X5Y14">
          <DataWidth MSB="26" LSB="26"/>
          <AddressRange Begin="32768" End="65535"/>
          <Parity ON="false" NumBits="0"/>
        </BitLane>
        <BitLane MemType="RAMB32" Placement="X6Y10">
          <DataWidth MSB="25" LSB="25"/>
          <AddressRange Begin="32768" End="65535"/>
          <Parity ON="false" NumBits="0"/>
        </BitLane>
        <BitLane MemType="RAMB32" Placement="X6Y6">
          <DataWidth MSB="24" LSB="24"/>
          <AddressRange Begin="32768" End="65535"/>
          <Parity ON="false" NumBits="0"/>
        </BitLane>
      </BusBlock>
    </AddressSpace>
  </Processor>
  <Config>
    <Option Name="Part" Val="xc7k325tffg900-2"/>
  </Config>
</MemInfo>