/* | |
** ################################################################### | |
** Processors: LPC51U68JBD48 | |
** LPC51U68JBD64 | |
** | |
** Compiler: IAR ANSI C/C++ Compiler for ARM | |
** Reference manual: LPC51U68 User manual User manual Rev. 1.0 13 Dec 2017 | |
** Version: rev. 1.0, 2017-12-15 | |
** Build: b180801 | |
** | |
** Abstract: | |
** Linker file for the IAR ANSI C/C++ Compiler for ARM | |
** | |
** Copyright 2016 Freescale Semiconductor, Inc. | |
** Copyright 2016-2018 NXP | |
** | |
** SPDX-License-Identifier: BSD-3-Clause | |
** | |
** http: www.nxp.com | |
** mail: support@nxp.com | |
** | |
** ################################################################### | |
*/ | |
/* Stack and Heap Sizes */ | |
if (isdefinedsymbol(__stack_size__)) { | |
define symbol __size_cstack__ = __stack_size__; | |
} else { | |
define symbol __size_cstack__ = 0x0400; | |
} | |
if (isdefinedsymbol(__heap_size__)) { | |
define symbol __size_heap__ = __heap_size__; | |
} else { | |
define symbol __size_heap__ = 0x0400; | |
} | |
define symbol m_interrupts_start = 0x00000000; | |
define symbol m_interrupts_end = 0x000000DF; | |
define symbol m_text_start = 0x000000E0; | |
define symbol m_text_end = 0x0003FFFF; | |
define symbol m_sramx_start = 0x04000000; | |
define symbol m_sramx_end = 0x04007FFF; | |
define symbol m_data_start = 0x20000000; | |
define symbol m_data_end = 0x2000FFFF - __size_cstack__ - 0x20; | |
define symbol m_stack_start = 0x20010000 - __size_cstack__ - 0x20; | |
define symbol m_stack_end = 0x2000FFFF; | |
define symbol __crp_start__ = 0x000002FC; | |
define symbol __crp_end__ = 0x000002FF; | |
define symbol __ram_iap_start__ = 0x2000FFE0; | |
define symbol __ram_iap_end__ = 0x2000FFFF; | |
define memory mem with size = 4G; | |
define region TEXT_region = mem:[from m_interrupts_start to m_interrupts_end] | |
| mem:[from m_text_start to m_text_end] | |
- mem:[from __crp_start__ to __crp_end__]; | |
define region DATA_region = mem:[from m_sramx_start to m_sramx_end] | |
| mem:[from m_data_start to m_data_end]; | |
define region CSTACK_region = mem:[from m_stack_start to m_stack_end] | |
- mem:[from __ram_iap_start__ to __ram_iap_end__]; | |
define region CRP_region = mem:[from __crp_start__ to __crp_end__]; | |
define block CSTACK with alignment = 8, size = __size_cstack__ { }; | |
define block HEAP with alignment = 8, size = __size_heap__ { }; | |
define block RW { readwrite }; | |
define block ZI { zi }; | |
initialize by copy { readwrite, section .textrw }; | |
if (isdefinedsymbol(__USE_DLIB_PERTHREAD)) | |
{ | |
/* Required in a multi-threaded application */ | |
initialize by copy with packing = none { section __DLIB_PERTHREAD }; | |
} | |
do not initialize { section .noinit }; | |
place at address mem: m_interrupts_start { readonly section .intvec }; | |
place in TEXT_region { readonly }; | |
place in DATA_region { block RW }; | |
place in DATA_region { block ZI }; | |
place in DATA_region { last block HEAP }; | |
place in CSTACK_region { block CSTACK }; | |
place in CRP_region { section .crp }; |