| ;******************** (C) COPYRIGHT 2015 STMicroelectronics ********************
|
| ;* File Name : startup_stm32f756xx.s
|
| ;* Author : MCD Application Team
|
| ;* Version : V1.0.0 |
| ;* Date : 22-May-2015
|
| ;* Description : STM32F756xx devices vector table for MDK-ARM toolchain.
|
| ;* This module performs:
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| ;* - Set the initial SP
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| ;* - Set the initial PC == Reset_Handler
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| ;* - Set the vector table entries with the exceptions ISR address
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| ;* - Branches to __main in the C library (which eventually
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| ;* calls main()).
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| ;* After Reset the CortexM7 processor is in Thread mode,
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| ;* priority is Privileged, and the Stack is set to Main.
|
| ;* <<< Use Configuration Wizard in Context Menu >>>
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| ;*******************************************************************************
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| ;
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| ;* Redistribution and use in so urce and binary forms, with or without modification,
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| ;* are permitted provided that the following conditions are met:
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| ;* 1. Redistributions of source code must retain the above copyright notice,
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| ;* this list of conditions and the following disclaimer.
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| ;* 2. Redistributions in binary form must reproduce the above copyright notice,
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| ;* this list of conditions and the following disclaimer in the documentation
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| ;* and/or other materials provided with the distribution.
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| ;* 3. Neither the name of STMicroelectronics nor the names of its contributors
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| ;* may be used to endorse or promote products derived from this software
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| ;* without specific prior written permission.
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| ;*
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| ;* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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| ;* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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| ;* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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| ;* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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| ;* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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| ;* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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| ;* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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| ;* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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| ;* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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| ;* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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| ;
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| ;*******************************************************************************
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|
|
| ; Amount of memory (in bytes) allocated for Stack
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| ; Tailor this value to your application needs
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| ; <h> Stack Configuration
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| ; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
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| ; </h>
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|
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| Stack_Size EQU 0x400;
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|
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| AREA STACK, NOINIT, READWRITE, ALIGN=3
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| Stack_Mem SPACE Stack_Size
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| __initial_sp
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|
|
|
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| ; <h> Heap Configuration
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| ; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
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| ; </h>
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|
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| Heap_Size EQU 0x200;
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|
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| AREA HEAP, NOINIT, READWRITE, ALIGN=3
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| __heap_base
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| Heap_Mem SPACE Heap_Size
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| __heap_limit
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|
|
| PRESERVE8
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| THUMB
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|
|
|
|
| ; Vector Table Mapped to Address 0 at Reset
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| AREA RESET, DATA, READONLY
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| EXPORT __Vectors
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| EXPORT __Vectors_End
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| EXPORT __Vectors_Size
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|
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| __Vectors DCD __initial_sp ; Top of Stack
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| DCD Reset_Handler ; Reset Handler
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| DCD NMI_Handler ; NMI Handler
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| DCD HardFault_Handler ; Hard Fault Handler
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| DCD MemManage_Handler ; MPU Fault Handler
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| DCD BusFault_Handler ; Bus Fault Handler
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| DCD UsageFault_Handler ; Usage Fault Handler
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| DCD 0 ; Reserved
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| DCD 0 ; Reserved
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| DCD 0 ; Reserved
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| DCD 0 ; Reserved
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| DCD SVC_Handler ; SVCall Handler
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| DCD DebugMon_Handler ; Debug Monitor Handler
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| DCD 0 ; Reserved
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| DCD PendSV_Handler ; PendSV Handler
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| DCD SysTick_Handler ; SysTick Handler
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|
|
| ; External Interrupts
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| DCD WWDG_IRQHandler ; Window WatchDog
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| DCD PVD_IRQHandler ; PVD through EXTI Line detection
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| DCD TAMP_STAMP_IRQHandler ; Tamper and TimeStamps through the EXTI line
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| DCD RTC_WKUP_IRQHandler ; RTC Wakeup through the EXTI line
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| DCD FLASH_IRQHandler ; FLASH
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| DCD RCC_IRQHandler ; RCC
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| DCD EXTI0_IRQHandler ; EXTI Line0
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| DCD EXTI1_IRQHandler ; EXTI Line1
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| DCD EXTI2_IRQHandler ; EXTI Line2
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| DCD EXTI3_IRQHandler ; EXTI Line3
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| DCD EXTI4_IRQHandler ; EXTI Line4
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| DCD DMA1_Stream0_IRQHandler ; DMA1 Stream 0
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| DCD DMA1_Stream1_IRQHandler ; DMA1 Stream 1
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| DCD DMA1_Stream2_IRQHandler ; DMA1 Stream 2
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| DCD DMA1_Stream3_IRQHandler ; DMA1 Stream 3
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| DCD DMA1_Stream4_IRQHandler ; DMA1 Stream 4
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| DCD DMA1_Stream5_IRQHandler ; DMA1 Stream 5
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| DCD DMA1_Stream6_IRQHandler ; DMA1 Stream 6
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| DCD ADC_IRQHandler ; ADC1, ADC2 and ADC3s
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| DCD CAN1_TX_IRQHandler ; CAN1 TX
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| DCD CAN1_RX0_IRQHandler ; CAN1 RX0
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| DCD CAN1_RX1_IRQHandler ; CAN1 RX1
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| DCD CAN1_SCE_IRQHandler ; CAN1 SCE
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| DCD EXTI9_5_IRQHandler ; External Line[9:5]s
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| DCD TIM1_BRK_TIM9_IRQHandler ; TIM1 Break and TIM9
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| DCD TIM1_UP_TIM10_IRQHandler ; TIM1 Update and TIM10
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| DCD TIM1_TRG_COM_TIM11_IRQHandler ; TIM1 Trigger and Commutation and TIM11
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| DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare
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| DCD TIM2_IRQHandler ; TIM2
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| DCD TIM3_IRQHandler ; TIM3
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| DCD TIM4_IRQHandler ; TIM4
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| DCD I2C1_EV_IRQHandler ; I2C1 Event
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| DCD I2C1_ER_IRQHandler ; I2C1 Error
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| DCD I2C2_EV_IRQHandler ; I2C2 Event
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| DCD I2C2_ER_IRQHandler ; I2C2 Error
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| DCD SPI1_IRQHandler ; SPI1
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| DCD SPI2_IRQHandler ; SPI2
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| DCD USART1_IRQHandler ; USART1
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| DCD USART2_IRQHandler ; USART2
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| DCD USART3_IRQHandler ; USART3
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| DCD EXTI15_10_IRQHandler ; External Line[15:10]s
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| DCD RTC_Alarm_IRQHandler ; RTC Alarm (A and B) through EXTI Line
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| DCD OTG_FS_WKUP_IRQHandler ; USB OTG FS Wakeup through EXTI line
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| DCD TIM8_BRK_TIM12_IRQHandler ; TIM8 Break and TIM12
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| DCD TIM8_UP_TIM13_IRQHandler ; TIM8 Update and TIM13
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| DCD TIM8_TRG_COM_TIM14_IRQHandler ; TIM8 Trigger and Commutation and TIM14
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| DCD TIM8_CC_IRQHandler ; TIM8 Capture Compare
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| DCD DMA1_Stream7_IRQHandler ; DMA1 Stream7
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| DCD FMC_IRQHandler ; FMC
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| DCD SDMMC1_IRQHandler ; SDMMC1
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| DCD TIM5_IRQHandler ; TIM5
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| DCD SPI3_IRQHandler ; SPI3
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| DCD UART4_IRQHandler ; UART4
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| DCD UART5_IRQHandler ; UART5
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| DCD TIM6_DAC_IRQHandler ; TIM6 and DAC1&2 underrun errors
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| DCD TIM7_IRQHandler ; TIM7
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| DCD DMA2_Stream0_IRQHandler ; DMA2 Stream 0
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| DCD DMA2_Stream1_IRQHandler ; DMA2 Stream 1
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| DCD DMA2_Stream2_IRQHandler ; DMA2 Stream 2
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| DCD DMA2_Stream3_IRQHandler ; DMA2 Stream 3
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| DCD DMA2_Stream4_IRQHandler ; DMA2 Stream 4
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| DCD ETH_IRQHandler ; Ethernet
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| DCD ETH_WKUP_IRQHandler ; Ethernet Wakeup through EXTI line
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| DCD CAN2_TX_IRQHandler ; CAN2 TX
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| DCD CAN2_RX0_IRQHandler ; CAN2 RX0
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| DCD CAN2_RX1_IRQHandler ; CAN2 RX1
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| DCD CAN2_SCE_IRQHandler ; CAN2 SCE
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| DCD OTG_FS_IRQHandler ; USB OTG FS
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| DCD DMA2_Stream5_IRQHandler ; DMA2 Stream 5
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| DCD DMA2_Stream6_IRQHandler ; DMA2 Stream 6
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| DCD DMA2_Stream7_IRQHandler ; DMA2 Stream 7
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| DCD USART6_IRQHandler ; USART6
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| DCD I2C3_EV_IRQHandler ; I2C3 event
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| DCD I2C3_ER_IRQHandler ; I2C3 error
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| DCD OTG_HS_EP1_OUT_IRQHandler ; USB OTG HS End Point 1 Out
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| DCD OTG_HS_EP1_IN_IRQHandler ; USB OTG HS End Point 1 In
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| DCD OTG_HS_WKUP_IRQHandler ; USB OTG HS Wakeup through EXTI
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| DCD OTG_HS_IRQHandler ; USB OTG HS
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| DCD DCMI_IRQHandler ; DCMI
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| DCD CRYP_IRQHandler ; CRYP crypto
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| DCD HASH_RNG_IRQHandler ; Hash and Rng
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| DCD FPU_IRQHandler ; FPU
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| DCD UART7_IRQHandler ; UART7
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| DCD UART8_IRQHandler ; UART8
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| DCD SPI4_IRQHandler ; SPI4
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| DCD SPI5_IRQHandler ; SPI5
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| DCD SPI6_IRQHandler ; SPI6
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| DCD SAI1_IRQHandler ; SAI1
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| DCD LTDC_IRQHandler ; LTDC
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| DCD LTDC_ER_IRQHandler ; LTDC error
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| DCD DMA2D_IRQHandler ; DMA2D
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| DCD SAI2_IRQHandler ; SAI2
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| DCD QUADSPI_IRQHandler ; QUADSPI
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| DCD LPTIM1_IRQHandler ; LPTIM1
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| DCD CEC_IRQHandler ; HDMI_CEC
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| DCD I2C4_EV_IRQHandler ; I2C4 Event
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| DCD I2C4_ER_IRQHandler ; I2C4 Error
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| DCD SPDIF_RX_IRQHandler ; SPDIF_RX
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| __Vectors_End
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|
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| __Vectors_Size EQU __Vectors_End - __Vectors
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|
|
| AREA |.text|, CODE, READONLY
|
|
|
| ; Reset handler
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| Reset_Handler PROC
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| EXPORT Reset_Handler [WEAK]
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| IMPORT SystemInit
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| IMPORT __main
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|
|
| LDR R0, =SystemInit
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| BLX R0
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| LDR R0, =__main
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| BX R0
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| ENDP
|
|
|
| ; Dummy Exception Handlers (infinite loops which can be modified)
|
|
|
| NMI_Handler PROC
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| EXPORT NMI_Handler [WEAK]
|
| B .
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| ENDP
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| HardFault_Handler\
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| PROC
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| EXPORT HardFault_Handler [WEAK]
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| B .
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| ENDP
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| MemManage_Handler\
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| PROC
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| EXPORT MemManage_Handler [WEAK]
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| B .
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| ENDP
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| BusFault_Handler\
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| PROC
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| EXPORT BusFault_Handler [WEAK]
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| B .
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| ENDP
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| UsageFault_Handler\
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| PROC
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| EXPORT UsageFault_Handler [WEAK]
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| B .
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| ENDP
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| SVC_Handler PROC
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| EXPORT SVC_Handler [WEAK]
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| B .
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| ENDP
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| DebugMon_Handler\
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| PROC
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| EXPORT DebugMon_Handler [WEAK]
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| B .
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| ENDP
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| PendSV_Handler PROC
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| EXPORT PendSV_Handler [WEAK]
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| B .
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| ENDP
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| SysTick_Handler PROC
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| EXPORT SysTick_Handler [WEAK]
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| B .
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| ENDP
|
|
|
| Default_Handler PROC
|
|
|
| EXPORT WWDG_IRQHandler [WEAK]
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| EXPORT PVD_IRQHandler [WEAK]
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| EXPORT TAMP_STAMP_IRQHandler [WEAK]
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| EXPORT RTC_WKUP_IRQHandler [WEAK]
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| EXPORT FLASH_IRQHandler [WEAK]
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| EXPORT RCC_IRQHandler [WEAK]
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| EXPORT EXTI0_IRQHandler [WEAK]
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| EXPORT EXTI1_IRQHandler [WEAK]
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| EXPORT EXTI2_IRQHandler [WEAK]
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| EXPORT EXTI3_IRQHandler [WEAK]
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| EXPORT EXTI4_IRQHandler [WEAK]
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| EXPORT DMA1_Stream0_IRQHandler [WEAK]
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| EXPORT DMA1_Stream1_IRQHandler [WEAK]
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| EXPORT DMA1_Stream2_IRQHandler [WEAK]
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| EXPORT DMA1_Stream3_IRQHandler [WEAK]
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| EXPORT DMA1_Stream4_IRQHandler [WEAK]
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| EXPORT DMA1_Stream5_IRQHandler [WEAK]
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| EXPORT DMA1_Stream6_IRQHandler [WEAK]
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| EXPORT ADC_IRQHandler [WEAK]
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| EXPORT CAN1_TX_IRQHandler [WEAK]
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| EXPORT CAN1_RX0_IRQHandler [WEAK]
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| EXPORT CAN1_RX1_IRQHandler [WEAK]
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| EXPORT CAN1_SCE_IRQHandler [WEAK]
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| EXPORT EXTI9_5_IRQHandler [WEAK]
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| EXPORT TIM1_BRK_TIM9_IRQHandler [WEAK]
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| EXPORT TIM1_UP_TIM10_IRQHandler [WEAK]
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| EXPORT TIM1_TRG_COM_TIM11_IRQHandler [WEAK]
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| EXPORT TIM1_CC_IRQHandler [WEAK]
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| EXPORT TIM2_IRQHandler [WEAK]
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| EXPORT TIM3_IRQHandler [WEAK]
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| EXPORT TIM4_IRQHandler [WEAK]
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| EXPORT I2C1_EV_IRQHandler [WEAK]
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| EXPORT I2C1_ER_IRQHandler [WEAK]
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| EXPORT I2C2_EV_IRQHandler [WEAK]
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| EXPORT I2C2_ER_IRQHandler [WEAK]
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| EXPORT SPI1_IRQHandler [WEAK]
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| EXPORT SPI2_IRQHandler [WEAK]
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| EXPORT USART1_IRQHandler [WEAK]
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| EXPORT USART2_IRQHandler [WEAK]
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| EXPORT USART3_IRQHandler [WEAK]
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| EXPORT EXTI15_10_IRQHandler [WEAK]
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| EXPORT RTC_Alarm_IRQHandler [WEAK]
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| EXPORT OTG_FS_WKUP_IRQHandler [WEAK]
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| EXPORT TIM8_BRK_TIM12_IRQHandler [WEAK]
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| EXPORT TIM8_UP_TIM13_IRQHandler [WEAK]
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| EXPORT TIM8_TRG_COM_TIM14_IRQHandler [WEAK]
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| EXPORT TIM8_CC_IRQHandler [WEAK]
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| EXPORT DMA1_Stream7_IRQHandler [WEAK]
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| EXPORT FMC_IRQHandler [WEAK]
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| EXPORT SDMMC1_IRQHandler [WEAK]
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| EXPORT TIM5_IRQHandler [WEAK]
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| EXPORT SPI3_IRQHandler [WEAK]
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| EXPORT UART4_IRQHandler [WEAK]
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| EXPORT UART5_IRQHandler [WEAK]
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| EXPORT TIM6_DAC_IRQHandler [WEAK]
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| EXPORT TIM7_IRQHandler [WEAK]
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| EXPORT DMA2_Stream0_IRQHandler [WEAK]
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| EXPORT DMA2_Stream1_IRQHandler [WEAK]
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| EXPORT DMA2_Stream2_IRQHandler [WEAK]
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| EXPORT DMA2_Stream3_IRQHandler [WEAK]
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| EXPORT DMA2_Stream4_IRQHandler [WEAK]
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| EXPORT ETH_IRQHandler [WEAK]
|
| EXPORT ETH_WKUP_IRQHandler [WEAK]
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| EXPORT CAN2_TX_IRQHandler [WEAK]
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| EXPORT CAN2_RX0_IRQHandler [WEAK]
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| EXPORT CAN2_RX1_IRQHandler [WEAK]
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| EXPORT CAN2_SCE_IRQHandler [WEAK]
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| EXPORT OTG_FS_IRQHandler [WEAK]
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| EXPORT DMA2_Stream5_IRQHandler [WEAK]
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| EXPORT DMA2_Stream6_IRQHandler [WEAK]
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| EXPORT DMA2_Stream7_IRQHandler [WEAK]
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| EXPORT USART6_IRQHandler [WEAK]
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| EXPORT I2C3_EV_IRQHandler [WEAK]
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| EXPORT I2C3_ER_IRQHandler [WEAK]
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| EXPORT OTG_HS_EP1_OUT_IRQHandler [WEAK]
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| EXPORT OTG_HS_EP1_IN_IRQHandler [WEAK]
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| EXPORT OTG_HS_WKUP_IRQHandler [WEAK]
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| EXPORT OTG_HS_IRQHandler [WEAK]
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| EXPORT DCMI_IRQHandler [WEAK]
|
| EXPORT CRYP_IRQHandler [WEAK]
|
| EXPORT HASH_RNG_IRQHandler [WEAK]
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| EXPORT FPU_IRQHandler [WEAK]
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| EXPORT UART7_IRQHandler [WEAK]
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| EXPORT UART8_IRQHandler [WEAK]
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| EXPORT SPI4_IRQHandler [WEAK]
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| EXPORT SPI5_IRQHandler [WEAK]
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| EXPORT SPI6_IRQHandler [WEAK]
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| EXPORT SAI1_IRQHandler [WEAK]
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| EXPORT LTDC_IRQHandler [WEAK]
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| EXPORT LTDC_ER_IRQHandler [WEAK]
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| EXPORT DMA2D_IRQHandler [WEAK]
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| EXPORT SAI2_IRQHandler [WEAK]
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| EXPORT QUADSPI_IRQHandler [WEAK]
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| EXPORT LPTIM1_IRQHandler [WEAK]
|
| EXPORT CEC_IRQHandler [WEAK]
|
| EXPORT I2C4_EV_IRQHandler [WEAK]
|
| EXPORT I2C4_ER_IRQHandler [WEAK]
|
| EXPORT SPDIF_RX_IRQHandler [WEAK]
|
|
|
| WWDG_IRQHandler
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| PVD_IRQHandler
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| TAMP_STAMP_IRQHandler
|
| RTC_WKUP_IRQHandler
|
| FLASH_IRQHandler
|
| RCC_IRQHandler
|
| EXTI0_IRQHandler
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| EXTI1_IRQHandler
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| EXTI2_IRQHandler
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| EXTI3_IRQHandler
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| EXTI4_IRQHandler
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| DMA1_Stream0_IRQHandler
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| DMA1_Stream1_IRQHandler
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| DMA1_Stream2_IRQHandler
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| DMA1_Stream3_IRQHandler
|
| DMA1_Stream4_IRQHandler
|
| DMA1_Stream5_IRQHandler
|
| DMA1_Stream6_IRQHandler
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| ADC_IRQHandler
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| CAN1_TX_IRQHandler
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| CAN1_RX0_IRQHandler
|
| CAN1_RX1_IRQHandler
|
| CAN1_SCE_IRQHandler
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| EXTI9_5_IRQHandler
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| TIM1_BRK_TIM9_IRQHandler
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| TIM1_UP_TIM10_IRQHandler
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| TIM1_TRG_COM_TIM11_IRQHandler
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| TIM1_CC_IRQHandler
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| TIM2_IRQHandler
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| TIM3_IRQHandler
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| TIM4_IRQHandler
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| I2C1_EV_IRQHandler
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| I2C1_ER_IRQHandler
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| I2C2_EV_IRQHandler
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| I2C2_ER_IRQHandler
|
| SPI1_IRQHandler
|
| SPI2_IRQHandler
|
| USART1_IRQHandler
|
| USART2_IRQHandler
|
| USART3_IRQHandler
|
| EXTI15_10_IRQHandler
|
| RTC_Alarm_IRQHandler
|
| OTG_FS_WKUP_IRQHandler
|
| TIM8_BRK_TIM12_IRQHandler
|
| TIM8_UP_TIM13_IRQHandler
|
| TIM8_TRG_COM_TIM14_IRQHandler
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| TIM8_CC_IRQHandler
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| DMA1_Stream7_IRQHandler
|
| FMC_IRQHandler
|
| SDMMC1_IRQHandler
|
| TIM5_IRQHandler
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| SPI3_IRQHandler
|
| UART4_IRQHandler
|
| UART5_IRQHandler
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| TIM6_DAC_IRQHandler
|
| TIM7_IRQHandler
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| DMA2_Stream0_IRQHandler
|
| DMA2_Stream1_IRQHandler
|
| DMA2_Stream2_IRQHandler
|
| DMA2_Stream3_IRQHandler
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| DMA2_Stream4_IRQHandler
|
| ETH_IRQHandler
|
| ETH_WKUP_IRQHandler
|
| CAN2_TX_IRQHandler
|
| CAN2_RX0_IRQHandler
|
| CAN2_RX1_IRQHandler
|
| CAN2_SCE_IRQHandler
|
| OTG_FS_IRQHandler
|
| DMA2_Stream5_IRQHandler
|
| DMA2_Stream6_IRQHandler
|
| DMA2_Stream7_IRQHandler
|
| USART6_IRQHandler
|
| I2C3_EV_IRQHandler
|
| I2C3_ER_IRQHandler
|
| OTG_HS_EP1_OUT_IRQHandler
|
| OTG_HS_EP1_IN_IRQHandler
|
| OTG_HS_WKUP_IRQHandler
|
| OTG_HS_IRQHandler
|
| DCMI_IRQHandler
|
| CRYP_IRQHandler
|
| HASH_RNG_IRQHandler
|
| FPU_IRQHandler
|
| UART7_IRQHandler
|
| UART8_IRQHandler
|
| SPI4_IRQHandler
|
| SPI5_IRQHandler
|
| SPI6_IRQHandler
|
| SAI1_IRQHandler
|
| LTDC_IRQHandler
|
| LTDC_ER_IRQHandler
|
| DMA2D_IRQHandler
|
| SAI2_IRQHandler
|
| QUADSPI_IRQHandler
|
| LPTIM1_IRQHandler
|
| CEC_IRQHandler
|
| I2C4_EV_IRQHandler
|
| I2C4_ER_IRQHandler
|
| SPDIF_RX_IRQHandler
|
| B .
|
|
|
| ENDP
|
|
|
| ALIGN
|
|
|
| ;*******************************************************************************
|
| ; User Stack and Heap initialization
|
| ;*******************************************************************************
|
| IF :DEF:__MICROLIB
|
|
|
| EXPORT __initial_sp
|
| EXPORT __heap_base
|
| EXPORT __heap_limit
|
|
|
| ELSE
|
|
|
| IMPORT __use_two_region_memory
|
| EXPORT __user_initial_stackheap
|
|
|
| __user_initial_stackheap
|
|
|
| LDR R0, = Heap_Mem
|
| LDR R1, =(Stack_Mem + Stack_Size)
|
| LDR R2, = (Heap_Mem + Heap_Size)
|
| LDR R3, = Stack_Mem
|
| BX LR
|
|
|
| ALIGN
|
|
|
| ENDIF
|
|
|
| END
|
|
|
| ;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****
|