/* | |
* FreeRTOS Kernel V10.3.0 | |
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. | |
* | |
* Permission is hereby granted, free of charge, to any person obtaining a copy of | |
* this software and associated documentation files (the "Software"), to deal in | |
* the Software without restriction, including without limitation the rights to | |
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of | |
* the Software, and to permit persons to whom the Software is furnished to do so, | |
* subject to the following conditions: | |
* | |
* The above copyright notice and this permission notice shall be included in all | |
* copies or substantial portions of the Software. | |
* | |
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS | |
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR | |
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER | |
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN | |
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. | |
* | |
* http://www.FreeRTOS.org | |
* http://aws.amazon.com/freertos | |
* | |
* 1 tab == 4 spaces! | |
*/ | |
#include "FreeRTOS.h" | |
#include "task.h" | |
__declspec(interrupt:0) void vPIT0InterruptHandler( void ); | |
/* Constants used to configure the interrupts. */ | |
#define portPRESCALE_VALUE 64 | |
#define portPRESCALE_REG_SETTING ( 5 << 8 ) | |
#define portPIT_INTERRUPT_ENABLED ( 0x08 ) | |
#define configPIT0_INTERRUPT_VECTOR ( 55 ) | |
/* | |
* FreeRTOS.org requires two interrupts - a tick interrupt generated from a | |
* timer source, and a spare interrupt vector used for context switching. | |
* The configuration below uses PIT0 for the former, and vector 16 for the | |
* latter. **IF YOUR APPLICATION HAS BOTH OF THESE INTERRUPTS FREE THEN YOU DO | |
* NOT NEED TO CHANGE ANY OF THIS CODE** - otherwise instructions are provided | |
* here for using alternative interrupt sources. | |
* | |
* To change the tick interrupt source: | |
* | |
* 1) Modify vApplicationSetupInterrupts() below to be correct for whichever | |
* peripheral is to be used to generate the tick interrupt. The name of the | |
* handler function (currently vPIT0InterruptHandler()) should also be updated | |
* to indicate which peripheral is generating the interrupt. | |
* | |
* 2) Make sure the interrupt source is cleared within the interrupt handler function. | |
* Currently vPIT0InterruptHandler() clears the PIT0 interrupt. | |
* | |
* 3) Update the vector table within mcf5225x_vectors.s to install the tick | |
* interrupt handler in the correct vector position. | |
* | |
* To change the spare interrupt source: | |
* | |
* 1) Modify vApplicationSetupInterrupts() below to be correct for whichever | |
* interrupt vector is to be used. Make sure you use a spare interrupt on interrupt | |
* controller 0, otherwise the register used to request context switches will also | |
* require modification. | |
* | |
* 2) Change the definition of configYIELD_INTERRUPT_VECTOR within FreeRTOSConfig.h | |
* to be correct for your chosen interrupt vector. | |
* | |
* 3) Update the vector table within mcf5225x_vectors.s to install the handler | |
* _vPortYieldISR() in the correct vector position (by default vector number 16 is | |
* used). | |
*/ | |
void vApplicationSetupInterrupts( void ) | |
{ | |
const unsigned short usCompareMatchValue = ( ( configCPU_CLOCK_HZ / portPRESCALE_VALUE ) / configTICK_RATE_HZ ); | |
/* Configure interrupt priority and level and unmask interrupt for PIT0. */ | |
MCF_INTC0_ICR55 = ( 1 | ( configKERNEL_INTERRUPT_PRIORITY << 3 ) ); | |
MCF_INTC0_IMRH &= ~( MCF_INTC_IMRH_INT_MASK55 ); | |
/* Do the same for vector 63 (interrupt controller 0. I don't think the | |
write to MCF_INTC0_IMRH is actually required here but is included for | |
completeness. */ | |
MCF_INTC0_ICR16 = ( 0 | configKERNEL_INTERRUPT_PRIORITY << 3 ); | |
MCF_INTC0_IMRL &= ~( MCF_INTC_IMRL_INT_MASK16 | 0x01 ); | |
/* Configure PIT0 to generate the RTOS tick. */ | |
MCF_PIT0_PCSR |= MCF_PIT_PCSR_PIF; | |
MCF_PIT0_PCSR = ( portPRESCALE_REG_SETTING | MCF_PIT_PCSR_PIE | MCF_PIT_PCSR_RLD | MCF_PIT_PCSR_EN ); | |
MCF_PIT0_PMR = usCompareMatchValue; | |
} | |
/*-----------------------------------------------------------*/ | |
__declspec(interrupt:0) void vPIT0InterruptHandler( void ) | |
{ | |
unsigned long ulSavedInterruptMask; | |
/* Clear the PIT0 interrupt. */ | |
MCF_PIT0_PCSR |= MCF_PIT_PCSR_PIF; | |
/* Increment the RTOS tick. */ | |
ulSavedInterruptMask = portSET_INTERRUPT_MASK_FROM_ISR(); | |
if( xTaskIncrementTick() != pdFALSE ) | |
{ | |
taskYIELD(); | |
} | |
portCLEAR_INTERRUPT_MASK_FROM_ISR( ulSavedInterruptMask ); | |
} |