/** ################################################################### | |
** THIS BEAN MODULE IS GENERATED BY THE TOOL. DO NOT MODIFY IT. | |
** Filename : IO_Map.H | |
** Project : RTOSDemo | |
** Processor : MC9S12DP256BCPV | |
** Beantype : IO_Map | |
** Version : Driver 01.01 | |
** Compiler : Metrowerks HC12 C Compiler | |
** Date/Time : 13/06/2005, 20:14 | |
** Abstract : | |
** This bean "IO_Map" implements an IO devices mapping. | |
** Settings : | |
** | |
** Contents : | |
** No public methods | |
** | |
** (c) Copyright UNIS, spol. s r.o. 1997-2002 | |
** UNIS, spol. s r.o. | |
** Jundrovska 33 | |
** 624 00 Brno | |
** Czech Republic | |
** http : www.processorexpert.com | |
** mail : info@processorexpert.com | |
** ###################################################################*/ | |
/* Linker pragmas */ | |
#pragma LINK_INFO DERIVATIVE "MC9S12DP256B" | |
#pragma LINK_INFO OSCFREQUENCY "16000000" | |
#define REG_BASE 0x0000 /* Base address for the I/O register block */ | |
/* Based on CPU DB MC9S12DP256_112, version 2.87.278 (RegistersPrg V1.027) */ | |
#ifndef _MC9S12DP256_112_H | |
#define _MC9S12DP256_112_H | |
#include "PE_Types.h" | |
#pragma MESSAGE DISABLE C1106 /* WARNING C1106: Non-standard bitfield type */ | |
/*********************************************/ | |
/* */ | |
/* PE I/O map format */ | |
/* */ | |
/*********************************************/ | |
/*** PORTAB - Port AB Register; 0x00000000 ***/ | |
typedef union { | |
word Word; | |
/* Overlapped registers: */ | |
struct { | |
/*** PORTA - Port A Register; 0x00000000 ***/ | |
union { | |
byte Byte; | |
struct { | |
byte BIT0 :1; /* Port A Bit0, ADDR8, DATA8, DATA0 */ | |
byte BIT1 :1; /* Port A Bit1, ADDR9, DATA9 DATA1 */ | |
byte BIT2 :1; /* Port A Bit2, ADDR10, DATA10, DATA2 */ | |
byte BIT3 :1; /* Port A Bit3, ADDR11, DATA11, DATA3 */ | |
byte BIT4 :1; /* Port A Bit4, ADDR12, DATA12, DATA4 */ | |
byte BIT5 :1; /* Port A Bit5, ADDR13, DATA13, DATA5 */ | |
byte BIT6 :1; /* Port A Bit6, ADDR14, DATA14, DATA6 */ | |
byte BIT7 :1; /* Port A Bit7, ADDR15, DATA15, DATA7 */ | |
} Bits; | |
struct { | |
byte grpBIT :8; | |
} MergedBits; | |
} PORTASTR; | |
#define PORTA _PORTAB.Overlap_STR.PORTASTR.Byte | |
#define PORTA_BIT0 _PORTAB.Overlap_STR.PORTASTR.Bits.BIT0 | |
#define PORTA_BIT1 _PORTAB.Overlap_STR.PORTASTR.Bits.BIT1 | |
#define PORTA_BIT2 _PORTAB.Overlap_STR.PORTASTR.Bits.BIT2 | |
#define PORTA_BIT3 _PORTAB.Overlap_STR.PORTASTR.Bits.BIT3 | |
#define PORTA_BIT4 _PORTAB.Overlap_STR.PORTASTR.Bits.BIT4 | |
#define PORTA_BIT5 _PORTAB.Overlap_STR.PORTASTR.Bits.BIT5 | |
#define PORTA_BIT6 _PORTAB.Overlap_STR.PORTASTR.Bits.BIT6 | |
#define PORTA_BIT7 _PORTAB.Overlap_STR.PORTASTR.Bits.BIT7 | |
#define PORTA_BIT _PORTAB.Overlap_STR.PORTASTR.MergedBits.grpBIT | |
/*** PORTB - Port B Register; 0x00000001 ***/ | |
union { | |
byte Byte; | |
struct { | |
byte BIT0 :1; /* Port B Bit 0, ADDR0, DATA0 */ | |
byte BIT1 :1; /* Port B Bit1, ADDR1, DATA1 */ | |
byte BIT2 :1; /* Port B Bit2, ADDR2, DATA2 */ | |
byte BIT3 :1; /* Port B Bit3, ADDR3, DATA3 */ | |
byte BIT4 :1; /* Port B Bit4, ADDR4, DATA4 */ | |
byte BIT5 :1; /* Port B Bit5, ADDR5, DATA5 */ | |
byte BIT6 :1; /* Port B Bit6, ADDR6, DATA6 */ | |
byte BIT7 :1; /* Port B Bit7, ADDR7, DATA7 */ | |
} Bits; | |
struct { | |
byte grpBIT :8; | |
} MergedBits; | |
} PORTBSTR; | |
#define PORTB _PORTAB.Overlap_STR.PORTBSTR.Byte | |
#define PORTB_BIT0 _PORTAB.Overlap_STR.PORTBSTR.Bits.BIT0 | |
#define PORTB_BIT1 _PORTAB.Overlap_STR.PORTBSTR.Bits.BIT1 | |
#define PORTB_BIT2 _PORTAB.Overlap_STR.PORTBSTR.Bits.BIT2 | |
#define PORTB_BIT3 _PORTAB.Overlap_STR.PORTBSTR.Bits.BIT3 | |
#define PORTB_BIT4 _PORTAB.Overlap_STR.PORTBSTR.Bits.BIT4 | |
#define PORTB_BIT5 _PORTAB.Overlap_STR.PORTBSTR.Bits.BIT5 | |
#define PORTB_BIT6 _PORTAB.Overlap_STR.PORTBSTR.Bits.BIT6 | |
#define PORTB_BIT7 _PORTAB.Overlap_STR.PORTBSTR.Bits.BIT7 | |
#define PORTB_BIT _PORTAB.Overlap_STR.PORTBSTR.MergedBits.grpBIT | |
} Overlap_STR; | |
struct { | |
word BIT0 :1; /* Port B Bit 0, ADDR0, DATA0 */ | |
word BIT1 :1; /* Port B Bit1, ADDR1, DATA1 */ | |
word BIT2 :1; /* Port B Bit2, ADDR2, DATA2 */ | |
word BIT3 :1; /* Port B Bit3, ADDR3, DATA3 */ | |
word BIT4 :1; /* Port B Bit4, ADDR4, DATA4 */ | |
word BIT5 :1; /* Port B Bit5, ADDR5, DATA5 */ | |
word BIT6 :1; /* Port B Bit6, ADDR6, DATA6 */ | |
word BIT7 :1; /* Port B Bit7, ADDR7, DATA7 */ | |
word BIT8 :1; /* Port A Bit0, ADDR8, DATA8, DATA0 */ | |
word BIT9 :1; /* Port A Bit1, ADDR9, DATA9 DATA1 */ | |
word BIT10 :1; /* Port A Bit2, ADDR10, DATA10, DATA2 */ | |
word BIT11 :1; /* Port A Bit3, ADDR11, DATA11, DATA3 */ | |
word BIT12 :1; /* Port A Bit4, ADDR12, DATA12, DATA4 */ | |
word BIT13 :1; /* Port A Bit5, ADDR13, DATA13, DATA5 */ | |
word BIT14 :1; /* Port A Bit6, ADDR14, DATA14, DATA6 */ | |
word BIT15 :1; /* Port A Bit7, ADDR15, DATA15, DATA7 */ | |
} Bits; | |
struct { | |
word grpBIT :16; | |
} MergedBits; | |
} PORTABSTR; | |
extern volatile PORTABSTR _PORTAB @(REG_BASE + 0x00000000); | |
#define PORTAB _PORTAB.Word | |
#define PORTAB_BIT0 _PORTAB.Bits.BIT0 | |
#define PORTAB_BIT1 _PORTAB.Bits.BIT1 | |
#define PORTAB_BIT2 _PORTAB.Bits.BIT2 | |
#define PORTAB_BIT3 _PORTAB.Bits.BIT3 | |
#define PORTAB_BIT4 _PORTAB.Bits.BIT4 | |
#define PORTAB_BIT5 _PORTAB.Bits.BIT5 | |
#define PORTAB_BIT6 _PORTAB.Bits.BIT6 | |
#define PORTAB_BIT7 _PORTAB.Bits.BIT7 | |
#define PORTAB_BIT8 _PORTAB.Bits.BIT8 | |
#define PORTAB_BIT9 _PORTAB.Bits.BIT9 | |
#define PORTAB_BIT10 _PORTAB.Bits.BIT10 | |
#define PORTAB_BIT11 _PORTAB.Bits.BIT11 | |
#define PORTAB_BIT12 _PORTAB.Bits.BIT12 | |
#define PORTAB_BIT13 _PORTAB.Bits.BIT13 | |
#define PORTAB_BIT14 _PORTAB.Bits.BIT14 | |
#define PORTAB_BIT15 _PORTAB.Bits.BIT15 | |
#define PORTAB_BIT _PORTAB.MergedBits.grpBIT | |
/*** DDRAB - Port AB Data Direction Register; 0x00000002 ***/ | |
typedef union { | |
word Word; | |
/* Overlapped registers: */ | |
struct { | |
/*** DDRA - Port A Data Direction Register; 0x00000002 ***/ | |
union { | |
byte Byte; | |
struct { | |
byte BIT0 :1; /* Data Direction Port A Bit 0 */ | |
byte BIT1 :1; /* Data Direction Port A Bit 1 */ | |
byte BIT2 :1; /* Data Direction Port A Bit 2 */ | |
byte BIT3 :1; /* Data Direction Port A Bit 3 */ | |
byte BIT4 :1; /* Data Direction Port A Bit 4 */ | |
byte BIT5 :1; /* Data Direction Port A Bit 5 */ | |
byte BIT6 :1; /* Data Direction Port A Bit 6 */ | |
byte BIT7 :1; /* Data Direction Port A Bit 7 */ | |
} Bits; | |
struct { | |
byte grpBIT :8; | |
} MergedBits; | |
} DDRASTR; | |
#define DDRA _DDRAB.Overlap_STR.DDRASTR.Byte | |
#define DDRA_BIT0 _DDRAB.Overlap_STR.DDRASTR.Bits.BIT0 | |
#define DDRA_BIT1 _DDRAB.Overlap_STR.DDRASTR.Bits.BIT1 | |
#define DDRA_BIT2 _DDRAB.Overlap_STR.DDRASTR.Bits.BIT2 | |
#define DDRA_BIT3 _DDRAB.Overlap_STR.DDRASTR.Bits.BIT3 | |
#define DDRA_BIT4 _DDRAB.Overlap_STR.DDRASTR.Bits.BIT4 | |
#define DDRA_BIT5 _DDRAB.Overlap_STR.DDRASTR.Bits.BIT5 | |
#define DDRA_BIT6 _DDRAB.Overlap_STR.DDRASTR.Bits.BIT6 | |
#define DDRA_BIT7 _DDRAB.Overlap_STR.DDRASTR.Bits.BIT7 | |
#define DDRA_BIT _DDRAB.Overlap_STR.DDRASTR.MergedBits.grpBIT | |
/*** DDRB - Port B Data Direction Register; 0x00000003 ***/ | |
union { | |
byte Byte; | |
struct { | |
byte BIT0 :1; /* Data Direction Port B Bit 0 */ | |
byte BIT1 :1; /* Data Direction Port B Bit 1 */ | |
byte BIT2 :1; /* Data Direction Port B Bit 2 */ | |
byte BIT3 :1; /* Data Direction Port B Bit 3 */ | |
byte BIT4 :1; /* Data Direction Port B Bit 4 */ | |
byte BIT5 :1; /* Data Direction Port B Bit 5 */ | |
byte BIT6 :1; /* Data Direction Port B Bit 6 */ | |
byte BIT7 :1; /* Data Direction Port B Bit 7 */ | |
} Bits; | |
struct { | |
byte grpBIT :8; | |
} MergedBits; | |
} DDRBSTR; | |
#define DDRB _DDRAB.Overlap_STR.DDRBSTR.Byte | |
#define DDRB_BIT0 _DDRAB.Overlap_STR.DDRBSTR.Bits.BIT0 | |
#define DDRB_BIT1 _DDRAB.Overlap_STR.DDRBSTR.Bits.BIT1 | |
#define DDRB_BIT2 _DDRAB.Overlap_STR.DDRBSTR.Bits.BIT2 | |
#define DDRB_BIT3 _DDRAB.Overlap_STR.DDRBSTR.Bits.BIT3 | |
#define DDRB_BIT4 _DDRAB.Overlap_STR.DDRBSTR.Bits.BIT4 | |
#define DDRB_BIT5 _DDRAB.Overlap_STR.DDRBSTR.Bits.BIT5 | |
#define DDRB_BIT6 _DDRAB.Overlap_STR.DDRBSTR.Bits.BIT6 | |
#define DDRB_BIT7 _DDRAB.Overlap_STR.DDRBSTR.Bits.BIT7 | |
#define DDRB_BIT _DDRAB.Overlap_STR.DDRBSTR.MergedBits.grpBIT | |
} Overlap_STR; | |
struct { | |
word BIT0 :1; /* Data Direction Port B Bit 0 */ | |
word BIT1 :1; /* Data Direction Port B Bit 1 */ | |
word BIT2 :1; /* Data Direction Port B Bit 2 */ | |
word BIT3 :1; /* Data Direction Port B Bit 3 */ | |
word BIT4 :1; /* Data Direction Port B Bit 4 */ | |
word BIT5 :1; /* Data Direction Port B Bit 5 */ | |
word BIT6 :1; /* Data Direction Port B Bit 6 */ | |
word BIT7 :1; /* Data Direction Port B Bit 7 */ | |
word BIT8 :1; /* Data Direction Port A Bit 8 */ | |
word BIT9 :1; /* Data Direction Port A Bit 9 */ | |
word BIT10 :1; /* Data Direction Port A Bit 10 */ | |
word BIT11 :1; /* Data Direction Port A Bit 11 */ | |
word BIT12 :1; /* Data Direction Port A Bit 12 */ | |
word BIT13 :1; /* Data Direction Port A Bit 13 */ | |
word BIT14 :1; /* Data Direction Port A Bit 14 */ | |
word BIT15 :1; /* Data Direction Port A Bit 15 */ | |
} Bits; | |
struct { | |
word grpBIT :16; | |
} MergedBits; | |
} DDRABSTR; | |
extern volatile DDRABSTR _DDRAB @(REG_BASE + 0x00000002); | |
#define DDRAB _DDRAB.Word | |
#define DDRAB_BIT0 _DDRAB.Bits.BIT0 | |
#define DDRAB_BIT1 _DDRAB.Bits.BIT1 | |
#define DDRAB_BIT2 _DDRAB.Bits.BIT2 | |
#define DDRAB_BIT3 _DDRAB.Bits.BIT3 | |
#define DDRAB_BIT4 _DDRAB.Bits.BIT4 | |
#define DDRAB_BIT5 _DDRAB.Bits.BIT5 | |
#define DDRAB_BIT6 _DDRAB.Bits.BIT6 | |
#define DDRAB_BIT7 _DDRAB.Bits.BIT7 | |
#define DDRAB_BIT8 _DDRAB.Bits.BIT8 | |
#define DDRAB_BIT9 _DDRAB.Bits.BIT9 | |
#define DDRAB_BIT10 _DDRAB.Bits.BIT10 | |
#define DDRAB_BIT11 _DDRAB.Bits.BIT11 | |
#define DDRAB_BIT12 _DDRAB.Bits.BIT12 | |
#define DDRAB_BIT13 _DDRAB.Bits.BIT13 | |
#define DDRAB_BIT14 _DDRAB.Bits.BIT14 | |
#define DDRAB_BIT15 _DDRAB.Bits.BIT15 | |
#define DDRAB_BIT _DDRAB.MergedBits.grpBIT | |
/*** TCNT - Timer Count Register; 0x00000044 ***/ | |
typedef union { | |
word Word; | |
/* Overlapped registers: */ | |
struct { | |
/*** TCNTHi - Timer Count Register High; 0x00000044 ***/ | |
union { | |
byte Byte; | |
struct { | |
byte BIT15 :1; /* Timer Count Register Bit 15 */ | |
byte BIT14 :1; /* Timer Count Register Bit 14 */ | |
byte BIT13 :1; /* Timer Count Register Bit 13 */ | |
byte BIT12 :1; /* Timer Count Register Bit 12 */ | |
byte BIT11 :1; /* Timer Count Register Bit 11 */ | |
byte BIT10 :1; /* Timer Count Register Bit 10 */ | |
byte BIT9 :1; /* Timer Count Register Bit 9 */ | |
byte BIT8 :1; /* Timer Count Register Bit 8 */ | |
} Bits; | |
} TCNTHiSTR; | |
#define TCNTHi _TCNT.Overlap_STR.TCNTHiSTR.Byte | |
#define TCNTHi_BIT15 _TCNT.Overlap_STR.TCNTHiSTR.Bits.BIT15 | |
#define TCNTHi_BIT14 _TCNT.Overlap_STR.TCNTHiSTR.Bits.BIT14 | |
#define TCNTHi_BIT13 _TCNT.Overlap_STR.TCNTHiSTR.Bits.BIT13 | |
#define TCNTHi_BIT12 _TCNT.Overlap_STR.TCNTHiSTR.Bits.BIT12 | |
#define TCNTHi_BIT11 _TCNT.Overlap_STR.TCNTHiSTR.Bits.BIT11 | |
#define TCNTHi_BIT10 _TCNT.Overlap_STR.TCNTHiSTR.Bits.BIT10 | |
#define TCNTHi_BIT9 _TCNT.Overlap_STR.TCNTHiSTR.Bits.BIT9 | |
#define TCNTHi_BIT8 _TCNT.Overlap_STR.TCNTHiSTR.Bits.BIT8 | |
/*** TCNTLo - Timer Count Register Low; 0x00000045 ***/ | |
union { | |
byte Byte; | |
struct { | |
byte BIT0 :1; /* Timer Count Register Bit 0 */ | |
byte BIT1 :1; /* Timer Count Register Bit 1 */ | |
byte BIT2 :1; /* Timer Count Register Bit 2 */ | |
byte BIT3 :1; /* Timer Count Register Bit 3 */ | |
byte BIT4 :1; /* Timer Count Bit Register 4 */ | |
byte BIT5 :1; /* Timer Count Bit Register 5 */ | |
byte BIT6 :1; /* Timer Count Bit Register 6 */ | |
byte BIT7 :1; /* Timer Count Bit Register 7 */ | |
} Bits; | |
struct { | |
byte grpBIT :8; | |
} MergedBits; | |
} TCNTLoSTR; | |
#define TCNTLo _TCNT.Overlap_STR.TCNTLoSTR.Byte | |
#define TCNTLo_BIT0 _TCNT.Overlap_STR.TCNTLoSTR.Bits.BIT0 | |
#define TCNTLo_BIT1 _TCNT.Overlap_STR.TCNTLoSTR.Bits.BIT1 | |
#define TCNTLo_BIT2 _TCNT.Overlap_STR.TCNTLoSTR.Bits.BIT2 | |
#define TCNTLo_BIT3 _TCNT.Overlap_STR.TCNTLoSTR.Bits.BIT3 | |
#define TCNTLo_BIT4 _TCNT.Overlap_STR.TCNTLoSTR.Bits.BIT4 | |
#define TCNTLo_BIT5 _TCNT.Overlap_STR.TCNTLoSTR.Bits.BIT5 | |
#define TCNTLo_BIT6 _TCNT.Overlap_STR.TCNTLoSTR.Bits.BIT6 | |
#define TCNTLo_BIT7 _TCNT.Overlap_STR.TCNTLoSTR.Bits.BIT7 | |
#define TCNTLo_BIT _TCNT.Overlap_STR.TCNTLoSTR.MergedBits.grpBIT | |
} Overlap_STR; | |
struct { | |
word grpBIT :16; | |
} MergedBits; | |
} TCNTSTR; | |
extern volatile TCNTSTR _TCNT @(REG_BASE + 0x00000044); | |
#define TCNT _TCNT.Word | |
#define TCNT_BIT _TCNT.MergedBits.grpBIT | |
/*** TC0 - Timer Input Capture/Output Compare Register 0; 0x00000050 ***/ | |
typedef union { | |
word Word; | |
/* Overlapped registers: */ | |
struct { | |
/*** TC0Hi - Timer Input Capture/Output Compare Register 0 High; 0x00000050 ***/ | |
union { | |
byte Byte; | |
struct { | |
byte BIT8 :1; /* Timer Input Capture/Output Compare Register 0 Bit 8 */ | |
byte BIT9 :1; /* Timer Input Capture/Output Compare Register 0 Bit 9 */ | |
byte BIT10 :1; /* Timer Input Capture/Output Compare Register 0 Bit 10 */ | |
byte BIT11 :1; /* Timer Input Capture/Output Compare Register 0 Bit 11 */ | |
byte BIT12 :1; /* Timer Input Capture/Output Compare Register 0 Bit 12 */ | |
byte BIT13 :1; /* Timer Input Capture/Output Compare Register 0 Bit 13 */ | |
byte BIT14 :1; /* Timer Input Capture/Output Compare Register 0 Bit 14 */ | |
byte BIT15 :1; /* Timer Input Capture/Output Compare Register 0 Bit 15 */ | |
} Bits; | |
struct { | |
byte grpBIT_8 :8; | |
} MergedBits; | |
} TC0HiSTR; | |
#define TC0Hi _TC0.Overlap_STR.TC0HiSTR.Byte | |
#define TC0Hi_BIT8 _TC0.Overlap_STR.TC0HiSTR.Bits.BIT8 | |
#define TC0Hi_BIT9 _TC0.Overlap_STR.TC0HiSTR.Bits.BIT9 | |
#define TC0Hi_BIT10 _TC0.Overlap_STR.TC0HiSTR.Bits.BIT10 | |
#define TC0Hi_BIT11 _TC0.Overlap_STR.TC0HiSTR.Bits.BIT11 | |
#define TC0Hi_BIT12 _TC0.Overlap_STR.TC0HiSTR.Bits.BIT12 | |
#define TC0Hi_BIT13 _TC0.Overlap_STR.TC0HiSTR.Bits.BIT13 | |
#define TC0Hi_BIT14 _TC0.Overlap_STR.TC0HiSTR.Bits.BIT14 | |
#define TC0Hi_BIT15 _TC0.Overlap_STR.TC0HiSTR.Bits.BIT15 | |
#define TC0Hi_BIT_8 _TC0.Overlap_STR.TC0HiSTR.MergedBits.grpBIT_8 | |
#define TC0Hi_BIT TC0Hi_BIT_8 | |
/*** TC0Lo - Timer Input Capture/Output Compare Register 0 Low; 0x00000051 ***/ | |
union { | |
byte Byte; | |
struct { | |
byte BIT0 :1; /* Timer Input Capture/Output Compare Register 0 Bit 0 */ | |
byte BIT1 :1; /* Timer Input Capture/Output Compare Register 0 Bit 1 */ | |
byte BIT2 :1; /* Timer Input Capture/Output Compare Register 0 Bit 2 */ | |
byte BIT3 :1; /* Timer Input Capture/Output Compare Register 0 Bit 3 */ | |
byte BIT4 :1; /* Timer Input Capture/Output Compare Register 0 Bit 4 */ | |
byte BIT5 :1; /* Timer Input Capture/Output Compare Register 0 Bit 5 */ | |
byte BIT6 :1; /* Timer Input Capture/Output Compare Register 0 Bit 6 */ | |
byte BIT7 :1; /* Timer Input Capture/Output Compare Register 0 Bit 7 */ | |
} Bits; | |
struct { | |
byte grpBIT :8; | |
} MergedBits; | |
} TC0LoSTR; | |
#define TC0Lo _TC0.Overlap_STR.TC0LoSTR.Byte | |
#define TC0Lo_BIT0 _TC0.Overlap_STR.TC0LoSTR.Bits.BIT0 | |
#define TC0Lo_BIT1 _TC0.Overlap_STR.TC0LoSTR.Bits.BIT1 | |
#define TC0Lo_BIT2 _TC0.Overlap_STR.TC0LoSTR.Bits.BIT2 | |
#define TC0Lo_BIT3 _TC0.Overlap_STR.TC0LoSTR.Bits.BIT3 | |
#define TC0Lo_BIT4 _TC0.Overlap_STR.TC0LoSTR.Bits.BIT4 | |
#define TC0Lo_BIT5 _TC0.Overlap_STR.TC0LoSTR.Bits.BIT5 | |
#define TC0Lo_BIT6 _TC0.Overlap_STR.TC0LoSTR.Bits.BIT6 | |
#define TC0Lo_BIT7 _TC0.Overlap_STR.TC0LoSTR.Bits.BIT7 | |
#define TC0Lo_BIT _TC0.Overlap_STR.TC0LoSTR.MergedBits.grpBIT | |
} Overlap_STR; | |
struct { | |
word grpBIT :16; | |
} MergedBits; | |
} TC0STR; | |
extern volatile TC0STR _TC0 @(REG_BASE + 0x00000050); | |
#define TC0 _TC0.Word | |
#define TC0_BIT _TC0.MergedBits.grpBIT | |
/*** TC1 - Timer Input Capture/Output Compare Register 1; 0x00000052 ***/ | |
typedef union { | |
word Word; | |
/* Overlapped registers: */ | |
struct { | |
/*** TC1Hi - Timer Input Capture/Output Compare Register 1 High; 0x00000052 ***/ | |
union { | |
byte Byte; | |
struct { | |
byte BIT8 :1; /* Timer Input Capture/Output Compare Register 1 Bit 8 */ | |
byte BIT9 :1; /* Timer Input Capture/Output Compare Register 1 Bit 9 */ | |
byte BIT10 :1; /* Timer Input Capture/Output Compare Register 1 Bit 10 */ | |
byte BIT11 :1; /* Timer Input Capture/Output Compare Register 1 Bit 11 */ | |
byte BIT12 :1; /* Timer Input Capture/Output Compare Register 1 Bit 12 */ | |
byte BIT13 :1; /* Timer Input Capture/Output Compare Register 1 Bit 13 */ | |
byte BIT14 :1; /* Timer Input Capture/Output Compare Register 1 Bit 14 */ | |
byte BIT15 :1; /* Timer Input Capture/Output Compare Register 1 Bit 15 */ | |
} Bits; | |
struct { | |
byte grpBIT_8 :8; | |
} MergedBits; | |
} TC1HiSTR; | |
#define TC1Hi _TC1.Overlap_STR.TC1HiSTR.Byte | |
#define TC1Hi_BIT8 _TC1.Overlap_STR.TC1HiSTR.Bits.BIT8 | |
#define TC1Hi_BIT9 _TC1.Overlap_STR.TC1HiSTR.Bits.BIT9 | |
#define TC1Hi_BIT10 _TC1.Overlap_STR.TC1HiSTR.Bits.BIT10 | |
#define TC1Hi_BIT11 _TC1.Overlap_STR.TC1HiSTR.Bits.BIT11 | |
#define TC1Hi_BIT12 _TC1.Overlap_STR.TC1HiSTR.Bits.BIT12 | |
#define TC1Hi_BIT13 _TC1.Overlap_STR.TC1HiSTR.Bits.BIT13 | |
#define TC1Hi_BIT14 _TC1.Overlap_STR.TC1HiSTR.Bits.BIT14 | |
#define TC1Hi_BIT15 _TC1.Overlap_STR.TC1HiSTR.Bits.BIT15 | |
#define TC1Hi_BIT_8 _TC1.Overlap_STR.TC1HiSTR.MergedBits.grpBIT_8 | |
#define TC1Hi_BIT TC1Hi_BIT_8 | |
/*** TC1Lo - Timer Input Capture/Output Compare Register 1 Low; 0x00000053 ***/ | |
union { | |
byte Byte; | |
struct { | |
byte BIT0 :1; /* Timer Input Capture/Output Compare Register 1 Bit 0 */ | |
byte BIT1 :1; /* Timer Input Capture/Output Compare Register 1 Bit 1 */ | |
byte BIT2 :1; /* Timer Input Capture/Output Compare Register 1 Bit 2 */ | |
byte BIT3 :1; /* Timer Input Capture/Output Compare Register 1 Bit 3 */ | |
byte BIT4 :1; /* Timer Input Capture/Output Compare Register 1 Bit 4 */ | |
byte BIT5 :1; /* Timer Input Capture/Output Compare Register 1 Bit 5 */ | |
byte BIT6 :1; /* Timer Input Capture/Output Compare Register 1 Bit 6 */ | |
byte BIT7 :1; /* Timer Input Capture/Output Compare Register 1 Bit 7 */ | |
} Bits; | |
struct { | |
byte grpBIT :8; | |
} MergedBits; | |
} TC1LoSTR; | |
#define TC1Lo _TC1.Overlap_STR.TC1LoSTR.Byte | |
#define TC1Lo_BIT0 _TC1.Overlap_STR.TC1LoSTR.Bits.BIT0 | |
#define TC1Lo_BIT1 _TC1.Overlap_STR.TC1LoSTR.Bits.BIT1 | |
#define TC1Lo_BIT2 _TC1.Overlap_STR.TC1LoSTR.Bits.BIT2 | |
#define TC1Lo_BIT3 _TC1.Overlap_STR.TC1LoSTR.Bits.BIT3 | |
#define TC1Lo_BIT4 _TC1.Overlap_STR.TC1LoSTR.Bits.BIT4 | |
#define TC1Lo_BIT5 _TC1.Overlap_STR.TC1LoSTR.Bits.BIT5 | |
#define TC1Lo_BIT6 _TC1.Overlap_STR.TC1LoSTR.Bits.BIT6 | |
#define TC1Lo_BIT7 _TC1.Overlap_STR.TC1LoSTR.Bits.BIT7 | |
#define TC1Lo_BIT _TC1.Overlap_STR.TC1LoSTR.MergedBits.grpBIT | |
} Overlap_STR; | |
struct { | |
word grpBIT :16; | |
} MergedBits; | |
} TC1STR; | |
extern volatile TC1STR _TC1 @(REG_BASE + 0x00000052); | |
#define TC1 _TC1.Word | |
#define TC1_BIT _TC1.MergedBits.grpBIT | |
/*** TC2 - Timer Input Capture/Output Compare Register 2; 0x00000054 ***/ | |
typedef union { | |
word Word; | |
/* Overlapped registers: */ | |
struct { | |
/*** TC2Hi - Timer Input Capture/Output Compare Register 2 High; 0x00000054 ***/ | |
union { | |
byte Byte; | |
struct { | |
byte BIT8 :1; /* Timer Input Capture/Output Compare Register 2 Bit 8 */ | |
byte BIT9 :1; /* Timer Input Capture/Output Compare Register 2 Bit 9 */ | |
byte BIT10 :1; /* Timer Input Capture/Output Compare Register 2 Bit 10 */ | |
byte BIT11 :1; /* Timer Input Capture/Output Compare Register 2 Bit 11 */ | |
byte BIT12 :1; /* Timer Input Capture/Output Compare Register 2 Bit 12 */ | |
byte BIT13 :1; /* Timer Input Capture/Output Compare Register 2 Bit 13 */ | |
byte BIT14 :1; /* Timer Input Capture/Output Compare Register 2 Bit 14 */ | |
byte BIT15 :1; /* Timer Input Capture/Output Compare Register 2 Bit 15 */ | |
} Bits; | |
struct { | |
byte grpBIT_8 :8; | |
} MergedBits; | |
} TC2HiSTR; | |
#define TC2Hi _TC2.Overlap_STR.TC2HiSTR.Byte | |
#define TC2Hi_BIT8 _TC2.Overlap_STR.TC2HiSTR.Bits.BIT8 | |
#define TC2Hi_BIT9 _TC2.Overlap_STR.TC2HiSTR.Bits.BIT9 | |
#define TC2Hi_BIT10 _TC2.Overlap_STR.TC2HiSTR.Bits.BIT10 | |
#define TC2Hi_BIT11 _TC2.Overlap_STR.TC2HiSTR.Bits.BIT11 | |
#define TC2Hi_BIT12 _TC2.Overlap_STR.TC2HiSTR.Bits.BIT12 | |
#define TC2Hi_BIT13 _TC2.Overlap_STR.TC2HiSTR.Bits.BIT13 | |
#define TC2Hi_BIT14 _TC2.Overlap_STR.TC2HiSTR.Bits.BIT14 | |
#define TC2Hi_BIT15 _TC2.Overlap_STR.TC2HiSTR.Bits.BIT15 | |
#define TC2Hi_BIT_8 _TC2.Overlap_STR.TC2HiSTR.MergedBits.grpBIT_8 | |
#define TC2Hi_BIT TC2Hi_BIT_8 | |
/*** TC2Lo - Timer Input Capture/Output Compare Register 2 Low; 0x00000055 ***/ | |
union { | |
byte Byte; | |
struct { | |
byte BIT0 :1; /* Timer Input Capture/Output Compare Register 2 Bit 0 */ | |
byte BIT1 :1; /* Timer Input Capture/Output Compare Register 2 Bit 1 */ | |
byte BIT2 :1; /* Timer Input Capture/Output Compare Register 2 Bit 2 */ | |
byte BIT3 :1; /* Timer Input Capture/Output Compare Register 2 Bit 3 */ | |
byte BIT4 :1; /* Timer Input Capture/Output Compare Register 2 Bit 4 */ | |
byte BIT5 :1; /* Timer Input Capture/Output Compare Register 2 Bit 5 */ | |
byte BIT6 :1; /* Timer Input Capture/Output Compare Register 2 Bit 6 */ | |
byte BIT7 :1; /* Timer Input Capture/Output Compare Register 2 Bit 7 */ | |
} Bits; | |
struct { | |
byte grpBIT :8; | |
} MergedBits; | |
} TC2LoSTR; | |
#define TC2Lo _TC2.Overlap_STR.TC2LoSTR.Byte | |
#define TC2Lo_BIT0 _TC2.Overlap_STR.TC2LoSTR.Bits.BIT0 | |
#define TC2Lo_BIT1 _TC2.Overlap_STR.TC2LoSTR.Bits.BIT1 | |
#define TC2Lo_BIT2 _TC2.Overlap_STR.TC2LoSTR.Bits.BIT2 | |
#define TC2Lo_BIT3 _TC2.Overlap_STR.TC2LoSTR.Bits.BIT3 | |
#define TC2Lo_BIT4 _TC2.Overlap_STR.TC2LoSTR.Bits.BIT4 | |
#define TC2Lo_BIT5 _TC2.Overlap_STR.TC2LoSTR.Bits.BIT5 | |
#define TC2Lo_BIT6 _TC2.Overlap_STR.TC2LoSTR.Bits.BIT6 | |
#define TC2Lo_BIT7 _TC2.Overlap_STR.TC2LoSTR.Bits.BIT7 | |
#define TC2Lo_BIT _TC2.Overlap_STR.TC2LoSTR.MergedBits.grpBIT | |
} Overlap_STR; | |
struct { | |
word grpBIT :16; | |
} MergedBits; | |
} TC2STR; | |
extern volatile TC2STR _TC2 @(REG_BASE + 0x00000054); | |
#define TC2 _TC2.Word | |
#define TC2_BIT _TC2.MergedBits.grpBIT | |
/*** TC3 - Timer Input Capture/Output Compare Register 3; 0x00000056 ***/ | |
typedef union { | |
word Word; | |
/* Overlapped registers: */ | |
struct { | |
/*** TC3Hi - Timer Input Capture/Output Compare Register 3 High; 0x00000056 ***/ | |
union { | |
byte Byte; | |
struct { | |
byte BIT8 :1; /* Timer Input Capture/Output Compare Register 3 Bit 8 */ | |
byte BIT9 :1; /* Timer Input Capture/Output Compare Register 3 Bit 9 */ | |
byte BIT10 :1; /* Timer Input Capture/Output Compare Register 3 Bit 10 */ | |
byte BIT11 :1; /* Timer Input Capture/Output Compare Register 3 Bit 11 */ | |
byte BIT12 :1; /* Timer Input Capture/Output Compare Register 3 Bit 12 */ | |
byte BIT13 :1; /* Timer Input Capture/Output Compare Register 3 Bit 13 */ | |
byte BIT14 :1; /* Timer Input Capture/Output Compare Register 3 Bit 14 */ | |
byte BIT15 :1; /* Timer Input Capture/Output Compare Register 3 Bit 15 */ | |
} Bits; | |
struct { | |
byte grpBIT_8 :8; | |
} MergedBits; | |
} TC3HiSTR; | |
#define TC3Hi _TC3.Overlap_STR.TC3HiSTR.Byte | |
#define TC3Hi_BIT8 _TC3.Overlap_STR.TC3HiSTR.Bits.BIT8 | |
#define TC3Hi_BIT9 _TC3.Overlap_STR.TC3HiSTR.Bits.BIT9 | |
#define TC3Hi_BIT10 _TC3.Overlap_STR.TC3HiSTR.Bits.BIT10 | |
#define TC3Hi_BIT11 _TC3.Overlap_STR.TC3HiSTR.Bits.BIT11 | |
#define TC3Hi_BIT12 _TC3.Overlap_STR.TC3HiSTR.Bits.BIT12 | |
#define TC3Hi_BIT13 _TC3.Overlap_STR.TC3HiSTR.Bits.BIT13 | |
#define TC3Hi_BIT14 _TC3.Overlap_STR.TC3HiSTR.Bits.BIT14 | |
#define TC3Hi_BIT15 _TC3.Overlap_STR.TC3HiSTR.Bits.BIT15 | |
#define TC3Hi_BIT_8 _TC3.Overlap_STR.TC3HiSTR.MergedBits.grpBIT_8 | |
#define TC3Hi_BIT TC3Hi_BIT_8 | |
/*** TC3Lo - Timer Input Capture/Output Compare Register 3 Low; 0x00000057 ***/ | |
union { | |
byte Byte; | |
struct { | |
byte BIT0 :1; /* Timer Input Capture/Output Compare Register 3 Bit 0 */ | |
byte BIT1 :1; /* Timer Input Capture/Output Compare Register 3 Bit 1 */ | |
byte BIT2 :1; /* Timer Input Capture/Output Compare Register 3 Bit 2 */ | |
byte BIT3 :1; /* Timer Input Capture/Output Compare Register 3 Bit 3 */ | |
byte BIT4 :1; /* Timer Input Capture/Output Compare Register 3 Bit 4 */ | |
byte BIT5 :1; /* Timer Input Capture/Output Compare Register 3 Bit 5 */ | |
byte BIT6 :1; /* Timer Input Capture/Output Compare Register 3 Bit 6 */ | |
byte BIT7 :1; /* Timer Input Capture/Output Compare Register 3 Bit 7 */ | |
} Bits; | |
struct { | |
byte grpBIT :8; | |
} MergedBits; | |
} TC3LoSTR; | |
#define TC3Lo _TC3.Overlap_STR.TC3LoSTR.Byte | |
#define TC3Lo_BIT0 _TC3.Overlap_STR.TC3LoSTR.Bits.BIT0 | |
#define TC3Lo_BIT1 _TC3.Overlap_STR.TC3LoSTR.Bits.BIT1 | |
#define TC3Lo_BIT2 _TC3.Overlap_STR.TC3LoSTR.Bits.BIT2 | |
#define TC3Lo_BIT3 _TC3.Overlap_STR.TC3LoSTR.Bits.BIT3 | |
#define TC3Lo_BIT4 _TC3.Overlap_STR.TC3LoSTR.Bits.BIT4 | |
#define TC3Lo_BIT5 _TC3.Overlap_STR.TC3LoSTR.Bits.BIT5 | |
#define TC3Lo_BIT6 _TC3.Overlap_STR.TC3LoSTR.Bits.BIT6 | |
#define TC3Lo_BIT7 _TC3.Overlap_STR.TC3LoSTR.Bits.BIT7 | |
#define TC3Lo_BIT _TC3.Overlap_STR.TC3LoSTR.MergedBits.grpBIT | |
} Overlap_STR; | |
struct { | |
word grpBIT :16; | |
} MergedBits; | |
} TC3STR; | |
extern volatile TC3STR _TC3 @(REG_BASE + 0x00000056); | |
#define TC3 _TC3.Word | |
#define TC3_BIT _TC3.MergedBits.grpBIT | |
/*** TC4 - Timer Input Capture/Output Compare Register 4; 0x00000058 ***/ | |
typedef union { | |
word Word; | |
/* Overlapped registers: */ | |
struct { | |
/*** TC4Hi - Timer Input Capture/Output Compare Register 4 High; 0x00000058 ***/ | |
union { | |
byte Byte; | |
struct { | |
byte BIT8 :1; /* Timer Input Capture/Output Compare Register 4 Bit 8 */ | |
byte BIT9 :1; /* Timer Input Capture/Output Compare Register 4 Bit 9 */ | |
byte BIT10 :1; /* Timer Input Capture/Output Compare Register 4 Bit 10 */ | |
byte BIT11 :1; /* Timer Input Capture/Output Compare Register 4 Bit 11 */ | |
byte BIT12 :1; /* Timer Input Capture/Output Compare Register 4 Bit 12 */ | |
byte BIT13 :1; /* Timer Input Capture/Output Compare Register 4 Bit 13 */ | |
byte BIT14 :1; /* Timer Input Capture/Output Compare Register 4 Bit 14 */ | |
byte BIT15 :1; /* Timer Input Capture/Output Compare Register 4 Bit 15 */ | |
} Bits; | |
struct { | |
byte grpBIT_8 :8; | |
} MergedBits; | |
} TC4HiSTR; | |
#define TC4Hi _TC4.Overlap_STR.TC4HiSTR.Byte | |
#define TC4Hi_BIT8 _TC4.Overlap_STR.TC4HiSTR.Bits.BIT8 | |
#define TC4Hi_BIT9 _TC4.Overlap_STR.TC4HiSTR.Bits.BIT9 | |
#define TC4Hi_BIT10 _TC4.Overlap_STR.TC4HiSTR.Bits.BIT10 | |
#define TC4Hi_BIT11 _TC4.Overlap_STR.TC4HiSTR.Bits.BIT11 | |
#define TC4Hi_BIT12 _TC4.Overlap_STR.TC4HiSTR.Bits.BIT12 | |
#define TC4Hi_BIT13 _TC4.Overlap_STR.TC4HiSTR.Bits.BIT13 | |
#define TC4Hi_BIT14 _TC4.Overlap_STR.TC4HiSTR.Bits.BIT14 | |
#define TC4Hi_BIT15 _TC4.Overlap_STR.TC4HiSTR.Bits.BIT15 | |
#define TC4Hi_BIT_8 _TC4.Overlap_STR.TC4HiSTR.MergedBits.grpBIT_8 | |
#define TC4Hi_BIT TC4Hi_BIT_8 | |
/*** TC4Lo - Timer Input Capture/Output Compare Register 4 Low; 0x00000059 ***/ | |
union { | |
byte Byte; | |
struct { | |
byte BIT0 :1; /* Timer Input Capture/Output Compare Register 4 Bit 0 */ | |
byte BIT1 :1; /* Timer Input Capture/Output Compare Register 4 Bit 1 */ | |
byte BIT2 :1; /* Timer Input Capture/Output Compare Register 4 Bit 2 */ | |
byte BIT3 :1; /* Timer Input Capture/Output Compare Register 4 Bit 3 */ | |
byte BIT4 :1; /* Timer Input Capture/Output Compare Register 4 Bit 4 */ | |
byte BIT5 :1; /* Timer Input Capture/Output Compare Register 4 Bit 5 */ | |
byte BIT6 :1; /* Timer Input Capture/Output Compare Register 4 Bit 6 */ | |
byte BIT7 :1; /* Timer Input Capture/Output Compare Register 4 Bit 7 */ | |
} Bits; | |
struct { | |
byte grpBIT :8; | |
} MergedBits; | |
} TC4LoSTR; | |
#define TC4Lo _TC4.Overlap_STR.TC4LoSTR.Byte | |
#define TC4Lo_BIT0 _TC4.Overlap_STR.TC4LoSTR.Bits.BIT0 | |
#define TC4Lo_BIT1 _TC4.Overlap_STR.TC4LoSTR.Bits.BIT1 | |
#define TC4Lo_BIT2 _TC4.Overlap_STR.TC4LoSTR.Bits.BIT2 | |
#define TC4Lo_BIT3 _TC4.Overlap_STR.TC4LoSTR.Bits.BIT3 | |
#define TC4Lo_BIT4 _TC4.Overlap_STR.TC4LoSTR.Bits.BIT4 | |
#define TC4Lo_BIT5 _TC4.Overlap_STR.TC4LoSTR.Bits.BIT5 | |
#define TC4Lo_BIT6 _TC4.Overlap_STR.TC4LoSTR.Bits.BIT6 | |
#define TC4Lo_BIT7 _TC4.Overlap_STR.TC4LoSTR.Bits.BIT7 | |
#define TC4Lo_BIT _TC4.Overlap_STR.TC4LoSTR.MergedBits.grpBIT | |
} Overlap_STR; | |
struct { | |
word grpBIT :16; | |
} MergedBits; | |
} TC4STR; | |
extern volatile TC4STR _TC4 @(REG_BASE + 0x00000058); | |
#define TC4 _TC4.Word | |
#define TC4_BIT _TC4.MergedBits.grpBIT | |
/*** TC5 - Timer Input Capture/Output Compare Register 5; 0x0000005A ***/ | |
typedef union { | |
word Word; | |
/* Overlapped registers: */ | |
struct { | |
/*** TC5Hi - Timer Input Capture/Output Compare Register 5 High; 0x0000005A ***/ | |
union { | |
byte Byte; | |
struct { | |
byte BIT8 :1; /* Timer Input Capture/Output Compare Register 5 Bit 8 */ | |
byte BIT9 :1; /* Timer Input Capture/Output Compare Register 5 Bit 9 */ | |
byte BIT10 :1; /* Timer Input Capture/Output Compare Register 5 Bit 10 */ | |
byte BIT11 :1; /* Timer Input Capture/Output Compare Register 5 Bit 11 */ | |
byte BIT12 :1; /* Timer Input Capture/Output Compare Register 5 Bit 12 */ | |
byte BIT13 :1; /* Timer Input Capture/Output Compare Register 5 Bit 13 */ | |
byte BIT14 :1; /* Timer Input Capture/Output Compare Register 5 Bit 14 */ | |
byte BIT15 :1; /* Timer Input Capture/Output Compare Register 5 Bit 15 */ | |
} Bits; | |
struct { | |
byte grpBIT_8 :8; | |
} MergedBits; | |
} TC5HiSTR; | |
#define TC5Hi _TC5.Overlap_STR.TC5HiSTR.Byte | |
#define TC5Hi_BIT8 _TC5.Overlap_STR.TC5HiSTR.Bits.BIT8 | |
#define TC5Hi_BIT9 _TC5.Overlap_STR.TC5HiSTR.Bits.BIT9 | |
#define TC5Hi_BIT10 _TC5.Overlap_STR.TC5HiSTR.Bits.BIT10 | |
#define TC5Hi_BIT11 _TC5.Overlap_STR.TC5HiSTR.Bits.BIT11 | |
#define TC5Hi_BIT12 _TC5.Overlap_STR.TC5HiSTR.Bits.BIT12 | |
#define TC5Hi_BIT13 _TC5.Overlap_STR.TC5HiSTR.Bits.BIT13 | |
#define TC5Hi_BIT14 _TC5.Overlap_STR.TC5HiSTR.Bits.BIT14 | |
#define TC5Hi_BIT15 _TC5.Overlap_STR.TC5HiSTR.Bits.BIT15 | |
#define TC5Hi_BIT_8 _TC5.Overlap_STR.TC5HiSTR.MergedBits.grpBIT_8 | |
#define TC5Hi_BIT TC5Hi_BIT_8 | |
/*** TC5Lo - Timer Input Capture/Output Compare Register 5 Low; 0x0000005B ***/ | |
union { | |
byte Byte; | |
struct { | |
byte BIT0 :1; /* Timer Input Capture/Output Compare Register 5 Bit 0 */ | |
byte BIT1 :1; /* Timer Input Capture/Output Compare Register 5 Bit 1 */ | |
byte BIT2 :1; /* Timer Input Capture/Output Compare Register 5 Bit 2 */ | |
byte BIT3 :1; /* Timer Input Capture/Output Compare Register 5 Bit 3 */ | |
byte BIT4 :1; /* Timer Input Capture/Output Compare Register 5 Bit 4 */ | |
byte BIT5 :1; /* Timer Input Capture/Output Compare Register 5 Bit 5 */ | |
byte BIT6 :1; /* Timer Input Capture/Output Compare Register 5 Bit 6 */ | |
byte BIT7 :1; /* Timer Input Capture/Output Compare Register 5 Bit 7 */ | |
} Bits; | |
struct { | |
byte grpBIT :8; | |
} MergedBits; | |
} TC5LoSTR; | |
#define TC5Lo _TC5.Overlap_STR.TC5LoSTR.Byte | |
#define TC5Lo_BIT0 _TC5.Overlap_STR.TC5LoSTR.Bits.BIT0 | |
#define TC5Lo_BIT1 _TC5.Overlap_STR.TC5LoSTR.Bits.BIT1 | |
#define TC5Lo_BIT2 _TC5.Overlap_STR.TC5LoSTR.Bits.BIT2 | |
#define TC5Lo_BIT3 _TC5.Overlap_STR.TC5LoSTR.Bits.BIT3 | |
#define TC5Lo_BIT4 _TC5.Overlap_STR.TC5LoSTR.Bits.BIT4 | |
#define TC5Lo_BIT5 _TC5.Overlap_STR.TC5LoSTR.Bits.BIT5 | |
#define TC5Lo_BIT6 _TC5.Overlap_STR.TC5LoSTR.Bits.BIT6 | |
#define TC5Lo_BIT7 _TC5.Overlap_STR.TC5LoSTR.Bits.BIT7 | |
#define TC5Lo_BIT _TC5.Overlap_STR.TC5LoSTR.MergedBits.grpBIT | |
} Overlap_STR; | |
struct { | |
word grpBIT :16; | |
} MergedBits; | |
} TC5STR; | |
extern volatile TC5STR _TC5 @(REG_BASE + 0x0000005A); | |
#define TC5 _TC5.Word | |
#define TC5_BIT _TC5.MergedBits.grpBIT | |
/*** TC6 - Timer Input Capture/Output Compare Register 6; 0x0000005C ***/ | |
typedef union { | |
word Word; | |
/* Overlapped registers: */ | |
struct { | |
/*** TC6Hi - Timer Input Capture/Output Compare Register 6 High; 0x0000005C ***/ | |
union { | |
byte Byte; | |
struct { | |
byte BIT8 :1; /* Timer Input Capture/Output Compare Register 6 Bit 8 */ | |
byte BIT9 :1; /* Timer Input Capture/Output Compare Register 6 Bit 9 */ | |
byte BIT10 :1; /* Timer Input Capture/Output Compare Register 6 Bit 10 */ | |
byte BIT11 :1; /* Timer Input Capture/Output Compare Register 6 Bit 11 */ | |
byte BIT12 :1; /* Timer Input Capture/Output Compare Register 6 Bit 12 */ | |
byte BIT13 :1; /* Timer Input Capture/Output Compare Register 6 Bit 13 */ | |
byte BIT14 :1; /* Timer Input Capture/Output Compare Register 6 Bit 14 */ | |
byte BIT15 :1; /* Timer Input Capture/Output Compare Register 6 Bit 15 */ | |
} Bits; | |
struct { | |
byte grpBIT_8 :8; | |
} MergedBits; | |
} TC6HiSTR; | |
#define TC6Hi _TC6.Overlap_STR.TC6HiSTR.Byte | |
#define TC6Hi_BIT8 _TC6.Overlap_STR.TC6HiSTR.Bits.BIT8 | |
#define TC6Hi_BIT9 _TC6.Overlap_STR.TC6HiSTR.Bits.BIT9 | |
#define TC6Hi_BIT10 _TC6.Overlap_STR.TC6HiSTR.Bits.BIT10 | |
#define TC6Hi_BIT11 _TC6.Overlap_STR.TC6HiSTR.Bits.BIT11 | |
#define TC6Hi_BIT12 _TC6.Overlap_STR.TC6HiSTR.Bits.BIT12 | |
#define TC6Hi_BIT13 _TC6.Overlap_STR.TC6HiSTR.Bits.BIT13 | |
#define TC6Hi_BIT14 _TC6.Overlap_STR.TC6HiSTR.Bits.BIT14 | |
#define TC6Hi_BIT15 _TC6.Overlap_STR.TC6HiSTR.Bits.BIT15 | |
#define TC6Hi_BIT_8 _TC6.Overlap_STR.TC6HiSTR.MergedBits.grpBIT_8 | |
#define TC6Hi_BIT TC6Hi_BIT_8 | |
/*** TC6Lo - Timer Input Capture/Output Compare Register 6 Low; 0x0000005D ***/ | |
union { | |
byte Byte; | |
struct { | |
byte BIT0 :1; /* Timer Input Capture/Output Compare Register 6 Bit 0 */ | |
byte BIT1 :1; /* Timer Input Capture/Output Compare Register 6 Bit 1 */ | |
byte BIT2 :1; /* Timer Input Capture/Output Compare Register 6 Bit 2 */ | |
byte BIT3 :1; /* Timer Input Capture/Output Compare Register 6 Bit 3 */ | |
byte BIT4 :1; /* Timer Input Capture/Output Compare Register 6 Bit 4 */ | |
byte BIT5 :1; /* Timer Input Capture/Output Compare Register 6 Bit 5 */ | |
byte BIT6 :1; /* Timer Input Capture/Output Compare Register 6 Bit 6 */ | |
byte BIT7 :1; /* Timer Input Capture/Output Compare Register 6 Bit 7 */ | |
} Bits; | |
struct { | |
byte grpBIT :8; | |
} MergedBits; | |
} TC6LoSTR; | |
#define TC6Lo _TC6.Overlap_STR.TC6LoSTR.Byte | |
#define TC6Lo_BIT0 _TC6.Overlap_STR.TC6LoSTR.Bits.BIT0 | |
#define TC6Lo_BIT1 _TC6.Overlap_STR.TC6LoSTR.Bits.BIT1 | |
#define TC6Lo_BIT2 _TC6.Overlap_STR.TC6LoSTR.Bits.BIT2 | |
#define TC6Lo_BIT3 _TC6.Overlap_STR.TC6LoSTR.Bits.BIT3 | |
#define TC6Lo_BIT4 _TC6.Overlap_STR.TC6LoSTR.Bits.BIT4 | |
#define TC6Lo_BIT5 _TC6.Overlap_STR.TC6LoSTR.Bits.BIT5 | |
#define TC6Lo_BIT6 _TC6.Overlap_STR.TC6LoSTR.Bits.BIT6 | |
#define TC6Lo_BIT7 _TC6.Overlap_STR.TC6LoSTR.Bits.BIT7 | |
#define TC6Lo_BIT _TC6.Overlap_STR.TC6LoSTR.MergedBits.grpBIT | |
} Overlap_STR; | |
struct { | |
word grpBIT :16; | |
} MergedBits; | |
} TC6STR; | |
extern volatile TC6STR _TC6 @(REG_BASE + 0x0000005C); | |
#define TC6 _TC6.Word | |
#define TC6_BIT _TC6.MergedBits.grpBIT | |
/*** TC7 - Timer Input Capture/Output Compare Register 7; 0x0000005E ***/ | |
typedef union { | |
word Word; | |
/* Overlapped registers: */ | |
struct { | |
/*** TC7Hi - Timer Input Capture/Output Compare Register 7 High; 0x0000005E ***/ | |
union { | |
byte Byte; | |
struct { | |
byte BIT8 :1; /* Timer Input Capture/Output Compare Register 7 Bit 8 */ | |
byte BIT9 :1; /* Timer Input Capture/Output Compare Register 7 Bit 9 */ | |
byte BIT10 :1; /* Timer Input Capture/Output Compare Register 7 Bit 10 */ | |
byte BIT11 :1; /* Timer Input Capture/Output Compare Register 7 Bit 11 */ | |
byte BIT12 :1; /* Timer Input Capture/Output Compare Register 7 Bit 12 */ | |
byte BIT13 :1; /* Timer Input Capture/Output Compare Register 7 Bit 13 */ | |
byte BIT14 :1; /* Timer Input Capture/Output Compare Register 7 Bit 14 */ | |
byte BIT15 :1; /* Timer Input Capture/Output Compare Register 7 Bit 15 */ | |
} Bits; | |
struct { | |
byte grpBIT_8 :8; | |
} MergedBits; | |
} TC7HiSTR; | |
#define TC7Hi _TC7.Overlap_STR.TC7HiSTR.Byte | |
#define TC7Hi_BIT8 _TC7.Overlap_STR.TC7HiSTR.Bits.BIT8 | |
#define TC7Hi_BIT9 _TC7.Overlap_STR.TC7HiSTR.Bits.BIT9 | |
#define TC7Hi_BIT10 _TC7.Overlap_STR.TC7HiSTR.Bits.BIT10 | |
#define TC7Hi_BIT11 _TC7.Overlap_STR.TC7HiSTR.Bits.BIT11 | |
#define TC7Hi_BIT12 _TC7.Overlap_STR.TC7HiSTR.Bits.BIT12 | |
#define TC7Hi_BIT13 _TC7.Overlap_STR.TC7HiSTR.Bits.BIT13 | |
#define TC7Hi_BIT14 _TC7.Overlap_STR.TC7HiSTR.Bits.BIT14 | |
#define TC7Hi_BIT15 _TC7.Overlap_STR.TC7HiSTR.Bits.BIT15 | |
#define TC7Hi_BIT_8 _TC7.Overlap_STR.TC7HiSTR.MergedBits.grpBIT_8 | |
#define TC7Hi_BIT TC7Hi_BIT_8 | |
/*** TC7Lo - Timer Input Capture/Output Compare Register 7 Low; 0x0000005F ***/ | |
union { | |
byte Byte; | |
struct { | |
byte BIT0 :1; /* Timer Input Capture/Output Compare Register 7 Bit 0 */ | |
byte BIT1 :1; /* Timer Input Capture/Output Compare Register 7 Bit 1 */ | |
byte BIT2 :1; /* Timer Input Capture/Output Compare Register 7 Bit 2 */ | |
byte BIT3 :1; /* Timer Input Capture/Output Compare Register 7 Bit 3 */ | |
byte BIT4 :1; /* Timer Input Capture/Output Compare Register 7 Bit 4 */ | |
byte BIT5 :1; /* Timer Input Capture/Output Compare Register 7 Bit 5 */ | |
byte BIT6 :1; /* Timer Input Capture/Output Compare Register 7 Bit 6 */ | |
byte BIT7 :1; /* Timer Input Capture/Output Compare Register 7 Bit 7 */ | |
} Bits; | |
struct { | |
byte grpBIT :8; | |
} MergedBits; | |
} TC7LoSTR; | |
#define TC7Lo _TC7.Overlap_STR.TC7LoSTR.Byte | |
#define TC7Lo_BIT0 _TC7.Overlap_STR.TC7LoSTR.Bits.BIT0 | |
#define TC7Lo_BIT1 _TC7.Overlap_STR.TC7LoSTR.Bits.BIT1 | |
#define TC7Lo_BIT2 _TC7.Overlap_STR.TC7LoSTR.Bits.BIT2 | |
#define TC7Lo_BIT3 _TC7.Overlap_STR.TC7LoSTR.Bits.BIT3 | |
#define TC7Lo_BIT4 _TC7.Overlap_STR.TC7LoSTR.Bits.BIT4 | |
#define TC7Lo_BIT5 _TC7.Overlap_STR.TC7LoSTR.Bits.BIT5 | |
#define TC7Lo_BIT6 _TC7.Overlap_STR.TC7LoSTR.Bits.BIT6 | |
#define TC7Lo_BIT7 _TC7.Overlap_STR.TC7LoSTR.Bits.BIT7 | |
#define TC7Lo_BIT _TC7.Overlap_STR.TC7LoSTR.MergedBits.grpBIT | |
} Overlap_STR; | |
struct { | |
word grpBIT :16; | |
} MergedBits; | |
} TC7STR; | |
extern volatile TC7STR _TC7 @(REG_BASE + 0x0000005E); | |
#define TC7 _TC7.Word | |
#define TC7_BIT _TC7.MergedBits.grpBIT | |
/*** PACN32 - Pulse Accumulators Count 32 Register; 0x00000062 ***/ | |
typedef union { | |
word Word; | |
/* Overlapped registers: */ | |
struct { | |
/*** PACN3 - Pulse Accumulators Count 3 Register; 0x00000062 ***/ | |
union { | |
byte Byte; | |
struct { | |
byte grpBIT :8; | |
} MergedBits; | |
} PACN3STR; | |
#define PACN3 _PACN32.Overlap_STR.PACN3STR.Byte | |
#define PACN3_BIT _PACN32.Overlap_STR.PACN3STR.MergedBits.grpBIT | |
/*** PACN2 - Pulse Accumulators Count 2 Register; 0x00000063 ***/ | |
union { | |
byte Byte; | |
struct { | |
byte grpBIT :8; | |
} MergedBits; | |
} PACN2STR; | |
#define PACN2 _PACN32.Overlap_STR.PACN2STR.Byte | |
#define PACN2_BIT _PACN32.Overlap_STR.PACN2STR.MergedBits.grpBIT | |
} Overlap_STR; | |
struct { | |
word grpBIT :16; | |
} MergedBits; | |
} PACN32STR; | |
extern volatile PACN32STR _PACN32 @(REG_BASE + 0x00000062); | |
#define PACN32 _PACN32.Word | |
#define PACN32_BIT _PACN32.MergedBits.grpBIT | |
/*** PACN10 - Pulse Accumulators Count 10 Register; 0x00000064 ***/ | |
typedef union { | |
word Word; | |
/* Overlapped registers: */ | |
struct { | |
/*** PACN1 - Pulse Accumulators Count 1 Register; 0x00000064 ***/ | |
union { | |
byte Byte; | |
struct { | |
byte grpBIT :8; | |
} MergedBits; | |
} PACN1STR; | |
#define PACN1 _PACN10.Overlap_STR.PACN1STR.Byte | |
#define PACN1_BIT _PACN10.Overlap_STR.PACN1STR.MergedBits.grpBIT | |
/*** PACN0 - Pulse Accumulators Count 0 Register; 0x00000065 ***/ | |
union { | |
byte Byte; | |
struct { | |
byte grpBIT :8; | |
} MergedBits; | |
} PACN0STR; | |
#define PACN0 _PACN10.Overlap_STR.PACN0STR.Byte | |
#define PACN0_BIT _PACN10.Overlap_STR.PACN0STR.MergedBits.grpBIT | |
} Overlap_STR; | |
struct { | |
word grpBIT :16; | |
} MergedBits; | |
} PACN10STR; | |
extern volatile PACN10STR _PACN10 @(REG_BASE + 0x00000064); | |
#define PACN10 _PACN10.Word | |
#define PACN10_BIT _PACN10.MergedBits.grpBIT | |
/*** PA32H - 8-Bit Pulse Accumulators Holding 32 Register; 0x00000072 ***/ | |
typedef union { | |
word Word; | |
/* Overlapped registers: */ | |
struct { | |
/*** PA3H - 8-Bit Pulse Accumulators Holding 3 Register; 0x00000072 ***/ | |
union { | |
byte Byte; | |
struct { | |
byte BIT0 :1; /* Pulse Accumulator Bit 0 */ | |
byte BIT1 :1; /* Pulse Accumulator Bit 1 */ | |
byte BIT2 :1; /* Pulse Accumulator Bit 2 */ | |
byte BIT3 :1; /* Pulse Accumulator Bit 3 */ | |
byte BIT4 :1; /* Pulse Accumulator Bit 4 */ | |
byte BIT5 :1; /* Pulse Accumulator Bit 5 */ | |
byte BIT6 :1; /* Pulse Accumulator Bit 6 */ | |
byte BIT7 :1; /* Pulse Accumulator Bit 7 */ | |
} Bits; | |
struct { | |
byte grpBIT :8; | |
} MergedBits; | |
} PA3HSTR; | |
#define PA3H _PA32H.Overlap_STR.PA3HSTR.Byte | |
#define PA3H_BIT0 _PA32H.Overlap_STR.PA3HSTR.Bits.BIT0 | |
#define PA3H_BIT1 _PA32H.Overlap_STR.PA3HSTR.Bits.BIT1 | |
#define PA3H_BIT2 _PA32H.Overlap_STR.PA3HSTR.Bits.BIT2 | |
#define PA3H_BIT3 _PA32H.Overlap_STR.PA3HSTR.Bits.BIT3 | |
#define PA3H_BIT4 _PA32H.Overlap_STR.PA3HSTR.Bits.BIT4 | |
#define PA3H_BIT5 _PA32H.Overlap_STR.PA3HSTR.Bits.BIT5 | |
#define PA3H_BIT6 _PA32H.Overlap_STR.PA3HSTR.Bits.BIT6 | |
#define PA3H_BIT7 _PA32H.Overlap_STR.PA3HSTR.Bits.BIT7 | |
#define PA3H_BIT _PA32H.Overlap_STR.PA3HSTR.MergedBits.grpBIT | |
/*** PA2H - 8-Bit Pulse Accumulators Holding 2 Register; 0x00000073 ***/ | |
union { | |
byte Byte; | |
struct { | |
byte BIT0 :1; /* Pulse Accumulator Bit 0 */ | |
byte BIT1 :1; /* Pulse Accumulator Bit 1 */ | |
byte BIT2 :1; /* Pulse Accumulator Bit 2 */ | |
byte BIT3 :1; /* Pulse Accumulator Bit 3 */ | |
byte BIT4 :1; /* Pulse Accumulator Bit 4 */ | |
byte BIT5 :1; /* Pulse Accumulator Bit 5 */ | |
byte BIT6 :1; /* Pulse Accumulator Bit 6 */ | |
byte BIT7 :1; /* Pulse Accumulator Bit 7 */ | |
} Bits; | |
struct { | |
byte grpBIT :8; | |
} MergedBits; | |
} PA2HSTR; | |
#define PA2H _PA32H.Overlap_STR.PA2HSTR.Byte | |
#define PA2H_BIT0 _PA32H.Overlap_STR.PA2HSTR.Bits.BIT0 | |
#define PA2H_BIT1 _PA32H.Overlap_STR.PA2HSTR.Bits.BIT1 | |
#define PA2H_BIT2 _PA32H.Overlap_STR.PA2HSTR.Bits.BIT2 | |
#define PA2H_BIT3 _PA32H.Overlap_STR.PA2HSTR.Bits.BIT3 | |
#define PA2H_BIT4 _PA32H.Overlap_STR.PA2HSTR.Bits.BIT4 | |
#define PA2H_BIT5 _PA32H.Overlap_STR.PA2HSTR.Bits.BIT5 | |
#define PA2H_BIT6 _PA32H.Overlap_STR.PA2HSTR.Bits.BIT6 | |
#define PA2H_BIT7 _PA32H.Overlap_STR.PA2HSTR.Bits.BIT7 | |
#define PA2H_BIT _PA32H.Overlap_STR.PA2HSTR.MergedBits.grpBIT | |
} Overlap_STR; | |
struct { | |
word BIT0 :1; /* Pulse Accumulator Bit 0 */ | |
word BIT1 :1; /* Pulse Accumulator Bit 1 */ | |
word BIT2 :1; /* Pulse Accumulator Bit 2 */ | |
word BIT3 :1; /* Pulse Accumulator Bit 3 */ | |
word BIT4 :1; /* Pulse Accumulator Bit 4 */ | |
word BIT5 :1; /* Pulse Accumulator Bit 5 */ | |
word BIT6 :1; /* Pulse Accumulator Bit 6 */ | |
word BIT7 :1; /* Pulse Accumulator Bit 7 */ | |
word BIT8 :1; /* Pulse Accumulator Bit 8 */ | |
word BIT9 :1; /* Pulse Accumulator Bit 9 */ | |
word BIT10 :1; /* Pulse Accumulator Bit 10 */ | |
word BIT11 :1; /* Pulse Accumulator Bit 11 */ | |
word BIT12 :1; /* Pulse Accumulator Bit 12 */ | |
word BIT13 :1; /* Pulse Accumulator Bit 13 */ | |
word BIT14 :1; /* Pulse Accumulator Bit 14 */ | |
word BIT15 :1; /* Pulse Accumulator Bit 15 */ | |
} Bits; | |
struct { | |
word grpBIT :16; | |
} MergedBits; | |
} PA32HSTR; | |
extern volatile PA32HSTR _PA32H @(REG_BASE + 0x00000072); | |
#define PA32H _PA32H.Word | |
#define PA32H_BIT0 _PA32H.Bits.BIT0 | |
#define PA32H_BIT1 _PA32H.Bits.BIT1 | |
#define PA32H_BIT2 _PA32H.Bits.BIT2 | |
#define PA32H_BIT3 _PA32H.Bits.BIT3 | |
#define PA32H_BIT4 _PA32H.Bits.BIT4 | |
#define PA32H_BIT5 _PA32H.Bits.BIT5 | |
#define PA32H_BIT6 _PA32H.Bits.BIT6 | |
#define PA32H_BIT7 _PA32H.Bits.BIT7 | |
#define PA32H_BIT8 _PA32H.Bits.BIT8 | |
#define PA32H_BIT9 _PA32H.Bits.BIT9 | |
#define PA32H_BIT10 _PA32H.Bits.BIT10 | |
#define PA32H_BIT11 _PA32H.Bits.BIT11 | |
#define PA32H_BIT12 _PA32H.Bits.BIT12 | |
#define PA32H_BIT13 _PA32H.Bits.BIT13 | |
#define PA32H_BIT14 _PA32H.Bits.BIT14 | |
#define PA32H_BIT15 _PA32H.Bits.BIT15 | |
#define PA32H_BIT _PA32H.MergedBits.grpBIT | |
/*** PA10H - 8-Bit Pulse Accumulators Holding 10 Register; 0x00000074 ***/ | |
typedef union { | |
word Word; | |
/* Overlapped registers: */ | |
struct { | |
/*** PA1H - 8-Bit Pulse Accumulators Holding 1 Register; 0x00000074 ***/ | |
union { | |
byte Byte; | |
struct { | |
byte BIT0 :1; /* Pulse Accumulator Bit 0 */ | |
byte BIT1 :1; /* Pulse Accumulator Bit 1 */ | |
byte BIT2 :1; /* Pulse Accumulator Bit 2 */ | |
byte BIT3 :1; /* Pulse Accumulator Bit 3 */ | |
byte BIT4 :1; /* Pulse Accumulator Bit 4 */ | |
byte BIT5 :1; /* Pulse Accumulator Bit 5 */ | |
byte BIT6 :1; /* Pulse Accumulator Bit 6 */ | |
byte BIT7 :1; /* Pulse Accumulator Bit 7 */ | |
} Bits; | |
struct { | |
byte grpBIT :8; | |
} MergedBits; | |
} PA1HSTR; | |
#define PA1H _PA10H.Overlap_STR.PA1HSTR.Byte | |
#define PA1H_BIT0 _PA10H.Overlap_STR.PA1HSTR.Bits.BIT0 | |
#define PA1H_BIT1 _PA10H.Overlap_STR.PA1HSTR.Bits.BIT1 | |
#define PA1H_BIT2 _PA10H.Overlap_STR.PA1HSTR.Bits.BIT2 | |
#define PA1H_BIT3 _PA10H.Overlap_STR.PA1HSTR.Bits.BIT3 | |
#define PA1H_BIT4 _PA10H.Overlap_STR.PA1HSTR.Bits.BIT4 | |
#define PA1H_BIT5 _PA10H.Overlap_STR.PA1HSTR.Bits.BIT5 | |
#define PA1H_BIT6 _PA10H.Overlap_STR.PA1HSTR.Bits.BIT6 | |
#define PA1H_BIT7 _PA10H.Overlap_STR.PA1HSTR.Bits.BIT7 | |
#define PA1H_BIT _PA10H.Overlap_STR.PA1HSTR.MergedBits.grpBIT | |
/*** PA0H - 8-Bit Pulse Accumulators Holding 0 Register; 0x00000075 ***/ | |
union { | |
byte Byte; | |
struct { | |
byte BIT0 :1; /* Pulse Accumulator Bit 0 */ | |
byte BIT1 :1; /* Pulse Accumulator Bit 1 */ | |
byte BIT2 :1; /* Pulse Accumulator Bit 2 */ | |
byte BIT3 :1; /* Pulse Accumulator Bit 3 */ | |
byte BIT4 :1; /* Pulse Accumulator Bit 4 */ | |
byte BIT5 :1; /* Pulse Accumulator Bit 5 */ | |
byte BIT6 :1; /* Pulse Accumulator Bit 6 */ | |
byte BIT7 :1; /* Pulse Accumulator Bit 7 */ | |
} Bits; | |
struct { | |
byte grpBIT :8; | |
} MergedBits; | |
} PA0HSTR; | |
#define PA0H _PA10H.Overlap_STR.PA0HSTR.Byte | |
#define PA0H_BIT0 _PA10H.Overlap_STR.PA0HSTR.Bits.BIT0 | |
#define PA0H_BIT1 _PA10H.Overlap_STR.PA0HSTR.Bits.BIT1 | |
#define PA0H_BIT2 _PA10H.Overlap_STR.PA0HSTR.Bits.BIT2 | |
#define PA0H_BIT3 _PA10H.Overlap_STR.PA0HSTR.Bits.BIT3 | |
#define PA0H_BIT4 _PA10H.Overlap_STR.PA0HSTR.Bits.BIT4 | |
#define PA0H_BIT5 _PA10H.Overlap_STR.PA0HSTR.Bits.BIT5 | |
#define PA0H_BIT6 _PA10H.Overlap_STR.PA0HSTR.Bits.BIT6 | |
#define PA0H_BIT7 _PA10H.Overlap_STR.PA0HSTR.Bits.BIT7 | |
#define PA0H_BIT _PA10H.Overlap_STR.PA0HSTR.MergedBits.grpBIT | |
} Overlap_STR; | |
struct { | |
word BIT0 :1; /* Pulse Accumulator Bit 0 */ | |
word BIT1 :1; /* Pulse Accumulator Bit 1 */ | |
word BIT2 :1; /* Pulse Accumulator Bit 2 */ | |
word BIT3 :1; /* Pulse Accumulator Bit 3 */ | |
word BIT4 :1; /* Pulse Accumulator Bit 4 */ | |
word BIT5 :1; /* Pulse Accumulator Bit 5 */ | |
word BIT6 :1; /* Pulse Accumulator Bit 6 */ | |
word BIT7 :1; /* Pulse Accumulator Bit 7 */ | |
word BIT8 :1; /* Pulse Accumulator Bit 8 */ | |
word BIT9 :1; /* Pulse Accumulator Bit 9 */ | |
word BIT10 :1; /* Pulse Accumulator Bit 10 */ | |
word BIT11 :1; /* Pulse Accumulator Bit 11 */ | |
word BIT12 :1; /* Pulse Accumulator Bit 12 */ | |
word BIT13 :1; /* Pulse Accumulator Bit 13 */ | |
word BIT14 :1; /* Pulse Accumulator Bit 14 */ | |
word BIT15 :1; /* Pulse Accumulator Bit 15 */ | |
} Bits; | |
struct { | |
word grpBIT :16; | |
} MergedBits; | |
} PA10HSTR; | |
extern volatile PA10HSTR _PA10H @(REG_BASE + 0x00000074); | |
#define PA10H _PA10H.Word | |
#define PA10H_BIT0 _PA10H.Bits.BIT0 | |
#define PA10H_BIT1 _PA10H.Bits.BIT1 | |
#define PA10H_BIT2 _PA10H.Bits.BIT2 | |
#define PA10H_BIT3 _PA10H.Bits.BIT3 | |
#define PA10H_BIT4 _PA10H.Bits.BIT4 | |
#define PA10H_BIT5 _PA10H.Bits.BIT5 | |
#define PA10H_BIT6 _PA10H.Bits.BIT6 | |
#define PA10H_BIT7 _PA10H.Bits.BIT7 | |
#define PA10H_BIT8 _PA10H.Bits.BIT8 | |
#define PA10H_BIT9 _PA10H.Bits.BIT9 | |
#define PA10H_BIT10 _PA10H.Bits.BIT10 | |
#define PA10H_BIT11 _PA10H.Bits.BIT11 | |
#define PA10H_BIT12 _PA10H.Bits.BIT12 | |
#define PA10H_BIT13 _PA10H.Bits.BIT13 | |
#define PA10H_BIT14 _PA10H.Bits.BIT14 | |
#define PA10H_BIT15 _PA10H.Bits.BIT15 | |
#define PA10H_BIT _PA10H.MergedBits.grpBIT | |
/*** MCCNT - Modulus Down-Counter Count Register; 0x00000076 ***/ | |
typedef union { | |
word Word; | |
/* Overlapped registers: */ | |
struct { | |
/*** MCCNThi - Modulus Down-Counter Count Register High; 0x00000076 ***/ | |
union { | |
byte Byte; | |
struct { | |
byte BIT8 :1; /* Modulus Down-Counter Bit 8 */ | |
byte BIT9 :1; /* Modulus Down-Counter Bit 9 */ | |
byte BIT10 :1; /* Modulus Down-Counter Bit 10 */ | |
byte BIT11 :1; /* Modulus Down-Counter Bit 11 */ | |
byte BIT12 :1; /* Modulus Down-Counter Bit 12 */ | |
byte BIT13 :1; /* Modulus Down-Counter Bit 13 */ | |
byte BIT14 :1; /* Modulus Down-Counter Bit 14 */ | |
byte BIT15 :1; /* Modulus Down-Counter Bit 15 */ | |
} Bits; | |
struct { | |
byte grpBIT_8 :8; | |
} MergedBits; | |
} MCCNThiSTR; | |
#define MCCNThi _MCCNT.Overlap_STR.MCCNThiSTR.Byte | |
#define MCCNThi_BIT8 _MCCNT.Overlap_STR.MCCNThiSTR.Bits.BIT8 | |
#define MCCNThi_BIT9 _MCCNT.Overlap_STR.MCCNThiSTR.Bits.BIT9 | |
#define MCCNThi_BIT10 _MCCNT.Overlap_STR.MCCNThiSTR.Bits.BIT10 | |
#define MCCNThi_BIT11 _MCCNT.Overlap_STR.MCCNThiSTR.Bits.BIT11 | |
#define MCCNThi_BIT12 _MCCNT.Overlap_STR.MCCNThiSTR.Bits.BIT12 | |
#define MCCNThi_BIT13 _MCCNT.Overlap_STR.MCCNThiSTR.Bits.BIT13 | |
#define MCCNThi_BIT14 _MCCNT.Overlap_STR.MCCNThiSTR.Bits.BIT14 | |
#define MCCNThi_BIT15 _MCCNT.Overlap_STR.MCCNThiSTR.Bits.BIT15 | |
#define MCCNThi_BIT_8 _MCCNT.Overlap_STR.MCCNThiSTR.MergedBits.grpBIT_8 | |
#define MCCNThi_BIT MCCNThi_BIT_8 | |
/*** MCCNTlo - Modulus Down-Counter Count Register Low; 0x00000077 ***/ | |
union { | |
byte Byte; | |
struct { | |
byte BIT0 :1; /* Modulus Down-Counter Bit 0 */ | |
byte BIT1 :1; /* Modulus Down-Counter Bit 1 */ | |
byte BIT2 :1; /* Modulus Down-Counter Bit 2 */ | |
byte BIT3 :1; /* Modulus Down-Counter Bit 3 */ | |
byte BIT4 :1; /* Modulus Down-Counter Bit 4 */ | |
byte BIT5 :1; /* Modulus Down-Counter Bit 5 */ | |
byte BIT6 :1; /* Modulus Down-Counter Bit 6 */ | |
byte BIT7 :1; /* Modulus Down-Counter Bit 7 */ | |
} Bits; | |
struct { | |
byte grpBIT :8; | |
} MergedBits; | |
} MCCNTloSTR; | |
#define MCCNTlo _MCCNT.Overlap_STR.MCCNTloSTR.Byte | |
#define MCCNTlo_BIT0 _MCCNT.Overlap_STR.MCCNTloSTR.Bits.BIT0 | |
#define MCCNTlo_BIT1 _MCCNT.Overlap_STR.MCCNTloSTR.Bits.BIT1 | |
#define MCCNTlo_BIT2 _MCCNT.Overlap_STR.MCCNTloSTR.Bits.BIT2 | |
#define MCCNTlo_BIT3 _MCCNT.Overlap_STR.MCCNTloSTR.Bits.BIT3 | |
#define MCCNTlo_BIT4 _MCCNT.Overlap_STR.MCCNTloSTR.Bits.BIT4 | |
#define MCCNTlo_BIT5 _MCCNT.Overlap_STR.MCCNTloSTR.Bits.BIT5 | |
#define MCCNTlo_BIT6 _MCCNT.Overlap_STR.MCCNTloSTR.Bits.BIT6 | |
#define MCCNTlo_BIT7 _MCCNT.Overlap_STR.MCCNTloSTR.Bits.BIT7 | |
#define MCCNTlo_BIT _MCCNT.Overlap_STR.MCCNTloSTR.MergedBits.grpBIT | |
} Overlap_STR; | |
struct { | |
word grpBIT :16; | |
} MergedBits; | |
} MCCNTSTR; | |
extern volatile MCCNTSTR _MCCNT @(REG_BASE + 0x00000076); | |
#define MCCNT _MCCNT.Word | |
#define MCCNT_BIT _MCCNT.MergedBits.grpBIT | |
/*** TC0H - Timer Input Capture Holding Registers 0; 0x00000078 ***/ | |
typedef union { | |
word Word; | |
/* Overlapped registers: */ | |
struct { | |
/*** TC0Hhi - Timer Input Capture Holding Registers 0 High; 0x00000078 ***/ | |
union { | |
byte Byte; | |
struct { | |
byte BIT8 :1; /* Timer Input Capture Holding Bit 8 */ | |
byte BIT9 :1; /* Timer Input Capture Holding Bit 9 */ | |
byte BIT10 :1; /* Timer Input Capture Holding Bit 10 */ | |
byte BIT11 :1; /* Timer Input Capture Holding Bit 11 */ | |
byte BIT12 :1; /* Timer Input Capture Holding Bit 12 */ | |
byte BIT13 :1; /* Timer Input Capture Holding Bit 13 */ | |
byte BIT14 :1; /* Timer Input Capture Holding Bit 14 */ | |
byte BIT15 :1; /* Timer Input Capture Holding Bit 15 */ | |
} Bits; | |
struct { | |
byte grpBIT_8 :8; | |
} MergedBits; | |
} TC0HhiSTR; | |
#define TC0Hhi _TC0H.Overlap_STR.TC0HhiSTR.Byte | |
#define TC0Hhi_BIT8 _TC0H.Overlap_STR.TC0HhiSTR.Bits.BIT8 | |
#define TC0Hhi_BIT9 _TC0H.Overlap_STR.TC0HhiSTR.Bits.BIT9 | |
#define TC0Hhi_BIT10 _TC0H.Overlap_STR.TC0HhiSTR.Bits.BIT10 | |
#define TC0Hhi_BIT11 _TC0H.Overlap_STR.TC0HhiSTR.Bits.BIT11 | |
#define TC0Hhi_BIT12 _TC0H.Overlap_STR.TC0HhiSTR.Bits.BIT12 | |
#define TC0Hhi_BIT13 _TC0H.Overlap_STR.TC0HhiSTR.Bits.BIT13 | |
#define TC0Hhi_BIT14 _TC0H.Overlap_STR.TC0HhiSTR.Bits.BIT14 | |
#define TC0Hhi_BIT15 _TC0H.Overlap_STR.TC0HhiSTR.Bits.BIT15 | |
#define TC0Hhi_BIT_8 _TC0H.Overlap_STR.TC0HhiSTR.MergedBits.grpBIT_8 | |
#define TC0Hhi_BIT TC0Hhi_BIT_8 | |
/*** TC0Hlo - Timer Input Capture Holding Registers 0 Low; 0x00000079 ***/ | |
union { | |
byte Byte; | |
struct { | |
byte BIT0 :1; /* Timer Input Capture Holding Bit 0 */ | |
byte BIT1 :1; /* Timer Input Capture Holding Bit 1 */ | |
byte BIT2 :1; /* Timer Input Capture Holding Bit 2 */ | |
byte BIT3 :1; /* Timer Input Capture Holding Bit 3 */ | |
byte BIT4 :1; /* Timer Input Capture Holding Bit 4 */ | |
byte BIT5 :1; /* Timer Input Capture Holding Bit 5 */ | |
byte BIT6 :1; /* Timer Input Capture Holding Bit 6 */ | |
byte BIT7 :1; /* Timer Input Capture Holding Bit 7 */ | |
} Bits; | |
struct { | |
byte grpBIT :8; | |
} MergedBits; | |
} TC0HloSTR; | |
#define TC0Hlo _TC0H.Overlap_STR.TC0HloSTR.Byte | |
#define TC0Hlo_BIT0 _TC0H.Overlap_STR.TC0HloSTR.Bits.BIT0 | |
#define TC0Hlo_BIT1 _TC0H.Overlap_STR.TC0HloSTR.Bits.BIT1 | |
#define TC0Hlo_BIT2 _TC0H.Overlap_STR.TC0HloSTR.Bits.BIT2 | |
#define TC0Hlo_BIT3 _TC0H.Overlap_STR.TC0HloSTR.Bits.BIT3 | |
#define TC0Hlo_BIT4 _TC0H.Overlap_STR.TC0HloSTR.Bits.BIT4 | |
#define TC0Hlo_BIT5 _TC0H.Overlap_STR.TC0HloSTR.Bits.BIT5 | |
#define TC0Hlo_BIT6 _TC0H.Overlap_STR.TC0HloSTR.Bits.BIT6 | |
#define TC0Hlo_BIT7 _TC0H.Overlap_STR.TC0HloSTR.Bits.BIT7 | |
#define TC0Hlo_BIT _TC0H.Overlap_STR.TC0HloSTR.MergedBits.grpBIT | |
} Overlap_STR; | |
struct { | |
word BIT0 :1; /* Timer Input Capture Holding Bit 0 */ | |
word BIT1 :1; /* Timer Input Capture Holding Bit 1 */ | |
word BIT2 :1; /* Timer Input Capture Holding Bit 2 */ | |
word BIT3 :1; /* Timer Input Capture Holding Bit 3 */ | |
word BIT4 :1; /* Timer Input Capture Holding Bit 4 */ | |
word BIT5 :1; /* Timer Input Capture Holding Bit 5 */ | |
word BIT6 :1; /* Timer Input Capture Holding Bit 6 */ | |
word BIT7 :1; /* Timer Input Capture Holding Bit 7 */ | |
word BIT8 :1; /* Timer Input Capture Holding Bit 8 */ | |
word BIT9 :1; /* Timer Input Capture Holding Bit 9 */ | |
word BIT10 :1; /* Timer Input Capture Holding Bit 10 */ | |
word BIT11 :1; /* Timer Input Capture Holding Bit 11 */ | |
word BIT12 :1; /* Timer Input Capture Holding Bit 12 */ | |
word BIT13 :1; /* Timer Input Capture Holding Bit 13 */ | |
word BIT14 :1; /* Timer Input Capture Holding Bit 14 */ | |
word BIT15 :1; /* Timer Input Capture Holding Bit 15 */ | |
} Bits; | |
struct { | |
word grpBIT :16; | |
} MergedBits; | |
} TC0HSTR; | |
extern volatile TC0HSTR _TC0H @(REG_BASE + 0x00000078); | |
#define TC0H _TC0H.Word | |
#define TC0H_BIT0 _TC0H.Bits.BIT0 | |
#define TC0H_BIT1 _TC0H.Bits.BIT1 | |
#define TC0H_BIT2 _TC0H.Bits.BIT2 | |
#define TC0H_BIT3 _TC0H.Bits.BIT3 | |
#define TC0H_BIT4 _TC0H.Bits.BIT4 | |
#define TC0H_BIT5 _TC0H.Bits.BIT5 | |
#define TC0H_BIT6 _TC0H.Bits.BIT6 | |
#define TC0H_BIT7 _TC0H.Bits.BIT7 | |
#define TC0H_BIT8 _TC0H.Bits.BIT8 | |
#define TC0H_BIT9 _TC0H.Bits.BIT9 | |
#define TC0H_BIT10 _TC0H.Bits.BIT10 | |
#define TC0H_BIT11 _TC0H.Bits.BIT11 | |
#define TC0H_BIT12 _TC0H.Bits.BIT12 | |
#define TC0H_BIT13 _TC0H.Bits.BIT13 | |
#define TC0H_BIT14 _TC0H.Bits.BIT14 | |
#define TC0H_BIT15 _TC0H.Bits.BIT15 | |
#define TC0H_BIT _TC0H.MergedBits.grpBIT | |
/*** TC1H - Timer Input Capture Holding Registers 1; 0x0000007A ***/ | |
typedef union { | |
word Word; | |
/* Overlapped registers: */ | |
struct { | |
/*** TC1Hhi - Timer Input Capture Holding Registers 1 High; 0x0000007A ***/ | |
union { | |
byte Byte; | |
struct { | |
byte BIT8 :1; /* Timer Input Capture Holding Bit 8 */ | |
byte BIT9 :1; /* Timer Input Capture Holding Bit 9 */ | |
byte BIT10 :1; /* Timer Input Capture Holding Bit 10 */ | |
byte BIT11 :1; /* Timer Input Capture Holding Bit 11 */ | |
byte BIT12 :1; /* Timer Input Capture Holding Bit 12 */ | |
byte BIT13 :1; /* Timer Input Capture Holding Bit 13 */ | |
byte BIT14 :1; /* Timer Input Capture Holding Bit 14 */ | |
byte BIT15 :1; /* Timer Input Capture Holding Bit 15 */ | |
} Bits; | |
struct { | |
byte grpBIT_8 :8; | |
} MergedBits; | |
} TC1HhiSTR; | |
#define TC1Hhi _TC1H.Overlap_STR.TC1HhiSTR.Byte | |
#define TC1Hhi_BIT8 _TC1H.Overlap_STR.TC1HhiSTR.Bits.BIT8 | |
#define TC1Hhi_BIT9 _TC1H.Overlap_STR.TC1HhiSTR.Bits.BIT9 | |
#define TC1Hhi_BIT10 _TC1H.Overlap_STR.TC1HhiSTR.Bits.BIT10 | |
#define TC1Hhi_BIT11 _TC1H.Overlap_STR.TC1HhiSTR.Bits.BIT11 | |
#define TC1Hhi_BIT12 _TC1H.Overlap_STR.TC1HhiSTR.Bits.BIT12 | |
#define TC1Hhi_BIT13 _TC1H.Overlap_STR.TC1HhiSTR.Bits.BIT13 | |
#define TC1Hhi_BIT14 _TC1H.Overlap_STR.TC1HhiSTR.Bits.BIT14 | |
#define TC1Hhi_BIT15 _TC1H.Overlap_STR.TC1HhiSTR.Bits.BIT15 | |
#define TC1Hhi_BIT_8 _TC1H.Overlap_STR.TC1HhiSTR.MergedBits.grpBIT_8 | |
#define TC1Hhi_BIT TC1Hhi_BIT_8 | |
/*** TC1Hlo - Timer Input Capture Holding Registers 1 Low; 0x0000007B ***/ | |
union { | |
byte Byte; | |
struct { | |
byte BIT0 :1; /* Timer Input Capture Holding Bit 0 */ | |
byte BIT1 :1; /* Timer Input Capture Holding Bit 1 */ | |
byte BIT2 :1; /* Timer Input Capture Holding Bit 2 */ | |
byte BIT3 :1; /* Timer Input Capture Holding Bit 3 */ | |
byte BIT4 :1; /* Timer Input Capture Holding Bit 4 */ | |
byte BIT5 :1; /* Timer Input Capture Holding Bit 5 */ | |
byte BIT6 :1; /* Timer Input Capture Holding Bit 6 */ | |
byte BIT7 :1; /* Timer Input Capture Holding Bit 7 */ | |
} Bits; | |
struct { | |
byte grpBIT :8; | |
} MergedBits; | |
} TC1HloSTR; | |
#define TC1Hlo _TC1H.Overlap_STR.TC1HloSTR.Byte | |
#define TC1Hlo_BIT0 _TC1H.Overlap_STR.TC1HloSTR.Bits.BIT0 | |
#define TC1Hlo_BIT1 _TC1H.Overlap_STR.TC1HloSTR.Bits.BIT1 | |
#define TC1Hlo_BIT2 _TC1H.Overlap_STR.TC1HloSTR.Bits.BIT2 | |
#define TC1Hlo_BIT3 _TC1H.Overlap_STR.TC1HloSTR.Bits.BIT3 | |
#define TC1Hlo_BIT4 _TC1H.Overlap_STR.TC1HloSTR.Bits.BIT4 | |
#define TC1Hlo_BIT5 _TC1H.Overlap_STR.TC1HloSTR.Bits.BIT5 | |
#define TC1Hlo_BIT6 _TC1H.Overlap_STR.TC1HloSTR.Bits.BIT6 | |
#define TC1Hlo_BIT7 _TC1H.Overlap_STR.TC1HloSTR.Bits.BIT7 | |
#define TC1Hlo_BIT _TC1H.Overlap_STR.TC1HloSTR.MergedBits.grpBIT | |
} Overlap_STR; | |
struct { | |
word BIT0 :1; /* Timer Input Capture Holding Bit 0 */ | |
word BIT1 :1; /* Timer Input Capture Holding Bit 1 */ | |
word BIT2 :1; /* Timer Input Capture Holding Bit 2 */ | |
word BIT3 :1; /* Timer Input Capture Holding Bit 3 */ | |
word BIT4 :1; /* Timer Input Capture Holding Bit 4 */ | |
word BIT5 :1; /* Timer Input Capture Holding Bit 5 */ | |
word BIT6 :1; /* Timer Input Capture Holding Bit 6 */ | |
word BIT7 :1; /* Timer Input Capture Holding Bit 7 */ | |
word BIT8 :1; /* Timer Input Capture Holding Bit 8 */ | |
word BIT9 :1; /* Timer Input Capture Holding Bit 9 */ | |
word BIT10 :1; /* Timer Input Capture Holding Bit 10 */ | |
word BIT11 :1; /* Timer Input Capture Holding Bit 11 */ | |
word BIT12 :1; /* Timer Input Capture Holding Bit 12 */ | |
word BIT13 :1; /* Timer Input Capture Holding Bit 13 */ | |
word BIT14 :1; /* Timer Input Capture Holding Bit 14 */ | |
word BIT15 :1; /* Timer Input Capture Holding Bit 15 */ | |
} Bits; | |
struct { | |
word grpBIT :16; | |
} MergedBits; | |
} TC1HSTR; | |
extern volatile TC1HSTR _TC1H @(REG_BASE + 0x0000007A); | |
#define TC1H _TC1H.Word | |
#define TC1H_BIT0 _TC1H.Bits.BIT0 | |
#define TC1H_BIT1 _TC1H.Bits.BIT1 | |
#define TC1H_BIT2 _TC1H.Bits.BIT2 | |
#define TC1H_BIT3 _TC1H.Bits.BIT3 | |
#define TC1H_BIT4 _TC1H.Bits.BIT4 | |
#define TC1H_BIT5 _TC1H.Bits.BIT5 | |
#define TC1H_BIT6 _TC1H.Bits.BIT6 | |
#define TC1H_BIT7 _TC1H.Bits.BIT7 | |
#define TC1H_BIT8 _TC1H.Bits.BIT8 | |
#define TC1H_BIT9 _TC1H.Bits.BIT9 | |
#define TC1H_BIT10 _TC1H.Bits.BIT10 | |
#define TC1H_BIT11 _TC1H.Bits.BIT11 | |
#define TC1H_BIT12 _TC1H.Bits.BIT12 | |
#define TC1H_BIT13 _TC1H.Bits.BIT13 | |
#define TC1H_BIT14 _TC1H.Bits.BIT14 | |
#define TC1H_BIT15 _TC1H.Bits.BIT15 | |
#define TC1H_BIT _TC1H.MergedBits.grpBIT | |
/*** TC2H - Timer Input Capture Holding Registers 2; 0x0000007C ***/ | |
typedef union { | |
word Word; | |
/* Overlapped registers: */ | |
struct { | |
/*** TC2Hhi - Timer Input Capture Holding Registers 2 High; 0x0000007C ***/ | |
union { | |
byte Byte; | |
struct { | |
byte BIT8 :1; /* Timer Input Capture Holding Bit 8 */ | |
byte BIT9 :1; /* Timer Input Capture Holding Bit 9 */ | |
byte BIT10 :1; /* Timer Input Capture Holding Bit 10 */ | |
byte BIT11 :1; /* Timer Input Capture Holding Bit 11 */ | |
byte BIT12 :1; /* Timer Input Capture Holding Bit 12 */ | |
byte BIT13 :1; /* Timer Input Capture Holding Bit 13 */ | |
byte BIT14 :1; /* Timer Input Capture Holding Bit 14 */ | |
byte BIT15 :1; /* Timer Input Capture Holding Bit 15 */ | |
} Bits; | |
struct { | |
byte grpBIT_8 :8; | |
} MergedBits; | |
} TC2HhiSTR; | |
#define TC2Hhi _TC2H.Overlap_STR.TC2HhiSTR.Byte | |
#define TC2Hhi_BIT8 _TC2H.Overlap_STR.TC2HhiSTR.Bits.BIT8 | |
#define TC2Hhi_BIT9 _TC2H.Overlap_STR.TC2HhiSTR.Bits.BIT9 | |
#define TC2Hhi_BIT10 _TC2H.Overlap_STR.TC2HhiSTR.Bits.BIT10 | |
#define TC2Hhi_BIT11 _TC2H.Overlap_STR.TC2HhiSTR.Bits.BIT11 | |
#define TC2Hhi_BIT12 _TC2H.Overlap_STR.TC2HhiSTR.Bits.BIT12 | |
#define TC2Hhi_BIT13 _TC2H.Overlap_STR.TC2HhiSTR.Bits.BIT13 | |
#define TC2Hhi_BIT14 _TC2H.Overlap_STR.TC2HhiSTR.Bits.BIT14 | |
#define TC2Hhi_BIT15 _TC2H.Overlap_STR.TC2HhiSTR.Bits.BIT15 | |
#define TC2Hhi_BIT_8 _TC2H.Overlap_STR.TC2HhiSTR.MergedBits.grpBIT_8 | |
#define TC2Hhi_BIT TC2Hhi_BIT_8 | |
/*** TC2Hlo - Timer Input Capture Holding Registers 2 Low; 0x0000007D ***/ | |
union { | |
byte Byte; | |
struct { | |
byte BIT0 :1; /* Timer Input Capture Holding Bit 0 */ | |
byte BIT1 :1; /* Timer Input Capture Holding Bit 1 */ | |
byte BIT2 :1; /* Timer Input Capture Holding Bit 2 */ | |
byte BIT3 :1; /* Timer Input Capture Holding Bit 3 */ | |
byte BIT4 :1; /* Timer Input Capture Holding Bit 4 */ | |
byte BIT5 :1; /* Timer Input Capture Holding Bit 5 */ | |
byte BIT6 :1; /* Timer Input Capture Holding Bit 6 */ | |
byte BIT7 :1; /* Timer Input Capture Holding Bit 7 */ | |
} Bits; | |
struct { | |
byte grpBIT :8; | |
} MergedBits; | |
} TC2HloSTR; | |
#define TC2Hlo _TC2H.Overlap_STR.TC2HloSTR.Byte | |
#define TC2Hlo_BIT0 _TC2H.Overlap_STR.TC2HloSTR.Bits.BIT0 | |
#define TC2Hlo_BIT1 _TC2H.Overlap_STR.TC2HloSTR.Bits.BIT1 | |
#define TC2Hlo_BIT2 _TC2H.Overlap_STR.TC2HloSTR.Bits.BIT2 | |
#define TC2Hlo_BIT3 _TC2H.Overlap_STR.TC2HloSTR.Bits.BIT3 | |
#define TC2Hlo_BIT4 _TC2H.Overlap_STR.TC2HloSTR.Bits.BIT4 | |
#define TC2Hlo_BIT5 _TC2H.Overlap_STR.TC2HloSTR.Bits.BIT5 | |
#define TC2Hlo_BIT6 _TC2H.Overlap_STR.TC2HloSTR.Bits.BIT6 | |
#define TC2Hlo_BIT7 _TC2H.Overlap_STR.TC2HloSTR.Bits.BIT7 | |
#define TC2Hlo_BIT _TC2H.Overlap_STR.TC2HloSTR.MergedBits.grpBIT | |
} Overlap_STR; | |
struct { | |
word BIT0 :1; /* Timer Input Capture Holding Bit 0 */ | |
word BIT1 :1; /* Timer Input Capture Holding Bit 1 */ | |
word BIT2 :1; /* Timer Input Capture Holding Bit 2 */ | |
word BIT3 :1; /* Timer Input Capture Holding Bit 3 */ | |
word BIT4 :1; /* Timer Input Capture Holding Bit 4 */ | |
word BIT5 :1; /* Timer Input Capture Holding Bit 5 */ | |
word BIT6 :1; /* Timer Input Capture Holding Bit 6 */ | |
word BIT7 :1; /* Timer Input Capture Holding Bit 7 */ | |
word BIT8 :1; /* Timer Input Capture Holding Bit 8 */ | |
word BIT9 :1; /* Timer Input Capture Holding Bit 9 */ | |
word BIT10 :1; /* Timer Input Capture Holding Bit 10 */ | |
word BIT11 :1; /* Timer Input Capture Holding Bit 11 */ | |
word BIT12 :1; /* Timer Input Capture Holding Bit 12 */ | |
word BIT13 :1; /* Timer Input Capture Holding Bit 13 */ | |
word BIT14 :1; /* Timer Input Capture Holding Bit 14 */ | |
word BIT15 :1; /* Timer Input Capture Holding Bit 15 */ | |
} Bits; | |
struct { | |
word grpBIT :16; | |
} MergedBits; | |
} TC2HSTR; | |
extern volatile TC2HSTR _TC2H @(REG_BASE + 0x0000007C); | |
#define TC2H _TC2H.Word | |
#define TC2H_BIT0 _TC2H.Bits.BIT0 | |
#define TC2H_BIT1 _TC2H.Bits.BIT1 | |
#define TC2H_BIT2 _TC2H.Bits.BIT2 | |
#define TC2H_BIT3 _TC2H.Bits.BIT3 | |
#define TC2H_BIT4 _TC2H.Bits.BIT4 | |
#define TC2H_BIT5 _TC2H.Bits.BIT5 | |
#define TC2H_BIT6 _TC2H.Bits.BIT6 | |
#define TC2H_BIT7 _TC2H.Bits.BIT7 | |
#define TC2H_BIT8 _TC2H.Bits.BIT8 | |
#define TC2H_BIT9 _TC2H.Bits.BIT9 | |
#define TC2H_BIT10 _TC2H.Bits.BIT10 | |
#define TC2H_BIT11 _TC2H.Bits.BIT11 | |
#define TC2H_BIT12 _TC2H.Bits.BIT12 | |
#define TC2H_BIT13 _TC2H.Bits.BIT13 | |
#define TC2H_BIT14 _TC2H.Bits.BIT14 | |
#define TC2H_BIT15 _TC2H.Bits.BIT15 | |
#define TC2H_BIT _TC2H.MergedBits.grpBIT | |
/*** TC3H - Timer Input Capture Holding Registers 3; 0x0000007E ***/ | |
typedef union { | |
word Word; | |
/* Overlapped registers: */ | |
struct { | |
/*** TC3Hhi - Timer Input Capture Holding Registers 3 High; 0x0000007E ***/ | |
union { | |
byte Byte; | |
struct { | |
byte BIT8 :1; /* Timer Input Capture Holding Bit 8 */ | |
byte BIT9 :1; /* Timer Input Capture Holding Bit 9 */ | |
byte BIT10 :1; /* Timer Input Capture Holding Bit 10 */ | |
byte BIT11 :1; /* Timer Input Capture Holding Bit 11 */ | |
byte BIT12 :1; /* Timer Input Capture Holding Bit 12 */ | |
byte BIT13 :1; /* Timer Input Capture Holding Bit 13 */ | |
byte BIT14 :1; /* Timer Input Capture Holding Bit 14 */ | |
byte BIT15 :1; /* Timer Input Capture Holding Bit 15 */ | |
} Bits; | |
struct { | |
byte grpBIT_8 :8; | |
} MergedBits; | |
} TC3HhiSTR; | |
#define TC3Hhi _TC3H.Overlap_STR.TC3HhiSTR.Byte | |
#define TC3Hhi_BIT8 _TC3H.Overlap_STR.TC3HhiSTR.Bits.BIT8 | |
#define TC3Hhi_BIT9 _TC3H.Overlap_STR.TC3HhiSTR.Bits.BIT9 | |
#define TC3Hhi_BIT10 _TC3H.Overlap_STR.TC3HhiSTR.Bits.BIT10 | |
#define TC3Hhi_BIT11 _TC3H.Overlap_STR.TC3HhiSTR.Bits.BIT11 | |
#define TC3Hhi_BIT12 _TC3H.Overlap_STR.TC3HhiSTR.Bits.BIT12 | |
#define TC3Hhi_BIT13 _TC3H.Overlap_STR.TC3HhiSTR.Bits.BIT13 | |
#define TC3Hhi_BIT14 _TC3H.Overlap_STR.TC3HhiSTR.Bits.BIT14 | |
#define TC3Hhi_BIT15 _TC3H.Overlap_STR.TC3HhiSTR.Bits.BIT15 | |
#define TC3Hhi_BIT_8 _TC3H.Overlap_STR.TC3HhiSTR.MergedBits.grpBIT_8 | |
#define TC3Hhi_BIT TC3Hhi_BIT_8 | |
/*** TC3Hlo - Timer Input Capture Holding Registers 3 Low; 0x0000007F ***/ | |
union { | |
byte Byte; | |
struct { | |
byte BIT0 :1; /* Timer Input Capture Holding Bit 0 */ | |
byte BIT1 :1; /* Timer Input Capture Holding Bit 1 */ | |
byte BIT2 :1; /* Timer Input Capture Holding Bit 2 */ | |
byte BIT3 :1; /* Timer Input Capture Holding Bit 3 */ | |
byte BIT4 :1; /* Timer Input Capture Holding Bit 4 */ | |
byte BIT5 :1; /* Timer Input Capture Holding Bit 5 */ | |
byte BIT6 :1; /* Timer Input Capture Holding Bit 6 */ | |
byte BIT7 :1; /* Timer Input Capture Holding Bit 7 */ | |
} Bits; | |
struct { | |
byte grpBIT :8; | |
} MergedBits; | |
} TC3HloSTR; | |
#define TC3Hlo _TC3H.Overlap_STR.TC3HloSTR.Byte | |
#define TC3Hlo_BIT0 _TC3H.Overlap_STR.TC3HloSTR.Bits.BIT0 | |
#define TC3Hlo_BIT1 _TC3H.Overlap_STR.TC3HloSTR.Bits.BIT1 | |
#define TC3Hlo_BIT2 _TC3H.Overlap_STR.TC3HloSTR.Bits.BIT2 | |
#define TC3Hlo_BIT3 _TC3H.Overlap_STR.TC3HloSTR.Bits.BIT3 | |
#define TC3Hlo_BIT4 _TC3H.Overlap_STR.TC3HloSTR.Bits.BIT4 | |
#define TC3Hlo_BIT5 _TC3H.Overlap_STR.TC3HloSTR.Bits.BIT5 | |
#define TC3Hlo_BIT6 _TC3H.Overlap_STR.TC3HloSTR.Bits.BIT6 | |
#define TC3Hlo_BIT7 _TC3H.Overlap_STR.TC3HloSTR.Bits.BIT7 | |
#define TC3Hlo_BIT _TC3H.Overlap_STR.TC3HloSTR.MergedBits.grpBIT | |
} Overlap_STR; | |
struct { | |
word BIT0 :1; /* Timer Input Capture Holding Bit 0 */ | |
word BIT1 :1; /* Timer Input Capture Holding Bit 1 */ | |
word BIT2 :1; /* Timer Input Capture Holding Bit 2 */ | |
word BIT3 :1; /* Timer Input Capture Holding Bit 3 */ | |
word BIT4 :1; /* Timer Input Capture Holding Bit 4 */ | |
word BIT5 :1; /* Timer Input Capture Holding Bit 5 */ | |
word BIT6 :1; /* Timer Input Capture Holding Bit 6 */ | |
word BIT7 :1; /* Timer Input Capture Holding Bit 7 */ | |
word BIT8 :1; /* Timer Input Capture Holding Bit 8 */ | |
word BIT9 :1; /* Timer Input Capture Holding Bit 9 */ | |
word BIT10 :1; /* Timer Input Capture Holding Bit 10 */ | |
word BIT11 :1; /* Timer Input Capture Holding Bit 11 */ | |
word BIT12 :1; /* Timer Input Capture Holding Bit 12 */ | |
word BIT13 :1; /* Timer Input Capture Holding Bit 13 */ | |
word BIT14 :1; /* Timer Input Capture Holding Bit 14 */ | |
word BIT15 :1; /* Timer Input Capture Holding Bit 15 */ | |
} Bits; | |
struct { | |
word grpBIT :16; | |
} MergedBits; | |
} TC3HSTR; | |
extern volatile TC3HSTR _TC3H @(REG_BASE + 0x0000007E); | |
#define TC3H _TC3H.Word | |
#define TC3H_BIT0 _TC3H.Bits.BIT0 | |
#define TC3H_BIT1 _TC3H.Bits.BIT1 | |
#define TC3H_BIT2 _TC3H.Bits.BIT2 | |
#define TC3H_BIT3 _TC3H.Bits.BIT3 | |
#define TC3H_BIT4 _TC3H.Bits.BIT4 | |
#define TC3H_BIT5 _TC3H.Bits.BIT5 | |
#define TC3H_BIT6 _TC3H.Bits.BIT6 | |
#define TC3H_BIT7 _TC3H.Bits.BIT7 | |
#define TC3H_BIT8 _TC3H.Bits.BIT8 | |
#define TC3H_BIT9 _TC3H.Bits.BIT9 | |
#define TC3H_BIT10 _TC3H.Bits.BIT10 | |
#define TC3H_BIT11 _TC3H.Bits.BIT11 | |
#define TC3H_BIT12 _TC3H.Bits.BIT12 | |
#define TC3H_BIT13 _TC3H.Bits.BIT13 | |
#define TC3H_BIT14 _TC3H.Bits.BIT14 | |
#define TC3H_BIT15 _TC3H.Bits.BIT15 | |
#define TC3H_BIT _TC3H.MergedBits.grpBIT | |
/*** ATD0CTL23 - ATD 0 Control Register 23; 0x00000082 ***/ | |
typedef union { | |
word Word; | |
/* Overlapped registers: */ | |
struct { | |
/*** ATD0CTL2 - ATD 0 Control Register 2; 0x00000082 ***/ | |
union { | |
byte Byte; | |
struct { | |
byte ASCIF :1; /* ATD 0 Sequence Complete Interrupt Flag */ | |
byte ASCIE :1; /* ATD 0 Sequence Complete Interrupt Enable */ | |
byte ETRIGE :1; /* External Trigger Mode enable */ | |
byte ETRIGP :1; /* External Trigger Polarity */ | |
byte ETRIGLE :1; /* External Trigger Level/Edge control */ | |
byte AWAI :1; /* ATD 0 Wait Mode */ | |
byte AFFC :1; /* ATD 0 Fast Conversion Complete Flag Clear */ | |
byte ADPU :1; /* ATD 0 Disable / Power Down */ | |
} Bits; | |
} ATD0CTL2STR; | |
#define ATD0CTL2 _ATD0CTL23.Overlap_STR.ATD0CTL2STR.Byte | |
#define ATD0CTL2_ASCIF _ATD0CTL23.Overlap_STR.ATD0CTL2STR.Bits.ASCIF | |
#define ATD0CTL2_ASCIE _ATD0CTL23.Overlap_STR.ATD0CTL2STR.Bits.ASCIE | |
#define ATD0CTL2_ETRIGE _ATD0CTL23.Overlap_STR.ATD0CTL2STR.Bits.ETRIGE | |
#define ATD0CTL2_ETRIGP _ATD0CTL23.Overlap_STR.ATD0CTL2STR.Bits.ETRIGP | |
#define ATD0CTL2_ETRIGLE _ATD0CTL23.Overlap_STR.ATD0CTL2STR.Bits.ETRIGLE | |
#define ATD0CTL2_AWAI _ATD0CTL23.Overlap_STR.ATD0CTL2STR.Bits.AWAI | |
#define ATD0CTL2_AFFC _ATD0CTL23.Overlap_STR.ATD0CTL2STR.Bits.AFFC | |
#define ATD0CTL2_ADPU _ATD0CTL23.Overlap_STR.ATD0CTL2STR.Bits.ADPU | |
/*** ATD0CTL3 - ATD 0 Control Register 3; 0x00000083 ***/ | |
union { | |
byte Byte; | |
struct { | |
byte FRZ0 :1; /* Background Debug Freeze Enable */ | |
byte FRZ1 :1; /* Background Debug Freeze Enable */ | |
byte FIFO :1; /* Result Register FIFO Mode */ | |
byte S1C :1; /* Conversion Sequence Length 1 */ | |
byte S2C :1; /* Conversion Sequence Length 2 */ | |
byte S4C :1; /* Conversion Sequence Length 4 */ | |
byte S8C :1; /* Conversion Sequence Length 8 */ | |
byte :1; | |
} Bits; | |
struct { | |
byte grpFRZ :2; | |
byte :1; | |
byte :1; | |
byte :1; | |
byte :1; | |
byte :1; | |
byte :1; | |
} MergedBits; | |
} ATD0CTL3STR; | |
#define ATD0CTL3 _ATD0CTL23.Overlap_STR.ATD0CTL3STR.Byte | |
#define ATD0CTL3_FRZ0 _ATD0CTL23.Overlap_STR.ATD0CTL3STR.Bits.FRZ0 | |
#define ATD0CTL3_FRZ1 _ATD0CTL23.Overlap_STR.ATD0CTL3STR.Bits.FRZ1 | |
#define ATD0CTL3_FIFO _ATD0CTL23.Overlap_STR.ATD0CTL3STR.Bits.FIFO | |
#define ATD0CTL3_S1C _ATD0CTL23.Overlap_STR.ATD0CTL3STR.Bits.S1C | |
#define ATD0CTL3_S2C _ATD0CTL23.Overlap_STR.ATD0CTL3STR.Bits.S2C | |
#define ATD0CTL3_S4C _ATD0CTL23.Overlap_STR.ATD0CTL3STR.Bits.S4C | |
#define ATD0CTL3_S8C _ATD0CTL23.Overlap_STR.ATD0CTL3STR.Bits.S8C | |
#define ATD0CTL3_FRZ _ATD0CTL23.Overlap_STR.ATD0CTL3STR.MergedBits.grpFRZ | |
} Overlap_STR; | |
struct { | |
word FRZ0 :1; /* Background Debug Freeze Enable */ | |
word FRZ1 :1; /* Background Debug Freeze Enable */ | |
word FIFO :1; /* Result Register FIFO Mode */ | |
word S1C :1; /* Conversion Sequence Length 1 */ | |
word S2C :1; /* Conversion Sequence Length 2 */ | |
word S4C :1; /* Conversion Sequence Length 4 */ | |
word S8C :1; /* Conversion Sequence Length 8 */ | |
word :1; | |
word ASCIF :1; /* ATD 0 Sequence Complete Interrupt Flag */ | |
word ASCIE :1; /* ATD 0 Sequence Complete Interrupt Enable */ | |
word ETRIGE :1; /* External Trigger Mode enable */ | |
word ETRIGP :1; /* External Trigger Polarity */ | |
word ETRIGLE :1; /* External Trigger Level/Edge control */ | |
word AWAI :1; /* ATD 0 Wait Mode */ | |
word AFFC :1; /* ATD 0 Fast Conversion Complete Flag Clear */ | |
word ADPU :1; /* ATD 0 Disable / Power Down */ | |
} Bits; | |
struct { | |
word grpFRZ :2; | |
word :1; | |
word :1; | |
word :1; | |
word :1; | |
word :1; | |
word :1; | |
word :1; | |
word :1; | |
word :1; | |
word :1; | |
word :1; | |
word :1; | |
word :1; | |
word :1; | |
} MergedBits; | |
} ATD0CTL23STR; | |
extern volatile ATD0CTL23STR _ATD0CTL23 @(REG_BASE + 0x00000082); | |
#define ATD0CTL23 _ATD0CTL23.Word | |
#define ATD0CTL23_FRZ0 _ATD0CTL23.Bits.FRZ0 | |
#define ATD0CTL23_FRZ1 _ATD0CTL23.Bits.FRZ1 | |
#define ATD0CTL23_FIFO _ATD0CTL23.Bits.FIFO | |
#define ATD0CTL23_S1C _ATD0CTL23.Bits.S1C | |
#define ATD0CTL23_S2C _ATD0CTL23.Bits.S2C | |
#define ATD0CTL23_S4C _ATD0CTL23.Bits.S4C | |
#define ATD0CTL23_S8C _ATD0CTL23.Bits.S8C | |
#define ATD0CTL23_ASCIF _ATD0CTL23.Bits.ASCIF | |
#define ATD0CTL23_ASCIE _ATD0CTL23.Bits.ASCIE | |
#define ATD0CTL23_ETRIGE _ATD0CTL23.Bits.ETRIGE | |
#define ATD0CTL23_ETRIGP _ATD0CTL23.Bits.ETRIGP | |
#define ATD0CTL23_ETRIGLE _ATD0CTL23.Bits.ETRIGLE | |
#define ATD0CTL23_AWAI _ATD0CTL23.Bits.AWAI | |
#define ATD0CTL23_AFFC _ATD0CTL23.Bits.AFFC | |
#define ATD0CTL23_ADPU _ATD0CTL23.Bits.ADPU | |
#define ATD0CTL23_FRZ _ATD0CTL23.MergedBits.grpFRZ | |
/*** ATD0CTL45 - ATD 0 Control Register 45; 0x00000084 ***/ | |
typedef union { | |
word Word; | |
/* Overlapped registers: */ | |
struct { | |
/*** ATD0CTL4 - ATD 0 Control Register 4; 0x00000084 ***/ | |
union { | |
byte Byte; | |
struct { | |
byte PRS0 :1; /* ATD 0 Clock Prescaler 0 */ | |
byte PRS1 :1; /* ATD 0 Clock Prescaler 1 */ | |
byte PRS2 :1; /* ATD 0 Clock Prescaler 2 */ | |
byte PRS3 :1; /* ATD 0 Clock Prescaler 3 */ | |
byte PRS4 :1; /* ATD 0 Clock Prescaler 4 */ | |
byte SMP0 :1; /* Sample Time Select 0 */ | |
byte SMP1 :1; /* Sample Time Select 1 */ | |
byte SRES8 :1; /* ATD 0 Resolution Select */ | |
} Bits; | |
struct { | |
byte grpPRS :5; | |
byte grpSMP :2; | |
byte grpSRES_8 :1; | |
} MergedBits; | |
} ATD0CTL4STR; | |
#define ATD0CTL4 _ATD0CTL45.Overlap_STR.ATD0CTL4STR.Byte | |
#define ATD0CTL4_PRS0 _ATD0CTL45.Overlap_STR.ATD0CTL4STR.Bits.PRS0 | |
#define ATD0CTL4_PRS1 _ATD0CTL45.Overlap_STR.ATD0CTL4STR.Bits.PRS1 | |
#define ATD0CTL4_PRS2 _ATD0CTL45.Overlap_STR.ATD0CTL4STR.Bits.PRS2 | |
#define ATD0CTL4_PRS3 _ATD0CTL45.Overlap_STR.ATD0CTL4STR.Bits.PRS3 | |
#define ATD0CTL4_PRS4 _ATD0CTL45.Overlap_STR.ATD0CTL4STR.Bits.PRS4 | |
#define ATD0CTL4_SMP0 _ATD0CTL45.Overlap_STR.ATD0CTL4STR.Bits.SMP0 | |
#define ATD0CTL4_SMP1 _ATD0CTL45.Overlap_STR.ATD0CTL4STR.Bits.SMP1 | |
#define ATD0CTL4_SRES8 _ATD0CTL45.Overlap_STR.ATD0CTL4STR.Bits.SRES8 | |
#define ATD0CTL4_PRS _ATD0CTL45.Overlap_STR.ATD0CTL4STR.MergedBits.grpPRS | |
#define ATD0CTL4_SMP _ATD0CTL45.Overlap_STR.ATD0CTL4STR.MergedBits.grpSMP | |
/*** ATD0CTL5 - ATD 0 Control Register 5; 0x00000085 ***/ | |
union { | |
byte Byte; | |
struct { | |
byte CA :1; /* Analog Input Channel Select Code A */ | |
byte CB :1; /* Analog Input Channel Select Code B */ | |
byte CC :1; /* Analog Input Channel Select Code C */ | |
byte :1; | |
byte MULT :1; /* Multi-Channel Sample Mode */ | |
byte SCAN :1; /* Continuous Conversion Sequence Mode */ | |
byte DSGN :1; /* Signed/Unsigned Result Data Mode */ | |
byte DJM :1; /* Result Register Data Justification Mode */ | |
} Bits; | |
} ATD0CTL5STR; | |
#define ATD0CTL5 _ATD0CTL45.Overlap_STR.ATD0CTL5STR.Byte | |
#define ATD0CTL5_CA _ATD0CTL45.Overlap_STR.ATD0CTL5STR.Bits.CA | |
#define ATD0CTL5_CB _ATD0CTL45.Overlap_STR.ATD0CTL5STR.Bits.CB | |
#define ATD0CTL5_CC _ATD0CTL45.Overlap_STR.ATD0CTL5STR.Bits.CC | |
#define ATD0CTL5_MULT _ATD0CTL45.Overlap_STR.ATD0CTL5STR.Bits.MULT | |
#define ATD0CTL5_SCAN _ATD0CTL45.Overlap_STR.ATD0CTL5STR.Bits.SCAN | |
#define ATD0CTL5_DSGN _ATD0CTL45.Overlap_STR.ATD0CTL5STR.Bits.DSGN | |
#define ATD0CTL5_DJM _ATD0CTL45.Overlap_STR.ATD0CTL5STR.Bits.DJM | |
} Overlap_STR; | |
struct { | |
word CA :1; /* Analog Input Channel Select Code A */ | |
word CB :1; /* Analog Input Channel Select Code B */ | |
word CC :1; /* Analog Input Channel Select Code C */ | |
word :1; | |
word MULT :1; /* Multi-Channel Sample Mode */ | |
word SCAN :1; /* Continuous Conversion Sequence Mode */ | |
word DSGN :1; /* Signed/Unsigned Result Data Mode */ | |
word DJM :1; /* Result Register Data Justification Mode */ | |
word PRS0 :1; /* ATD 0 Clock Prescaler 0 */ | |
word PRS1 :1; /* ATD 0 Clock Prescaler 1 */ | |
word PRS2 :1; /* ATD 0 Clock Prescaler 2 */ | |
word PRS3 :1; /* ATD 0 Clock Prescaler 3 */ | |
word PRS4 :1; /* ATD 0 Clock Prescaler 4 */ | |
word SMP0 :1; /* Sample Time Select 0 */ | |
word SMP1 :1; /* Sample Time Select 1 */ | |
word SRES8 :1; /* ATD 0 Resolution Select */ | |
} Bits; | |
struct { | |
word :1; | |
word :1; | |
word :1; | |
word :1; | |
word :1; | |
word :1; | |
word :1; | |
word :1; | |
word grpPRS :5; | |
word grpSMP :2; | |
word grpSRES_8 :1; | |
} MergedBits; | |
} ATD0CTL45STR; | |
extern volatile ATD0CTL45STR _ATD0CTL45 @(REG_BASE + 0x00000084); | |
#define ATD0CTL45 _ATD0CTL45.Word | |
#define ATD0CTL45_CA _ATD0CTL45.Bits.CA | |
#define ATD0CTL45_CB _ATD0CTL45.Bits.CB | |
#define ATD0CTL45_CC _ATD0CTL45.Bits.CC | |
#define ATD0CTL45_MULT _ATD0CTL45.Bits.MULT | |
#define ATD0CTL45_SCAN _ATD0CTL45.Bits.SCAN | |
#define ATD0CTL45_DSGN _ATD0CTL45.Bits.DSGN | |
#define ATD0CTL45_DJM _ATD0CTL45.Bits.DJM | |
#define ATD0CTL45_PRS0 _ATD0CTL45.Bits.PRS0 | |
#define ATD0CTL45_PRS1 _ATD0CTL45.Bits.PRS1 | |
#define ATD0CTL45_PRS2 _ATD0CTL45.Bits.PRS2 | |
#define ATD0CTL45_PRS3 _ATD0CTL45.Bits.PRS3 | |
#define ATD0CTL45_PRS4 _ATD0CTL45.Bits.PRS4 | |
#define ATD0CTL45_SMP0 _ATD0CTL45.Bits.SMP0 | |
#define ATD0CTL45_SMP1 _ATD0CTL45.Bits.SMP1 | |
#define ATD0CTL45_SRES8 _ATD0CTL45.Bits.SRES8 | |
#define ATD0CTL45_PRS _ATD0CTL45.MergedBits.grpPRS | |
#define ATD0CTL45_SMP _ATD0CTL45.MergedBits.grpSMP | |
/*** ATD0DR0 - ATD 0 Conversion Result Register 0; 0x00000090 ***/ | |
typedef union { | |
word Word; | |
/* Overlapped registers: */ | |
struct { | |
/*** ATD0DR0H - ATD 0 Conversion Result Register 0 High; 0x00000090 ***/ | |
union { | |
byte Byte; | |
struct { | |
byte BIT8 :1; /* Bit 8 */ | |
byte BIT9 :1; /* Bit 9 */ | |
byte BIT10 :1; /* Bit 10 */ | |
byte BIT11 :1; /* Bit 11 */ | |
byte BIT12 :1; /* Bit 12 */ | |
byte BIT13 :1; /* Bit 13 */ | |
byte BIT14 :1; /* Bit 14 */ | |
byte BIT15 :1; /* Bit 15 */ | |
} Bits; | |
struct { | |
byte grpBIT_8 :8; | |
} MergedBits; | |
} ATD0DR0HSTR; | |
#define ATD0DR0H _ATD0DR0.Overlap_STR.ATD0DR0HSTR.Byte | |
#define ATD0DR0H_BIT8 _ATD0DR0.Overlap_STR.ATD0DR0HSTR.Bits.BIT8 | |
#define ATD0DR0H_BIT9 _ATD0DR0.Overlap_STR.ATD0DR0HSTR.Bits.BIT9 | |
#define ATD0DR0H_BIT10 _ATD0DR0.Overlap_STR.ATD0DR0HSTR.Bits.BIT10 | |
#define ATD0DR0H_BIT11 _ATD0DR0.Overlap_STR.ATD0DR0HSTR.Bits.BIT11 | |
#define ATD0DR0H_BIT12 _ATD0DR0.Overlap_STR.ATD0DR0HSTR.Bits.BIT12 | |
#define ATD0DR0H_BIT13 _ATD0DR0.Overlap_STR.ATD0DR0HSTR.Bits.BIT13 | |
#define ATD0DR0H_BIT14 _ATD0DR0.Overlap_STR.ATD0DR0HSTR.Bits.BIT14 | |
#define ATD0DR0H_BIT15 _ATD0DR0.Overlap_STR.ATD0DR0HSTR.Bits.BIT15 | |
#define ATD0DR0H_BIT_8 _ATD0DR0.Overlap_STR.ATD0DR0HSTR.MergedBits.grpBIT_8 | |
#define ATD0DR0H_BIT ATD0DR0H_BIT_8 | |
/*** ATD0DR0L - ATD 0 Conversion Result Register 0 Low; 0x00000091 ***/ | |
union { | |
byte Byte; | |
struct { | |
byte :1; | |
byte :1; | |
byte :1; | |
byte :1; | |
byte :1; | |
byte :1; | |
byte BIT6 :1; /* Bit 6 */ | |
byte BIT7 :1; /* Bit 7 */ | |
} Bits; | |
struct { | |
byte :1; | |
byte :1; | |
byte :1; | |
byte :1; | |
byte :1; | |
byte :1; | |
byte grpBIT_6 :2; | |
} MergedBits; | |
} ATD0DR0LSTR; | |
#define ATD0DR0L _ATD0DR0.Overlap_STR.ATD0DR0LSTR.Byte | |
#define ATD0DR0L_BIT6 _ATD0DR0.Overlap_STR.ATD0DR0LSTR.Bits.BIT6 | |
#define ATD0DR0L_BIT7 _ATD0DR0.Overlap_STR.ATD0DR0LSTR.Bits.BIT7 | |
#define ATD0DR0L_BIT_6 _ATD0DR0.Overlap_STR.ATD0DR0LSTR.MergedBits.grpBIT_6 | |
#define ATD0DR0L_BIT ATD0DR0L_BIT_6 | |
} Overlap_STR; | |
struct { | |
word :1; | |
word :1; | |
word :1; | |
word :1; | |
word :1; | |
word :1; | |
word BIT6 :1; /* Bit 6 */ | |
word BIT7 :1; /* Bit 7 */ | |
word BIT8 :1; /* Bit 8 */ | |
word BIT9 :1; /* Bit 9 */ | |
word BIT10 :1; /* Bit 10 */ | |
word BIT11 :1; /* Bit 11 */ | |
word BIT12 :1; /* Bit 12 */ | |
word BIT13 :1; /* Bit 13 */ | |
word BIT14 :1; /* Bit 14 */ | |
word BIT15 :1; /* Bit 15 */ | |
} Bits; | |
struct { | |
word :1; | |
word :1; | |
word :1; | |
word :1; | |
word :1; | |
word :1; | |
word grpBIT_6 :10; | |
} MergedBits; | |
} ATD0DR0STR; | |
extern volatile ATD0DR0STR _ATD0DR0 @(REG_BASE + 0x00000090); | |
#define ATD0DR0 _ATD0DR0.Word | |
#define ATD0DR0_BIT6 _ATD0DR0.Bits.BIT6 | |
#define ATD0DR0_BIT7 _ATD0DR0.Bits.BIT7 | |
#define ATD0DR0_BIT8 _ATD0DR0.Bits.BIT8 | |
#define ATD0DR0_BIT9 _ATD0DR0.Bits.BIT9 | |
#define ATD0DR0_BIT10 _ATD0DR0.Bits.BIT10 | |
#define ATD0DR0_BIT11 _ATD0DR0.Bits.BIT11 | |
#define ATD0DR0_BIT12 _ATD0DR0.Bits.BIT12 | |
#define ATD0DR0_BIT13 _ATD0DR0.Bits.BIT13 | |
#define ATD0DR0_BIT14 _ATD0DR0.Bits.BIT14 | |
#define ATD0DR0_BIT15 _ATD0DR0.Bits.BIT15 | |
#define ATD0DR0_BIT_6 _ATD0DR0.MergedBits.grpBIT_6 | |
#define ATD0DR0_BIT ATD0DR0_BIT_6 | |
/*** ATD0DR1 - ATD 0 Conversion Result Register 1; 0x00000092 ***/ | |
typedef union { | |
word Word; | |
/* Overlapped registers: */ | |
struct { | |
/*** ATD0DR1H - ATD 0 Conversion Result Register 1 High; 0x00000092 ***/ | |
union { | |
byte Byte; | |
struct { | |
byte BIT8 :1; /* Bit 8 */ | |
byte BIT9 :1; /* Bit 9 */ | |
byte BIT10 :1; /* Bit 10 */ | |
byte BIT11 :1; /* Bit 11 */ | |
byte BIT12 :1; /* Bit 12 */ | |
byte BIT13 :1; /* Bit 13 */ | |
byte BIT14 :1; /* Bit 14 */ | |
byte BIT15 :1; /* Bit 15 */ | |
} Bits; | |
struct { | |
byte grpBIT_8 :8; | |
} MergedBits; | |
} ATD0DR1HSTR; | |
#define ATD0DR1H _ATD0DR1.Overlap_STR.ATD0DR1HSTR.Byte | |
#define ATD0DR1H_BIT8 _ATD0DR1.Overlap_STR.ATD0DR1HSTR.Bits.BIT8 | |
#define ATD0DR1H_BIT9 _ATD0DR1.Overlap_STR.ATD0DR1HSTR.Bits.BIT9 | |
#define ATD0DR1H_BIT10 _ATD0DR1.Overlap_STR.ATD0DR1HSTR.Bits.BIT10 | |
#define ATD0DR1H_BIT11 _ATD0DR1.Overlap_STR.ATD0DR1HSTR.Bits.BIT11 | |
#define ATD0DR1H_BIT12 _ATD0DR1.Overlap_STR.ATD0DR1HSTR.Bits.BIT12 | |
#define ATD0DR1H_BIT13 _ATD0DR1.Overlap_STR.ATD0DR1HSTR.Bits.BIT13 | |
#define ATD0DR1H_BIT14 _ATD0DR1.Overlap_STR.ATD0DR1HSTR.Bits.BIT14 | |
#define ATD0DR1H_BIT15 _ATD0DR1.Overlap_STR.ATD0DR1HSTR.Bits.BIT15 | |
#define ATD0DR1H_BIT_8 _ATD0DR1.Overlap_STR.ATD0DR1HSTR.MergedBits.grpBIT_8 | |
#define ATD0DR1H_BIT ATD0DR1H_BIT_8 | |
/*** ATD0DR1L - ATD 0 Conversion Result Register 1 Low; 0x00000093 ***/ | |
union { | |
byte Byte; | |
struct { | |
byte :1; | |
byte :1; | |
byte :1; | |
byte :1; | |
byte :1; | |
byte :1; | |
byte BIT6 :1; /* Bit 6 */ | |
byte BIT7 :1; /* Bit 7 */ | |
} Bits; | |
struct { | |
byte :1; | |
byte :1; | |
byte :1; | |
byte :1; | |
byte :1; | |
byte :1; | |
byte grpBIT_6 :2; | |
} MergedBits; | |
} ATD0DR1LSTR; | |
#define ATD0DR1L _ATD0DR1.Overlap_STR.ATD0DR1LSTR.Byte | |
#define ATD0DR1L_BIT6 _ATD0DR1.Overlap_STR.ATD0DR1LSTR.Bits.BIT6 | |
#define ATD0DR1L_BIT7 _ATD0DR1.Overlap_STR.ATD0DR1LSTR.Bits.BIT7 | |
#define ATD0DR1L_BIT_6 _ATD0DR1.Overlap_STR.ATD0DR1LSTR.MergedBits.grpBIT_6 | |
#define ATD0DR1L_BIT ATD0DR1L_BIT_6 | |
} Overlap_STR; | |
struct { | |
word :1; | |
word :1; | |
word :1; | |
word :1; | |
word :1; | |
word :1; | |
word BIT6 :1; /* Bit 6 */ | |
word BIT7 :1; /* Bit 7 */ | |
word BIT8 :1; /* Bit 8 */ | |
word BIT9 :1; /* Bit 9 */ | |
word BIT10 :1; /* Bit 10 */ | |
word BIT11 :1; /* Bit 11 */ | |
word BIT12 :1; /* Bit 12 */ | |
word BIT13 :1; /* Bit 13 */ | |
word BIT14 :1; /* Bit 14 */ | |
word BIT15 :1; /* Bit 15 */ | |
} Bits; | |
struct { | |
word :1; | |
word :1; | |
word :1; | |
word :1; | |
word :1; | |
word :1; | |
word grpBIT_6 :10; | |
} MergedBits; | |
} ATD0DR1STR; | |
extern volatile ATD0DR1STR _ATD0DR1 @(REG_BASE + 0x00000092); | |
#define ATD0DR1 _ATD0DR1.Word | |
#define ATD0DR1_BIT6 _ATD0DR1.Bits.BIT6 | |
#define ATD0DR1_BIT7 _ATD0DR1.Bits.BIT7 | |
#define ATD0DR1_BIT8 _ATD0DR1.Bits.BIT8 | |
#define ATD0DR1_BIT9 _ATD0DR1.Bits.BIT9 | |
#define ATD0DR1_BIT10 _ATD0DR1.Bits.BIT10 | |
#define ATD0DR1_BIT11 _ATD0DR1.Bits.BIT11 | |
#define ATD0DR1_BIT12 _ATD0DR1.Bits.BIT12 | |
#define ATD0DR1_BIT13 _ATD0DR1.Bits.BIT13 | |
#define ATD0DR1_BIT14 _ATD0DR1.Bits.BIT14 | |
#define ATD0DR1_BIT15 _ATD0DR1.Bits.BIT15 | |
#define ATD0DR1_BIT_6 _ATD0DR1.MergedBits.grpBIT_6 | |
#define ATD0DR1_BIT ATD0DR1_BIT_6 | |
/*** ATD0DR2 - ATD 0 Conversion Result Register 2; 0x00000094 ***/ | |
typedef union { | |
word Word; | |
/* Overlapped registers: */ | |
struct { | |
/*** ATD0DR2H - ATD 0 Conversion Result Register 2 High; 0x00000094 ***/ | |
union { | |
byte Byte; | |
struct { | |
byte BIT8 :1; /* Bit 8 */ | |
byte BIT9 :1; /* Bit 9 */ | |
byte BIT10 :1; /* Bit 10 */ | |
byte BIT11 :1; /* Bit 11 */ | |
byte BIT12 :1; /* Bit 12 */ | |
byte BIT13 :1; /* Bit 13 */ | |
byte BIT14 :1; /* Bit 14 */ | |
byte BIT15 :1; /* Bit 15 */ | |
} Bits; | |
struct { | |
byte grpBIT_8 :8; | |
} MergedBits; | |
} ATD0DR2HSTR; | |
#define ATD0DR2H _ATD0DR2.Overlap_STR.ATD0DR2HSTR.Byte | |
#define ATD0DR2H_BIT8 _ATD0DR2.Overlap_STR.ATD0DR2HSTR.Bits.BIT8 | |
#define ATD0DR2H_BIT9 _ATD0DR2.Overlap_STR.ATD0DR2HSTR.Bits.BIT9 | |
#define ATD0DR2H_BIT10 _ATD0DR2.Overlap_STR.ATD0DR2HSTR.Bits.BIT10 | |
#define ATD0DR2H_BIT11 _ATD0DR2.Overlap_STR.ATD0DR2HSTR.Bits.BIT11 | |
#define ATD0DR2H_BIT12 _ATD0DR2.Overlap_STR.ATD0DR2HSTR.Bits.BIT12 | |
#define ATD0DR2H_BIT13 _ATD0DR2.Overlap_STR.ATD0DR2HSTR.Bits.BIT13 | |
#define ATD0DR2H_BIT14 _ATD0DR2.Overlap_STR.ATD0DR2HSTR.Bits.BIT14 | |
#define ATD0DR2H_BIT15 _ATD0DR2.Overlap_STR.ATD0DR2HSTR.Bits.BIT15 | |
#define ATD0DR2H_BIT_8 _ATD0DR2.Overlap_STR.ATD0DR2HSTR.MergedBits.grpBIT_8 | |
#define ATD0DR2H_BIT ATD0DR2H_BIT_8 | |
/*** ATD0DR2L - ATD 0 Conversion Result Register 2 Low; 0x00000095 ***/ | |
union { | |
byte Byte; | |
struct { | |
byte :1; | |
byte :1; | |
byte :1; | |
byte :1; | |
byte :1; | |
byte :1; | |
byte BIT6 :1; /* Bit 6 */ | |
byte BIT7 :1; /* Bit 7 */ | |
} Bits; | |
struct { | |
byte :1; | |
byte :1; | |
byte :1; | |
byte :1; | |
byte :1; | |
byte :1; | |
byte grpBIT_6 :2; | |
} MergedBits; | |
} ATD0DR2LSTR; | |
#define ATD0DR2L _ATD0DR2.Overlap_STR.ATD0DR2LSTR.Byte | |
#define ATD0DR2L_BIT6 _ATD0DR2.Overlap_STR.ATD0DR2LSTR.Bits.BIT6 | |
#define ATD0DR2L_BIT7 _ATD0DR2.Overlap_STR.ATD0DR2LSTR.Bits.BIT7 | |
#define ATD0DR2L_BIT_6 _ATD0DR2.Overlap_STR.ATD0DR2LSTR.MergedBits.grpBIT_6 | |
#define ATD0DR2L_BIT ATD0DR2L_BIT_6 | |
} Overlap_STR; | |
struct { | |
word :1; | |
word :1; | |
word :1; | |
word :1; | |
word :1; | |
word :1; | |
word BIT6 :1; /* Bit 6 */ | |
word BIT7 :1; /* Bit 7 */ | |
word BIT8 :1; /* Bit 8 */ | |
word BIT9 :1; /* Bit 9 */ | |
word BIT10 :1; /* Bit 10 */ | |
word BIT11 :1; /* Bit 11 */ | |
word BIT12 :1; /* Bit 12 */ | |
word BIT13 :1; /* Bit 13 */ | |
word BIT14 :1; /* Bit 14 */ | |
word BIT15 :1; /* Bit 15 */ | |
} Bits; | |
struct { | |
word :1; | |
word :1; | |
word :1; | |
word :1; | |
word :1; | |
word :1; | |
word grpBIT_6 :10; | |
} MergedBits; | |
} ATD0DR2STR; | |
extern volatile ATD0DR2STR _ATD0DR2 @(REG_BASE + 0x00000094); | |
#define ATD0DR2 _ATD0DR2.Word | |
#define ATD0DR2_BIT6 _ATD0DR2.Bits.BIT6 | |
#define ATD0DR2_BIT7 _ATD0DR2.Bits.BIT7 | |
#define ATD0DR2_BIT8 _ATD0DR2.Bits.BIT8 | |
#define ATD0DR2_BIT9 _ATD0DR2.Bits.BIT9 | |
#define ATD0DR2_BIT10 _ATD0DR2.Bits.BIT10 | |
#define ATD0DR2_BIT11 _ATD0DR2.Bits.BIT11 | |
#define ATD0DR2_BIT12 _ATD0DR2.Bits.BIT12 | |
#define ATD0DR2_BIT13 _ATD0DR2.Bits.BIT13 | |
#define ATD0DR2_BIT14 _ATD0DR2.Bits.BIT14 | |
#define ATD0DR2_BIT15 _ATD0DR2.Bits.BIT15 | |
#define ATD0DR2_BIT_6 _ATD0DR2.MergedBits.grpBIT_6 | |
#define ATD0DR2_BIT ATD0DR2_BIT_6 | |
/*** ATD0DR3 - ATD 0 Conversion Result Register 3; 0x00000096 ***/ | |
typedef union { | |
word Word; | |
/* Overlapped registers: */ | |
struct { | |
/*** ATD0DR3H - ATD 0 Conversion Result Register 3 High; 0x00000096 ***/ | |
union { | |
byte Byte; | |
struct { | |
byte BIT8 :1; /* Bit 8 */ | |
byte BIT9 :1; /* Bit 9 */ | |
byte BIT10 :1; /* Bit 10 */ | |
byte BIT11 :1; /* Bit 11 */ | |
byte BIT12 :1; /* Bit 12 */ | |
byte BIT13 :1; /* Bit 13 */ | |
byte BIT14 :1; /* Bit 14 */ | |
byte BIT15 :1; /* Bit 15 */ | |
} Bits; | |
struct { | |
byte grpBIT_8 :8; | |
} MergedBits; | |
} ATD0DR3HSTR; | |
#define ATD0DR3H _ATD0DR3.Overlap_STR.ATD0DR3HSTR.Byte | |
#define ATD0DR3H_BIT8 _ATD0DR3.Overlap_STR.ATD0DR3HSTR.Bits.BIT8 | |
#define ATD0DR3H_BIT9 _ATD0DR3.Overlap_STR.ATD0DR3HSTR.Bits.BIT9 | |
#define ATD0DR3H_BIT10 _ATD0DR3.Overlap_STR.ATD0DR3HSTR.Bits.BIT10 | |
#define ATD0DR3H_BIT11 _ATD0DR3.Overlap_STR.ATD0DR3HSTR.Bits.BIT11 | |
#define ATD0DR3H_BIT12 _ATD0DR3.Overlap_STR.ATD0DR3HSTR.Bits.BIT12 | |
#define ATD0DR3H_BIT13 _ATD0DR3.Overlap_STR.ATD0DR3HSTR.Bits.BIT13 | |
#define ATD0DR3H_BIT14 _ATD0DR3.Overlap_STR.ATD0DR3HSTR.Bits.BIT14 | |
#define ATD0DR3H_BIT15 _ATD0DR3.Overlap_STR.ATD0DR3HSTR.Bits.BIT15 | |
#define ATD0DR3H_BIT_8 _ATD0DR3.Overlap_STR.ATD0DR3HSTR.MergedBits.grpBIT_8 | |
#define ATD0DR3H_BIT ATD0DR3H_BIT_8 | |
/*** ATD0DR3L - ATD 0 Conversion Result Register 3 Low; 0x00000097 ***/ | |
union { | |
byte Byte; | |
struct { | |
byte :1; | |
byte :1; | |
byte :1; | |
byte :1; | |
byte :1; | |
byte :1; | |
byte BIT6 :1; /* Bit 6 */ | |
byte BIT7 :1; /* Bit 7 */ | |
} Bits; | |
struct { | |
byte :1; | |
byte :1; | |
byte :1; | |
byte :1; | |
byte :1; | |
byte :1; | |
byte grpBIT_6 :2; | |
} MergedBits; | |
} ATD0DR3LSTR; | |
#define ATD0DR3L _ATD0DR3.Overlap_STR.ATD0DR3LSTR.Byte | |
#define ATD0DR3L_BIT6 _ATD0DR3.Overlap_STR.ATD0DR3LSTR.Bits.BIT6 | |
#define ATD0DR3L_BIT7 _ATD0DR3.Overlap_STR.ATD0DR3LSTR.Bits.BIT7 | |
#define ATD0DR3L_BIT_6 _ATD0DR3.Overlap_STR.ATD0DR3LSTR.MergedBits.grpBIT_6 | |
#define ATD0DR3L_BIT ATD0DR3L_BIT_6 | |
} Overlap_STR; | |
struct { | |
word :1; | |
word :1; | |
word :1; | |
word :1; | |
word :1; | |
word :1; | |
word BIT6 :1; /* Bit 6 */ | |
word BIT7 :1; /* Bit 7 */ | |
word BIT8 :1; /* Bit 8 */ | |
word BIT9 :1; /* Bit 9 */ | |
word BIT10 :1; /* Bit 10 */ | |
word BIT11 :1; /* Bit 11 */ | |
word BIT12 :1; /* Bit 12 */ | |
word BIT13 :1; /* Bit 13 */ | |
word BIT14 :1; /* Bit 14 */ | |
word BIT15 :1; /* Bit 15 */ | |
} Bits; | |
struct { | |
word :1; | |
word :1; | |
word :1; | |
word :1; | |
word :1; | |
word :1; | |
word grpBIT_6 :10; | |
} MergedBits; | |
} ATD0DR3STR; | |
extern volatile ATD0DR3STR _ATD0DR3 @(REG_BASE + 0x00000096); | |
#define ATD0DR3 _ATD0DR3.Word | |
#define ATD0DR3_BIT6 _ATD0DR3.Bits.BIT6 | |
#define ATD0DR3_BIT7 _ATD0DR3.Bits.BIT7 | |
#define ATD0DR3_BIT8 _ATD0DR3.Bits.BIT8 | |
#define ATD0DR3_BIT9 _ATD0DR3.Bits.BIT9 | |
#define ATD0DR3_BIT10 _ATD0DR3.Bits.BIT10 | |
#define ATD0DR3_BIT11 _ATD0DR3.Bits.BIT11 | |
#define ATD0DR3_BIT12 _ATD0DR3.Bits.BIT12 | |
#define ATD0DR3_BIT13 _ATD0DR3.Bits.BIT13 | |
#define ATD0DR3_BIT14 _ATD0DR3.Bits.BIT14 | |
#define ATD0DR3_BIT15 _ATD0DR3.Bits.BIT15 | |
#define ATD0DR3_BIT_6 _ATD0DR3.MergedBits.grpBIT_6 | |
#define ATD0DR3_BIT ATD0DR3_BIT_6 | |
/*** ATD0DR4 - ATD 0 Conversion Result Register 4; 0x00000098 ***/ | |
typedef union { | |
word Word; | |
/* Overlapped registers: */ | |
struct { | |
/*** ATD0DR4H - ATD 0 Conversion Result Register 4 High; 0x00000098 ***/ | |
union { | |
byte Byte; | |
struct { | |
byte BIT8 :1; /* Bit 8 */ | |
byte BIT9 :1; /* Bit 9 */ | |
byte BIT10 :1; /* Bit 10 */ | |
byte BIT11 :1; /* Bit 11 */ | |
byte BIT12 :1; /* Bit 12 */ | |
byte BIT13 :1; /* Bit 13 */ | |
byte BIT14 :1; /* Bit 14 */ | |
byte BIT15 :1; /* Bit 15 */ | |
} Bits; | |
struct { | |
byte grpBIT_8 :8; | |
} MergedBits; | |
} ATD0DR4HSTR; | |
#define ATD0DR4H _ATD0DR4.Overlap_STR.ATD0DR4HSTR.Byte | |
#define ATD0DR4H_BIT8 _ATD0DR4.Overlap_STR.ATD0DR4HSTR.Bits.BIT8 | |
#define ATD0DR4H_BIT9 _ATD0DR4.Overlap_STR.ATD0DR4HSTR.Bits.BIT9 | |
#define ATD0DR4H_BIT10 _ATD0DR4.Overlap_STR.ATD0DR4HSTR.Bits.BIT10 | |
#define ATD0DR4H_BIT11 _ATD0DR4.Overlap_STR.ATD0DR4HSTR.Bits.BIT11 | |
#define ATD0DR4H_BIT12 _ATD0DR4.Overlap_STR.ATD0DR4HSTR.Bits.BIT12 | |
#define ATD0DR4H_BIT13 _ATD0DR4.Overlap_STR.ATD0DR4HSTR.Bits.BIT13 | |
#define ATD0DR4H_BIT14 _ATD0DR4.Overlap_STR.ATD0DR4HSTR.Bits.BIT14 | |
#define ATD0DR4H_BIT15 _ATD0DR4.Overlap_STR.ATD0DR4HSTR.Bits.BIT15 | |
#define ATD0DR4H_BIT_8 _ATD0DR4.Overlap_STR.ATD0DR4HSTR.MergedBits.grpBIT_8 | |
#define ATD0DR4H_BIT ATD0DR4H_BIT_8 | |
/*** ATD0DR4L - ATD 0 Conversion Result Register 4 Low; 0x00000099 ***/ | |
union { | |
byte Byte; | |
struct { | |
byte :1; | |
byte :1; | |
byte :1; | |
byte :1; | |
byte :1; | |
byte :1; | |
byte BIT6 :1; /* Bit 6 */ | |
byte BIT7 :1; /* Bit 7 */ | |
} Bits; | |
struct { | |
byte :1; | |
byte :1; | |
byte :1; | |
byte :1; | |
byte :1; | |
byte :1; | |
byte grpBIT_6 :2; | |
} MergedBits; | |
} ATD0DR4LSTR; | |
#define ATD0DR4L _ATD0DR4.Overlap_STR.ATD0DR4LSTR.Byte | |
#define ATD0DR4L_BIT6 _ATD0DR4.Overlap_STR.ATD0DR4LSTR.Bits.BIT6 | |
#define ATD0DR4L_BIT7 _ATD0DR4.Overlap_STR.ATD0DR4LSTR.Bits.BIT7 | |
#define ATD0DR4L_BIT_6 _ATD0DR4.Overlap_STR.ATD0DR4LSTR.MergedBits.grpBIT_6 | |
#define ATD0DR4L_BIT ATD0DR4L_BIT_6 | |
} Overlap_STR; | |
struct { | |
word :1; | |
word :1; | |
word :1; | |
word :1; | |
word :1; | |
word :1; | |
word BIT6 :1; /* Bit 6 */ | |
word BIT7 :1; /* Bit 7 */ | |
word BIT8 :1; /* Bit 8 */ | |
word BIT9 :1; /* Bit 9 */ | |
word BIT10 :1; /* Bit 10 */ | |
word BIT11 :1; /* Bit 11 */ | |
word BIT12 :1; /* Bit 12 */ | |
word BIT13 :1; /* Bit 13 */ | |
word BIT14 :1; /* Bit 14 */ | |
word BIT15 :1; /* Bit 15 */ | |
} Bits; | |
struct { | |
word :1; | |
word :1; | |
word :1; | |
word :1; | |
word :1; | |
word :1; | |
word grpBIT_6 :10; | |
} MergedBits; | |
} ATD0DR4STR; | |
extern volatile ATD0DR4STR _ATD0DR4 @(REG_BASE + 0x00000098); | |
#define ATD0DR4 _ATD0DR4.Word | |
#define ATD0DR4_BIT6 _ATD0DR4.Bits.BIT6 | |
#define ATD0DR4_BIT7 _ATD0DR4.Bits.BIT7 | |
#define ATD0DR4_BIT8 _ATD0DR4.Bits.BIT8 | |
#define ATD0DR4_BIT9 _ATD0DR4.Bits.BIT9 | |
#define ATD0DR4_BIT10 _ATD0DR4.Bits.BIT10 | |
#define ATD0DR4_BIT11 _ATD0DR4.Bits.BIT11 | |
#define ATD0DR4_BIT12 _ATD0DR4.Bits.BIT12 | |
#define ATD0DR4_BIT13 _ATD0DR4.Bits.BIT13 | |
#define ATD0DR4_BIT14 _ATD0DR4.Bits.BIT14 | |
#define ATD0DR4_BIT15 _ATD0DR4.Bits.BIT15 | |
#define ATD0DR4_BIT_6 _ATD0DR4.MergedBits.grpBIT_6 | |
#define ATD0DR4_BIT ATD0DR4_BIT_6 | |
/*** ATD0DR5 - ATD 0 Conversion Result Register 5; 0x0000009A ***/ | |
typedef union { | |
word Word; | |
/* Overlapped registers: */ | |
struct { | |
/*** ATD0DR5H - ATD 0 Conversion Result Register 5 High; 0x0000009A ***/ | |
union { | |
byte Byte; | |
struct { | |
byte BIT8 :1; /* Bit 8 */ | |
byte BIT9 :1; /* Bit 9 */ | |
byte BIT10 :1; /* Bit 10 */ | |
byte BIT11 :1; /* Bit 11 */ | |
byte BIT12 :1; /* Bit 12 */ | |
byte BIT13 :1; /* Bit 13 */ | |
byte BIT14 :1; /* Bit 14 */ | |
byte BIT15 :1; /* Bit 15 */ | |
} Bits; | |
struct { | |
byte grpBIT_8 :8; | |
} MergedBits; | |
} ATD0DR5HSTR; | |
#define ATD0DR5H _ATD0DR5.Overlap_STR.ATD0DR5HSTR.Byte | |
#define ATD0DR5H_BIT8 _ATD0DR5.Overlap_STR.ATD0DR5HSTR.Bits.BIT8 | |
#define ATD0DR5H_BIT9 _ATD0DR5.Overlap_STR.ATD0DR5HSTR.Bits.BIT9 | |
#define ATD0DR5H_BIT10 _ATD0DR5.Overlap_STR.ATD0DR5HSTR.Bits.BIT10 | |
#define ATD0DR5H_BIT11 _ATD0DR5.Overlap_STR.ATD0DR5HSTR.Bits.BIT11 | |
#define ATD0DR5H_BIT12 _ATD0DR5.Overlap_STR.ATD0DR5HSTR.Bits.BIT12 | |
#define ATD0DR5H_BIT13 _ATD0DR5.Overlap_STR.ATD0DR5HSTR.Bits.BIT13 | |
#define ATD0DR5H_BIT14 _ATD0DR5.Overlap_STR.ATD0DR5HSTR.Bits.BIT14 | |
#define ATD0DR5H_BIT15 _ATD0DR5.Overlap_STR.ATD0DR5HSTR.Bits.BIT15 | |
#define ATD0DR5H_BIT_8 _ATD0DR5.Overlap_STR.ATD0DR5HSTR.MergedBits.grpBIT_8 | |
#define ATD0DR5H_BIT ATD0DR5H_BIT_8 | |
/*** ATD0DR5L - ATD 0 Conversion Result Register 5 Low; 0x0000009B ***/ | |
union { | |
byte Byte; | |
struct { | |
byte :1; | |
byte :1; | |
byte :1; | |
byte :1; | |
byte :1; | |
byte :1; | |
byte BIT6 :1; /* Bit 6 */ | |
byte BIT7 :1; /* Bit 7 */ | |
} Bits; | |
struct { | |
byte :1; | |
byte :1; | |
byte :1; | |
byte :1; | |
byte :1; | |
byte :1; | |
byte grpBIT_6 :2; | |
} MergedBits; | |
} ATD0DR5LSTR; | |
#define ATD0DR5L _ATD0DR5.Overlap_STR.ATD0DR5LSTR.Byte | |
#define ATD0DR5L_BIT6 _ATD0DR5.Overlap_STR.ATD0DR5LSTR.Bits.BIT6 | |
#define ATD0DR5L_BIT7 _ATD0DR5.Overlap_STR.ATD0DR5LSTR.Bits.BIT7 | |
#define ATD0DR5L_BIT_6 _ATD0DR5.Overlap_STR.ATD0DR5LSTR.MergedBits.grpBIT_6 | |
#define ATD0DR5L_BIT ATD0DR5L_BIT_6 | |
} Overlap_STR; | |
struct { | |
word :1; | |
word :1; | |
word :1; | |
word :1; | |
word :1; | |
word :1; | |
word BIT6 :1; /* Bit 6 */ | |
word BIT7 :1; /* Bit 7 */ | |
word BIT8 :1; /* Bit 8 */ | |
word BIT9 :1; /* Bit 9 */ | |
word BIT10 :1; /* Bit 10 */ | |
word BIT11 :1; |