Add CMake build (#421)
* Add CMake build
Allows to build and link FreeRTOS using CMake build system.
From top-level project it looks like this:
set(FREERTOS_PORT_GCC_ARM_CM4F ON)
set(FREERTOS_CONFIG_FILE_DIRECTORY ${CMAKE_CURRENT_SOURCE_DIR} CACHE STRING "")
add_subdirectory(third_party/FreeRTOS-Kernel)
Where FREERTOS_PORT_GCC_ARM_CM4F is FreeRTOS port name.
freertos is target name, which can be used in target_link_libraries()
* Add feature to set custom heap source file
Example how to set it from top-level project:
set(FREERTOS_HEAP ${CMAKE_CURRENT_LIST_DIR}/path_to/my_heap.c CACHE STRING "")
* Set cmake_minimum_required to 3.15
* Fail build when FREERTOS_CONFIG_FILE_DIRECTORY not set
* Rename library to freertos_kernel
* Rework FREERTOS_PORT option to act as combobox
* Use freertos_kernel_port cmake target
* Split port sources multiline
Co-authored-by: Aniruddha Kanhere <60444055+AniruddhaKanhere@users.noreply.github.com>
Co-authored-by: Paul Bartell <pbartell@amazon.com>diff --git a/CMakeLists.txt b/CMakeLists.txt
new file mode 100644
index 0000000..481b433
--- /dev/null
+++ b/CMakeLists.txt
@@ -0,0 +1,195 @@
+cmake_minimum_required(VERSION 3.15)
+
+# User is responsible to set two mandatory options:
+# FREERTOS_CONFIG_FILE_DIRECTORY
+# FREERTOS_PORT
+#
+# User can choose which heap implementation to use (either the implementations
+# included with FreeRTOS [1..5] or a custom implementation ) by providing the
+# option FREERTOS_HEAP. If the option is not set, the cmake will default to
+# using heap_4.c.
+
+# Absolute path to FreeRTOS config file directory
+set(FREERTOS_CONFIG_FILE_DIRECTORY "" CACHE STRING "Absolute path to the directory with FreeRTOSConfig.h")
+
+if(NOT FREERTOS_CONFIG_FILE_DIRECTORY)
+ message(FATAL_ERROR " FreeRTOSConfig.h file directory not specified. Please specify absolute path to it from top-level CMake file:\n"
+ " set(FREERTOS_CONFIG_FILE_DIRECTORY <absolute path to FreeRTOSConfig.h directory> CACHE STRING \"\")\n"
+ " or from CMake command line option:\n"
+ " -DFREERTOS_CONFIG_FILE_DIRECTORY='/absolute_path/to/FreeRTOSConfig.h/directory'")
+elseif(NOT EXISTS ${FREERTOS_CONFIG_FILE_DIRECTORY}/FreeRTOSConfig.h)
+ message(FATAL_ERROR " FreeRTOSConfig.h file not found in the directory specified (${FREERTOS_CONFIG_FILE_DIRECTORY})\n"
+ " Please specify absolute path to it from top-level CMake file:\n"
+ " set(FREERTOS_CONFIG_FILE_DIRECTORY <absolute path to FreeRTOSConfig.h directory> CACHE STRING \"\")\n"
+ " or from CMake command line option:\n"
+ " -DFREERTOS_CONFIG_FILE_DIRECTORY='/absolute_path/to/FreeRTOSConfig.h/directory'")
+endif()
+
+# Heap number or absolute path to custom heap implementation provided by user
+set(FREERTOS_HEAP "4" CACHE STRING "FreeRTOS heap model number. 1 .. 5. Or absolute path to custom heap source file")
+
+# FreeRTOS port option
+set(FREERTOS_PORT "" CACHE STRING "FreeRTOS port name")
+
+if(NOT FREERTOS_PORT)
+ message(FATAL_ERROR " FREERTOS_PORT is not set. Please specify it from top-level CMake file (example):\n"
+ " set(FREERTOS_PORT GCC_ARM_CM4F CACHE STRING \"\")\n"
+ " or from CMake command line option:\n"
+ " -DFREERTOS_PORT=GCC_ARM_CM4F\n"
+ " \n"
+ " Available port options:\n"
+ " BCC_16BIT_DOS_FLSH186 - Compiller: BCC Target: 16 bit DOS Flsh186\n"
+ " BCC_16BIT_DOS_PC - Compiller: BCC Target: 16 bit DOS PC\n"
+ " CCS_ARM_CM3 - Compiller: CCS Target: ARM Cortex-M3\n"
+ " CCS_ARM_CM4F - Compiller: CCS Target: ARM Cortex-M4 with FPU\n"
+ " CCS_ARM_CR4 - Compiller: CCS Target: ARM Cortex-R4\n"
+ " CCS_MSP430X - Compiller: CCS Target: MSP430X\n"
+ " CODEWARRIOR_COLDFIRE_V1 - Compiller: CoreWarrior Target: ColdFire V1\n"
+ " CODEWARRIOR_COLDFIRE_V2 - Compiller: CoreWarrior Target: ColdFire V2\n"
+ " CODEWARRIOR_HCS12 - Compiller: CoreWarrior Target: HCS12\n"
+ " GCC_ARM_CA9 - Compiller: GCC Target: ARM Cortex-A9\n"
+ " GCC_ARM_CA53_64_BIT - Compiller: GCC Target: ARM Cortex-A53 64 bit\n"
+ " GCC_ARM_CA53_64_BIT_SRE - Compiller: GCC Target: ARM Cortex-A53 64 bit SRE\n"
+ " GCC_ARM_CM0 - Compiller: GCC Target: ARM Cortex-M0\n"
+ " GCC_ARM_CM3 - Compiller: GCC Target: ARM Cortex-M3\n"
+ " GCC_ARM_CM3_MPU - Compiller: GCC Target: ARM Cortex-M3 with MPU\n"
+ " GCC_ARM_CM4_MPU - Compiller: GCC Target: ARM Cortex-M4 with MPU\n"
+ " GCC_ARM_CM4F - Compiller: GCC Target: ARM Cortex-M4 with FPU\n"
+ " GCC_ARM_CM7 - Compiller: GCC Target: ARM Cortex-M7\n"
+ " GCC_ARM_CM23_NONSECURE - Compiller: GCC Target: ARM Cortex-M23 non-secure\n"
+ " GCC_ARM_CM23_SECURE - Compiller: GCC Target: ARM Cortex-M23 secure\n"
+ " GCC_ARM_CM23_NTZ_NONSECURE - Compiller: GCC Target: ARM Cortex-M23 non-trustzone non-secure\n"
+ " GCC_ARM_CM33_NONSECURE - Compiller: GCC Target: ARM Cortex-M33 non-secure\n"
+ " GCC_ARM_CM33_SECURE - Compiller: GCC Target: ARM Cortex-M33 secure\n"
+ " GCC_ARM_CM33_NTZ_NONSECURE - Compiller: GCC Target: ARM Cortex-M33 non-trustzone non-secure\n"
+ " GCC_ARM_CR5 - Compiller: GCC Target: ARM Cortex-R5\n"
+ " GCC_ARM_CRX_NOGIC - Compiller: GCC Target: ARM Cortex-Rx no GIC\n"
+ " GCC_ARM7_AT91FR40008 - Compiller: GCC Target: ARM7 Atmel AT91R40008\n"
+ " GCC_ARM7_AT91SAM7S - Compiller: GCC Target: ARM7 Atmel AT91SAM7S\n"
+ " GCC_ARM7_LPC2000 - Compiller: GCC Target: ARM7 LPC2000\n"
+ " GCC_ARM7_LPC23XX - Compiller: GCC Target: ARM7 LPC23xx\n"
+ " GCC_ATMEGA323 - Compiller: GCC Target: ATMega323\n"
+ " GCC_AVR32_UC3 - Compiller: GCC Target: AVR32 UC3\n"
+ " GCC_COLDFIRE_V2 - Compiller: GCC Target: ColdFire V2\n"
+ " GCC_CORTUS_APS3 - Compiller: GCC Target: CORTUS APS3\n"
+ " GCC_H8S2329 - Compiller: GCC Target: H8S2329\n"
+ " GCC_HCS12 - Compiller: GCC Target: HCS12\n"
+ " GCC_IA32_FLAT - Compiller: GCC Target: IA32 flat\n"
+ " GCC_MICROBLAZE - Compiller: GCC Target: MicroBlaze\n"
+ " GCC_MICROBLAZE_V8 - Compiller: GCC Target: MicroBlaze V8\n"
+ " GCC_MICROBLAZE_V9 - Compiller: GCC Target: MicroBlaze V9\n"
+ " GCC_MSP430F449 - Compiller: GCC Target: MSP430F449\n"
+ " GCC_NIOSII - Compiller: GCC Target: NiosII\n"
+ " GCC_PPC405_XILINX - Compiller: GCC Target: Xilinx PPC405\n"
+ " GCC_PPC440_XILINX - Compiller: GCC Target: Xilinx PPC440\n"
+ " GCC_RISC_V - Compiller: GCC Target: RISC-V\n"
+ " GCC_RISC_V_PULPINO_VEGA_RV32M1RM - Compiller: GCC Target: RISC-V Pulpino Vega RV32M1RM\n"
+ " GCC_RL78 - Compiller: GCC Target: Renesas RL78\n"
+ " GCC_RX100 - Compiller: GCC Target: Renesas RX100\n"
+ " GCC_RX200 - Compiller: GCC Target: Renesas RX200\n"
+ " GCC_RX600 - Compiller: GCC Target: Renesas RX600\n"
+ " GCC_RX600_V2 - Compiller: GCC Target: Renesas RX600 v2\n"
+ " GCC_RX700_V3_DPFPU - Compiller: GCC Target: Renesas RX700 v3 with DPFPU\n"
+ " GCC_STR75X - Compiller: GCC Target: STR75x\n"
+ " GCC_TRICORE_1782 - Compiller: GCC Target: TriCore 1782\n"
+ " GCC_ARC_EM_HS - Compiller: GCC Target: DesignWare ARC EM HS\n"
+ " GCC_ARC_V1 - Compiller: GCC Target: DesignWare ARC v1\n"
+ " GCC_ARM_CM33_TFM - Compiller: GCC Target: ARM Cortex-M33 trusted firmware\n"
+ " GCC_ATMEGA - Compiller: GCC Target: ATmega\n"
+ " GCC_POSIX - Compiller: GCC Target: Posix\n"
+ " GCC_RP2040 - Compiller: GCC Target: RP2040 ARM Cortex-M0+\n"
+ " GCC_XTENSA_ESP32 - Compiller: GCC Target: Xtensa ESP32\n"
+ " GCC_AVRDX - Compiller: GCC Target: AVRDx\n"
+ " GCC_AVR_MEGA0 - Compiller: GCC Target: AVR Mega0\n"
+ " IAR_78K0K - Compiller: IAR Target: Renesas 78K0K\n"
+ " IAR_ARM_CA5_NOGIC - Compiller: IAR Target: ARM Cortex-A5 no GIC\n"
+ " IAR_ARM_CA9 - Compiller: IAR Target: ARM Cortex-A9\n"
+ " IAR_ARM_CM0 - Compiller: IAR Target: ARM Cortex-M0\n"
+ " IAR_ARM_CM3 - Compiller: IAR Target: ARM Cortex-M3\n"
+ " IAR_ARM_CM4F - Compiller: IAR Target: ARM Cortex-M4 with FPU\n"
+ " IAR_ARM_CM4F_MPU - Compiller: IAR Target: ARM Cortex-M4 with FPU and MPU\n"
+ " IAR_ARM_CM7 - Compiller: IAR Target: ARM Cortex-M7\n"
+ " IAR_ARM_CM23_NONSECURE - Compiller: IAR Target: ARM Cortex-M23 non-secure\n"
+ " IAR_ARM_CM23_SECURE - Compiller: IAR Target: ARM Cortex-M23 secure\n"
+ " IAR_ARM_CM23_NTZ_NONSECURE - Compiller: IAR Target: ARM Cortex-M23 non-trustzone non-secure\n"
+ " IAR_ARM_CM33_NONSECURE - Compiller: IAR Target: ARM Cortex-M33 non-secure\n"
+ " IAR_ARM_CM33_SECURE - Compiller: IAR Target: ARM Cortex-M33 secure\n"
+ " IAR_ARM_CM33_NTZ_NONSECURE - Compiller: IAR Target: ARM Cortex-M33 non-trustzone non-secure\n"
+ " IAR_ARM_CRX_NOGIC - Compiller: IAR Target: ARM Cortex-Rx no GIC\n"
+ " IAR_ATMEGA323 - Compiller: IAR Target: ATMega323\n"
+ " IAR_ATMEL_SAM7S64 - Compiller: IAR Target: Atmel SAM7S64\n"
+ " IAR_ATMEL_SAM9XE - Compiller: IAR Target: Atmel SAM9XE\n"
+ " IAR_AVR_AVRDX - Compiller: IAR Target: AVRDx\n"
+ " IAR_AVR_MEGA0 - Compiller: IAR Target: AVR Mega0\n"
+ " IAR_AVR32_UC3 - Compiller: IAR Target: AVR32 UC3\n"
+ " IAR_LPC2000 - Compiller: IAR Target: LPC2000\n"
+ " IAR_MSP430 - Compiller: IAR Target: MSP430\n"
+ " IAR_MSP430X - Compiller: IAR Target: MSP430X\n"
+ " IAR_RISC_V - Compiller: IAR Target: RISC-V\n"
+ " IAR_RL78 - Compiller: IAR Target: Renesas RL78\n"
+ " IAR_RX100 - Compiller: IAR Target: Renesas RX100\n"
+ " IAR_RX600 - Compiller: IAR Target: Renesas RX600\n"
+ " IAR_RX700_V3_DPFPU - Compiller: IAR Target: Renesas RX700 v3 with DPFPU\n"
+ " IAR_RX_V2 - Compiller: IAR Target: Renesas RX v2\n"
+ " IAR_STR71X - Compiller: IAR Target: STR71x\n"
+ " IAR_STR75X - Compiller: IAR Target: STR75x\n"
+ " IAR_STR91X - Compiller: IAR Target: STR91x\n"
+ " IAR_V850ES_FX3 - Compiller: IAR Target: Renesas V850ES/Fx3\n"
+ " IAR_V850ES_HX3 - Compiller: IAR Target: Renesas V850ES/Hx3\n"
+ " MIKROC_ARM_CM4F - Compiller: MikroC Target: ARM Cortex-M4 with FPU\n"
+ " MPLAB_PIC18F - Compiller: MPLAB Target: PIC18F\n"
+ " MPLAB_PIC24 - Compiller: MPLAB Target: PIC24\n"
+ " MPLAB_PIC32MEC14XX - Compiller: MPLAB Target: PIC32MEC14xx\n"
+ " MPLAB_PIC32MX - Compiller: MPLAB Target: PIC32MX\n"
+ " MPLAB_PIC32MZ - Compiller: MPLAB Target: PIC32MZ\n"
+ " MSVC_MINGW - Compiller: MSVC or MinGW Target: x86\n"
+ " OWATCOM_16BIT_DOS_FLSH186 - Compiller: Open Watcom Target: 16 bit DOS Flsh186\n"
+ " OWATCOM_16BIT_DOS_PC - Compiller: Open Watcom Target: 16 bit DOS PC\n"
+ " PARADIGM_TERN_EE_LARGE - Compiller: Paradigm Target: Tern EE large\n"
+ " PARADIGM_TERN_EE_SMALL - Compiller: Paradigm Target: Tern EE small\n"
+ " RENESAS_RX100 - Compiller: Renesas Target: RX100\n"
+ " RENESAS_RX200 - Compiller: Renesas Target: RX200\n"
+ " RENESAS_RX600 - Compiller: Renesas Target: RX600\n"
+ " RENESAS_RX600_V2 - Compiller: Renesas Target: RX600 v2\n"
+ " RENESAS_RX700_V3_DPFPU - Compiller: Renesas Target: RX700 v3 with DPFPU\n"
+ " RENESAS_SH2A_FPU - Compiller: Renesas Target: SH2A with FPU\n"
+ " ROWLEY_MSP430F449 - Compiller: Rowley Target: MSP430F449\n"
+ " RVDS_ARM_CA9 - Compiller: RVDS Target: ARM Cortex-A9\n"
+ " RVDS_ARM_CM0 - Compiller: RVDS Target: ARM Cortex-M0\n"
+ " RVDS_ARM_CM3 - Compiller: RVDS Target: ARM Cortex-M3\n"
+ " RVDS_ARM_CM4_MPU - Compiller: RVDS Target: ARM Cortex-M4 with MPU\n"
+ " RVDS_ARM_CM4F - Compiller: RVDS Target: ARM Cortex-M4 with FPU\n"
+ " RVDS_ARM_CM7 - Compiller: RVDS Target: ARM Cortex-M7\n"
+ " RVDS_ARM7_LPC21XX - Compiller: RVDS Target: ARM7 LPC21xx\n"
+ " SDCC_CYGNAL - Compiller: SDCC Target: Cygnal\n"
+ " SOFTUNE_MB91460 - Compiller: Softune Target: MB91460\n"
+ " SOFTUNE_MB96340 - Compiller: Softune Target: MB96340\n"
+ " TASKING_ARM_CM4F - Compiller: Tasking Target: ARM Cortex-M4 with FPU\n"
+ " CDK_THEAD_CK802 - Compiller: CDK Target: T-head CK802\n"
+ " XCC_XTENSA - Compiller: XCC Target: Xtensa\n"
+ " WIZC_PIC18 - Compiller: WizC Target: PIC18")
+endif()
+
+add_subdirectory(portable)
+
+add_library(freertos_kernel STATIC
+ croutine.c
+ event_groups.c
+ list.c
+ queue.c
+ stream_buffer.c
+ tasks.c
+ timers.c
+ portable/Common/mpu_wrappers.c
+
+ # If FREERTOS_HEAP is digit between 1 .. 5 - it is heap number, otherwise - it is path to custom heap source file
+ $<IF:$<BOOL:$<FILTER:${FREERTOS_HEAP},EXCLUDE,^[1-5]$>>,${FREERTOS_HEAP},portable/MemMang/heap_${FREERTOS_HEAP}.c>
+)
+
+target_include_directories(freertos_kernel
+ PUBLIC
+ include
+ ${FREERTOS_CONFIG_FILE_DIRECTORY}
+)
+
+target_link_libraries(freertos_kernel freertos_kernel_port)
diff --git a/portable/CMakeLists.txt b/portable/CMakeLists.txt
new file mode 100644
index 0000000..8d10aa0
--- /dev/null
+++ b/portable/CMakeLists.txt
@@ -0,0 +1,554 @@
+# FreeRTOS internal cmake file. Do not use it in user top-level project
+
+add_library(freertos_kernel_port STATIC
+ $<$<STREQUAL:${FREERTOS_PORT},BCC_16BIT_DOS_FLSH186>:
+ BCC/16BitDOS/common/portcomn.c
+ BCC/16BitDOS/Flsh186/port.c>
+ $<$<STREQUAL:${FREERTOS_PORT},BCC_16BIT_DOS_PC>:
+ BCC/16BitDOS/common/portcomn.c
+ BCC/16BitDOS/PC/port.c>
+ $<$<STREQUAL:${FREERTOS_PORT},CCS_ARM_CM3>:
+ CCS/ARM_CM3/port.c
+ CCS/ARM_CM3/portasm.asm>
+ $<$<STREQUAL:${FREERTOS_PORT},CCS_ARM_CM4F>:
+ CCS/ARM_CM4F/port.c
+ CCS/ARM_CM4F/portasm.asm>
+ $<$<STREQUAL:${FREERTOS_PORT},CCS_ARM_CR4>:
+ CCS/ARM_Cortex-R4/port.c
+ CCS/ARM_Cortex-R4/portASM.asm>
+ $<$<STREQUAL:${FREERTOS_PORT},CCS_MSP430X>:
+ CCS/MSP430X/port.c
+ CCS/MSP430X/portext.asm>
+ $<$<STREQUAL:${FREERTOS_PORT},CODEWARRIOR_COLDFIRE_V1>:
+ CodeWarrior/ColdFire_V1/port.c
+ CodeWarrior/ColdFire_V1/portasm.S>
+ $<$<STREQUAL:${FREERTOS_PORT},CODEWARRIOR_COLDFIRE_V2>:
+ CodeWarrior/ColdFire_V2/port.c
+ CodeWarrior/ColdFire_V2/portasm.S>
+ $<$<STREQUAL:${FREERTOS_PORT},CODEWARRIOR_HCS12>:
+ CodeWarrior/HCS12/port.c>
+ $<$<STREQUAL:${FREERTOS_PORT},GCC_ARM_CA9>:
+ GCC/ARM_CA9/port.c
+ GCC/ARM_CA9/portASM.S>
+ $<$<STREQUAL:${FREERTOS_PORT},GCC_ARM_CA53_64_BIT>:
+ GCC/ARM_CA53_64_BIT/port.c
+ GCC/ARM_CA53_64_BIT/portASM.S>
+ $<$<STREQUAL:${FREERTOS_PORT},GCC_ARM_CA53_64_BIT_SRE>:
+ GCC/ARM_CA53_64_BIT_SRE/port.c
+ GCC/ARM_CA53_64_BIT_SRE/portASM.S>
+ $<$<STREQUAL:${FREERTOS_PORT},GCC_ARM_CM0>:
+ GCC/ARM_CM0/port.c>
+ $<$<STREQUAL:${FREERTOS_PORT},GCC_ARM_CM3>:
+ GCC/ARM_CM3/port.c>
+ $<$<STREQUAL:${FREERTOS_PORT},GCC_ARM_CM3_MPU>:
+ GCC/ARM_CM3_MPU/port.c>
+ $<$<STREQUAL:${FREERTOS_PORT},GCC_ARM_CM4_MPU>:
+ GCC/ARM_CM4_MPU/port.c>
+ $<$<STREQUAL:${FREERTOS_PORT},GCC_ARM_CM4F>:
+ GCC/ARM_CM4F/port.c>
+ $<$<STREQUAL:${FREERTOS_PORT},GCC_ARM_CM7>:
+ GCC/ARM_CM7/r0p1/port.c>
+ $<$<STREQUAL:${FREERTOS_PORT},GCC_ARM_CM23_NONSECURE>:
+ GCC/ARM_CM23/non_secure/port.c
+ GCC/ARM_CM23/non_secure/portasm.c>
+ $<$<STREQUAL:${FREERTOS_PORT},GCC_ARM_CM23_SECURE>:
+ GCC/ARM_CM23/secure/secure_context_port.c
+ GCC/ARM_CM23/secure/secure_context.c
+ GCC/ARM_CM23/secure/secure_heap.c
+ GCC/ARM_CM23/secure/secure_init.c>
+ $<$<STREQUAL:${FREERTOS_PORT},GCC_ARM_CM23_NTZ_NONSECURE>:
+ GCC/ARM_CM23_NTZ/non_secure/port.c
+ GCC/ARM_CM23_NTZ/non_secure/portasm.c>
+ $<$<STREQUAL:${FREERTOS_PORT},GCC_ARM_CM33_NONSECURE>:
+ GCC/ARM_CM33/non_secure/port.c
+ GCC/ARM_CM33/non_secure/portasm.c>
+ $<$<STREQUAL:${FREERTOS_PORT},GCC_ARM_CM33_SECURE>:
+ GCC/ARM_CM33/secure/secure_context_port.c
+ GCC/ARM_CM33/secure/secure_context.c
+ GCC/ARM_CM33/secure/secure_heap.c
+ GCC/ARM_CM33/secure/secure_init.c>
+ $<$<STREQUAL:${FREERTOS_PORT},GCC_ARM_CM33_NTZ_NONSECURE>:
+ GCC/ARM_CM33_NTZ/non_secure/port.c
+ GCC/ARM_CM33_NTZ/non_secure/portasm.c>
+ $<$<STREQUAL:${FREERTOS_PORT},GCC_ARM_CR5>:
+ GCC/ARM_CR5/port.c
+ GCC/ARM_CR5/portASM.S>
+ $<$<STREQUAL:${FREERTOS_PORT},GCC_ARM_CRX_NOGIC>:
+ GCC/ARM_CRx_No_GIC/port.c
+ GCC/ARM_CRx_No_GIC/portASM.S>
+ $<$<STREQUAL:${FREERTOS_PORT},GCC_ARM7_AT91FR40008>:
+ GCC/ARM7_AT91FR40008/port.c
+ GCC/ARM7_AT91FR40008/portISR.c>
+ $<$<STREQUAL:${FREERTOS_PORT},GCC_ARM7_AT91SAM7S>:
+ GCC/ARM7_AT91SAM7S/lib_AT91SAM7X256.c
+ GCC/ARM7_AT91SAM7S/port.c
+ GCC/ARM7_AT91SAM7S/portISR.c>
+ $<$<STREQUAL:${FREERTOS_PORT},GCC_ARM7_LPC2000>:
+ GCC/ARM7_LPC2000/port.c
+ GCC/ARM7_LPC2000/portISR.c>
+ $<$<STREQUAL:${FREERTOS_PORT},GCC_ARM7_LPC23XX>:
+ GCC/ARM7_LPC23xx/port.c
+ GCC/ARM7_LPC23xx/portISR.c>
+ $<$<STREQUAL:${FREERTOS_PORT},GCC_ATMEGA323>:
+ GCC/ATMega323/port.c>
+ $<$<STREQUAL:${FREERTOS_PORT},GCC_AVR32_UC3>:
+ GCC/AVR32_UC3/exception.S
+ GCC/AVR32_UC3/port.c>
+ $<$<STREQUAL:${FREERTOS_PORT},GCC_COLDFIRE_V2>:
+ GCC/ColdFire_V2/port.c
+ GCC/ColdFire_V2/portasm.S>
+ $<$<STREQUAL:${FREERTOS_PORT},GCC_CORTUS_APS3>:
+ GCC/CORTUS_APS3/port.c>
+ $<$<STREQUAL:${FREERTOS_PORT},GCC_H8S2329>:
+ GCC/H8S2329/port.c>
+ $<$<STREQUAL:${FREERTOS_PORT},GCC_HCS12>:
+ GCC/HCS12/port.c>
+ $<$<STREQUAL:${FREERTOS_PORT},GCC_IA32_FLAT>:
+ GCC/IA32_flat/port.c
+ GCC/IA32_flat/portASM.S>
+ $<$<STREQUAL:${FREERTOS_PORT},GCC_MICROBLAZE>:
+ GCC/MicroBlaze/port.c
+ GCC/MicroBlaze/portasm.s>
+ $<$<STREQUAL:${FREERTOS_PORT},GCC_MICROBLAZE_V8>:
+ GCC/MicroBlazeV8/port.c
+ GCC/MicroBlazeV8/port_exceptions.c
+ GCC/MicroBlazeV8/portasm.S>
+ $<$<STREQUAL:${FREERTOS_PORT},GCC_MICROBLAZE_V9>:
+ GCC/MicroBlazeV9/port.c
+ GCC/MicroBlazeV9/port_exceptions.c
+ GCC/MicroBlazeV9/portasm.S>
+ $<$<STREQUAL:${FREERTOS_PORT},GCC_MSP430F449>:
+ GCC/MSP430F449/port.c>
+ $<$<STREQUAL:${FREERTOS_PORT},GCC_NIOSII>:
+ GCC/NiosII/port.c
+ GCC/NiosII/port_asm.S>
+ $<$<STREQUAL:${FREERTOS_PORT},GCC_PPC405_XILINX>:
+ GCC/PPC405_Xilinx/port.c
+ GCC/PPC405_Xilinx/portasm.S>
+ $<$<STREQUAL:${FREERTOS_PORT},GCC_PPC440_XILINX>:
+ GCC/PPC440_Xilinx/port.c
+ GCC/PPC440_Xilinx/portasm.S>
+ $<$<STREQUAL:${FREERTOS_PORT},GCC_RISC_V>:
+ GCC/RISC-V/port.c
+ GCC/RISC-V/portASM.S>
+ $<$<STREQUAL:${FREERTOS_PORT},GCC_RISC_V_PULPINO_VEGA_RV32M1RM>:
+ GCC/RISC-V/port.c
+ GCC/RISC-V/portASM.S>
+ $<$<STREQUAL:${FREERTOS_PORT},GCC_RL78>:
+ GCC/RL78/port.c
+ GCC/RL78/portasm.S>
+ $<$<STREQUAL:${FREERTOS_PORT},GCC_RX100>:
+ GCC/RX100/port.c>
+ $<$<STREQUAL:${FREERTOS_PORT},GCC_RX200>:
+ GCC/RX200/port.c>
+ $<$<STREQUAL:${FREERTOS_PORT},GCC_RX600>:
+ GCC/RX600/port.c>
+ $<$<STREQUAL:${FREERTOS_PORT},GCC_RX600_V2>:
+ GCC/RX600v2/port.c>
+ $<$<STREQUAL:${FREERTOS_PORT},GCC_RX700_V3_DPFPU>:
+ GCC/RX700v3_DPFPU/port.c>
+ $<$<STREQUAL:${FREERTOS_PORT},GCC_STR75X>:
+ GCC/STR75x/port.c
+ GCC/STR75x/portISR.c>
+ $<$<STREQUAL:${FREERTOS_PORT},GCC_TRICORE_1782>:
+ GCC/TriCore_1782/port.c
+ GCC/TriCore_1782/porttrap.c>
+ $<$<STREQUAL:${FREERTOS_PORT},GCC_ARC_EM_HS>:
+ ThirdParty/GCC/ARC_EM_HS/arc_freertos_exceptions.c
+ ThirdParty/GCC/ARC_EM_HS/arc_support.s
+ ThirdParty/GCC/ARC_EM_HS/freertos_tls.c
+ ThirdParty/GCC/ARC_EM_HS/port.c>
+ $<$<STREQUAL:${FREERTOS_PORT},GCC_ARC_V1>:
+ ThirdParty/GCC/ARC_v1/arc_freertos_exceptions.c
+ ThirdParty/GCC/ARC_v1/arc_support.s
+ ThirdParty/GCC/ARC_v1/port.c>
+ $<$<STREQUAL:${FREERTOS_PORT},GCC_ARM_CM33_TFM>:
+ ThirdParty/GCC/ARM_CM33_TFM/os_wrapper_freertos.c>
+ $<$<STREQUAL:${FREERTOS_PORT},GCC_ATMEGA>:
+ ThirdParty/GCC/ATmega/port.c>
+ $<$<STREQUAL:${FREERTOS_PORT},GCC_POSIX>:
+ ThirdParty/GCC/Posix/port.c
+ ThirdParty/GCC/Posix/utils/wait_for_event.c>
+ $<$<STREQUAL:${FREERTOS_PORT},GCC_RP2040>:
+ ThirdParty/GCC/RP2040/idle_task_static_memory.c
+ ThirdParty/GCC/RP2040/port.c>
+ $<$<STREQUAL:${FREERTOS_PORT},GCC_XTENSA_ESP32>:
+ ThirdParty/GCC/Xtensa_ESP32/FreeRTOS-openocd.c
+ ThirdParty/GCC/Xtensa_ESP32/port.c
+ ThirdParty/GCC/Xtensa_ESP32/portasm.S
+ ThirdParty/GCC/Xtensa_ESP32/xtensa_context.S
+ ThirdParty/GCC/Xtensa_ESP32/xtensa_init.c
+ ThirdParty/GCC/Xtensa_ESP32/xtensa_intr_asm.S
+ ThirdParty/GCC/Xtensa_ESP32/xtensa_intr.c
+ ThirdParty/GCC/Xtensa_ESP32/xtensa_loadstore_handler.S
+ ThirdParty/GCC/Xtensa_ESP32/xtensa_overlay_os_hook.c
+ ThirdParty/GCC/Xtensa_ESP32/xtensa_vector_defaults.S
+ ThirdParty/GCC/Xtensa_ESP32/xtensa_vectors.S>
+ $<$<STREQUAL:${FREERTOS_PORT},GCC_AVRDX>:
+ ThirdParty/Partner-Supported-Ports/GCC/AVR_AVRDx/port.c>
+ $<$<STREQUAL:${FREERTOS_PORT},GCC_AVR_MEGA0>:
+ ThirdParty/Partner-Supported-Ports/GCC/AVR_Mega0/port.c>
+ $<$<STREQUAL:${FREERTOS_PORT},IAR_78K0K>:
+ IAR/78K0R/port.c
+ IAR/78K0R/portasm.s26>
+ $<$<STREQUAL:${FREERTOS_PORT},IAR_ARM_CA5_NOGIC>:
+ IAR/ARM_CA5_No_GIC/port.c
+ IAR/ARM_CA5_No_GIC/portASM.s>
+ $<$<STREQUAL:${FREERTOS_PORT},IAR_ARM_CA9>:
+ IAR/ARM_CA9/port.c
+ IAR/ARM_CA9/portASM.s>
+ $<$<STREQUAL:${FREERTOS_PORT},IAR_ARM_CM0>:
+ IAR/ARM_CM0/port.c
+ IAR/ARM_CM0/portasm.s>
+ $<$<STREQUAL:${FREERTOS_PORT},IAR_ARM_CM3>:
+ IAR/ARM_CM3/port.c
+ IAR/ARM_CM3/portasm.s>
+ $<$<STREQUAL:${FREERTOS_PORT},IAR_ARM_CM4F>:
+ IAR/ARM_CM4F/port.c
+ IAR/ARM_CM4F/portasm.s>
+ $<$<STREQUAL:${FREERTOS_PORT},IAR_ARM_CM4F_MPU>:
+ IAR/ARM_CM4F_MPU/port.c
+ IAR/ARM_CM4F_MPU/portasm.s>
+ $<$<STREQUAL:${FREERTOS_PORT},IAR_ARM_CM7>:
+ IAR/ARM_CM7/r0p1/port.c
+ IAR/ARM_CM7/r0p1/portasm.s>
+ $<$<STREQUAL:${FREERTOS_PORT},IAR_ARM_CM23_NONSECURE>:
+ IAR/ARM_CM23/non_secure/port.c
+ IAR/ARM_CM23/non_secure/portasm.s>
+ $<$<STREQUAL:${FREERTOS_PORT},IAR_ARM_CM23_SECURE>:
+ IAR/ARM_CM23/secure/secure_context_port_asm.s
+ IAR/ARM_CM23/secure/secure_context.c
+ IAR/ARM_CM23/secure/secure_heap.c
+ IAR/ARM_CM23/secure/secure_init.c>
+ $<$<STREQUAL:${FREERTOS_PORT},IAR_ARM_CM23_NTZ_NONSECURE>:
+ IAR/ARM_CM23_NTZ/non_secure/port.c
+ IAR/ARM_CM23_NTZ/non_secure/portasm.s>
+ $<$<STREQUAL:${FREERTOS_PORT},IAR_ARM_CM33_NONSECURE>:
+ IAR/ARM_CM33/non_secure/port.c
+ IAR/ARM_CM33/non_secure/portasm.s>
+ $<$<STREQUAL:${FREERTOS_PORT},IAR_ARM_CM33_SECURE>:
+ IAR/ARM_CM33/secure/secure_context_port_asm.s
+ IAR/ARM_CM33/secure/secure_context.c
+ IAR/ARM_CM33/secure/secure_heap.c
+ IAR/ARM_CM33/secure/secure_init.c>
+ $<$<STREQUAL:${FREERTOS_PORT},IAR_ARM_CM33_NTZ_NONSECURE>:
+ IAR/ARM_CM33_NTZ/non_secure/port.c
+ IAR/ARM_CM33_NTZ/non_secure/portasm.s>
+ $<$<STREQUAL:${FREERTOS_PORT},IAR_ARM_CRX_NOGIC>:
+ IAR/ARM_CRx_No_GIC/port.c
+ IAR/ARM_CRx_No_GIC/portASM.s>
+ $<$<STREQUAL:${FREERTOS_PORT},IAR_ATMEGA323>:
+ IAR/ATMega323/port.c
+ IAR/ATMega323/portmacro.s90>
+ $<$<STREQUAL:${FREERTOS_PORT},IAR_ATMEL_SAM7S64>:
+ IAR/AtmelSAM7S64/port.c
+ IAR/AtmelSAM7S64/portasm.s79>
+ $<$<STREQUAL:${FREERTOS_PORT},IAR_ATMEL_SAM9XE>:
+ IAR/AtmelSAM9XE/port.c
+ IAR/AtmelSAM9XE/portasm.s79>
+ $<$<STREQUAL:${FREERTOS_PORT},IAR_AVR_AVRDX>:
+ IAR/AVR_AVRDx/port.c
+ IAR/AVR_AVRDx/portmacro.s90>
+ $<$<STREQUAL:${FREERTOS_PORT},IAR_AVR_MEGA0>:
+ IAR/AVR_Mega0/port.c
+ IAR/AVR_Mega0/portmacro.s90>
+ $<$<STREQUAL:${FREERTOS_PORT},IAR_AVR32_UC3>:
+ IAR/AVR32_UC3/exception.s82
+ IAR/AVR32_UC3/port.c
+ IAR/AVR32_UC3/read.c
+ IAR/AVR32_UC3/write.c>
+ $<$<STREQUAL:${FREERTOS_PORT},IAR_LPC2000>:
+ IAR/LPC2000/port.c
+ IAR/LPC2000/portasm.s79>
+ $<$<STREQUAL:${FREERTOS_PORT},IAR_MSP430>:
+ IAR/MSP430/port.c
+ IAR/MSP430/portext.s43>
+ $<$<STREQUAL:${FREERTOS_PORT},IAR_MSP430X>:
+ IAR/MSP430X/port.c
+ IAR/MSP430X/portext.s43>
+ $<$<STREQUAL:${FREERTOS_PORT},IAR_RISC_V>:
+ IAR/RISC-V/port.c
+ IAR/RISC-V/portASM.s>
+ $<$<STREQUAL:${FREERTOS_PORT},IAR_RL78>:
+ IAR/RL78/port.c
+ IAR/RL78/portasm.s87>
+ $<$<STREQUAL:${FREERTOS_PORT},IAR_RX100>:
+ IAR/RX100/port.c
+ IAR/RX100/port_asm.s>
+ $<$<STREQUAL:${FREERTOS_PORT},IAR_RX600>:
+ IAR/RX600/port.c
+ IAR/RX600/port_asm.s>
+ $<$<STREQUAL:${FREERTOS_PORT},IAR_RX700_V3_DPFPU>:
+ IAR/RX700v3_DPFPU/port.c>
+ $<$<STREQUAL:${FREERTOS_PORT},IAR_RX_V2>:
+ IAR/RXv2/port.c
+ IAR/RXv2/port_asm.s>
+ $<$<STREQUAL:${FREERTOS_PORT},IAR_STR71X>:
+ IAR/STR71x/port.c
+ IAR/STR71x/portasm.s79>
+ $<$<STREQUAL:${FREERTOS_PORT},IAR_STR75X>:
+ IAR/STR75x/port.c
+ IAR/STR75x/portasm.s79>
+ $<$<STREQUAL:${FREERTOS_PORT},IAR_STR91X>:
+ IAR/STR91x/port.c
+ IAR/STR91x/portasm.s79>
+ $<$<STREQUAL:${FREERTOS_PORT},IAR_V850ES_FX3>:
+ IAR/V850ES/port.c
+ IAR/V850ES/portasm_Fx3.s85>
+ $<$<STREQUAL:${FREERTOS_PORT},IAR_V850ES_HX3>:
+ IAR/V850ES/port.c
+ IAR/V850ES/portasm_Hx2.s85>
+ $<$<STREQUAL:${FREERTOS_PORT},MIKROC_ARM_CM4F>:
+ MikroC/ARM_CM4F/port.c>
+ $<$<STREQUAL:${FREERTOS_PORT},MPLAB_PIC18F>:
+ MPLAB/PIC18F/port.c>
+ $<$<STREQUAL:${FREERTOS_PORT},MPLAB_PIC24>:
+ MPLAB/PIC24_dsPIC/port.c
+ MPLAB/PIC24_dsPIC/portasm_PIC24.S> # TODO: What to do with portasm_dsPIC.S ?
+ $<$<STREQUAL:${FREERTOS_PORT},MPLAB_PIC32MEC14XX>:
+ MPLAB/PIC32MEC14xx/port.c
+ MPLAB/PIC32MEC14xx/port_asm.S>
+ $<$<STREQUAL:${FREERTOS_PORT},MPLAB_PIC32MX>:
+ MPLAB/PIC32MX/port.c
+ MPLAB/PIC32MX/port_asm.S>
+ $<$<STREQUAL:${FREERTOS_PORT},MPLAB_PIC32MZ>:
+ MPLAB/PIC32MZ/port.c
+ MPLAB/PIC32MZ/port_asm.S>
+ $<$<STREQUAL:${FREERTOS_PORT},MSVC_MINGW>:
+ MSVC-MingW/port.c>
+ $<$<STREQUAL:${FREERTOS_PORT},OWATCOM_16BIT_DOS_FLSH186>:
+ oWatcom/16BitDOS/common/portcomn.c
+ oWatcom/16BitDOS/Flsh186/port.c>
+ $<$<STREQUAL:${FREERTOS_PORT},OWATCOM_16BIT_DOS_PC>:
+ oWatcom/16BitDOS/common/portcomn.c
+ oWatcom/16BitDOS/PC/port.c>
+ $<$<STREQUAL:${FREERTOS_PORT},PARADIGM_TERN_EE_LARGE>:
+ Paradigm/Tern_EE/large_untested/port.c>
+ $<$<STREQUAL:${FREERTOS_PORT},PARADIGM_TERN_EE_SMALL>:
+ Paradigm/Tern_EE/small/port.c>
+ $<$<STREQUAL:${FREERTOS_PORT},RENESAS_RX100>:
+ Renesas/RX100/port.c
+ Renesas/RX100/port_asm.src>
+ $<$<STREQUAL:${FREERTOS_PORT},RENESAS_RX200>:
+ Renesas/RX200/port.c
+ Renesas/RX200/port_asm.src>
+ $<$<STREQUAL:${FREERTOS_PORT},RENESAS_RX600>:
+ Renesas/RX600/port.c
+ Renesas/RX600/port_asm.src>
+ $<$<STREQUAL:${FREERTOS_PORT},RENESAS_RX600_V2>:
+ Renesas/RX600v2/port.c
+ Renesas/RX600v2/port_asm.src>
+ $<$<STREQUAL:${FREERTOS_PORT},RENESAS_RX700_V3_DPFPU>:
+ Renesas/RX700v3_DPFPU/port.c
+ Renesas/RX700v3_DPFPU/port_asm.src>
+ $<$<STREQUAL:${FREERTOS_PORT},RENESAS_SH2A_FPU>:
+ Renesas/SH2A_FPU/port.c
+ Renesas/SH2A_FPU/portasm.src>
+ $<$<STREQUAL:${FREERTOS_PORT},ROWLEY_MSP430F449>:
+ Rowley/MSP430F449/port.c
+ Rowley/MSP430F449/portext.asm>
+ $<$<STREQUAL:${FREERTOS_PORT},RVDS_ARM_CA9>:
+ RVDS/ARM_CA9/port.c
+ RVDS/ARM_CA9/portASM.s>
+ $<$<STREQUAL:${FREERTOS_PORT},RVDS_ARM_CM0>:
+ RVDS/ARM_CM0/port.c>
+ $<$<STREQUAL:${FREERTOS_PORT},RVDS_ARM_CM3>:
+ RVDS/ARM_CM3/port.c>
+ $<$<STREQUAL:${FREERTOS_PORT},RVDS_ARM_CM4_MPU>:
+ RVDS/ARM_CM4_MPU/port.c>
+ $<$<STREQUAL:${FREERTOS_PORT},RVDS_ARM_CM4F>:
+ RVDS/ARM_CM4F/port.c>
+ $<$<STREQUAL:${FREERTOS_PORT},RVDS_ARM_CM7>:
+ RVDS/ARM_CM7/r0p1/port.c>
+ $<$<STREQUAL:${FREERTOS_PORT},RVDS_ARM7_LPC21XX>:
+ RVDS/ARM7_LPC21xx/port.c
+ RVDS/ARM7_LPC21xx/portASM.s>
+ $<$<STREQUAL:${FREERTOS_PORT},SDCC_CYGNAL>:
+ SDCC/Cygnal/port.c>
+ $<$<STREQUAL:${FREERTOS_PORT},SOFTUNE_MB91460>:
+ Softune/MB91460/__STD_LIB_sbrk.c
+ Softune/MB91460/port.c>
+ $<$<STREQUAL:${FREERTOS_PORT},SOFTUNE_MB96340>:
+ Softune/MB96340/__STD_LIB_sbrk.c
+ Softune/MB96340/port.c>
+ $<$<STREQUAL:${FREERTOS_PORT},TASKING_ARM_CM4F>:
+ Tasking/ARM_CM4F/port.c
+ Tasking/ARM_CM4F/port_asm.asm>
+ $<$<STREQUAL:${FREERTOS_PORT},CDK_THEAD_CK802>:
+ ThirdParty/CDK/T-HEAD_CK802/port.c
+ ThirdParty/CDK/T-HEAD_CK802/portasm.S>
+ $<$<STREQUAL:${FREERTOS_PORT},XCC_XTENSA>:
+ ThirdParty/XCC/Xtensa/port.c
+ ThirdParty/XCC/Xtensa/portasm.S
+ ThirdParty/XCC/Xtensa/portclib.c
+ ThirdParty/XCC/Xtensa/xtensa_context.S
+ ThirdParty/XCC/Xtensa/xtensa_init.c
+ ThirdParty/XCC/Xtensa/xtensa_intr_asm.S
+ ThirdParty/XCC/Xtensa/xtensa_intr.c
+ ThirdParty/XCC/Xtensa/xtensa_overlay_os_hook.c
+ ThirdParty/XCC/Xtensa/xtensa_vectors.S>
+ $<$<STREQUAL:${FREERTOS_PORT},WIZC_PIC18>:
+ WizC/PIC18/port.c
+ WizC/PIC18/Drivers/Tick/isrTick.c
+ WizC/PIC18/Drivers/Tick/Tick.c>
+)
+
+target_include_directories(freertos_kernel_port PUBLIC
+ $<$<STREQUAL:${FREERTOS_PORT},BCC_16BIT_DOS_FLSH186>:
+ ${CMAKE_CURRENT_LIST_DIR}/BCC/16BitDOS/common
+ ${CMAKE_CURRENT_LIST_DIR}/BCC/16BitDOS/Flsh186>
+ $<$<STREQUAL:${FREERTOS_PORT},BCC_16BIT_DOS_PC>:
+ ${CMAKE_CURRENT_LIST_DIR}/BCC/16BitDOS/common
+ ${CMAKE_CURRENT_LIST_DIR}/BCC/16BitDOS/PC>
+ $<$<STREQUAL:${FREERTOS_PORT},CCS_ARM_CM3>:${CMAKE_CURRENT_LIST_DIR}/CCS/ARM_CM3>
+ $<$<STREQUAL:${FREERTOS_PORT},CCS_ARM_CM4F>:${CMAKE_CURRENT_LIST_DIR}/CCS/ARM_CM4F>
+ $<$<STREQUAL:${FREERTOS_PORT},CCS_ARM_CR4>:${CMAKE_CURRENT_LIST_DIR}/CCS/ARM_Cortex-R4>
+ $<$<STREQUAL:${FREERTOS_PORT},CCS_MSP430X>:${CMAKE_CURRENT_LIST_DIR}/CCS/MSP430X>
+ $<$<STREQUAL:${FREERTOS_PORT},CODEWARRIOR_COLDFIRE_V1>:${CMAKE_CURRENT_LIST_DIR}/CodeWarrior/ColdFire_V1>
+ $<$<STREQUAL:${FREERTOS_PORT},CODEWARRIOR_COLDFIRE_V2>:${CMAKE_CURRENT_LIST_DIR}/CodeWarrior/ColdFire_V2>
+ $<$<STREQUAL:${FREERTOS_PORT},CODEWARRIOR_HCS12>:${CMAKE_CURRENT_LIST_DIR}/CodeWarrior/HCS12>
+ $<$<STREQUAL:${FREERTOS_PORT},GCC_ARM_CA9>:${CMAKE_CURRENT_LIST_DIR}/GCC/ARM_CA9>
+ $<$<STREQUAL:${FREERTOS_PORT},GCC_ARM_CA53_64_BIT>:${CMAKE_CURRENT_LIST_DIR}/GCC/ARM_CA53_64_BIT>
+ $<$<STREQUAL:${FREERTOS_PORT},GCC_ARM_CA53_64_BIT_SRE>:${CMAKE_CURRENT_LIST_DIR}/GCC/ARM_CA53_64_BIT_SRE>
+ $<$<STREQUAL:${FREERTOS_PORT},GCC_ARM_CM0>:${CMAKE_CURRENT_LIST_DIR}/GCC/ARM_CM0>
+ $<$<STREQUAL:${FREERTOS_PORT},GCC_ARM_CM3>:${CMAKE_CURRENT_LIST_DIR}/GCC/ARM_CM3>
+ $<$<STREQUAL:${FREERTOS_PORT},GCC_ARM_CM3_MPU>:${CMAKE_CURRENT_LIST_DIR}/GCC/ARM_CM3_MPU>
+ $<$<STREQUAL:${FREERTOS_PORT},GCC_ARM_CM4_MPU>:${CMAKE_CURRENT_LIST_DIR}/GCC/ARM_CM4_MPU>
+ $<$<STREQUAL:${FREERTOS_PORT},GCC_ARM_CM4F>:${CMAKE_CURRENT_LIST_DIR}/GCC/ARM_CM4F>
+ $<$<STREQUAL:${FREERTOS_PORT},GCC_ARM_CM7>:${CMAKE_CURRENT_LIST_DIR}/GCC/ARM_CM7/r0p1>
+ $<$<STREQUAL:${FREERTOS_PORT},GCC_ARM_CM23_NONSECURE>:${CMAKE_CURRENT_LIST_DIR}/GCC/ARM_CM23/non_secure>
+ $<$<STREQUAL:${FREERTOS_PORT},GCC_ARM_CM23_SECURE>:${CMAKE_CURRENT_LIST_DIR}/GCC/ARM_CM23/secure>
+ $<$<STREQUAL:${FREERTOS_PORT},GCC_ARM_CM23_NTZ_NONSECURE>:${CMAKE_CURRENT_LIST_DIR}/GCC/ARM_CM23_NTZ/non_secure>
+ $<$<STREQUAL:${FREERTOS_PORT},GCC_ARM_CM33_NONSECURE>:${CMAKE_CURRENT_LIST_DIR}/GCC/ARM_CM33/non_secure>
+ $<$<STREQUAL:${FREERTOS_PORT},GCC_ARM_CM33_SECURE>:${CMAKE_CURRENT_LIST_DIR}/GCC/ARM_CM33/secure>
+ $<$<STREQUAL:${FREERTOS_PORT},GCC_ARM_CM33_NTZ_NONSECURE>:${CMAKE_CURRENT_LIST_DIR}/GCC/ARM_CM33_NTZ/non_secure>
+ $<$<STREQUAL:${FREERTOS_PORT},GCC_ARM_CR5>:${CMAKE_CURRENT_LIST_DIR}/GCC/ARM_CR5>
+ $<$<STREQUAL:${FREERTOS_PORT},GCC_ARM_CRX_NOGIC>:${CMAKE_CURRENT_LIST_DIR}/GCC/ARM_CRx_No_GIC>
+ $<$<STREQUAL:${FREERTOS_PORT},GCC_ARM7_AT91FR40008>:${CMAKE_CURRENT_LIST_DIR}/GCC/ARM7_AT91FR40008>
+ $<$<STREQUAL:${FREERTOS_PORT},GCC_ARM7_AT91SAM7S>:${CMAKE_CURRENT_LIST_DIR}/GCC/ARM7_AT91SAM7S>
+ $<$<STREQUAL:${FREERTOS_PORT},GCC_ARM7_LPC2000>:${CMAKE_CURRENT_LIST_DIR}/GCC/ARM7_LPC2000>
+ $<$<STREQUAL:${FREERTOS_PORT},GCC_ARM7_LPC23XX>:${CMAKE_CURRENT_LIST_DIR}/GCC/ARM7_LPC23xx>
+ $<$<STREQUAL:${FREERTOS_PORT},GCC_ATMEGA323>:${CMAKE_CURRENT_LIST_DIR}/GCC/ATMega323>
+ $<$<STREQUAL:${FREERTOS_PORT},GCC_AVR32_UC3>:${CMAKE_CURRENT_LIST_DIR}/GCC/AVR32_UC3>
+ $<$<STREQUAL:${FREERTOS_PORT},GCC_COLDFIRE_V2>:${CMAKE_CURRENT_LIST_DIR}/GCC/ColdFire_V2>
+ $<$<STREQUAL:${FREERTOS_PORT},GCC_CORTUS_APS3>:${CMAKE_CURRENT_LIST_DIR}/GCC/CORTUS_APS3>
+ $<$<STREQUAL:${FREERTOS_PORT},GCC_H8S2329>:${CMAKE_CURRENT_LIST_DIR}/GCC/H8S2329>
+ $<$<STREQUAL:${FREERTOS_PORT},GCC_HCS12>:${CMAKE_CURRENT_LIST_DIR}/GCC/HCS12>
+ $<$<STREQUAL:${FREERTOS_PORT},GCC_IA32_FLAT>:${CMAKE_CURRENT_LIST_DIR}/GCC/IA32_flat>
+ $<$<STREQUAL:${FREERTOS_PORT},GCC_MICROBLAZE>:${CMAKE_CURRENT_LIST_DIR}/GCC/MicroBlaze>
+ $<$<STREQUAL:${FREERTOS_PORT},GCC_MICROBLAZE_V8>:${CMAKE_CURRENT_LIST_DIR}/GCC/MicroBlazeV8>
+ $<$<STREQUAL:${FREERTOS_PORT},GCC_MICROBLAZE_V9>:${CMAKE_CURRENT_LIST_DIR}/GCC/MicroBlazeV9>
+ $<$<STREQUAL:${FREERTOS_PORT},GCC_MSP430F449>:${CMAKE_CURRENT_LIST_DIR}/GCC/MSP430F449>
+ $<$<STREQUAL:${FREERTOS_PORT},GCC_NIOSII>:${CMAKE_CURRENT_LIST_DIR}/GCC/NiosII>
+ $<$<STREQUAL:${FREERTOS_PORT},GCC_PPC405_XILINX>:${CMAKE_CURRENT_LIST_DIR}/GCC/PPC405_Xilinx>
+ $<$<STREQUAL:${FREERTOS_PORT},GCC_PPC440_XILINX>:${CMAKE_CURRENT_LIST_DIR}/GCC/PPC440_Xilinx>
+ $<$<STREQUAL:${FREERTOS_PORT},GCC_RISC_V>:
+ ${CMAKE_CURRENT_LIST_DIR}/GCC/RISC-V
+ ${CMAKE_CURRENT_LIST_DIR}/GCC/RISC-V/chip_specific_extensions/RISCV_MTIME_CLINT_no_extensions>
+ $<$<STREQUAL:${FREERTOS_PORT},GCC_RISC_V_PULPINO_VEGA_RV32M1RM>:
+ ${CMAKE_CURRENT_LIST_DIR}/GCC/RISC-V
+ ${CMAKE_CURRENT_LIST_DIR}/GCC/RISC-V/chip_specific_extensions/Pulpino_Vega_RV32M1RM>
+ $<$<STREQUAL:${FREERTOS_PORT},GCC_RL78>:${CMAKE_CURRENT_LIST_DIR}/GCC/RL78>
+ $<$<STREQUAL:${FREERTOS_PORT},GCC_RX100>:${CMAKE_CURRENT_LIST_DIR}/GCC/RX100>
+ $<$<STREQUAL:${FREERTOS_PORT},GCC_RX200>:${CMAKE_CURRENT_LIST_DIR}/GCC/RX200>
+ $<$<STREQUAL:${FREERTOS_PORT},GCC_RX600>:${CMAKE_CURRENT_LIST_DIR}/GCC/RX600>
+ $<$<STREQUAL:${FREERTOS_PORT},GCC_RX600_V2>:${CMAKE_CURRENT_LIST_DIR}/GCC/RX600v2>
+ $<$<STREQUAL:${FREERTOS_PORT},GCC_RX700_V3_DPFPU>:${CMAKE_CURRENT_LIST_DIR}/GCC/RX700v3_DPFPU>
+ $<$<STREQUAL:${FREERTOS_PORT},GCC_STR75X>:${CMAKE_CURRENT_LIST_DIR}/GCC/STR75x>
+ $<$<STREQUAL:${FREERTOS_PORT},GCC_TRICORE_1782>:${CMAKE_CURRENT_LIST_DIR}/GCC/TriCore_1782>
+ $<$<STREQUAL:${FREERTOS_PORT},GCC_ARC_EM_HS>:${CMAKE_CURRENT_LIST_DIR}/ThirdParty/GCC/ARC_EM_HS>
+ $<$<STREQUAL:${FREERTOS_PORT},GCC_ARC_V1>:${CMAKE_CURRENT_LIST_DIR}/ThirdParty/GCC/ARC_v1>
+ $<$<STREQUAL:${FREERTOS_PORT},GCC_ATMEGA>:${CMAKE_CURRENT_LIST_DIR}/ThirdParty/GCC/ATmega>
+ $<$<STREQUAL:${FREERTOS_PORT},GCC_POSIX>:
+ ${CMAKE_CURRENT_LIST_DIR}/ThirdParty/GCC/Posix
+ ${CMAKE_CURRENT_LIST_DIR}/ThirdParty/GCC/Posix/utils>
+ $<$<STREQUAL:${FREERTOS_PORT},GCC_RP2040>:${CMAKE_CURRENT_LIST_DIR}/ThirdParty/GCC/RP2040/include>
+ $<$<STREQUAL:${FREERTOS_PORT},GCC_XTENSA_ESP32>:
+ ${CMAKE_CURRENT_LIST_DIR}/ThirdParty/GCC/Xtensa_ESP32
+ ${CMAKE_CURRENT_LIST_DIR}/ThirdParty/GCC/Xtensa_ESP32/include>
+ $<$<STREQUAL:${FREERTOS_PORT},GCC_AVRDX>:${CMAKE_CURRENT_LIST_DIR}/ThirdParty/Partner-Supported-Ports/GCC/AVR_AVRDx>
+ $<$<STREQUAL:${FREERTOS_PORT},GCC_AVR_MEGA0>:${CMAKE_CURRENT_LIST_DIR}/ThirdParty/Partner-Supported-Ports/GCC/AVR_Mega0>
+ $<$<STREQUAL:${FREERTOS_PORT},IAR_78K0K>:${CMAKE_CURRENT_LIST_DIR}/IAR/78K0R>
+ $<$<STREQUAL:${FREERTOS_PORT},IAR_ARM_CA5_NOGIC>:${CMAKE_CURRENT_LIST_DIR}/IAR/ARM_CA5_No_GIC>
+ $<$<STREQUAL:${FREERTOS_PORT},IAR_ARM_CA9>:${CMAKE_CURRENT_LIST_DIR}/IAR/ARM_CA9>
+ $<$<STREQUAL:${FREERTOS_PORT},IAR_ARM_CM0>:${CMAKE_CURRENT_LIST_DIR}/IAR/ARM_CM0>
+ $<$<STREQUAL:${FREERTOS_PORT},IAR_ARM_CM3>:${CMAKE_CURRENT_LIST_DIR}/IAR/ARM_CM3>
+ $<$<STREQUAL:${FREERTOS_PORT},IAR_ARM_CM4F>:${CMAKE_CURRENT_LIST_DIR}/IAR/ARM_CM4F>
+ $<$<STREQUAL:${FREERTOS_PORT},IAR_ARM_CM4F_MPU>:${CMAKE_CURRENT_LIST_DIR}/IAR/ARM_CM4F_MPU>
+ $<$<STREQUAL:${FREERTOS_PORT},IAR_ARM_CM7>:${CMAKE_CURRENT_LIST_DIR}/IAR/ARM_CM7/r0p1>
+ $<$<STREQUAL:${FREERTOS_PORT},IAR_ARM_CM23_NONSECURE>:${CMAKE_CURRENT_LIST_DIR}/IAR/ARM_CM23/non_secure>
+ $<$<STREQUAL:${FREERTOS_PORT},IAR_ARM_CM23_SECURE>:${CMAKE_CURRENT_LIST_DIR}/IAR/ARM_CM23/secure>
+ $<$<STREQUAL:${FREERTOS_PORT},IAR_ARM_CM23_NTZ_NONSECURE>:${CMAKE_CURRENT_LIST_DIR}/IAR/ARM_CM23_NTZ/non_secure>
+ $<$<STREQUAL:${FREERTOS_PORT},IAR_ARM_CM33_NONSECURE>:${CMAKE_CURRENT_LIST_DIR}/IAR/ARM_CM33/non_secure>
+ $<$<STREQUAL:${FREERTOS_PORT},IAR_ARM_CM33_SECURE>:${CMAKE_CURRENT_LIST_DIR}/IAR/ARM_CM33/secure>
+ $<$<STREQUAL:${FREERTOS_PORT},IAR_ARM_CM33_NTZ_NONSECURE>:${CMAKE_CURRENT_LIST_DIR}/IAR/ARM_CM33_NTZ/non_secure>
+ $<$<STREQUAL:${FREERTOS_PORT},IAR_ARM_CRX_NOGIC>:${CMAKE_CURRENT_LIST_DIR}/IAR/ARM_CRx_No_GIC>
+ $<$<STREQUAL:${FREERTOS_PORT},IAR_ATMEGA323>:${CMAKE_CURRENT_LIST_DIR}/IAR/ATMega323>
+ $<$<STREQUAL:${FREERTOS_PORT},IAR_ATMEL_SAM7S64>:${CMAKE_CURRENT_LIST_DIR}/IAR/AtmelSAM7S64>
+ $<$<STREQUAL:${FREERTOS_PORT},IAR_ATMEL_SAM9XE>:${CMAKE_CURRENT_LIST_DIR}/IAR/AtmelSAM9XE>
+ $<$<STREQUAL:${FREERTOS_PORT},IAR_AVR_AVRDX>:${CMAKE_CURRENT_LIST_DIR}/IAR/AVR_AVRDx>
+ $<$<STREQUAL:${FREERTOS_PORT},IAR_AVR_MEGA0>:${CMAKE_CURRENT_LIST_DIR}/IAR/AVR_Mega0>
+ $<$<STREQUAL:${FREERTOS_PORT},IAR_AVR32_UC3>:${CMAKE_CURRENT_LIST_DIR}/IAR/AVR32_UC3>
+ $<$<STREQUAL:${FREERTOS_PORT},IAR_LPC2000>:${CMAKE_CURRENT_LIST_DIR}/IAR/LPC2000>
+ $<$<STREQUAL:${FREERTOS_PORT},IAR_MSP430>:${CMAKE_CURRENT_LIST_DIR}/IAR/MSP430>
+ $<$<STREQUAL:${FREERTOS_PORT},IAR_MSP430X>:${CMAKE_CURRENT_LIST_DIR}/IAR/MSP430X>
+ $<$<STREQUAL:${FREERTOS_PORT},IAR_RISC_V>:
+ ${CMAKE_CURRENT_LIST_DIR}/IAR/RISC-V
+ ${CMAKE_CURRENT_LIST_DIR}/IAR/RISC-V/chip_specific_extensions/RV32I_CLINT_no_extensions>
+ $<$<STREQUAL:${FREERTOS_PORT},IAR_RL78>:${CMAKE_CURRENT_LIST_DIR}/IAR/RL78>
+ $<$<STREQUAL:${FREERTOS_PORT},IAR_RX100>:${CMAKE_CURRENT_LIST_DIR}/IAR/RX100>
+ $<$<STREQUAL:${FREERTOS_PORT},IAR_RX600>:${CMAKE_CURRENT_LIST_DIR}/IAR/RX600>
+ $<$<STREQUAL:${FREERTOS_PORT},IAR_RX700_V3_DPFPU>:${CMAKE_CURRENT_LIST_DIR}/IAR/RX700v3_DPFPU>
+ $<$<STREQUAL:${FREERTOS_PORT},IAR_RX_V2>:${CMAKE_CURRENT_LIST_DIR}/IAR/RXv2>
+ $<$<STREQUAL:${FREERTOS_PORT},IAR_STR71X>:${CMAKE_CURRENT_LIST_DIR}/IAR/STR71x>
+ $<$<STREQUAL:${FREERTOS_PORT},IAR_STR75X>:${CMAKE_CURRENT_LIST_DIR}/IAR/STR75x>
+ $<$<STREQUAL:${FREERTOS_PORT},IAR_STR91X>:${CMAKE_CURRENT_LIST_DIR}/IAR/STR91x>
+ $<$<STREQUAL:${FREERTOS_PORT},IAR_V850ES_FX3>:${CMAKE_CURRENT_LIST_DIR}/IAR/V850ES>
+ $<$<STREQUAL:${FREERTOS_PORT},IAR_V850ES_HX3>:${CMAKE_CURRENT_LIST_DIR}/IAR/V850ES>
+ $<$<STREQUAL:${FREERTOS_PORT},MIKROC_ARM_CM4F>:${CMAKE_CURRENT_LIST_DIR}/MikroC/ARM_CM4F>
+ $<$<STREQUAL:${FREERTOS_PORT},MPLAB_PIC18F>:${CMAKE_CURRENT_LIST_DIR}/MPLAB/PIC18F>
+ $<$<STREQUAL:${FREERTOS_PORT},MPLAB_PIC24>:${CMAKE_CURRENT_LIST_DIR}/MPLAB/PIC24_dsPIC>
+ $<$<STREQUAL:${FREERTOS_PORT},MPLAB_PIC32MEC14XX>:${CMAKE_CURRENT_LIST_DIR}/MPLAB/PIC32MEC14xx>
+ $<$<STREQUAL:${FREERTOS_PORT},MPLAB_PIC32MX>:${CMAKE_CURRENT_LIST_DIR}/MPLAB/PIC32MX>
+ $<$<STREQUAL:${FREERTOS_PORT},MPLAB_PIC32MZ>:${CMAKE_CURRENT_LIST_DIR}/MPLAB/PIC32MZ>
+ $<$<STREQUAL:${FREERTOS_PORT},MSVC_MINGW>:${CMAKE_CURRENT_LIST_DIR}/MSVC-MingW>
+ $<$<STREQUAL:${FREERTOS_PORT},OWATCOM_16BIT_DOS_FLSH186>:
+ ${CMAKE_CURRENT_LIST_DIR}/oWatcom/16BitDOS/common
+ ${CMAKE_CURRENT_LIST_DIR}/oWatcom/16BitDOS/Flsh186>
+ $<$<STREQUAL:${FREERTOS_PORT},OWATCOM_16BIT_DOS_PC>:
+ ${CMAKE_CURRENT_LIST_DIR}/oWatcom/16BitDOS/common
+ ${CMAKE_CURRENT_LIST_DIR}/oWatcom/16BitDOS/PC>
+ $<$<STREQUAL:${FREERTOS_PORT},PARADIGM_TERN_EE_LARGE>:${CMAKE_CURRENT_LIST_DIR}/Paradigm/Tern_EE/large_untested>
+ $<$<STREQUAL:${FREERTOS_PORT},PARADIGM_TERN_EE_SMALL>:${CMAKE_CURRENT_LIST_DIR}/Paradigm/Tern_EE/small>
+ $<$<STREQUAL:${FREERTOS_PORT},RENESAS_RX100>:${CMAKE_CURRENT_LIST_DIR}/Renesas/RX100>
+ $<$<STREQUAL:${FREERTOS_PORT},RENESAS_RX200>:${CMAKE_CURRENT_LIST_DIR}/Renesas/RX200>
+ $<$<STREQUAL:${FREERTOS_PORT},RENESAS_RX600>:${CMAKE_CURRENT_LIST_DIR}/Renesas/RX600>
+ $<$<STREQUAL:${FREERTOS_PORT},RENESAS_RX600_V2>:${CMAKE_CURRENT_LIST_DIR}/Renesas/RX600v2>
+ $<$<STREQUAL:${FREERTOS_PORT},RENESAS_RX700_V3_DPFPU>:${CMAKE_CURRENT_LIST_DIR}/Renesas/RX700v3_DPFPU>
+ $<$<STREQUAL:${FREERTOS_PORT},RENESAS_SH2A_FPU>:${CMAKE_CURRENT_LIST_DIR}/Renesas/SH2A_FPU>
+ $<$<STREQUAL:${FREERTOS_PORT},ROWLEY_MSP430F449>:${CMAKE_CURRENT_LIST_DIR}/Rowley/MSP430F449>
+ $<$<STREQUAL:${FREERTOS_PORT},RVDS_ARM_CA9>:${CMAKE_CURRENT_LIST_DIR}/RVDS/ARM_CA9>
+ $<$<STREQUAL:${FREERTOS_PORT},RVDS_ARM_CM0>:${CMAKE_CURRENT_LIST_DIR}/RVDS/ARM_CM0>
+ $<$<STREQUAL:${FREERTOS_PORT},RVDS_ARM_CM3>:${CMAKE_CURRENT_LIST_DIR}/RVDS/ARM_CM3>
+ $<$<STREQUAL:${FREERTOS_PORT},RVDS_ARM_CM4_MPU>:${CMAKE_CURRENT_LIST_DIR}/RVDS/ARM_CM4_MPU>
+ $<$<STREQUAL:${FREERTOS_PORT},RVDS_ARM_CM4F>:${CMAKE_CURRENT_LIST_DIR}/RVDS/ARM_CM4F>
+ $<$<STREQUAL:${FREERTOS_PORT},RVDS_ARM_CM7>:${CMAKE_CURRENT_LIST_DIR}/RVDS/ARM_CM7/r0p1>
+ $<$<STREQUAL:${FREERTOS_PORT},RVDS_ARM7_LPC21XX>:${CMAKE_CURRENT_LIST_DIR}/RVDS/ARM7_LPC21xx>
+ $<$<STREQUAL:${FREERTOS_PORT},SDCC_CYGNAL>:${CMAKE_CURRENT_LIST_DIR}/SDCC/Cygnal>
+ $<$<STREQUAL:${FREERTOS_PORT},SOFTUNE_MB91460>:${CMAKE_CURRENT_LIST_DIR}/Softune/MB91460>
+ $<$<STREQUAL:${FREERTOS_PORT},SOFTUNE_MB96340>:${CMAKE_CURRENT_LIST_DIR}/Softune/MB96340>
+ $<$<STREQUAL:${FREERTOS_PORT},TASKING_ARM_CM4F>:${CMAKE_CURRENT_LIST_DIR}/Tasking/ARM_CM4F>
+ $<$<STREQUAL:${FREERTOS_PORT},CDK_THEAD_CK802>:${CMAKE_CURRENT_LIST_DIR}/ThirdParty/CDK/T-HEAD_CK802>
+ $<$<STREQUAL:${FREERTOS_PORT},XCC_XTENSA>:${CMAKE_CURRENT_LIST_DIR}/ThirdParty/XCC/Xtensa>
+ $<$<STREQUAL:${FREERTOS_PORT},WIZC_PIC18>:${CMAKE_CURRENT_LIST_DIR}/WizC/PIC18>
+)
+
+target_link_libraries(freertos_kernel_port
+ PUBLIC
+ $<$<STREQUAL:${FREERTOS_PORT},GCC_RP2040>:pico_base_headers>
+ $<$<STREQUAL:${FREERTOS_PORT},GCC_XTENSA_ESP32>:idf::esp32>
+ PRIVATE
+ freertos_kernel
+ "$<$<STREQUAL:${FREERTOS_PORT},GCC_RP2040>:hardware_clocks;hardware_exception>"
+ $<$<STREQUAL:${FREERTOS_PORT},MSVC_MINGW>:winmm> # Windows library which implements timers
+)
