/* | |
FreeRTOS V7.4.2 - Copyright (C) 2013 Real Time Engineers Ltd. | |
FEATURES AND PORTS ARE ADDED TO FREERTOS ALL THE TIME. PLEASE VISIT | |
http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION. | |
*************************************************************************** | |
* * | |
* FreeRTOS tutorial books are available in pdf and paperback. * | |
* Complete, revised, and edited pdf reference manuals are also * | |
* available. * | |
* * | |
* Purchasing FreeRTOS documentation will not only help you, by * | |
* ensuring you get running as quickly as possible and with an * | |
* in-depth knowledge of how to use FreeRTOS, it will also help * | |
* the FreeRTOS project to continue with its mission of providing * | |
* professional grade, cross platform, de facto standard solutions * | |
* for microcontrollers - completely free of charge! * | |
* * | |
* >>> See http://www.FreeRTOS.org/Documentation for details. <<< * | |
* * | |
* Thank you for using FreeRTOS, and thank you for your support! * | |
* * | |
*************************************************************************** | |
This file is part of the FreeRTOS distribution. | |
FreeRTOS is free software; you can redistribute it and/or modify it under | |
the terms of the GNU General Public License (version 2) as published by the | |
Free Software Foundation AND MODIFIED BY the FreeRTOS exception. | |
>>>>>>NOTE<<<<<< The modification to the GPL is included to allow you to | |
distribute a combined work that includes FreeRTOS without being obliged to | |
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writing to Real Time Engineers Ltd., contact details for whom are available | |
on the FreeRTOS WEB site. | |
1 tab == 4 spaces! | |
*************************************************************************** | |
* * | |
* Having a problem? Start by reading the FAQ "My application does * | |
* not run, what could be wrong?" * | |
* * | |
* http://www.FreeRTOS.org/FAQHelp.html * | |
* * | |
*************************************************************************** | |
http://www.FreeRTOS.org - Documentation, books, training, latest versions, | |
license and Real Time Engineers Ltd. contact details. | |
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including FreeRTOS+Trace - an indispensable productivity tool, and our new | |
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engineered and independently SIL3 certified version for use in safety and | |
mission critical applications that require provable dependability. | |
*/ | |
/*----------------------------------------------------------- | |
* Implementation of functions defined in portable.h for the ARM CM4F port. | |
*----------------------------------------------------------*/ | |
/* Scheduler includes. */ | |
#include "FreeRTOS.h" | |
#include "task.h" | |
#ifndef __TARGET_FPU_VFP | |
#error This port can only be used when the project options are configured to enable hardware floating point support. | |
#endif | |
#if configMAX_SYSCALL_INTERRUPT_PRIORITY == 0 | |
#error configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to 0. See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html | |
#endif | |
#ifndef configSYSTICK_CLOCK_HZ | |
#define configSYSTICK_CLOCK_HZ configCPU_CLOCK_HZ | |
#endif | |
/* The __weak attribute does not work as you might expect with the Keil tools | |
so the configOVERRIDE_DEFAULT_TICK_CONFIGURATION constant must be set to 1 if | |
the application writer wants to provide their own implementation of | |
vPortSetupTimerInterrupt(). Ensure configOVERRIDE_DEFAULT_TICK_CONFIGURATION | |
is defined. */ | |
#ifndef configOVERRIDE_DEFAULT_TICK_CONFIGURATION | |
#define configOVERRIDE_DEFAULT_TICK_CONFIGURATION 0 | |
#endif | |
/* Constants required to manipulate the core. Registers first... */ | |
#define portNVIC_SYSTICK_CTRL_REG ( * ( ( volatile unsigned long * ) 0xe000e010 ) ) | |
#define portNVIC_SYSTICK_LOAD_REG ( * ( ( volatile unsigned long * ) 0xe000e014 ) ) | |
#define portNVIC_SYSTICK_CURRENT_VALUE_REG ( * ( ( volatile unsigned long * ) 0xe000e018 ) ) | |
#define portNVIC_SYSPRI2_REG ( * ( ( volatile unsigned long * ) 0xe000ed20 ) ) | |
/* ...then bits in the registers. */ | |
#define portNVIC_SYSTICK_CLK_BIT ( 1UL << 2UL ) | |
#define portNVIC_SYSTICK_INT_BIT ( 1UL << 1UL ) | |
#define portNVIC_SYSTICK_ENABLE_BIT ( 1UL << 0UL ) | |
#define portNVIC_SYSTICK_COUNT_FLAG_BIT ( 1UL << 16UL ) | |
#define portNVIC_PENDSVCLEAR_BIT ( 1UL << 27UL ) | |
#define portNVIC_PEND_SYSTICK_CLEAR_BIT ( 1UL << 25UL ) | |
#define portNVIC_PENDSV_PRI ( ( ( unsigned long ) configKERNEL_INTERRUPT_PRIORITY ) << 16UL ) | |
#define portNVIC_SYSTICK_PRI ( ( ( unsigned long ) configKERNEL_INTERRUPT_PRIORITY ) << 24UL ) | |
/* Constants required to check the validity of an interrupt prority. */ | |
#define portFIRST_USER_INTERRUPT_NUMBER ( 16 ) | |
#define portNVIC_IP_REGISTERS_OFFSET_16 ( 0xE000E3F0 ) | |
#define portAIRCR_REG ( * ( ( volatile unsigned long * ) 0xE000ED0C ) ) | |
#define portPRIORITY_GROUP_MASK ( 0x07UL << 8UL ) | |
/* Constants required to manipulate the VFP. */ | |
#define portFPCCR ( ( volatile unsigned long * ) 0xe000ef34 ) /* Floating point context control register. */ | |
#define portASPEN_AND_LSPEN_BITS ( 0x3UL << 30UL ) | |
/* Constants required to set up the initial stack. */ | |
#define portINITIAL_XPSR ( 0x01000000 ) | |
#define portINITIAL_EXEC_RETURN ( 0xfffffffd ) | |
/* Constants used with memory barrier intrinsics. */ | |
#define portSY_FULL_READ_WRITE ( 15 ) | |
/* The systick is a 24-bit counter. */ | |
#define portMAX_24_BIT_NUMBER ( 0xffffffUL ) | |
/* A fiddle factor to estimate the number of SysTick counts that would have | |
occurred while the SysTick counter is stopped during tickless idle | |
calculations. */ | |
#define portMISSED_COUNTS_FACTOR ( 45UL ) | |
/* Each task maintains its own interrupt status in the critical nesting | |
variable. */ | |
static unsigned portBASE_TYPE uxCriticalNesting = 0xaaaaaaaa; | |
/* | |
* Setup the timer to generate the tick interrupts. The implementation in this | |
* file is weak to allow application writers to change the timer used to | |
* generate the tick interrupt. | |
*/ | |
void vPortSetupTimerInterrupt( void ); | |
/* | |
* Exception handlers. | |
*/ | |
void xPortPendSVHandler( void ); | |
void xPortSysTickHandler( void ); | |
void vPortSVCHandler( void ); | |
/* | |
* Start first task is a separate function so it can be tested in isolation. | |
*/ | |
static void prvStartFirstTask( void ); | |
/* | |
* Functions defined in portasm.s to enable the VFP. | |
*/ | |
static void prvEnableVFP( void ); | |
/*-----------------------------------------------------------*/ | |
/* | |
* The number of SysTick increments that make up one tick period. | |
*/ | |
#if configUSE_TICKLESS_IDLE == 1 | |
static unsigned long ulTimerCountsForOneTick = 0; | |
#endif /* configUSE_TICKLESS_IDLE */ | |
/* | |
* The maximum number of tick periods that can be suppressed is limited by the | |
* 24 bit resolution of the SysTick timer. | |
*/ | |
#if configUSE_TICKLESS_IDLE == 1 | |
static unsigned long xMaximumPossibleSuppressedTicks = 0; | |
#endif /* configUSE_TICKLESS_IDLE */ | |
/* | |
* Compensate for the CPU cycles that pass while the SysTick is stopped (low | |
* power functionality only. | |
*/ | |
#if configUSE_TICKLESS_IDLE == 1 | |
static unsigned long ulStoppedTimerCompensation = 0; | |
#endif /* configUSE_TICKLESS_IDLE */ | |
/* | |
* Used by the portASSERT_IF_INTERRUPT_PRIORITY_INVALID() macro to ensure | |
* FreeRTOS API functions are not called from interrupts that have been assigned | |
* a priority above configMAX_SYSCALL_INTERRUPT_PRIORITY. | |
*/ | |
#if ( configASSERT_DEFINED == 1 ) | |
static unsigned char ucMaxSysCallPriority = 0; | |
static const volatile unsigned char * const pcInterruptPriorityRegisters = ( unsigned char * ) portNVIC_IP_REGISTERS_OFFSET_16; | |
#endif /* configASSERT_DEFINED */ | |
/*-----------------------------------------------------------*/ | |
/* | |
* See header file for description. | |
*/ | |
portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters ) | |
{ | |
/* Simulate the stack frame as it would be created by a context switch | |
interrupt. */ | |
/* Offset added to account for the way the MCU uses the stack on entry/exit | |
of interrupts, and to ensure alignment. */ | |
pxTopOfStack--; | |
*pxTopOfStack = portINITIAL_XPSR; /* xPSR */ | |
pxTopOfStack--; | |
*pxTopOfStack = ( portSTACK_TYPE ) pxCode; /* PC */ | |
pxTopOfStack--; | |
*pxTopOfStack = 0; /* LR */ | |
/* Save code space by skipping register initialisation. */ | |
pxTopOfStack -= 5; /* R12, R3, R2 and R1. */ | |
*pxTopOfStack = ( portSTACK_TYPE ) pvParameters; /* R0 */ | |
/* A save method is being used that requires each task to maintain its | |
own exec return value. */ | |
pxTopOfStack--; | |
*pxTopOfStack = portINITIAL_EXEC_RETURN; | |
pxTopOfStack -= 8; /* R11, R10, R9, R8, R7, R6, R5 and R4. */ | |
return pxTopOfStack; | |
} | |
/*-----------------------------------------------------------*/ | |
__asm void vPortSVCHandler( void ) | |
{ | |
PRESERVE8 | |
/* Get the location of the current TCB. */ | |
ldr r3, =pxCurrentTCB | |
ldr r1, [r3] | |
ldr r0, [r1] | |
/* Pop the core registers. */ | |
ldmia r0!, {r4-r11, r14} | |
msr psp, r0 | |
mov r0, #0 | |
msr basepri, r0 | |
bx r14 | |
} | |
/*-----------------------------------------------------------*/ | |
__asm void prvStartFirstTask( void ) | |
{ | |
PRESERVE8 | |
/* Use the NVIC offset register to locate the stack. */ | |
ldr r0, =0xE000ED08 | |
ldr r0, [r0] | |
ldr r0, [r0] | |
/* Set the msp back to the start of the stack. */ | |
msr msp, r0 | |
/* Globally enable interrupts. */ | |
cpsie i | |
/* Call SVC to start the first task. */ | |
svc 0 | |
nop | |
} | |
/*-----------------------------------------------------------*/ | |
__asm void prvEnableVFP( void ) | |
{ | |
PRESERVE8 | |
/* The FPU enable bits are in the CPACR. */ | |
ldr.w r0, =0xE000ED88 | |
ldr r1, [r0] | |
/* Enable CP10 and CP11 coprocessors, then save back. */ | |
orr r1, r1, #( 0xf << 20 ) | |
str r1, [r0] | |
bx r14 | |
nop | |
} | |
/*-----------------------------------------------------------*/ | |
/* | |
* See header file for description. | |
*/ | |
portBASE_TYPE xPortStartScheduler( void ) | |
{ | |
#if( configASSERT_DEFINED == 1 ) | |
{ | |
volatile unsigned long ulOriginalPriority; | |
volatile char * const pcFirstUserPriorityRegister = ( char * ) ( portNVIC_IP_REGISTERS_OFFSET_16 + portFIRST_USER_INTERRUPT_NUMBER ); | |
/* Determine the maximum priority from which ISR safe FreeRTOS API | |
functions can be called. ISR safe functions are those that end in | |
"FromISR". FreeRTOS maintains separate thread and ISR API functions to | |
ensure interrupt entry is as fast and simple as possible. | |
Save the interrupt priority value that is about to be clobbered. */ | |
ulOriginalPriority = *pcFirstUserPriorityRegister; | |
/* Write the configMAX_SYSCALL_INTERRUPT_PRIORITY value to an interrupt | |
priority register. */ | |
*pcFirstUserPriorityRegister = configMAX_SYSCALL_INTERRUPT_PRIORITY; | |
/* Read back the written priority to obtain its value as seen by the | |
hardware, which will only implement a subset of the priority bits. */ | |
ucMaxSysCallPriority = *pcFirstUserPriorityRegister; | |
/* Restore the clobbered interrupt priority register to its original | |
value. */ | |
*pcFirstUserPriorityRegister = ulOriginalPriority; | |
} | |
#endif /* conifgASSERT_DEFINED */ | |
/* Make PendSV and SysTick the lowest priority interrupts. */ | |
portNVIC_SYSPRI2_REG |= portNVIC_PENDSV_PRI; | |
portNVIC_SYSPRI2_REG |= portNVIC_SYSTICK_PRI; | |
/* Start the timer that generates the tick ISR. Interrupts are disabled | |
here already. */ | |
vPortSetupTimerInterrupt(); | |
/* Initialise the critical nesting count ready for the first task. */ | |
uxCriticalNesting = 0; | |
/* Ensure the VFP is enabled - it should be anyway. */ | |
prvEnableVFP(); | |
/* Lazy save always. */ | |
*( portFPCCR ) |= portASPEN_AND_LSPEN_BITS; | |
/* Start the first task. */ | |
prvStartFirstTask(); | |
/* Should not get here! */ | |
return 0; | |
} | |
/*-----------------------------------------------------------*/ | |
void vPortEndScheduler( void ) | |
{ | |
/* It is unlikely that the CM4F port will require this function as there | |
is nothing to return to. */ | |
} | |
/*-----------------------------------------------------------*/ | |
void vPortYield( void ) | |
{ | |
/* Set a PendSV to request a context switch. */ | |
portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; | |
/* Barriers are normally not required but do ensure the code is completely | |
within the specified behaviour for the architecture. */ | |
__dsb( portSY_FULL_READ_WRITE ); | |
__isb( portSY_FULL_READ_WRITE ); | |
} | |
/*-----------------------------------------------------------*/ | |
void vPortEnterCritical( void ) | |
{ | |
portDISABLE_INTERRUPTS(); | |
uxCriticalNesting++; | |
__dsb( portSY_FULL_READ_WRITE ); | |
__isb( portSY_FULL_READ_WRITE ); | |
} | |
/*-----------------------------------------------------------*/ | |
void vPortExitCritical( void ) | |
{ | |
uxCriticalNesting--; | |
if( uxCriticalNesting == 0 ) | |
{ | |
portENABLE_INTERRUPTS(); | |
} | |
} | |
/*-----------------------------------------------------------*/ | |
__asm void xPortPendSVHandler( void ) | |
{ | |
extern uxCriticalNesting; | |
extern pxCurrentTCB; | |
extern vTaskSwitchContext; | |
PRESERVE8 | |
mrs r0, psp | |
/* Get the location of the current TCB. */ | |
ldr r3, =pxCurrentTCB | |
ldr r2, [r3] | |
/* Is the task using the FPU context? If so, push high vfp registers. */ | |
tst r14, #0x10 | |
it eq | |
vstmdbeq r0!, {s16-s31} | |
/* Save the core registers. */ | |
stmdb r0!, {r4-r11, r14} | |
/* Save the new top of stack into the first member of the TCB. */ | |
str r0, [r2] | |
stmdb sp!, {r3, r14} | |
mov r0, #configMAX_SYSCALL_INTERRUPT_PRIORITY | |
msr basepri, r0 | |
bl vTaskSwitchContext | |
mov r0, #0 | |
msr basepri, r0 | |
ldmia sp!, {r3, r14} | |
/* The first item in pxCurrentTCB is the task top of stack. */ | |
ldr r1, [r3] | |
ldr r0, [r1] | |
/* Pop the core registers. */ | |
ldmia r0!, {r4-r11, r14} | |
/* Is the task using the FPU context? If so, pop the high vfp registers | |
too. */ | |
tst r14, #0x10 | |
it eq | |
vldmiaeq r0!, {s16-s31} | |
msr psp, r0 | |
bx r14 | |
nop | |
} | |
/*-----------------------------------------------------------*/ | |
void xPortSysTickHandler( void ) | |
{ | |
/* The SysTick runs at the lowest interrupt priority, so when this interrupt | |
executes all interrupts must be unmasked. There is therefore no need to | |
save and then restore the interrupt mask value as its value is already | |
known. */ | |
( void ) portSET_INTERRUPT_MASK_FROM_ISR(); | |
{ | |
/* Increment the RTOS tick. */ | |
if( xTaskIncrementTick() != pdFALSE ) | |
{ | |
/* A context switch is required. Context switching is performed in | |
the PendSV interrupt. Pend the PendSV interrupt. */ | |
portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; | |
} | |
} | |
portCLEAR_INTERRUPT_MASK_FROM_ISR( 0 ); | |
} | |
/*-----------------------------------------------------------*/ | |
#if configUSE_TICKLESS_IDLE == 1 | |
__weak void vPortSuppressTicksAndSleep( portTickType xExpectedIdleTime ) | |
{ | |
unsigned long ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements; | |
portTickType xModifiableIdleTime; | |
/* Make sure the SysTick reload value does not overflow the counter. */ | |
if( xExpectedIdleTime > xMaximumPossibleSuppressedTicks ) | |
{ | |
xExpectedIdleTime = xMaximumPossibleSuppressedTicks; | |
} | |
/* Stop the SysTick momentarily. The time the SysTick is stopped for | |
is accounted for as best it can be, but using the tickless mode will | |
inevitably result in some tiny drift of the time maintained by the | |
kernel with respect to calendar time. */ | |
portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT; | |
/* Calculate the reload value required to wait xExpectedIdleTime | |
tick periods. -1 is used because this code will execute part way | |
through one of the tick periods. */ | |
ulReloadValue = portNVIC_SYSTICK_CURRENT_VALUE_REG + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) ); | |
if( ulReloadValue > ulStoppedTimerCompensation ) | |
{ | |
ulReloadValue -= ulStoppedTimerCompensation; | |
} | |
/* Enter a critical section but don't use the taskENTER_CRITICAL() | |
method as that will mask interrupts that should exit sleep mode. */ | |
__disable_irq(); | |
/* If a context switch is pending or a task is waiting for the scheduler | |
to be unsuspended then abandon the low power entry. */ | |
if( eTaskConfirmSleepModeStatus() == eAbortSleep ) | |
{ | |
/* Restart SysTick. */ | |
portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT; | |
/* Re-enable interrupts - see comments above __disable_irq() call | |
above. */ | |
__enable_irq(); | |
} | |
else | |
{ | |
/* Set the new reload value. */ | |
portNVIC_SYSTICK_LOAD_REG = ulReloadValue; | |
/* Clear the SysTick count flag and set the count value back to | |
zero. */ | |
portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL; | |
/* Restart SysTick. */ | |
portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT; | |
/* Sleep until something happens. configPRE_SLEEP_PROCESSING() can | |
set its parameter to 0 to indicate that its implementation contains | |
its own wait for interrupt or wait for event instruction, and so wfi | |
should not be executed again. However, the original expected idle | |
time variable must remain unmodified, so a copy is taken. */ | |
xModifiableIdleTime = xExpectedIdleTime; | |
configPRE_SLEEP_PROCESSING( xModifiableIdleTime ); | |
if( xModifiableIdleTime > 0 ) | |
{ | |
__dsb( portSY_FULL_READ_WRITE ); | |
__wfi(); | |
__isb( portSY_FULL_READ_WRITE ); | |
} | |
configPOST_SLEEP_PROCESSING( xExpectedIdleTime ); | |
/* Stop SysTick. Again, the time the SysTick is stopped for is | |
accounted for as best it can be, but using the tickless mode will | |
inevitably result in some tiny drift of the time maintained by the | |
kernel with respect to calendar time. */ | |
portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT; | |
/* Re-enable interrupts - see comments above __disable_irq() call | |
above. */ | |
__enable_irq(); | |
if( ( portNVIC_SYSTICK_CTRL_REG & portNVIC_SYSTICK_COUNT_FLAG_BIT ) != 0 ) | |
{ | |
/* The tick interrupt has already executed, and the SysTick | |
count reloaded with ulReloadValue. Reset the | |
portNVIC_SYSTICK_LOAD_REG with whatever remains of this tick | |
period. */ | |
portNVIC_SYSTICK_LOAD_REG = ( ulTimerCountsForOneTick - 1UL ) - ( ulReloadValue - portNVIC_SYSTICK_CURRENT_VALUE_REG ); | |
/* The tick interrupt handler will already have pended the tick | |
processing in the kernel. As the pending tick will be | |
processed as soon as this function exits, the tick value | |
maintained by the tick is stepped forward by one less than the | |
time spent waiting. */ | |
ulCompleteTickPeriods = xExpectedIdleTime - 1UL; | |
} | |
else | |
{ | |
/* Something other than the tick interrupt ended the sleep. | |
Work out how long the sleep lasted rounded to complete tick | |
periods (not the ulReload value which accounted for part | |
ticks). */ | |
ulCompletedSysTickDecrements = ( xExpectedIdleTime * ulTimerCountsForOneTick ) - portNVIC_SYSTICK_CURRENT_VALUE_REG; | |
/* How many complete tick periods passed while the processor | |
was waiting? */ | |
ulCompleteTickPeriods = ulCompletedSysTickDecrements / ulTimerCountsForOneTick; | |
/* The reload value is set to whatever fraction of a single tick | |
period remains. */ | |
portNVIC_SYSTICK_LOAD_REG = ( ( ulCompleteTickPeriods + 1 ) * ulTimerCountsForOneTick ) - ulCompletedSysTickDecrements; | |
} | |
/* Restart SysTick so it runs from portNVIC_SYSTICK_LOAD_REG | |
again, then set portNVIC_SYSTICK_LOAD_REG back to its standard | |
value. */ | |
portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL; | |
portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT; | |
vTaskStepTick( ulCompleteTickPeriods ); | |
/* The counter must start by the time the reload value is reset. */ | |
configASSERT( portNVIC_SYSTICK_CURRENT_VALUE_REG ); | |
portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL; | |
} | |
} | |
#endif /* #if configUSE_TICKLESS_IDLE */ | |
/*-----------------------------------------------------------*/ | |
/* | |
* Setup the SysTick timer to generate the tick interrupts at the required | |
* frequency. | |
*/ | |
#if configOVERRIDE_DEFAULT_TICK_CONFIGURATION == 0 | |
void vPortSetupTimerInterrupt( void ) | |
{ | |
/* Calculate the constants required to configure the tick interrupt. */ | |
#if configUSE_TICKLESS_IDLE == 1 | |
{ | |
ulTimerCountsForOneTick = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ); | |
xMaximumPossibleSuppressedTicks = portMAX_24_BIT_NUMBER / ulTimerCountsForOneTick; | |
ulStoppedTimerCompensation = portMISSED_COUNTS_FACTOR / ( configCPU_CLOCK_HZ / configSYSTICK_CLOCK_HZ ); | |
} | |
#endif /* configUSE_TICKLESS_IDLE */ | |
/* Configure SysTick to interrupt at the requested rate. */ | |
portNVIC_SYSTICK_LOAD_REG = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;; | |
portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT; | |
} | |
#endif /* configOVERRIDE_DEFAULT_TICK_CONFIGURATION */ | |
/*-----------------------------------------------------------*/ | |
__asm unsigned long ulPortSetInterruptMask( void ) | |
{ | |
PRESERVE8 | |
mrs r0, basepri | |
mov r1, #configMAX_SYSCALL_INTERRUPT_PRIORITY | |
msr basepri, r1 | |
bx r14 | |
} | |
/*-----------------------------------------------------------*/ | |
__asm void vPortClearInterruptMask( unsigned long ulNewMask ) | |
{ | |
PRESERVE8 | |
msr basepri, r0 | |
bx r14 | |
} | |
/*-----------------------------------------------------------*/ | |
__asm unsigned long vPortGetIPSR( void ) | |
{ | |
PRESERVE8 | |
mrs r0, ipsr | |
bx r14 | |
} | |
/*-----------------------------------------------------------*/ | |
#if( configASSERT_DEFINED == 1 ) | |
void vPortValidateInterruptPriority( void ) | |
{ | |
unsigned long ulCurrentInterrupt; | |
unsigned char ucCurrentPriority; | |
/* Obtain the number of the currently executing interrupt. */ | |
ulCurrentInterrupt = vPortGetIPSR(); | |
/* Is the interrupt number a user defined interrupt? */ | |
if( ulCurrentInterrupt >= portFIRST_USER_INTERRUPT_NUMBER ) | |
{ | |
/* Look up the interrupt's priority. */ | |
ucCurrentPriority = pcInterruptPriorityRegisters[ ulCurrentInterrupt ]; | |
/* The following assertion will fail if a service routine (ISR) for | |
an interrupt that has been assigned a priority above | |
configMAX_SYSCALL_INTERRUPT_PRIORITY calls an ISR safe FreeRTOS API | |
function. ISR safe FreeRTOS API functions must *only* be called | |
from interrupts that have been assigned a priority at or below | |
configMAX_SYSCALL_INTERRUPT_PRIORITY. | |
Numerically low interrupt priority numbers represent logically high | |
interrupt priorities, therefore the priority of the interrupt must | |
be set to a value equal to or numerically *higher* than | |
configMAX_SYSCALL_INTERRUPT_PRIORITY. | |
Interrupts that use the FreeRTOS API must not be left at their | |
default priority of zero as that is the highest possible priority, | |
which is guaranteed to be above configMAX_SYSCALL_INTERRUPT_PRIORITY, | |
and therefore also guaranteed to be invalid. | |
FreeRTOS maintains separate thread and ISR API functions to ensure | |
interrupt entry is as fast and simple as possible. | |
The following links provide detailed information: | |
http://www.freertos.org/RTOS-Cortex-M3-M4.html | |
http://www.freertos.org/FAQHelp.html */ | |
configASSERT( ucCurrentPriority >= ucMaxSysCallPriority ); | |
} | |
/* Priority grouping: The interrupt controller (NVIC) allows the bits | |
that define each interrupt's priority to be split between bits that | |
define the interrupt's pre-emption priority bits and bits that define | |
the interrupt's sub-priority. For simplicity all bits must be defined | |
to be pre-emption priority bits. The following assertion will fail if | |
this is not the case (if some bits represent a sub-priority). | |
If CMSIS libraries are being used then the correct setting can be | |
achieved by calling NVIC_SetPriorityGrouping( 0 ); before starting the | |
scheduler. */ | |
configASSERT( ( portAIRCR_REG & portPRIORITY_GROUP_MASK ) == 0 ); | |
} | |
#endif /* configASSERT_DEFINED */ | |