/* | |
FreeRTOS.org V5.1.0 - Copyright (C) 2003-2008 Richard Barry. | |
This file is part of the FreeRTOS.org distribution. | |
FreeRTOS.org is free software; you can redistribute it and/or modify | |
it under the terms of the GNU General Public License as published by | |
the Free Software Foundation; either version 2 of the License, or | |
(at your option) any later version. | |
FreeRTOS.org is distributed in the hope that it will be useful, | |
but WITHOUT ANY WARRANTY; without even the implied warranty of | |
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
GNU General Public License for more details. | |
You should have received a copy of the GNU General Public License | |
along with FreeRTOS.org; if not, write to the Free Software | |
Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
A special exception to the GPL can be applied should you wish to distribute | |
a combined work that includes FreeRTOS.org, without being obliged to provide | |
the source code for any proprietary components. See the licensing section | |
of http://www.FreeRTOS.org for full details of how and when the exception | |
can be applied. | |
*************************************************************************** | |
*************************************************************************** | |
* * | |
* SAVE TIME AND MONEY! We can port FreeRTOS.org to your own hardware, * | |
* and even write all or part of your application on your behalf. * | |
* See http://www.OpenRTOS.com for details of the services we provide to * | |
* expedite your project. * | |
* * | |
*************************************************************************** | |
*************************************************************************** | |
Please ensure to read the configuration and relevant port sections of the | |
online documentation. | |
http://www.FreeRTOS.org - Documentation, latest information, license and | |
contact details. | |
http://www.SafeRTOS.com - A version that is certified for use in safety | |
critical systems. | |
http://www.OpenRTOS.com - Commercial support, development, porting, | |
licensing and training services. | |
*/ | |
/* BASIC INTERRUPT DRIVEN SERIAL PORT DRIVER. | |
* | |
* This file only supports UART 1 | |
*/ | |
/* Standard includes. */ | |
#include <stdlib.h> | |
/* Scheduler includes. */ | |
#include "FreeRTOS.h" | |
#include "queue.h" | |
#include "task.h" | |
/* Demo application includes. */ | |
#include "serial.h" | |
/* Constants required to setup the hardware. */ | |
#define serTX_AND_RX ( ( unsigned portCHAR ) 0x03 ) | |
/* Misc. constants. */ | |
#define serNO_BLOCK ( ( portTickType ) 0 ) | |
/* Enable the UART Tx interrupt. */ | |
#define vInterruptOn() IFG2 |= UTXIFG1 | |
/* The queue used to hold received characters. */ | |
static xQueueHandle xRxedChars; | |
/* The queue used to hold characters waiting transmission. */ | |
static xQueueHandle xCharsForTx; | |
static volatile portSHORT sTHREEmpty; | |
/*-----------------------------------------------------------*/ | |
xComPortHandle xSerialPortInitMinimal( unsigned portLONG ulWantedBaud, unsigned portBASE_TYPE uxQueueLength ) | |
{ | |
unsigned portLONG ulBaudRateCount; | |
/* Initialise the hardware. */ | |
/* Generate the baud rate constants for the wanted baud rate. */ | |
ulBaudRateCount = configCPU_CLOCK_HZ / ulWantedBaud; | |
portENTER_CRITICAL(); | |
{ | |
/* Create the queues used by the com test task. */ | |
xRxedChars = xQueueCreate( uxQueueLength, ( unsigned portBASE_TYPE ) sizeof( signed portCHAR ) ); | |
xCharsForTx = xQueueCreate( uxQueueLength, ( unsigned portBASE_TYPE ) sizeof( signed portCHAR ) ); | |
/* Reset UART. */ | |
UCTL1 |= SWRST; | |
/* Set pin function. */ | |
P4SEL |= serTX_AND_RX; | |
/* All other bits remain at zero for n, 8, 1 interrupt driven operation. | |
LOOPBACK MODE!*/ | |
U1CTL |= CHAR + LISTEN; | |
U1TCTL |= SSEL1; | |
/* Setup baud rate low byte. */ | |
U1BR0 = ( unsigned portCHAR ) ( ulBaudRateCount & ( unsigned portLONG ) 0xff ); | |
/* Setup baud rate high byte. */ | |
ulBaudRateCount >>= 8UL; | |
U1BR1 = ( unsigned portCHAR ) ( ulBaudRateCount & ( unsigned portLONG ) 0xff ); | |
/* Enable ports. */ | |
ME2 |= UTXE1 + URXE1; | |
/* Set. */ | |
UCTL1 &= ~SWRST; | |
/* Nothing in the buffer yet. */ | |
sTHREEmpty = pdTRUE; | |
/* Enable interrupts. */ | |
IE2 |= URXIE1 + UTXIE1; | |
} | |
portEXIT_CRITICAL(); | |
/* Unlike other ports, this serial code does not allow for more than one | |
com port. We therefore don't return a pointer to a port structure and can | |
instead just return NULL. */ | |
return NULL; | |
} | |
/*-----------------------------------------------------------*/ | |
signed portBASE_TYPE xSerialGetChar( xComPortHandle pxPort, signed portCHAR *pcRxedChar, portTickType xBlockTime ) | |
{ | |
/* Get the next character from the buffer. Return false if no characters | |
are available, or arrive before xBlockTime expires. */ | |
if( xQueueReceive( xRxedChars, pcRxedChar, xBlockTime ) ) | |
{ | |
return pdTRUE; | |
} | |
else | |
{ | |
return pdFALSE; | |
} | |
} | |
/*-----------------------------------------------------------*/ | |
signed portBASE_TYPE xSerialPutChar( xComPortHandle pxPort, signed portCHAR cOutChar, portTickType xBlockTime ) | |
{ | |
signed portBASE_TYPE xReturn; | |
/* Transmit a character. */ | |
portENTER_CRITICAL(); | |
{ | |
if( sTHREEmpty == pdTRUE ) | |
{ | |
/* If sTHREEmpty is true then the UART Tx ISR has indicated that | |
there are no characters queued to be transmitted - so we can | |
write the character directly to the shift Tx register. */ | |
sTHREEmpty = pdFALSE; | |
U1TXBUF = cOutChar; | |
xReturn = pdPASS; | |
} | |
else | |
{ | |
/* sTHREEmpty is false, so there are still characters waiting to be | |
transmitted. We have to queue this character so it gets | |
transmitted in turn. */ | |
/* Return false if after the block time there is no room on the Tx | |
queue. It is ok to block inside a critical section as each task | |
maintains it's own critical section status. */ | |
xReturn = xQueueSend( xCharsForTx, &cOutChar, xBlockTime ); | |
/* Depending on queue sizing and task prioritisation: While we | |
were blocked waiting to post on the queue interrupts were not | |
disabled. It is possible that the serial ISR has emptied the | |
Tx queue, in which case we need to start the Tx off again | |
writing directly to the Tx register. */ | |
if( ( sTHREEmpty == pdTRUE ) && ( xReturn == pdPASS ) ) | |
{ | |
/* Get back the character we just posted. */ | |
xQueueReceive( xCharsForTx, &cOutChar, serNO_BLOCK ); | |
sTHREEmpty = pdFALSE; | |
U1TXBUF = cOutChar; | |
} | |
} | |
} | |
portEXIT_CRITICAL(); | |
return pdPASS; | |
} | |
/*-----------------------------------------------------------*/ | |
#if configINTERRUPT_EXAMPLE_METHOD == 1 | |
/* | |
* UART RX interrupt service routine. | |
*/ | |
void vRxISR( void ) __interrupt[ UART1RX_VECTOR ] | |
{ | |
signed portCHAR cChar; | |
portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE; | |
/* Get the character from the UART and post it on the queue of Rxed | |
characters. */ | |
cChar = U1RXBUF; | |
xQueueSendFromISR( xRxedChars, &cChar, &xHigherPriorityTaskWoken ); | |
if( xHigherPriorityTaskWoken ) | |
{ | |
/*If the post causes a task to wake force a context switch | |
as the woken task may have a higher priority than the task we have | |
interrupted. */ | |
taskYIELD(); | |
} | |
/* Make sure any low power mode bits are clear before leaving the ISR. */ | |
__bic_SR_register_on_exit( SCG1 + SCG0 + OSCOFF + CPUOFF ); | |
} | |
/*-----------------------------------------------------------*/ | |
/* | |
* UART Tx interrupt service routine. | |
*/ | |
void vTxISR( void ) __interrupt[ UART1TX_VECTOR ] | |
{ | |
signed portCHAR cChar; | |
portBASE_TYPE xTaskWoken = pdFALSE; | |
/* The previous character has been transmitted. See if there are any | |
further characters waiting transmission. */ | |
if( xQueueReceiveFromISR( xCharsForTx, &cChar, &xTaskWoken ) == pdTRUE ) | |
{ | |
/* There was another character queued - transmit it now. */ | |
U1TXBUF = cChar; | |
} | |
else | |
{ | |
/* There were no other characters to transmit. */ | |
sTHREEmpty = pdTRUE; | |
} | |
/* Make sure any low power mode bits are clear before leaving the ISR. */ | |
__bic_SR_register_on_exit( SCG1 + SCG0 + OSCOFF + CPUOFF ); | |
} | |
/*-----------------------------------------------------------*/ | |
#elif configINTERRUPT_EXAMPLE_METHOD == 2 | |
/* This is a standard C function as an assembly file wrapper is used as an | |
interrupt entry point. */ | |
void vRxISR( void ) | |
{ | |
signed portCHAR cChar; | |
portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE; | |
/* Get the character from the UART and post it on the queue of Rxed | |
characters. */ | |
cChar = U1RXBUF; | |
xQueueSendFromISR( xRxedChars, &cChar, &xHigherPriorityTaskWoken ); | |
/*If the post causes a task to wake force a context switch | |
as the woken task may have a higher priority than the task we have | |
interrupted. */ | |
portYIELD_FROM_ISR( xHigherPriorityTaskWoken ); | |
} | |
/*-----------------------------------------------------------*/ | |
/* This is a standard C function as an assembly file wrapper is used as an | |
interrupt entry point. */ | |
void vTxISR( void ) | |
{ | |
signed portCHAR cChar; | |
portBASE_TYPE xTaskWoken = pdFALSE; | |
/* The previous character has been transmitted. See if there are any | |
further characters waiting transmission. */ | |
if( xQueueReceiveFromISR( xCharsForTx, &cChar, &xTaskWoken ) == pdTRUE ) | |
{ | |
/* There was another character queued - transmit it now. */ | |
U1TXBUF = cChar; | |
} | |
else | |
{ | |
/* There were no other characters to transmit. */ | |
sTHREEmpty = pdTRUE; | |
} | |
} | |
#endif /* configINTERRUPT_EXAMPLE_METHOD */ | |
/*-----------------------------------------------------------*/ |