;/***************************************************************************** | |
; * @file: startup_MPS_CM4.s | |
; * @purpose: CMSIS Cortex-M4 Core Device Startup File | |
; * for the ARM 'Microcontroller Prototyping System' | |
; * @version: V1.00 | |
; * @date: 1. Jun. 2010 | |
; *------- <<< Use Configuration Wizard in Context Menu >>> ------------------ | |
; * | |
; * Copyright (C) 2008-2010 ARM Limited. All rights reserved. | |
; * ARM Limited (ARM) is supplying this software for use with Cortex-M4 | |
; * processor based microcontrollers. This file can be freely distributed | |
; * within development tools that are supporting such ARM based processors. | |
; * | |
; * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED | |
; * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF | |
; * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. | |
; * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR | |
; * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER. | |
; * | |
; ****************************************************************************/ | |
; <h> Stack Configuration | |
; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> | |
; </h> | |
Stack_Size EQU 0x00000800 | |
AREA STACK, NOINIT, READWRITE, ALIGN=3 | |
Stack_Mem SPACE Stack_Size | |
__initial_sp | |
; <h> Heap Configuration | |
; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> | |
; </h> | |
Heap_Size EQU 0x00000000 | |
AREA HEAP, NOINIT, READWRITE, ALIGN=3 | |
__heap_base | |
Heap_Mem SPACE Heap_Size | |
__heap_limit | |
PRESERVE8 | |
THUMB | |
; Vector Table Mapped to Address 0 at Reset | |
AREA RESET, DATA, READONLY | |
EXPORT __Vectors | |
__Vectors DCD __initial_sp ; Top of Stack | |
DCD Reset_Handler ; Reset Handler | |
DCD NMI_Handler ; NMI Handler | |
DCD HardFault_Handler ; Hard Fault Handler | |
DCD MemManage_Handler ; MPU Fault Handler | |
DCD BusFault_Handler ; Bus Fault Handler | |
DCD UsageFault_Handler ; Usage Fault Handler | |
DCD 0 ; Reserved | |
DCD 0 ; Reserved | |
DCD 0 ; Reserved | |
DCD 0 ; Reserved | |
DCD SVC_Handler ; SVCall Handler | |
DCD DebugMon_Handler ; Debug Monitor Handler | |
DCD 0 ; Reserved | |
DCD PendSV_Handler ; PendSV Handler | |
DCD SysTick_Handler ; SysTick Handler | |
AREA |.text|, CODE, READONLY | |
; AREA RESET, CODE, READONLY | |
; Reset Handler | |
Reset_Handler PROC | |
EXPORT Reset_Handler [WEAK] | |
IMPORT __main | |
; Remap vector table | |
LDR R0, =__Vectors | |
LDR R1, =0xE000ED08 | |
STR R0, [r1] | |
NOP | |
IF {CPU} = "Cortex-M4.fp" | |
LDR R0, =0xE000ED88 ; Enable CP10,CP11 | |
LDR R1,[R0] | |
ORR R1,R1,#(0xF << 20) | |
STR R1,[R0] | |
ENDIF | |
LDR R0, =__main | |
BX R0 | |
ENDP | |
; Dummy Exception Handlers (infinite loops which can be modified) | |
NMI_Handler PROC | |
EXPORT NMI_Handler [WEAK] | |
B . | |
ENDP | |
HardFault_Handler\ | |
PROC | |
EXPORT HardFault_Handler [WEAK] | |
B . | |
ENDP | |
MemManage_Handler\ | |
PROC | |
EXPORT MemManage_Handler [WEAK] | |
B . | |
ENDP | |
BusFault_Handler\ | |
PROC | |
EXPORT BusFault_Handler [WEAK] | |
B . | |
ENDP | |
UsageFault_Handler\ | |
PROC | |
EXPORT UsageFault_Handler [WEAK] | |
B . | |
ENDP | |
SVC_Handler PROC | |
EXPORT SVC_Handler [WEAK] | |
B . | |
ENDP | |
DebugMon_Handler\ | |
PROC | |
EXPORT DebugMon_Handler [WEAK] | |
B . | |
ENDP | |
PendSV_Handler PROC | |
EXPORT PendSV_Handler [WEAK] | |
B . | |
ENDP | |
SysTick_Handler PROC | |
EXPORT SysTick_Handler [WEAK] | |
B . | |
ENDP | |
ALIGN | |
; User Initial Stack & Heap | |
IF :DEF:__MICROLIB | |
EXPORT __initial_sp | |
EXPORT __heap_base | |
EXPORT __heap_limit | |
ELSE | |
IMPORT __use_two_region_memory | |
EXPORT __user_initial_stackheap | |
__user_initial_stackheap | |
LDR R0, = Heap_Mem | |
LDR R1, =(Stack_Mem + Stack_Size) | |
LDR R2, = (Heap_Mem + Heap_Size) | |
LDR R3, = Stack_Mem | |
BX LR | |
ALIGN | |
ENDIF | |
END |