FreeRTOS/Source/portable/GCC/ARM7_AT91SAM7S/portmacro.h - third_party/github/FreeRTOS/FreeRTOS-Kernel - Git at Google

 /*
     FreeRTOS V7.4.1 - Copyright (C) 2013 Real Time Engineers Ltd.

     FEATURES AND PORTS ARE ADDED TO FREERTOS ALL THE TIME.  PLEASE VISIT
     http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.

     ***************************************************************************
      *                                                                       *
      *    FreeRTOS tutorial books are available in pdf and paperback.        *
      *    Complete, revised, and edited pdf reference manuals are also       *
      *    available.                                                         *
      *                                                                       *
      *    Purchasing FreeRTOS documentation will not only help you, by       *
      *    ensuring you get running as quickly as possible and with an        *
      *    in-depth knowledge of how to use FreeRTOS, it will also help       *
      *    the FreeRTOS project to continue with its mission of providing     *
      *    professional grade, cross platform, de facto standard solutions    *
      *    for microcontrollers - completely free of charge!                  *
      *                                                                       *
      *    >>> See http://www.FreeRTOS.org/Documentation for details. <<<     *
      *                                                                       *
      *    Thank you for using FreeRTOS, and thank you for your support!      *
      *                                                                       *
     ***************************************************************************


     This file is part of the FreeRTOS distribution.

     FreeRTOS is free software; you can redistribute it and/or modify it under
     the terms of the GNU General Public License (version 2) as published by the
     Free Software Foundation AND MODIFIED BY the FreeRTOS exception.

     >>>>>>NOTE<<<<<< The modification to the GPL is included to allow you to
     distribute a combined work that includes FreeRTOS without being obliged to
     provide the source code for proprietary components outside of the FreeRTOS
     kernel.

     FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
     WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
     FOR A PARTICULAR PURPOSE.  See the GNU General Public License for more
     details. You should have received a copy of the GNU General Public License
     and the FreeRTOS license exception along with FreeRTOS; if not it can be
     viewed here: http://www.freertos.org/a00114.html and also obtained by
     writing to Real Time Engineers Ltd., contact details for whom are available
     on the FreeRTOS WEB site.

     1 tab == 4 spaces!

     ***************************************************************************
      *                                                                       *
      *    Having a problem?  Start by reading the FAQ "My application does   *
      *    not run, what could be wrong?"                                     *
      *                                                                       *
      *    http://www.FreeRTOS.org/FAQHelp.html                               *
      *                                                                       *
     ***************************************************************************


     http://www.FreeRTOS.org - Documentation, books, training, latest versions,
     license and Real Time Engineers Ltd. contact details.

     http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
     including FreeRTOS+Trace - an indispensable productivity tool, and our new
     fully thread aware and reentrant UDP/IP stack.

     http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High
     Integrity Systems, who sell the code with commercial support,
     indemnification and middleware, under the OpenRTOS brand.

     http://www.SafeRTOS.com - High Integrity Systems also provide a safety
     engineered and independently SIL3 certified version for use in safety and
     mission critical applications that require provable dependability.
 */

 /*
 	Changes from V3.2.3

 	+ Modified portENTER_SWITCHING_ISR() to allow use with GCC V4.0.1.

 	Changes from V3.2.4

 	+ Removed the use of the %0 parameter within the assembler macros and
 	  replaced them with hard coded registers.  This will ensure the
 	  assembler does not select the link register as the temp register as
 	  was occasionally happening previously.

 	+ The assembler statements are now included in a single asm block rather
 	  than each line having its own asm block.

 	Changes from V4.5.0

 	+ Removed the portENTER_SWITCHING_ISR() and portEXIT_SWITCHING_ISR() macros
 	  and replaced them with portYIELD_FROM_ISR() macro.  Application code
 	  should now make use of the portSAVE_CONTEXT() and portRESTORE_CONTEXT()
 	  macros as per the V4.5.1 demo code.
 */

 #ifndef PORTMACRO_H
 #define PORTMACRO_H

 #ifdef __cplusplus
 extern "C" {
 #endif

 /*-----------------------------------------------------------
  * Port specific definitions.
  *
  * The settings in this file configure FreeRTOS correctly for the
  * given hardware and compiler.
  *
  * These settings should not be altered.
  *-----------------------------------------------------------
  */

 /* Type definitions. */
 #define portCHAR		char
 #define portFLOAT		float
 #define portDOUBLE		double
 #define portLONG		long
 #define portSHORT		short
 #define portSTACK_TYPE	unsigned portLONG
 #define portBASE_TYPE	portLONG

 #if( configUSE_16_BIT_TICKS == 1 )
 	typedef unsigned portSHORT portTickType;
 	#define portMAX_DELAY ( portTickType ) 0xffff
 #else
 	typedef unsigned portLONG portTickType;
 	#define portMAX_DELAY ( portTickType ) 0xffffffff
 #endif
 /*-----------------------------------------------------------*/

 /* Architecture specifics. */
 #define portSTACK_GROWTH			( -1 )
 #define portTICK_RATE_MS			( ( portTickType ) 1000 / configTICK_RATE_HZ )
 #define portBYTE_ALIGNMENT			8
 #define portNOP()					asm volatile ( "NOP" );
 /*-----------------------------------------------------------*/


 /* Scheduler utilities. */

 /*
  * portRESTORE_CONTEXT, portRESTORE_CONTEXT, portENTER_SWITCHING_ISR
  * and portEXIT_SWITCHING_ISR can only be called from ARM mode, but
  * are included here for efficiency.  An attempt to call one from
  * THUMB mode code will result in a compile time error.
  */

 #define portRESTORE_CONTEXT()											\
 {																		\
 extern volatile void * volatile pxCurrentTCB;							\
 extern volatile unsigned portLONG ulCriticalNesting;					\
 																		\
 	/* Set the LR to the task stack. */									\
 	asm volatile (														\
 	"LDR		R0, =pxCurrentTCB								\n\t"	\
 	"LDR		R0, [R0]										\n\t"	\
 	"LDR		LR, [R0]										\n\t"	\
 																		\
 	/* The critical nesting depth is the first item on the stack. */	\
 	/* Load it into the ulCriticalNesting variable. */					\
 	"LDR		R0, =ulCriticalNesting							\n\t"	\
 	"LDMFD	LR!, {R1}											\n\t"	\
 	"STR		R1, [R0]										\n\t"	\
 																		\
 	/* Get the SPSR from the stack. */									\
 	"LDMFD	LR!, {R0}											\n\t"	\
 	"MSR		SPSR, R0										\n\t"	\
 																		\
 	/* Restore all system mode registers for the task. */				\
 	"LDMFD	LR, {R0-R14}^										\n\t"	\
 	"NOP														\n\t"	\
 																		\
 	/* Restore the return address. */									\
 	"LDR		LR, [LR, #+60]									\n\t"	\
 																		\
 	/* And return - correcting the offset in the LR to obtain the */	\
 	/* correct address. */												\
 	"SUBS	PC, LR, #4											\n\t"	\
 	);																	\
 	( void ) ulCriticalNesting;											\
 	( void ) pxCurrentTCB;												\
 }
 /*-----------------------------------------------------------*/

 #define portSAVE_CONTEXT()												\
 {																		\
 extern volatile void * volatile pxCurrentTCB;							\
 extern volatile unsigned portLONG ulCriticalNesting;					\
 																		\
 	/* Push R0 as we are going to use the register. */					\
 	asm volatile (														\
 	"STMDB	SP!, {R0}											\n\t"	\
 																		\
 	/* Set R0 to point to the task stack pointer. */					\
 	"STMDB	SP,{SP}^											\n\t"	\
 	"NOP														\n\t"	\
 	"SUB	SP, SP, #4											\n\t"	\
 	"LDMIA	SP!,{R0}											\n\t"	\
 																		\
 	/* Push the return address onto the stack. */						\
 	"STMDB	R0!, {LR}											\n\t"	\
 																		\
 	/* Now we have saved LR we can use it instead of R0. */				\
 	"MOV	LR, R0												\n\t"	\
 																		\
 	/* Pop R0 so we can save it onto the system mode stack. */			\
 	"LDMIA	SP!, {R0}											\n\t"	\
 																		\
 	/* Push all the system mode registers onto the task stack. */		\
 	"STMDB	LR,{R0-LR}^											\n\t"	\
 	"NOP														\n\t"	\
 	"SUB	LR, LR, #60											\n\t"	\
 																		\
 	/* Push the SPSR onto the task stack. */							\
 	"MRS	R0, SPSR											\n\t"	\
 	"STMDB	LR!, {R0}											\n\t"	\
 																		\
 	"LDR	R0, =ulCriticalNesting								\n\t"	\
 	"LDR	R0, [R0]											\n\t"	\
 	"STMDB	LR!, {R0}											\n\t"	\
 																		\
 	/* Store the new top of stack for the task. */						\
 	"LDR	R0, =pxCurrentTCB									\n\t"	\
 	"LDR	R0, [R0]											\n\t"	\
 	"STR	LR, [R0]											\n\t"	\
 	);																	\
 	( void ) ulCriticalNesting;											\
 	( void ) pxCurrentTCB;												\
 }


 #define portYIELD_FROM_ISR()		vTaskSwitchContext()
 #define portYIELD()					asm volatile ( "SWI 0" )
 /*-----------------------------------------------------------*/


 /* Critical section management. */

 /*
  * The interrupt management utilities can only be called from ARM mode.  When
  * THUMB_INTERWORK is defined the utilities are defined as functions in
  * portISR.c to ensure a switch to ARM mode.  When THUMB_INTERWORK is not
  * defined then the utilities are defined as macros here - as per other ports.
  */

 #ifdef THUMB_INTERWORK

 	extern void vPortDisableInterruptsFromThumb( void ) __attribute__ ((naked));
 	extern void vPortEnableInterruptsFromThumb( void ) __attribute__ ((naked));

 	#define portDISABLE_INTERRUPTS()	vPortDisableInterruptsFromThumb()
 	#define portENABLE_INTERRUPTS()		vPortEnableInterruptsFromThumb()

 #else

 	#define portDISABLE_INTERRUPTS()											\
 		asm volatile (															\
 			"STMDB	SP!, {R0}		\n\t"	/* Push R0.						*/	\
 			"MRS	R0, CPSR		\n\t"	/* Get CPSR.					*/	\
 			"ORR	R0, R0, #0xC0	\n\t"	/* Disable IRQ, FIQ.			*/	\
 			"MSR	CPSR, R0		\n\t"	/* Write back modified value.	*/	\
 			"LDMIA	SP!, {R0}			" )	/* Pop R0.						*/

 	#define portENABLE_INTERRUPTS()												\
 		asm volatile (															\
 			"STMDB	SP!, {R0}		\n\t"	/* Push R0.						*/	\
 			"MRS	R0, CPSR		\n\t"	/* Get CPSR.					*/	\
 			"BIC	R0, R0, #0xC0	\n\t"	/* Enable IRQ, FIQ.				*/	\
 			"MSR	CPSR, R0		\n\t"	/* Write back modified value.	*/	\
 			"LDMIA	SP!, {R0}			" )	/* Pop R0.						*/

 #endif /* THUMB_INTERWORK */

 extern void vPortEnterCritical( void );
 extern void vPortExitCritical( void );

 #define portENTER_CRITICAL()		vPortEnterCritical();
 #define portEXIT_CRITICAL()			vPortExitCritical();
 /*-----------------------------------------------------------*/

 /* Task function macros as described on the FreeRTOS.org WEB site. */
 #define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void *pvParameters )
 #define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void *pvParameters )

 #ifdef __cplusplus
 }
 #endif

 #endif /* PORTMACRO_H */
	/*
	FreeRTOS V7.4.1 - Copyright (C) 2013 Real Time Engineers Ltd.

	FEATURES AND PORTS ARE ADDED TO FREERTOS ALL THE TIME. PLEASE VISIT
	http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.

	***************************************************************************
	* *
	* FreeRTOS tutorial books are available in pdf and paperback. *
	* Complete, revised, and edited pdf reference manuals are also *
	* available. *
	* *
	* Purchasing FreeRTOS documentation will not only help you, by *
	* ensuring you get running as quickly as possible and with an *
	* in-depth knowledge of how to use FreeRTOS, it will also help *
	* the FreeRTOS project to continue with its mission of providing *
	* professional grade, cross platform, de facto standard solutions *
	* for microcontrollers - completely free of charge! *
	* *
	* >>> See http://www.FreeRTOS.org/Documentation for details. <<< *
	* *
	* Thank you for using FreeRTOS, and thank you for your support! *
	* *
	***************************************************************************


	This file is part of the FreeRTOS distribution.

	FreeRTOS is free software; you can redistribute it and/or modify it under
	the terms of the GNU General Public License (version 2) as published by the
	Free Software Foundation AND MODIFIED BY the FreeRTOS exception.

	>>>>>>NOTE<<<<<< The modification to the GPL is included to allow you to
	distribute a combined work that includes FreeRTOS without being obliged to
	provide the source code for proprietary components outside of the FreeRTOS
	kernel.

	FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
	WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
	FOR A PARTICULAR PURPOSE. See the GNU General Public License for more
	details. You should have received a copy of the GNU General Public License
	and the FreeRTOS license exception along with FreeRTOS; if not it can be
	viewed here: http://www.freertos.org/a00114.html and also obtained by
	writing to Real Time Engineers Ltd., contact details for whom are available
	on the FreeRTOS WEB site.

	1 tab == 4 spaces!

	***************************************************************************
	* *
	* Having a problem? Start by reading the FAQ "My application does *
	* not run, what could be wrong?" *
	* *
	* http://www.FreeRTOS.org/FAQHelp.html *
	* *
	***************************************************************************


	http://www.FreeRTOS.org - Documentation, books, training, latest versions,
	license and Real Time Engineers Ltd. contact details.

	http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
	including FreeRTOS+Trace - an indispensable productivity tool, and our new
	fully thread aware and reentrant UDP/IP stack.

	http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High
	Integrity Systems, who sell the code with commercial support,
	indemnification and middleware, under the OpenRTOS brand.

	http://www.SafeRTOS.com - High Integrity Systems also provide a safety
	engineered and independently SIL3 certified version for use in safety and
	mission critical applications that require provable dependability.
	*/

	/*
	Changes from V3.2.3

	+ Modified portENTER_SWITCHING_ISR() to allow use with GCC V4.0.1.

	Changes from V3.2.4

	+ Removed the use of the %0 parameter within the assembler macros and
	replaced them with hard coded registers. This will ensure the
	assembler does not select the link register as the temp register as
	was occasionally happening previously.

	+ The assembler statements are now included in a single asm block rather
	than each line having its own asm block.

	Changes from V4.5.0

	+ Removed the portENTER_SWITCHING_ISR() and portEXIT_SWITCHING_ISR() macros
	and replaced them with portYIELD_FROM_ISR() macro. Application code
	should now make use of the portSAVE_CONTEXT() and portRESTORE_CONTEXT()
	macros as per the V4.5.1 demo code.
	*/

	#ifndef PORTMACRO_H
	#define PORTMACRO_H

	#ifdef __cplusplus
	extern "C" {
	#endif

	/*-----------------------------------------------------------
	* Port specific definitions.
	*
	* The settings in this file configure FreeRTOS correctly for the
	* given hardware and compiler.
	*
	* These settings should not be altered.
	*-----------------------------------------------------------
	*/

	/* Type definitions. */
	#define portCHAR char
	#define portFLOAT float
	#define portDOUBLE double
	#define portLONG long
	#define portSHORT short
	#define portSTACK_TYPE unsigned portLONG
	#define portBASE_TYPE portLONG

	#if( configUSE_16_BIT_TICKS == 1 )
	typedef unsigned portSHORT portTickType;
	#define portMAX_DELAY ( portTickType ) 0xffff
	#else
	typedef unsigned portLONG portTickType;
	#define portMAX_DELAY ( portTickType ) 0xffffffff
	#endif
	/-----------------------------------------------------------/

	/* Architecture specifics. */
	#define portSTACK_GROWTH ( -1 )
	#define portTICK_RATE_MS ( ( portTickType ) 1000 / configTICK_RATE_HZ )
	#define portBYTE_ALIGNMENT 8
	#define portNOP() asm volatile ( "NOP" );
	/-----------------------------------------------------------/


	/* Scheduler utilities. */

	/*
	* portRESTORE_CONTEXT, portRESTORE_CONTEXT, portENTER_SWITCHING_ISR
	* and portEXIT_SWITCHING_ISR can only be called from ARM mode, but
	* are included here for efficiency. An attempt to call one from
	* THUMB mode code will result in a compile time error.
	*/

	#define portRESTORE_CONTEXT() \
	{ \
	extern volatile void * volatile pxCurrentTCB; \
	extern volatile unsigned portLONG ulCriticalNesting; \
	\
	/* Set the LR to the task stack. */ \
	asm volatile ( \
	"LDR R0, =pxCurrentTCB \n\t" \
	"LDR R0, [R0] \n\t" \
	"LDR LR, [R0] \n\t" \
	\
	/* The critical nesting depth is the first item on the stack. */ \
	/* Load it into the ulCriticalNesting variable. */ \
	"LDR R0, =ulCriticalNesting \n\t" \
	"LDMFD LR!, {R1} \n\t" \
	"STR R1, [R0] \n\t" \
	\
	/* Get the SPSR from the stack. */ \
	"LDMFD LR!, {R0} \n\t" \
	"MSR SPSR, R0 \n\t" \
	\
	/* Restore all system mode registers for the task. */ \
	"LDMFD LR, {R0-R14}^ \n\t" \
	"NOP \n\t" \
	\
	/* Restore the return address. */ \
	"LDR LR, [LR, #+60] \n\t" \
	\
	/* And return - correcting the offset in the LR to obtain the */ \
	/* correct address. */ \
	"SUBS PC, LR, #4 \n\t" \
	); \
	( void ) ulCriticalNesting; \
	( void ) pxCurrentTCB; \
	}
	/-----------------------------------------------------------/

	#define portSAVE_CONTEXT() \
	{ \
	extern volatile void * volatile pxCurrentTCB; \
	extern volatile unsigned portLONG ulCriticalNesting; \
	\
	/* Push R0 as we are going to use the register. */ \
	asm volatile ( \
	"STMDB SP!, {R0} \n\t" \
	\
	/* Set R0 to point to the task stack pointer. */ \
	"STMDB SP,{SP}^ \n\t" \
	"NOP \n\t" \
	"SUB SP, SP, #4 \n\t" \
	"LDMIA SP!,{R0} \n\t" \
	\
	/* Push the return address onto the stack. */ \
	"STMDB R0!, {LR} \n\t" \
	\
	/* Now we have saved LR we can use it instead of R0. */ \
	"MOV LR, R0 \n\t" \
	\
	/* Pop R0 so we can save it onto the system mode stack. */ \
	"LDMIA SP!, {R0} \n\t" \
	\
	/* Push all the system mode registers onto the task stack. */ \
	"STMDB LR,{R0-LR}^ \n\t" \
	"NOP \n\t" \
	"SUB LR, LR, #60 \n\t" \
	\
	/* Push the SPSR onto the task stack. */ \
	"MRS R0, SPSR \n\t" \
	"STMDB LR!, {R0} \n\t" \
	\
	"LDR R0, =ulCriticalNesting \n\t" \
	"LDR R0, [R0] \n\t" \
	"STMDB LR!, {R0} \n\t" \
	\
	/* Store the new top of stack for the task. */ \
	"LDR R0, =pxCurrentTCB \n\t" \
	"LDR R0, [R0] \n\t" \
	"STR LR, [R0] \n\t" \
	); \
	( void ) ulCriticalNesting; \
	( void ) pxCurrentTCB; \
	}


	#define portYIELD_FROM_ISR() vTaskSwitchContext()
	#define portYIELD() asm volatile ( "SWI 0" )
	/-----------------------------------------------------------/


	/* Critical section management. */

	/*
	* The interrupt management utilities can only be called from ARM mode. When
	* THUMB_INTERWORK is defined the utilities are defined as functions in
	* portISR.c to ensure a switch to ARM mode. When THUMB_INTERWORK is not
	* defined then the utilities are defined as macros here - as per other ports.
	*/

	#ifdef THUMB_INTERWORK

	extern void vPortDisableInterruptsFromThumb( void ) __attribute__ ((naked));
	extern void vPortEnableInterruptsFromThumb( void ) __attribute__ ((naked));

	#define portDISABLE_INTERRUPTS() vPortDisableInterruptsFromThumb()
	#define portENABLE_INTERRUPTS() vPortEnableInterruptsFromThumb()

	#else

	#define portDISABLE_INTERRUPTS() \
	asm volatile ( \
	"STMDB SP!, {R0} \n\t" /* Push R0. */ \
	"MRS R0, CPSR \n\t" /* Get CPSR. */ \
	"ORR R0, R0, #0xC0 \n\t" /* Disable IRQ, FIQ. */ \
	"MSR CPSR, R0 \n\t" /* Write back modified value. */ \
	"LDMIA SP!, {R0} " ) /* Pop R0. */

	#define portENABLE_INTERRUPTS() \
	asm volatile ( \
	"STMDB SP!, {R0} \n\t" /* Push R0. */ \
	"MRS R0, CPSR \n\t" /* Get CPSR. */ \
	"BIC R0, R0, #0xC0 \n\t" /* Enable IRQ, FIQ. */ \
	"MSR CPSR, R0 \n\t" /* Write back modified value. */ \
	"LDMIA SP!, {R0} " ) /* Pop R0. */

	#endif /* THUMB_INTERWORK */

	extern void vPortEnterCritical( void );
	extern void vPortExitCritical( void );

	#define portENTER_CRITICAL() vPortEnterCritical();
	#define portEXIT_CRITICAL() vPortExitCritical();
	/-----------------------------------------------------------/

	/* Task function macros as described on the FreeRTOS.org WEB site. */
	#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void *pvParameters )
	#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void *pvParameters )

	#ifdef __cplusplus
	}
	#endif

	#endif /* PORTMACRO_H */