Adding SMP coverity example (#1039)
* Adding SMP coverity example
* Add coverity scan flow
* Fix format
* Update README.md
* Code review suggestions
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
---------
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Ubuntu <ubuntu@ip-172-31-34-245.ap-northeast-1.compute.internal>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>
diff --git a/.github/workflows/coverity_scan.yml b/.github/workflows/coverity_scan.yml
index 14f5366..803a29b 100644
--- a/.github/workflows/coverity_scan.yml
+++ b/.github/workflows/coverity_scan.yml
@@ -86,3 +86,42 @@
echo "::endgroup::"
echo -e "${{ env.bashPass }} ${{ env.stepName }} ${{ env.bashEnd }} "
echo "${COV_SCAN_UPLOAD_STATUS}" | grep -q -e 'Build successfully submitted' || echo >&2 "Error submitting build for analysis: ${COV_SCAN_UPLOAD_STATUS}"
+
+ - env:
+ stepName: Coverity Build for SMP FreeRTOS
+ COVERITY_TOKEN: ${{ secrets.COVERITY_SCAN_TOKEN }}
+ COVERITY_EMAIL: ${{ secrets.COVERITY_SCAN_EMAIL }}
+ shell: bash
+ run: |
+ # ${{ env.stepName }}
+ echo -e "::group::${{ env.bashInfo }} ${{ env.stepName }} ${{ env.bashEnd }}"
+
+ export PATH="$PATH:${{env.cov_scan_path}}"
+ cmake -S ./examples/cmake_example/ -B build -DFREERTOS_SMP_EXAMPLE=1
+ cd build
+ cov-build --dir cov-int make -j
+ # Move the report out of the build directory
+ tar czvf ../gcc_freertos_kernel_smp_sample_build.tgz cov-int
+
+ echo "::endgroup::"
+ echo -e "${{ env.bashPass }} ${{ env.stepName }} ${{ env.bashEnd }} "
+
+ - env:
+ stepName: Upload FreeRTOS SMP Coverity Report for Scan
+ COVERITY_TOKEN: ${{ secrets.COVERITY_SCAN_TOKEN }}
+ COVERITY_EMAIL: ${{ secrets.COVERITY_SCAN_EMAIL }}
+ shell: bash
+ run: |
+ # ${{ env.stepName }}
+ echo -e "::group::${{ env.bashInfo }} ${{ env.stepName }} ${{ env.bashEnd }}"
+
+ COV_SCAN_UPLOAD_STATUS=$(curl --form token=${COVERITY_TOKEN} \
+ --form email=${COVERITY_EMAIL} \
+ --form file=@gcc_freertos_kernel_smp_sample_build.tgz \
+ --form version="Mainline" \
+ --form description="FreeRTOS Kernel SMP Commit Scan" \
+ https://scan.coverity.com/builds?project=FreeRTOS-Kernel)
+
+ echo "::endgroup::"
+ echo -e "${{ env.bashPass }} ${{ env.stepName }} ${{ env.bashEnd }} "
+ echo "${COV_SCAN_UPLOAD_STATUS}" | grep -q -e 'Build successfully submitted' || echo >&2 "Error submitting build for analysis: ${COV_SCAN_UPLOAD_STATUS}"
diff --git a/MISRA.md b/MISRA.md
index ee518bc..4355ec6 100644
--- a/MISRA.md
+++ b/MISRA.md
@@ -18,6 +18,14 @@
grep 'MISRA Ref 8.4.1' . -rI
```
+#### Dir 4.7
+MISRA C:2012 Dir 4.7: If a function returns error information, then that error
+information shall be tested.
+
+_Ref 4.7.1_
+ - `taskENTER_CRITICAL_FROM_ISR` returns the interrupt mask and not any error
+ information. Therefore, there is no need test the return value.
+
#### Rule 8.4
MISRA C:2012 Rule 8.4: A compatible declaration shall be visible when an
diff --git a/event_groups.c b/event_groups.c
index 1c0b487..f54a37a 100644
--- a/event_groups.c
+++ b/event_groups.c
@@ -529,6 +529,9 @@
traceENTER_xEventGroupGetBitsFromISR( xEventGroup );
+ /* MISRA Ref 4.7.1 [Return value shall be checked] */
+ /* More details at: https://github.com/FreeRTOS/FreeRTOS-Kernel/blob/main/MISRA.md#dir-47 */
+ /* coverity[misra_c_2012_directive_4_7_violation] */
uxSavedInterruptStatus = taskENTER_CRITICAL_FROM_ISR();
{
uxReturn = pxEventBits->uxEventBits;
diff --git a/examples/coverity/CMakeLists.txt b/examples/coverity/CMakeLists.txt
index 00332b5..3c0f4e4 100644
--- a/examples/coverity/CMakeLists.txt
+++ b/examples/coverity/CMakeLists.txt
@@ -23,6 +23,12 @@
INTERFACE
./)
+if (DEFINED FREERTOS_SMP_EXAMPLE AND FREERTOS_SMP_EXAMPLE STREQUAL "1")
+ message(STATUS "Build FreeRTOS SMP example")
+ # Adding the following configurations to build SMP template port
+ add_compile_options( -DconfigNUMBER_OF_CORES=2 -DconfigUSE_PASSIVE_IDLE_HOOK=0 )
+endif()
+
# Select the heap. Values between 1-5 will pick a heap.
set(FREERTOS_HEAP "3" CACHE STRING "" FORCE)
diff --git a/examples/coverity/README.md b/examples/coverity/README.md
index 6055e71..967f33d 100644
--- a/examples/coverity/README.md
+++ b/examples/coverity/README.md
@@ -34,9 +34,16 @@
cov-configure --force --compiler cc --comptype gcc
~~~
2. Create the build files using CMake in a `build` directory:
+
+Singe core FreeRTOS:
~~~
cmake -B build -S examples/coverity
~~~
+
+SMP FreeRTOS:
+ ~~~
+ cmake -B build -S examples/coverity -DFREERTOS_SMP_EXAMPLE=1
+ ~~~
3. Build the (pseudo) application:
~~~
cd build/
@@ -47,7 +54,7 @@
~~~
cov-analyze --dir ./cov-out \
--coding-standard-config ../examples/coverity/coverity_misra.config \
- --tu-pattern "file('[A-Za-z_]+\.c')"
+ --tu-pattern "file('[A-Za-z_]+\.c') && ( ! file('main.c') ) && ( ! file('port.c') )"
~~~
5. Generate the HTML report:
~~~
diff --git a/queue.c b/queue.c
index b3029c1..dd302c9 100644
--- a/queue.c
+++ b/queue.c
@@ -1190,6 +1190,9 @@
* read, instead return a flag to say whether a context switch is required or
* not (i.e. has a task with a higher priority than us been woken by this
* post). */
+ /* MISRA Ref 4.7.1 [Return value shall be checked] */
+ /* More details at: https://github.com/FreeRTOS/FreeRTOS-Kernel/blob/main/MISRA.md#dir-47 */
+ /* coverity[misra_c_2012_directive_4_7_violation] */
uxSavedInterruptStatus = ( UBaseType_t ) taskENTER_CRITICAL_FROM_ISR();
{
if( ( pxQueue->uxMessagesWaiting < pxQueue->uxLength ) || ( xCopyPosition == queueOVERWRITE ) )
@@ -1365,6 +1368,9 @@
* link: https://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html */
portASSERT_IF_INTERRUPT_PRIORITY_INVALID();
+ /* MISRA Ref 4.7.1 [Return value shall be checked] */
+ /* More details at: https://github.com/FreeRTOS/FreeRTOS-Kernel/blob/main/MISRA.md#dir-47 */
+ /* coverity[misra_c_2012_directive_4_7_violation] */
uxSavedInterruptStatus = ( UBaseType_t ) taskENTER_CRITICAL_FROM_ISR();
{
const UBaseType_t uxMessagesWaiting = pxQueue->uxMessagesWaiting;
@@ -2055,6 +2061,9 @@
* link: https://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html */
portASSERT_IF_INTERRUPT_PRIORITY_INVALID();
+ /* MISRA Ref 4.7.1 [Return value shall be checked] */
+ /* More details at: https://github.com/FreeRTOS/FreeRTOS-Kernel/blob/main/MISRA.md#dir-47 */
+ /* coverity[misra_c_2012_directive_4_7_violation] */
uxSavedInterruptStatus = ( UBaseType_t ) taskENTER_CRITICAL_FROM_ISR();
{
const UBaseType_t uxMessagesWaiting = pxQueue->uxMessagesWaiting;
@@ -2153,6 +2162,9 @@
* link: https://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html */
portASSERT_IF_INTERRUPT_PRIORITY_INVALID();
+ /* MISRA Ref 4.7.1 [Return value shall be checked] */
+ /* More details at: https://github.com/FreeRTOS/FreeRTOS-Kernel/blob/main/MISRA.md#dir-47 */
+ /* coverity[misra_c_2012_directive_4_7_violation] */
uxSavedInterruptStatus = ( UBaseType_t ) taskENTER_CRITICAL_FROM_ISR();
{
/* Cannot block in an ISR, so check there is data available. */
diff --git a/stream_buffer.c b/stream_buffer.c
index 4471b4f..aeca81a 100644
--- a/stream_buffer.c
+++ b/stream_buffer.c
@@ -676,6 +676,9 @@
#endif
/* Can only reset a message buffer if there are no tasks blocked on it. */
+ /* MISRA Ref 4.7.1 [Return value shall be checked] */
+ /* More details at: https://github.com/FreeRTOS/FreeRTOS-Kernel/blob/main/MISRA.md#dir-47 */
+ /* coverity[misra_c_2012_directive_4_7_violation] */
uxSavedInterruptStatus = taskENTER_CRITICAL_FROM_ISR();
{
if( ( pxStreamBuffer->xTaskWaitingToReceive == NULL ) && ( pxStreamBuffer->xTaskWaitingToSend == NULL ) )
@@ -972,6 +975,9 @@
/* Was a task waiting for the data? */
if( prvBytesInBuffer( pxStreamBuffer ) >= pxStreamBuffer->xTriggerLevelBytes )
{
+ /* MISRA Ref 4.7.1 [Return value shall be checked] */
+ /* More details at: https://github.com/FreeRTOS/FreeRTOS-Kernel/blob/main/MISRA.md#dir-47 */
+ /* coverity[misra_c_2012_directive_4_7_violation] */
prvSEND_COMPLETE_FROM_ISR( pxStreamBuffer, pxHigherPriorityTaskWoken );
}
else
@@ -1245,6 +1251,9 @@
/* Was a task waiting for space in the buffer? */
if( xReceivedLength != ( size_t ) 0 )
{
+ /* MISRA Ref 4.7.1 [Return value shall be checked] */
+ /* More details at: https://github.com/FreeRTOS/FreeRTOS-Kernel/blob/main/MISRA.md#dir-47 */
+ /* coverity[misra_c_2012_directive_4_7_violation] */
prvRECEIVE_COMPLETED_FROM_ISR( pxStreamBuffer, pxHigherPriorityTaskWoken );
}
else
@@ -1397,6 +1406,9 @@
configASSERT( pxStreamBuffer );
+ /* MISRA Ref 4.7.1 [Return value shall be checked] */
+ /* More details at: https://github.com/FreeRTOS/FreeRTOS-Kernel/blob/main/MISRA.md#dir-47 */
+ /* coverity[misra_c_2012_directive_4_7_violation] */
uxSavedInterruptStatus = taskENTER_CRITICAL_FROM_ISR();
{
if( ( pxStreamBuffer )->xTaskWaitingToReceive != NULL )
@@ -1433,6 +1445,9 @@
configASSERT( pxStreamBuffer );
+ /* MISRA Ref 4.7.1 [Return value shall be checked] */
+ /* More details at: https://github.com/FreeRTOS/FreeRTOS-Kernel/blob/main/MISRA.md#dir-47 */
+ /* coverity[misra_c_2012_directive_4_7_violation] */
uxSavedInterruptStatus = taskENTER_CRITICAL_FROM_ISR();
{
if( ( pxStreamBuffer )->xTaskWaitingToSend != NULL )
diff --git a/tasks.c b/tasks.c
index 7f808cc..8d2daf7 100644
--- a/tasks.c
+++ b/tasks.c
@@ -2666,6 +2666,9 @@
* https://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html */
portASSERT_IF_INTERRUPT_PRIORITY_INVALID();
+ /* MISRA Ref 4.7.1 [Return value shall be checked] */
+ /* More details at: https://github.com/FreeRTOS/FreeRTOS-Kernel/blob/main/MISRA.md#dir-47 */
+ /* coverity[misra_c_2012_directive_4_7_violation] */
uxSavedInterruptStatus = ( UBaseType_t ) taskENTER_CRITICAL_FROM_ISR();
{
/* If null is passed in here then it is the priority of the calling
@@ -2737,6 +2740,9 @@
* https://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html */
portASSERT_IF_INTERRUPT_PRIORITY_INVALID();
+ /* MISRA Ref 4.7.1 [Return value shall be checked] */
+ /* More details at: https://github.com/FreeRTOS/FreeRTOS-Kernel/blob/main/MISRA.md#dir-47 */
+ /* coverity[misra_c_2012_directive_4_7_violation] */
uxSavedInterruptStatus = ( UBaseType_t ) taskENTER_CRITICAL_FROM_ISR();
{
/* If null is passed in here then it is the base priority of the calling
@@ -3433,6 +3439,9 @@
* https://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html */
portASSERT_IF_INTERRUPT_PRIORITY_INVALID();
+ /* MISRA Ref 4.7.1 [Return value shall be checked] */
+ /* More details at: https://github.com/FreeRTOS/FreeRTOS-Kernel/blob/main/MISRA.md#dir-47 */
+ /* coverity[misra_c_2012_directive_4_7_violation] */
uxSavedInterruptStatus = taskENTER_CRITICAL_FROM_ISR();
{
if( prvTaskIsTaskSuspended( pxTCB ) != pdFALSE )
@@ -4989,6 +4998,9 @@
/* Save the hook function in the TCB. A critical section is required as
* the value can be accessed from an interrupt. */
+ /* MISRA Ref 4.7.1 [Return value shall be checked] */
+ /* More details at: https://github.com/FreeRTOS/FreeRTOS-Kernel/blob/main/MISRA.md#dir-47 */
+ /* coverity[misra_c_2012_directive_4_7_violation] */
uxSavedInterruptStatus = taskENTER_CRITICAL_FROM_ISR();
{
xReturn = pxTCB->pxTaskTag;
@@ -7974,6 +7986,9 @@
pxTCB = xTaskToNotify;
+ /* MISRA Ref 4.7.1 [Return value shall be checked] */
+ /* More details at: https://github.com/FreeRTOS/FreeRTOS-Kernel/blob/main/MISRA.md#dir-47 */
+ /* coverity[misra_c_2012_directive_4_7_violation] */
uxSavedInterruptStatus = ( UBaseType_t ) taskENTER_CRITICAL_FROM_ISR();
{
if( pulPreviousNotificationValue != NULL )
@@ -8133,6 +8148,9 @@
pxTCB = xTaskToNotify;
+ /* MISRA Ref 4.7.1 [Return value shall be checked] */
+ /* More details at: https://github.com/FreeRTOS/FreeRTOS-Kernel/blob/main/MISRA.md#dir-47 */
+ /* coverity[misra_c_2012_directive_4_7_violation] */
uxSavedInterruptStatus = ( UBaseType_t ) taskENTER_CRITICAL_FROM_ISR();
{
ucOriginalNotifyState = pxTCB->ucNotifyState[ uxIndexToNotify ];
