Release v1.2.6
diff --git a/Include/stm32f745xx.h b/Include/stm32f745xx.h
index 15ea6d2..2503993 100644
--- a/Include/stm32f745xx.h
+++ b/Include/stm32f745xx.h
@@ -12900,6 +12900,30 @@
#define SYSCFG_MEMRMP_SWP_FMC_1 (0x2UL << SYSCFG_MEMRMP_SWP_FMC_Pos) /*!< 0x00000800 */
/****************** Bit definition for SYSCFG_PMC register ******************/
+#define SYSCFG_PMC_I2C1_FMP_Pos (0U)
+#define SYSCFG_PMC_I2C1_FMP_Msk (0x1UL << SYSCFG_PMC_I2C1_FMP_Pos) /*!< 0x00000001 */
+#define SYSCFG_PMC_I2C1_FMP SYSCFG_PMC_I2C1_FMP_Msk /*!< I2C1_FMP I2C1 Fast Mode + Enable */
+#define SYSCFG_PMC_I2C2_FMP_Pos (1U)
+#define SYSCFG_PMC_I2C2_FMP_Msk (0x1UL << SYSCFG_PMC_I2C2_FMP_Pos) /*!< 0x00000002 */
+#define SYSCFG_PMC_I2C2_FMP SYSCFG_PMC_I2C2_FMP_Msk /*!< I2C2_FMP I2C2 Fast Mode + Enable */
+#define SYSCFG_PMC_I2C3_FMP_Pos (2U)
+#define SYSCFG_PMC_I2C3_FMP_Msk (0x1UL << SYSCFG_PMC_I2C3_FMP_Pos) /*!< 0x00000004 */
+#define SYSCFG_PMC_I2C3_FMP SYSCFG_PMC_I2C3_FMP_Msk /*!< I2C3_FMP I2C3 Fast Mode + Enable */
+#define SYSCFG_PMC_I2C4_FMP_Pos (3U)
+#define SYSCFG_PMC_I2C4_FMP_Msk (0x1UL << SYSCFG_PMC_I2C4_FMP_Pos) /*!< 0x00000008 */
+#define SYSCFG_PMC_I2C4_FMP SYSCFG_PMC_I2C4_FMP_Msk /*!< I2C4_FMP I2C4 Fast Mode + Enable */
+#define SYSCFG_PMC_I2C_PB6_FMP_Pos (4U)
+#define SYSCFG_PMC_I2C_PB6_FMP_Msk (0x1UL << SYSCFG_PMC_I2C_PB6_FMP_Pos) /*!< 0x00000010 */
+#define SYSCFG_PMC_I2C_PB6_FMP SYSCFG_PMC_I2C_PB6_FMP_Msk /*!< PB6_FMP Fast Mode + Enable */
+#define SYSCFG_PMC_I2C_PB7_FMP_Pos (5U)
+#define SYSCFG_PMC_I2C_PB7_FMP_Msk (0x1UL << SYSCFG_PMC_I2C_PB7_FMP_Pos) /*!< 0x00000020 */
+#define SYSCFG_PMC_I2C_PB7_FMP SYSCFG_PMC_I2C_PB7_FMP_Msk /*!< PB7_FMP Fast Mode + Enable */
+#define SYSCFG_PMC_I2C_PB8_FMP_Pos (6U)
+#define SYSCFG_PMC_I2C_PB8_FMP_Msk (0x1UL << SYSCFG_PMC_I2C_PB8_FMP_Pos) /*!< 0x00000040 */
+#define SYSCFG_PMC_I2C_PB8_FMP SYSCFG_PMC_I2C_PB8_FMP_Msk /*!< PB8_FMP Fast Mode + Enable */
+#define SYSCFG_PMC_I2C_PB9_FMP_Pos (7U)
+#define SYSCFG_PMC_I2C_PB9_FMP_Msk (0x1UL << SYSCFG_PMC_I2C_PB9_FMP_Pos) /*!< 0x00000080 */
+#define SYSCFG_PMC_I2C_PB9_FMP SYSCFG_PMC_I2C_PB9_FMP_Msk /*!< PB9_FMP Fast Mode + Enable */
#define SYSCFG_PMC_ADCxDC2_Pos (16U)
#define SYSCFG_PMC_ADCxDC2_Msk (0x7UL << SYSCFG_PMC_ADCxDC2_Pos) /*!< 0x00070000 */
diff --git a/Include/stm32f746xx.h b/Include/stm32f746xx.h
index fbf25aa..3da6583 100644
--- a/Include/stm32f746xx.h
+++ b/Include/stm32f746xx.h
@@ -13248,6 +13248,30 @@
#define SYSCFG_MEMRMP_SWP_FMC_1 (0x2UL << SYSCFG_MEMRMP_SWP_FMC_Pos) /*!< 0x00000800 */
/****************** Bit definition for SYSCFG_PMC register ******************/
+#define SYSCFG_PMC_I2C1_FMP_Pos (0U)
+#define SYSCFG_PMC_I2C1_FMP_Msk (0x1UL << SYSCFG_PMC_I2C1_FMP_Pos) /*!< 0x00000001 */
+#define SYSCFG_PMC_I2C1_FMP SYSCFG_PMC_I2C1_FMP_Msk /*!< I2C1_FMP I2C1 Fast Mode + Enable */
+#define SYSCFG_PMC_I2C2_FMP_Pos (1U)
+#define SYSCFG_PMC_I2C2_FMP_Msk (0x1UL << SYSCFG_PMC_I2C2_FMP_Pos) /*!< 0x00000002 */
+#define SYSCFG_PMC_I2C2_FMP SYSCFG_PMC_I2C2_FMP_Msk /*!< I2C2_FMP I2C2 Fast Mode + Enable */
+#define SYSCFG_PMC_I2C3_FMP_Pos (2U)
+#define SYSCFG_PMC_I2C3_FMP_Msk (0x1UL << SYSCFG_PMC_I2C3_FMP_Pos) /*!< 0x00000004 */
+#define SYSCFG_PMC_I2C3_FMP SYSCFG_PMC_I2C3_FMP_Msk /*!< I2C3_FMP I2C3 Fast Mode + Enable */
+#define SYSCFG_PMC_I2C4_FMP_Pos (3U)
+#define SYSCFG_PMC_I2C4_FMP_Msk (0x1UL << SYSCFG_PMC_I2C4_FMP_Pos) /*!< 0x00000008 */
+#define SYSCFG_PMC_I2C4_FMP SYSCFG_PMC_I2C4_FMP_Msk /*!< I2C4_FMP I2C4 Fast Mode + Enable */
+#define SYSCFG_PMC_I2C_PB6_FMP_Pos (4U)
+#define SYSCFG_PMC_I2C_PB6_FMP_Msk (0x1UL << SYSCFG_PMC_I2C_PB6_FMP_Pos) /*!< 0x00000010 */
+#define SYSCFG_PMC_I2C_PB6_FMP SYSCFG_PMC_I2C_PB6_FMP_Msk /*!< PB6_FMP Fast Mode + Enable */
+#define SYSCFG_PMC_I2C_PB7_FMP_Pos (5U)
+#define SYSCFG_PMC_I2C_PB7_FMP_Msk (0x1UL << SYSCFG_PMC_I2C_PB7_FMP_Pos) /*!< 0x00000020 */
+#define SYSCFG_PMC_I2C_PB7_FMP SYSCFG_PMC_I2C_PB7_FMP_Msk /*!< PB7_FMP Fast Mode + Enable */
+#define SYSCFG_PMC_I2C_PB8_FMP_Pos (6U)
+#define SYSCFG_PMC_I2C_PB8_FMP_Msk (0x1UL << SYSCFG_PMC_I2C_PB8_FMP_Pos) /*!< 0x00000040 */
+#define SYSCFG_PMC_I2C_PB8_FMP SYSCFG_PMC_I2C_PB8_FMP_Msk /*!< PB8_FMP Fast Mode + Enable */
+#define SYSCFG_PMC_I2C_PB9_FMP_Pos (7U)
+#define SYSCFG_PMC_I2C_PB9_FMP_Msk (0x1UL << SYSCFG_PMC_I2C_PB9_FMP_Pos) /*!< 0x00000080 */
+#define SYSCFG_PMC_I2C_PB9_FMP SYSCFG_PMC_I2C_PB9_FMP_Msk /*!< PB9_FMP Fast Mode + Enable */
#define SYSCFG_PMC_ADCxDC2_Pos (16U)
#define SYSCFG_PMC_ADCxDC2_Msk (0x7UL << SYSCFG_PMC_ADCxDC2_Pos) /*!< 0x00070000 */
diff --git a/Include/stm32f750xx.h b/Include/stm32f750xx.h
index 0f1878a..4a0cee6 100644
--- a/Include/stm32f750xx.h
+++ b/Include/stm32f750xx.h
@@ -13541,6 +13541,30 @@
#define SYSCFG_MEMRMP_SWP_FMC_1 (0x2UL << SYSCFG_MEMRMP_SWP_FMC_Pos) /*!< 0x00000800 */
/****************** Bit definition for SYSCFG_PMC register ******************/
+#define SYSCFG_PMC_I2C1_FMP_Pos (0U)
+#define SYSCFG_PMC_I2C1_FMP_Msk (0x1UL << SYSCFG_PMC_I2C1_FMP_Pos) /*!< 0x00000001 */
+#define SYSCFG_PMC_I2C1_FMP SYSCFG_PMC_I2C1_FMP_Msk /*!< I2C1_FMP I2C1 Fast Mode + Enable */
+#define SYSCFG_PMC_I2C2_FMP_Pos (1U)
+#define SYSCFG_PMC_I2C2_FMP_Msk (0x1UL << SYSCFG_PMC_I2C2_FMP_Pos) /*!< 0x00000002 */
+#define SYSCFG_PMC_I2C2_FMP SYSCFG_PMC_I2C2_FMP_Msk /*!< I2C2_FMP I2C2 Fast Mode + Enable */
+#define SYSCFG_PMC_I2C3_FMP_Pos (2U)
+#define SYSCFG_PMC_I2C3_FMP_Msk (0x1UL << SYSCFG_PMC_I2C3_FMP_Pos) /*!< 0x00000004 */
+#define SYSCFG_PMC_I2C3_FMP SYSCFG_PMC_I2C3_FMP_Msk /*!< I2C3_FMP I2C3 Fast Mode + Enable */
+#define SYSCFG_PMC_I2C4_FMP_Pos (3U)
+#define SYSCFG_PMC_I2C4_FMP_Msk (0x1UL << SYSCFG_PMC_I2C4_FMP_Pos) /*!< 0x00000008 */
+#define SYSCFG_PMC_I2C4_FMP SYSCFG_PMC_I2C4_FMP_Msk /*!< I2C4_FMP I2C4 Fast Mode + Enable */
+#define SYSCFG_PMC_I2C_PB6_FMP_Pos (4U)
+#define SYSCFG_PMC_I2C_PB6_FMP_Msk (0x1UL << SYSCFG_PMC_I2C_PB6_FMP_Pos) /*!< 0x00000010 */
+#define SYSCFG_PMC_I2C_PB6_FMP SYSCFG_PMC_I2C_PB6_FMP_Msk /*!< PB6_FMP Fast Mode + Enable */
+#define SYSCFG_PMC_I2C_PB7_FMP_Pos (5U)
+#define SYSCFG_PMC_I2C_PB7_FMP_Msk (0x1UL << SYSCFG_PMC_I2C_PB7_FMP_Pos) /*!< 0x00000020 */
+#define SYSCFG_PMC_I2C_PB7_FMP SYSCFG_PMC_I2C_PB7_FMP_Msk /*!< PB7_FMP Fast Mode + Enable */
+#define SYSCFG_PMC_I2C_PB8_FMP_Pos (6U)
+#define SYSCFG_PMC_I2C_PB8_FMP_Msk (0x1UL << SYSCFG_PMC_I2C_PB8_FMP_Pos) /*!< 0x00000040 */
+#define SYSCFG_PMC_I2C_PB8_FMP SYSCFG_PMC_I2C_PB8_FMP_Msk /*!< PB8_FMP Fast Mode + Enable */
+#define SYSCFG_PMC_I2C_PB9_FMP_Pos (7U)
+#define SYSCFG_PMC_I2C_PB9_FMP_Msk (0x1UL << SYSCFG_PMC_I2C_PB9_FMP_Pos) /*!< 0x00000080 */
+#define SYSCFG_PMC_I2C_PB9_FMP SYSCFG_PMC_I2C_PB9_FMP_Msk /*!< PB9_FMP Fast Mode + Enable */
#define SYSCFG_PMC_ADCxDC2_Pos (16U)
#define SYSCFG_PMC_ADCxDC2_Msk (0x7UL << SYSCFG_PMC_ADCxDC2_Pos) /*!< 0x00070000 */
diff --git a/Include/stm32f756xx.h b/Include/stm32f756xx.h
index 3384822..0c889c7 100644
--- a/Include/stm32f756xx.h
+++ b/Include/stm32f756xx.h
@@ -13541,6 +13541,30 @@
#define SYSCFG_MEMRMP_SWP_FMC_1 (0x2UL << SYSCFG_MEMRMP_SWP_FMC_Pos) /*!< 0x00000800 */
/****************** Bit definition for SYSCFG_PMC register ******************/
+#define SYSCFG_PMC_I2C1_FMP_Pos (0U)
+#define SYSCFG_PMC_I2C1_FMP_Msk (0x1UL << SYSCFG_PMC_I2C1_FMP_Pos) /*!< 0x00000001 */
+#define SYSCFG_PMC_I2C1_FMP SYSCFG_PMC_I2C1_FMP_Msk /*!< I2C1_FMP I2C1 Fast Mode + Enable */
+#define SYSCFG_PMC_I2C2_FMP_Pos (1U)
+#define SYSCFG_PMC_I2C2_FMP_Msk (0x1UL << SYSCFG_PMC_I2C2_FMP_Pos) /*!< 0x00000002 */
+#define SYSCFG_PMC_I2C2_FMP SYSCFG_PMC_I2C2_FMP_Msk /*!< I2C2_FMP I2C2 Fast Mode + Enable */
+#define SYSCFG_PMC_I2C3_FMP_Pos (2U)
+#define SYSCFG_PMC_I2C3_FMP_Msk (0x1UL << SYSCFG_PMC_I2C3_FMP_Pos) /*!< 0x00000004 */
+#define SYSCFG_PMC_I2C3_FMP SYSCFG_PMC_I2C3_FMP_Msk /*!< I2C3_FMP I2C3 Fast Mode + Enable */
+#define SYSCFG_PMC_I2C4_FMP_Pos (3U)
+#define SYSCFG_PMC_I2C4_FMP_Msk (0x1UL << SYSCFG_PMC_I2C4_FMP_Pos) /*!< 0x00000008 */
+#define SYSCFG_PMC_I2C4_FMP SYSCFG_PMC_I2C4_FMP_Msk /*!< I2C4_FMP I2C4 Fast Mode + Enable */
+#define SYSCFG_PMC_I2C_PB6_FMP_Pos (4U)
+#define SYSCFG_PMC_I2C_PB6_FMP_Msk (0x1UL << SYSCFG_PMC_I2C_PB6_FMP_Pos) /*!< 0x00000010 */
+#define SYSCFG_PMC_I2C_PB6_FMP SYSCFG_PMC_I2C_PB6_FMP_Msk /*!< PB6_FMP Fast Mode + Enable */
+#define SYSCFG_PMC_I2C_PB7_FMP_Pos (5U)
+#define SYSCFG_PMC_I2C_PB7_FMP_Msk (0x1UL << SYSCFG_PMC_I2C_PB7_FMP_Pos) /*!< 0x00000020 */
+#define SYSCFG_PMC_I2C_PB7_FMP SYSCFG_PMC_I2C_PB7_FMP_Msk /*!< PB7_FMP Fast Mode + Enable */
+#define SYSCFG_PMC_I2C_PB8_FMP_Pos (6U)
+#define SYSCFG_PMC_I2C_PB8_FMP_Msk (0x1UL << SYSCFG_PMC_I2C_PB8_FMP_Pos) /*!< 0x00000040 */
+#define SYSCFG_PMC_I2C_PB8_FMP SYSCFG_PMC_I2C_PB8_FMP_Msk /*!< PB8_FMP Fast Mode + Enable */
+#define SYSCFG_PMC_I2C_PB9_FMP_Pos (7U)
+#define SYSCFG_PMC_I2C_PB9_FMP_Msk (0x1UL << SYSCFG_PMC_I2C_PB9_FMP_Pos) /*!< 0x00000080 */
+#define SYSCFG_PMC_I2C_PB9_FMP SYSCFG_PMC_I2C_PB9_FMP_Msk /*!< PB9_FMP Fast Mode + Enable */
#define SYSCFG_PMC_ADCxDC2_Pos (16U)
#define SYSCFG_PMC_ADCxDC2_Msk (0x7UL << SYSCFG_PMC_ADCxDC2_Pos) /*!< 0x00070000 */
diff --git a/Include/stm32f7xx.h b/Include/stm32f7xx.h
index 84f9de4..5bc217f 100644
--- a/Include/stm32f7xx.h
+++ b/Include/stm32f7xx.h
@@ -97,11 +97,11 @@
#endif /* USE_HAL_DRIVER */
/**
- * @brief CMSIS Device version number V1.2.5
+ * @brief CMSIS Device version number V1.2.6
*/
#define __STM32F7_CMSIS_VERSION_MAIN (0x01) /*!< [31:24] main version */
#define __STM32F7_CMSIS_VERSION_SUB1 (0x02) /*!< [23:16] sub1 version */
-#define __STM32F7_CMSIS_VERSION_SUB2 (0x05) /*!< [15:8] sub2 version */
+#define __STM32F7_CMSIS_VERSION_SUB2 (0x06) /*!< [15:8] sub2 version */
#define __STM32F7_CMSIS_VERSION_RC (0x00) /*!< [7:0] release candidate */
#define __STM32F7_CMSIS_VERSION ((__STM32F7_CMSIS_VERSION_MAIN << 24)\
|(__STM32F7_CMSIS_VERSION_SUB1 << 16)\
diff --git a/License.md b/License.md
index 64783f9..e0d829b 100644
--- a/License.md
+++ b/License.md
@@ -81,4 +81,3 @@
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
-
diff --git a/README.md b/README.md
index d7378ac..7c0dd58 100644
--- a/README.md
+++ b/README.md
@@ -5,11 +5,11 @@
**STM32Cube** is an STMicroelectronics original initiative to ease the developers life by reducing efforts, time and cost.
**STM32Cube** covers the overall STM32 products portfolio. It includes a comprehensive embedded software platform, delivered for each STM32 series.
- * The CMSIS modules (core and device) corresponding to the ARM(tm) core implemented in this STM32 product.
- * The STM32 HAL-LL drivers : an abstraction drivers layer, the API ensuring maximized portability across the STM32 portfolio.
- * The BSP Drivers of each evaluation or demonstration board provided by this STM32 series.
- * A consistent set of middlewares components such as RTOS, USB, FatFS, Graphics, STM32_TouchSensing_Library...
- * A full set of software projects (basic examples, applications or demonstrations) for each board provided by this STM32 series.
+ * The CMSIS modules (core and device) corresponding to the ARM(tm) core implemented in this STM32 product
+ * The STM32 HAL-LL drivers : an abstraction drivers layer, the API ensuring maximized portability across the STM32 portfolio
+ * The BSP Drivers of each evaluation or demonstration board provided by this STM32 series
+ * A consistent set of middlewares components such as RTOS, USB, FatFS, Graphics, STM32_TouchSensing_Library ...
+ * A full set of software projects (basic examples, applications or demonstrations) for each board provided by this STM32 series
Two models of publication are proposed for the STM32Cube embedded software :
* The monolithic **MCU Package** : all STM32Cube software modules of one STM32 series are present (Drivers, Middlewares, Projects, Utilities) in the repository (usual name **STM32Cubexx**, xx corresponding to the STM32 series).
@@ -29,8 +29,9 @@
CMSIS Device F7 | CMSIS Core | Was delivered in the full MCU package
--------------- | ---------- | -------------------------------------
-Tag v1.2.4 | Tag v5.4.0_cm7 | Tag v1.15.0 (and later, if any, till next tag)
-Tag v1.2.5 | Tag v5.4.0_cm7 | Tag v1.16.0 (and later, if any, till next tag)
+Tag v1.2.4 | Tag v5.4.0_cm7 | Tag v1.15.0
+Tag v1.2.5 | Tag v5.4.0_cm4 | Tag v1.16.0
+Tag v1.2.6 | Tag v5.4.0_cm4 | Tag v1.16.1
The full **STM32CubeF7** MCU package is available [here](https://github.com/STMicroelectronics/STM32CubeF7).
diff --git a/Release_Notes.html b/Release_Notes.html
index 044ced5..01293f1 100644
--- a/Release_Notes.html
+++ b/Release_Notes.html
@@ -5,11 +5,14 @@
<meta name="generator" content="pandoc" />
<meta name="viewport" content="width=device-width, initial-scale=1.0, user-scalable=yes" />
<title>Release Notes for STM32F7xx CMSIS</title>
- <style type="text/css">
- code{white-space: pre-wrap;}
- span.smallcaps{font-variant: small-caps;}
- span.underline{text-decoration: underline;}
- div.column{display: inline-block; vertical-align: top; width: 50%;}
+ <style>
+ code{white-space: pre-wrap;}
+ span.smallcaps{font-variant: small-caps;}
+ span.underline{text-decoration: underline;}
+ div.column{display: inline-block; vertical-align: top; width: 50%;}
+ div.hanging-indent{margin-left: 1.5em; text-indent: -1.5em;}
+ ul.task-list{list-style: none;}
+ .display.math{display: block; text-align: center; margin: 0.5rem auto;}
</style>
<link rel="stylesheet" href="_htmresc/mini-st.css" />
<!--[if lt IE 9]>
@@ -35,12 +38,20 @@
<a href="https://opensource.org/licenses/BSD-3-Clause">https://opensource.org/licenses/BSD-3-Clause</a>
</center>
</div>
-<div class="col-sm-12 col-lg-8">
-<h1 id="update-history"><strong>Update History</strong></h1>
+<section id="update-history" class="col-sm-12 col-lg-8">
+<h1><strong>Update History</strong></h1>
+<div class="collapse">
+<input type="checkbox" id="collapse-section1_2_6" aria-hidden="true"> <label for="collapse-section1_2_6" aria-hidden="true"><strong>V1.2.6 / 12-February-2021</strong></label>
+<h2 id="main-changes">Main Changes</h2>
+<ul>
+<li>Improved GCC startup files robustness.</li>
+<li>Protect Vector table modification following SRAM or FLASH preprocessor directive by a generic preprocessor directive : USER_VECT_TAB_ADDRESS.</li>
+<li>Added License.md and Readme.md files required for GitHub publication.</li>
+</ul>
+</div>
<div class="collapse">
<input type="checkbox" id="collapse-section1_2_5" aria-hidden="true"> <label for="collapse-section1_2_5" aria-hidden="true"><strong>V1.2.5 / 13-February-2020</strong></label>
-<div>
-<h2 id="main-changes">Main Changes</h2>
+<h2 id="main-changes-1">Main Changes</h2>
<ul>
<li>Add ADC missing calibration address for Vref and Temperature sensor.</li>
<li>Align GPIO Bits Definitions to use _POS and _MSK.</li>
@@ -51,11 +62,9 @@
<li>Remove IS_TIM_SYNCHRO_INSTANCE macro.</li>
</ul>
</div>
-</div>
<div class="collapse">
<input type="checkbox" id="collapse-section1_2_4" aria-hidden="true"> <label for="collapse-section1_2_4" aria-hidden="true"><strong>V1.2.4 / 08-February-2019</strong></label>
-<div>
-<h2 id="main-changes-1">Main Changes</h2>
+<h2 id="main-changes-2">Main Changes</h2>
<ul>
<li>CRYP
<ul>
@@ -104,11 +113,9 @@
</ul></li>
</ul>
</div>
-</div>
<div class="collapse">
<input type="checkbox" id="collapse-section1_2_3" aria-hidden="true"> <label for="collapse-section1_2_3" aria-hidden="true"><strong>V1.2.3 / 29-June-2018</strong></label>
-<div>
-<h2 id="main-changes-2">Main Changes</h2>
+<h2 id="main-changes-3">Main Changes</h2>
<ul>
<li>Add the support of <strong>STM32F730xx and STM32F750xx</strong> devices
<ul>
@@ -119,31 +126,25 @@
</ul></li>
</ul>
</div>
-</div>
<div class="collapse">
<input type="checkbox" id="collapse-section1_2_2" aria-hidden="true"> <label for="collapse-section1_2_2" aria-hidden="true"><strong>V1.2.2 / 26-December-2017</strong></label>
-<div>
-<h2 id="main-changes-3">Main Changes</h2>
+<h2 id="main-changes-4">Main Changes</h2>
<ul>
<li>Update bits definition for USBPHYC_PLL1 and USBPHYC_LDO registers to be inline with products documentation.</li>
</ul>
</div>
-</div>
<div class="collapse">
<input type="checkbox" id="collapse-section1_2_1" aria-hidden="true"> <label for="collapse-section1_2_1" aria-hidden="true"><strong>V1.2.1 / 25-August-2017</strong></label>
-<div>
-<h2 id="main-changes-4">Main Changes</h2>
+<h2 id="main-changes-5">Main Changes</h2>
<ul>
<li>Update FLASHSIZE_BASE and UID_BASE defined values for STM32F72x and STM32F73x devices.</li>
<li>Update stm32f7xx.h to include stm32f7xx_hal.h file instead of stm32f7xx_hal_conf.h file</li>
<li>Remove Date and Version from header files</li>
</ul>
</div>
-</div>
<div class="collapse">
<input type="checkbox" id="collapse-section1_2_0" aria-hidden="true"> <label for="collapse-section1_2_0" aria-hidden="true"><strong>V1.2.0 / 30-December-2016</strong></label>
-<div>
-<h2 id="main-changes-5">Main Changes</h2>
+<h2 id="main-changes-6">Main Changes</h2>
<ul>
<li>Add the support of <strong>STM32F722xx, STM32F723xx, STM32F732xx and STM32F733xx</strong> devices
<ul>
@@ -178,11 +179,9 @@
</ul></li>
</ul>
</div>
-</div>
<div class="collapse">
<input type="checkbox" id="collapse-section1_1_1" aria-hidden="true"> <label for="collapse-section1_1_1" aria-hidden="true"><strong>V1.1.1 / 01-July-2016</strong></label>
-<div>
-<h2 id="main-changes-6">Main Changes</h2>
+<h2 id="main-changes-7">Main Changes</h2>
<ul>
<li>stm32f7xx.h
<ul>
@@ -190,11 +189,9 @@
</ul></li>
</ul>
</div>
-</div>
<div class="collapse">
<input type="checkbox" id="collapse-section1_1_0" aria-hidden="true"> <label for="collapse-section1_1_0" aria-hidden="true"><strong>V1.1.0 / 22-April-2016</strong></label>
-<div>
-<h2 id="main-changes-7">Main Changes</h2>
+<h2 id="main-changes-8">Main Changes</h2>
<ul>
<li>Add the support of <strong>STM32F765xx, STM32F767xx, STM32F768xx, STM32F769xx, STM32F777xx, STM32F778xx and STM32F779xx</strong> devices
<ul>
@@ -254,11 +251,9 @@
</ul></li>
</ul>
</div>
-</div>
<div class="collapse">
<input type="checkbox" id="collapse-section1_0_3" aria-hidden="true"> <label for="collapse-section1_0_3" aria-hidden="true"><strong>V1.0.3 / 13-November-2015</strong></label>
-<div>
-<h2 id="main-changes-8">Main Changes</h2>
+<h2 id="main-changes-9">Main Changes</h2>
<ul>
<li>stm32f745xx.h, stm32f746xx.h and stm32f756xx.h files
<ul>
@@ -274,11 +269,9 @@
</ul></li>
</ul>
</div>
-</div>
<div class="collapse">
<input type="checkbox" id="collapse-section1_0_2" aria-hidden="true"> <label for="collapse-section1_0_2" aria-hidden="true"><strong>V1.0.2 / 21-September-2015</strong></label>
-<div>
-<h2 id="main-changes-9">Main Changes</h2>
+<h2 id="main-changes-10">Main Changes</h2>
<ul>
<li>stm32f745xx.h, stm32f746xx.h and stm32f756xx.h files
<ul>
@@ -287,11 +280,9 @@
</ul></li>
</ul>
</div>
-</div>
<div class="collapse">
<input type="checkbox" id="collapse-section1_0_1" aria-hidden="true"> <label for="collapse-section1_0_1" aria-hidden="true"><strong>V1.0.1 / 25-June-2015</strong></label>
-<div>
-<h2 id="main-changes-10">Main Changes</h2>
+<h2 id="main-changes-11">Main Changes</h2>
<ul>
<li>stm32f745xx.h, stm32f746xx.h and stm32f756xx.h files
<ul>
@@ -307,16 +298,13 @@
</ul></li>
</ul>
</div>
-</div>
<div class="collapse">
<input type="checkbox" id="collapse-section1_0_0" aria-hidden="true"> <label for="collapse-section1_0_0" aria-hidden="true"><strong>V1.0.0 / 12-April-2019</strong></label>
-<div>
-<h2 id="main-changes-11">Main Changes</h2>
+<h2 id="main-changes-12">Main Changes</h2>
<h3 id="first-release">First release</h3>
<p>First official release for <strong>STM32F756xx/746xx/745xx</strong> devices</p>
</div>
-</div>
-</div>
+</section>
</div>
<footer class="sticky">
For complete documentation on STM32 Microcontrollers </mark> , visit: <span style="font-color: blue;"><a href="http://www.st.com/stm32">www.st.com/stm32</a></span> <em>This release note uses up to date web standards and, for this reason, should not be opened with Internet Explorer but preferably with popular browsers such as Google Chrome, Mozilla Firefox, Opera or Microsoft Edge.</em>
diff --git a/Source/Templates/gcc/startup_stm32f722xx.s b/Source/Templates/gcc/startup_stm32f722xx.s
index b6db501..a6ebe49 100644
--- a/Source/Templates/gcc/startup_stm32f722xx.s
+++ b/Source/Templates/gcc/startup_stm32f722xx.s
@@ -62,32 +62,35 @@
ldr sp, =_estack /* set stack pointer */
/* Copy the data segment initializers from flash to SRAM */
- movs r1, #0
- b LoopCopyDataInit
+ ldr r0, =_sdata
+ ldr r1, =_edata
+ ldr r2, =_sidata
+ movs r3, #0
+ b LoopCopyDataInit
CopyDataInit:
- ldr r3, =_sidata
- ldr r3, [r3, r1]
- str r3, [r0, r1]
- adds r1, r1, #4
-
+ ldr r4, [r2, r3]
+ str r4, [r0, r3]
+ adds r3, r3, #4
+
LoopCopyDataInit:
- ldr r0, =_sdata
- ldr r3, =_edata
- adds r2, r0, r1
- cmp r2, r3
- bcc CopyDataInit
- ldr r2, =_sbss
- b LoopFillZerobss
-/* Zero fill the bss segment. */
+ adds r4, r0, r3
+ cmp r4, r1
+ bcc CopyDataInit
+
+/* Zero fill the bss segment. */
+ ldr r2, =_sbss
+ ldr r4, =_ebss
+ movs r3, #0
+ b LoopFillZerobss
+
FillZerobss:
- movs r3, #0
- str r3, [r2], #4
-
+ str r3, [r2]
+ adds r2, r2, #4
+
LoopFillZerobss:
- ldr r3, = _ebss
- cmp r2, r3
- bcc FillZerobss
+ cmp r2, r4
+ bcc FillZerobss
/* Call the clock system intitialization function.*/
bl SystemInit
diff --git a/Source/Templates/gcc/startup_stm32f723xx.s b/Source/Templates/gcc/startup_stm32f723xx.s
index 7f13e36..18bd2d6 100644
--- a/Source/Templates/gcc/startup_stm32f723xx.s
+++ b/Source/Templates/gcc/startup_stm32f723xx.s
@@ -62,32 +62,35 @@
ldr sp, =_estack /* set stack pointer */
/* Copy the data segment initializers from flash to SRAM */
- movs r1, #0
- b LoopCopyDataInit
+ ldr r0, =_sdata
+ ldr r1, =_edata
+ ldr r2, =_sidata
+ movs r3, #0
+ b LoopCopyDataInit
CopyDataInit:
- ldr r3, =_sidata
- ldr r3, [r3, r1]
- str r3, [r0, r1]
- adds r1, r1, #4
-
+ ldr r4, [r2, r3]
+ str r4, [r0, r3]
+ adds r3, r3, #4
+
LoopCopyDataInit:
- ldr r0, =_sdata
- ldr r3, =_edata
- adds r2, r0, r1
- cmp r2, r3
- bcc CopyDataInit
- ldr r2, =_sbss
- b LoopFillZerobss
-/* Zero fill the bss segment. */
+ adds r4, r0, r3
+ cmp r4, r1
+ bcc CopyDataInit
+
+/* Zero fill the bss segment. */
+ ldr r2, =_sbss
+ ldr r4, =_ebss
+ movs r3, #0
+ b LoopFillZerobss
+
FillZerobss:
- movs r3, #0
- str r3, [r2], #4
-
+ str r3, [r2]
+ adds r2, r2, #4
+
LoopFillZerobss:
- ldr r3, = _ebss
- cmp r2, r3
- bcc FillZerobss
+ cmp r2, r4
+ bcc FillZerobss
/* Call the clock system intitialization function.*/
bl SystemInit
diff --git a/Source/Templates/gcc/startup_stm32f730xx.s b/Source/Templates/gcc/startup_stm32f730xx.s
index 3a7999d..e01c4eb 100644
--- a/Source/Templates/gcc/startup_stm32f730xx.s
+++ b/Source/Templates/gcc/startup_stm32f730xx.s
@@ -62,32 +62,35 @@
ldr sp, =_estack /* set stack pointer */
/* Copy the data segment initializers from flash to SRAM */
- movs r1, #0
- b LoopCopyDataInit
+ ldr r0, =_sdata
+ ldr r1, =_edata
+ ldr r2, =_sidata
+ movs r3, #0
+ b LoopCopyDataInit
CopyDataInit:
- ldr r3, =_sidata
- ldr r3, [r3, r1]
- str r3, [r0, r1]
- adds r1, r1, #4
-
+ ldr r4, [r2, r3]
+ str r4, [r0, r3]
+ adds r3, r3, #4
+
LoopCopyDataInit:
- ldr r0, =_sdata
- ldr r3, =_edata
- adds r2, r0, r1
- cmp r2, r3
- bcc CopyDataInit
- ldr r2, =_sbss
- b LoopFillZerobss
-/* Zero fill the bss segment. */
+ adds r4, r0, r3
+ cmp r4, r1
+ bcc CopyDataInit
+
+/* Zero fill the bss segment. */
+ ldr r2, =_sbss
+ ldr r4, =_ebss
+ movs r3, #0
+ b LoopFillZerobss
+
FillZerobss:
- movs r3, #0
- str r3, [r2], #4
-
+ str r3, [r2]
+ adds r2, r2, #4
+
LoopFillZerobss:
- ldr r3, = _ebss
- cmp r2, r3
- bcc FillZerobss
+ cmp r2, r4
+ bcc FillZerobss
/* Call the clock system intitialization function.*/
bl SystemInit
diff --git a/Source/Templates/gcc/startup_stm32f732xx.s b/Source/Templates/gcc/startup_stm32f732xx.s
index 38f61df..52ca96d 100644
--- a/Source/Templates/gcc/startup_stm32f732xx.s
+++ b/Source/Templates/gcc/startup_stm32f732xx.s
@@ -62,32 +62,35 @@
ldr sp, =_estack /* set stack pointer */
/* Copy the data segment initializers from flash to SRAM */
- movs r1, #0
- b LoopCopyDataInit
+ ldr r0, =_sdata
+ ldr r1, =_edata
+ ldr r2, =_sidata
+ movs r3, #0
+ b LoopCopyDataInit
CopyDataInit:
- ldr r3, =_sidata
- ldr r3, [r3, r1]
- str r3, [r0, r1]
- adds r1, r1, #4
-
+ ldr r4, [r2, r3]
+ str r4, [r0, r3]
+ adds r3, r3, #4
+
LoopCopyDataInit:
- ldr r0, =_sdata
- ldr r3, =_edata
- adds r2, r0, r1
- cmp r2, r3
- bcc CopyDataInit
- ldr r2, =_sbss
- b LoopFillZerobss
-/* Zero fill the bss segment. */
+ adds r4, r0, r3
+ cmp r4, r1
+ bcc CopyDataInit
+
+/* Zero fill the bss segment. */
+ ldr r2, =_sbss
+ ldr r4, =_ebss
+ movs r3, #0
+ b LoopFillZerobss
+
FillZerobss:
- movs r3, #0
- str r3, [r2], #4
-
+ str r3, [r2]
+ adds r2, r2, #4
+
LoopFillZerobss:
- ldr r3, = _ebss
- cmp r2, r3
- bcc FillZerobss
+ cmp r2, r4
+ bcc FillZerobss
/* Call the clock system intitialization function.*/
bl SystemInit
diff --git a/Source/Templates/gcc/startup_stm32f733xx.s b/Source/Templates/gcc/startup_stm32f733xx.s
index ab33284..b63cc06 100644
--- a/Source/Templates/gcc/startup_stm32f733xx.s
+++ b/Source/Templates/gcc/startup_stm32f733xx.s
@@ -62,32 +62,35 @@
ldr sp, =_estack /* set stack pointer */
/* Copy the data segment initializers from flash to SRAM */
- movs r1, #0
- b LoopCopyDataInit
+ ldr r0, =_sdata
+ ldr r1, =_edata
+ ldr r2, =_sidata
+ movs r3, #0
+ b LoopCopyDataInit
CopyDataInit:
- ldr r3, =_sidata
- ldr r3, [r3, r1]
- str r3, [r0, r1]
- adds r1, r1, #4
-
+ ldr r4, [r2, r3]
+ str r4, [r0, r3]
+ adds r3, r3, #4
+
LoopCopyDataInit:
- ldr r0, =_sdata
- ldr r3, =_edata
- adds r2, r0, r1
- cmp r2, r3
- bcc CopyDataInit
- ldr r2, =_sbss
- b LoopFillZerobss
-/* Zero fill the bss segment. */
+ adds r4, r0, r3
+ cmp r4, r1
+ bcc CopyDataInit
+
+/* Zero fill the bss segment. */
+ ldr r2, =_sbss
+ ldr r4, =_ebss
+ movs r3, #0
+ b LoopFillZerobss
+
FillZerobss:
- movs r3, #0
- str r3, [r2], #4
-
+ str r3, [r2]
+ adds r2, r2, #4
+
LoopFillZerobss:
- ldr r3, = _ebss
- cmp r2, r3
- bcc FillZerobss
+ cmp r2, r4
+ bcc FillZerobss
/* Call the clock system intitialization function.*/
bl SystemInit
diff --git a/Source/Templates/gcc/startup_stm32f745xx.s b/Source/Templates/gcc/startup_stm32f745xx.s
index 2cd86f5..8c67eb9 100644
--- a/Source/Templates/gcc/startup_stm32f745xx.s
+++ b/Source/Templates/gcc/startup_stm32f745xx.s
@@ -62,32 +62,35 @@
ldr sp, =_estack /* set stack pointer */
/* Copy the data segment initializers from flash to SRAM */
- movs r1, #0
- b LoopCopyDataInit
+ ldr r0, =_sdata
+ ldr r1, =_edata
+ ldr r2, =_sidata
+ movs r3, #0
+ b LoopCopyDataInit
CopyDataInit:
- ldr r3, =_sidata
- ldr r3, [r3, r1]
- str r3, [r0, r1]
- adds r1, r1, #4
-
+ ldr r4, [r2, r3]
+ str r4, [r0, r3]
+ adds r3, r3, #4
+
LoopCopyDataInit:
- ldr r0, =_sdata
- ldr r3, =_edata
- adds r2, r0, r1
- cmp r2, r3
- bcc CopyDataInit
- ldr r2, =_sbss
- b LoopFillZerobss
-/* Zero fill the bss segment. */
+ adds r4, r0, r3
+ cmp r4, r1
+ bcc CopyDataInit
+
+/* Zero fill the bss segment. */
+ ldr r2, =_sbss
+ ldr r4, =_ebss
+ movs r3, #0
+ b LoopFillZerobss
+
FillZerobss:
- movs r3, #0
- str r3, [r2], #4
-
+ str r3, [r2]
+ adds r2, r2, #4
+
LoopFillZerobss:
- ldr r3, = _ebss
- cmp r2, r3
- bcc FillZerobss
+ cmp r2, r4
+ bcc FillZerobss
/* Call the clock system initialization function.*/
bl SystemInit
diff --git a/Source/Templates/gcc/startup_stm32f746xx.s b/Source/Templates/gcc/startup_stm32f746xx.s
index d2445da..a4e633e 100644
--- a/Source/Templates/gcc/startup_stm32f746xx.s
+++ b/Source/Templates/gcc/startup_stm32f746xx.s
@@ -62,32 +62,35 @@
ldr sp, =_estack /* set stack pointer */
/* Copy the data segment initializers from flash to SRAM */
- movs r1, #0
- b LoopCopyDataInit
+ ldr r0, =_sdata
+ ldr r1, =_edata
+ ldr r2, =_sidata
+ movs r3, #0
+ b LoopCopyDataInit
CopyDataInit:
- ldr r3, =_sidata
- ldr r3, [r3, r1]
- str r3, [r0, r1]
- adds r1, r1, #4
-
+ ldr r4, [r2, r3]
+ str r4, [r0, r3]
+ adds r3, r3, #4
+
LoopCopyDataInit:
- ldr r0, =_sdata
- ldr r3, =_edata
- adds r2, r0, r1
- cmp r2, r3
- bcc CopyDataInit
- ldr r2, =_sbss
- b LoopFillZerobss
-/* Zero fill the bss segment. */
+ adds r4, r0, r3
+ cmp r4, r1
+ bcc CopyDataInit
+
+/* Zero fill the bss segment. */
+ ldr r2, =_sbss
+ ldr r4, =_ebss
+ movs r3, #0
+ b LoopFillZerobss
+
FillZerobss:
- movs r3, #0
- str r3, [r2], #4
-
+ str r3, [r2]
+ adds r2, r2, #4
+
LoopFillZerobss:
- ldr r3, = _ebss
- cmp r2, r3
- bcc FillZerobss
+ cmp r2, r4
+ bcc FillZerobss
/* Call the clock system initialization function.*/
bl SystemInit
diff --git a/Source/Templates/gcc/startup_stm32f750xx.s b/Source/Templates/gcc/startup_stm32f750xx.s
index 110e032..2273451 100644
--- a/Source/Templates/gcc/startup_stm32f750xx.s
+++ b/Source/Templates/gcc/startup_stm32f750xx.s
@@ -62,32 +62,35 @@
ldr sp, =_estack /* set stack pointer */
/* Copy the data segment initializers from flash to SRAM */
- movs r1, #0
- b LoopCopyDataInit
+ ldr r0, =_sdata
+ ldr r1, =_edata
+ ldr r2, =_sidata
+ movs r3, #0
+ b LoopCopyDataInit
CopyDataInit:
- ldr r3, =_sidata
- ldr r3, [r3, r1]
- str r3, [r0, r1]
- adds r1, r1, #4
-
+ ldr r4, [r2, r3]
+ str r4, [r0, r3]
+ adds r3, r3, #4
+
LoopCopyDataInit:
- ldr r0, =_sdata
- ldr r3, =_edata
- adds r2, r0, r1
- cmp r2, r3
- bcc CopyDataInit
- ldr r2, =_sbss
- b LoopFillZerobss
-/* Zero fill the bss segment. */
+ adds r4, r0, r3
+ cmp r4, r1
+ bcc CopyDataInit
+
+/* Zero fill the bss segment. */
+ ldr r2, =_sbss
+ ldr r4, =_ebss
+ movs r3, #0
+ b LoopFillZerobss
+
FillZerobss:
- movs r3, #0
- str r3, [r2], #4
-
+ str r3, [r2]
+ adds r2, r2, #4
+
LoopFillZerobss:
- ldr r3, = _ebss
- cmp r2, r3
- bcc FillZerobss
+ cmp r2, r4
+ bcc FillZerobss
/* Call the clock system intitialization function.*/
bl SystemInit
diff --git a/Source/Templates/gcc/startup_stm32f756xx.s b/Source/Templates/gcc/startup_stm32f756xx.s
index 9c3b8f3..322cb1c 100644
--- a/Source/Templates/gcc/startup_stm32f756xx.s
+++ b/Source/Templates/gcc/startup_stm32f756xx.s
@@ -62,32 +62,35 @@
ldr sp, =_estack /* set stack pointer */
/* Copy the data segment initializers from flash to SRAM */
- movs r1, #0
- b LoopCopyDataInit
+ ldr r0, =_sdata
+ ldr r1, =_edata
+ ldr r2, =_sidata
+ movs r3, #0
+ b LoopCopyDataInit
CopyDataInit:
- ldr r3, =_sidata
- ldr r3, [r3, r1]
- str r3, [r0, r1]
- adds r1, r1, #4
-
+ ldr r4, [r2, r3]
+ str r4, [r0, r3]
+ adds r3, r3, #4
+
LoopCopyDataInit:
- ldr r0, =_sdata
- ldr r3, =_edata
- adds r2, r0, r1
- cmp r2, r3
- bcc CopyDataInit
- ldr r2, =_sbss
- b LoopFillZerobss
-/* Zero fill the bss segment. */
+ adds r4, r0, r3
+ cmp r4, r1
+ bcc CopyDataInit
+
+/* Zero fill the bss segment. */
+ ldr r2, =_sbss
+ ldr r4, =_ebss
+ movs r3, #0
+ b LoopFillZerobss
+
FillZerobss:
- movs r3, #0
- str r3, [r2], #4
-
+ str r3, [r2]
+ adds r2, r2, #4
+
LoopFillZerobss:
- ldr r3, = _ebss
- cmp r2, r3
- bcc FillZerobss
+ cmp r2, r4
+ bcc FillZerobss
/* Call the clock system intitialization function.*/
bl SystemInit
diff --git a/Source/Templates/gcc/startup_stm32f765xx.s b/Source/Templates/gcc/startup_stm32f765xx.s
index 3f74d74..8bc9181 100644
--- a/Source/Templates/gcc/startup_stm32f765xx.s
+++ b/Source/Templates/gcc/startup_stm32f765xx.s
@@ -62,32 +62,35 @@
ldr sp, =_estack /* set stack pointer */
/* Copy the data segment initializers from flash to SRAM */
- movs r1, #0
- b LoopCopyDataInit
+ ldr r0, =_sdata
+ ldr r1, =_edata
+ ldr r2, =_sidata
+ movs r3, #0
+ b LoopCopyDataInit
CopyDataInit:
- ldr r3, =_sidata
- ldr r3, [r3, r1]
- str r3, [r0, r1]
- adds r1, r1, #4
-
+ ldr r4, [r2, r3]
+ str r4, [r0, r3]
+ adds r3, r3, #4
+
LoopCopyDataInit:
- ldr r0, =_sdata
- ldr r3, =_edata
- adds r2, r0, r1
- cmp r2, r3
- bcc CopyDataInit
- ldr r2, =_sbss
- b LoopFillZerobss
-/* Zero fill the bss segment. */
+ adds r4, r0, r3
+ cmp r4, r1
+ bcc CopyDataInit
+
+/* Zero fill the bss segment. */
+ ldr r2, =_sbss
+ ldr r4, =_ebss
+ movs r3, #0
+ b LoopFillZerobss
+
FillZerobss:
- movs r3, #0
- str r3, [r2], #4
-
+ str r3, [r2]
+ adds r2, r2, #4
+
LoopFillZerobss:
- ldr r3, = _ebss
- cmp r2, r3
- bcc FillZerobss
+ cmp r2, r4
+ bcc FillZerobss
/* Call the clock system initialization function.*/
bl SystemInit
diff --git a/Source/Templates/gcc/startup_stm32f767xx.s b/Source/Templates/gcc/startup_stm32f767xx.s
index e61a208..10be21c 100644
--- a/Source/Templates/gcc/startup_stm32f767xx.s
+++ b/Source/Templates/gcc/startup_stm32f767xx.s
@@ -62,32 +62,35 @@
ldr sp, =_estack /* set stack pointer */
/* Copy the data segment initializers from flash to SRAM */
- movs r1, #0
- b LoopCopyDataInit
+ ldr r0, =_sdata
+ ldr r1, =_edata
+ ldr r2, =_sidata
+ movs r3, #0
+ b LoopCopyDataInit
CopyDataInit:
- ldr r3, =_sidata
- ldr r3, [r3, r1]
- str r3, [r0, r1]
- adds r1, r1, #4
-
+ ldr r4, [r2, r3]
+ str r4, [r0, r3]
+ adds r3, r3, #4
+
LoopCopyDataInit:
- ldr r0, =_sdata
- ldr r3, =_edata
- adds r2, r0, r1
- cmp r2, r3
- bcc CopyDataInit
- ldr r2, =_sbss
- b LoopFillZerobss
-/* Zero fill the bss segment. */
+ adds r4, r0, r3
+ cmp r4, r1
+ bcc CopyDataInit
+
+/* Zero fill the bss segment. */
+ ldr r2, =_sbss
+ ldr r4, =_ebss
+ movs r3, #0
+ b LoopFillZerobss
+
FillZerobss:
- movs r3, #0
- str r3, [r2], #4
-
+ str r3, [r2]
+ adds r2, r2, #4
+
LoopFillZerobss:
- ldr r3, = _ebss
- cmp r2, r3
- bcc FillZerobss
+ cmp r2, r4
+ bcc FillZerobss
/* Call the clock system initialization function.*/
bl SystemInit
diff --git a/Source/Templates/gcc/startup_stm32f769xx.s b/Source/Templates/gcc/startup_stm32f769xx.s
index 88aa2f2..2001e88 100644
--- a/Source/Templates/gcc/startup_stm32f769xx.s
+++ b/Source/Templates/gcc/startup_stm32f769xx.s
@@ -62,32 +62,35 @@
ldr sp, =_estack /* set stack pointer */
/* Copy the data segment initializers from flash to SRAM */
- movs r1, #0
- b LoopCopyDataInit
+ ldr r0, =_sdata
+ ldr r1, =_edata
+ ldr r2, =_sidata
+ movs r3, #0
+ b LoopCopyDataInit
CopyDataInit:
- ldr r3, =_sidata
- ldr r3, [r3, r1]
- str r3, [r0, r1]
- adds r1, r1, #4
-
+ ldr r4, [r2, r3]
+ str r4, [r0, r3]
+ adds r3, r3, #4
+
LoopCopyDataInit:
- ldr r0, =_sdata
- ldr r3, =_edata
- adds r2, r0, r1
- cmp r2, r3
- bcc CopyDataInit
- ldr r2, =_sbss
- b LoopFillZerobss
-/* Zero fill the bss segment. */
+ adds r4, r0, r3
+ cmp r4, r1
+ bcc CopyDataInit
+
+/* Zero fill the bss segment. */
+ ldr r2, =_sbss
+ ldr r4, =_ebss
+ movs r3, #0
+ b LoopFillZerobss
+
FillZerobss:
- movs r3, #0
- str r3, [r2], #4
-
+ str r3, [r2]
+ adds r2, r2, #4
+
LoopFillZerobss:
- ldr r3, = _ebss
- cmp r2, r3
- bcc FillZerobss
+ cmp r2, r4
+ bcc FillZerobss
/* Call the clock system intitialization function.*/
bl SystemInit
diff --git a/Source/Templates/gcc/startup_stm32f777xx.s b/Source/Templates/gcc/startup_stm32f777xx.s
index 9a42ef9..7389ccc 100644
--- a/Source/Templates/gcc/startup_stm32f777xx.s
+++ b/Source/Templates/gcc/startup_stm32f777xx.s
@@ -62,32 +62,35 @@
ldr sp, =_estack /* set stack pointer */
/* Copy the data segment initializers from flash to SRAM */
- movs r1, #0
- b LoopCopyDataInit
+ ldr r0, =_sdata
+ ldr r1, =_edata
+ ldr r2, =_sidata
+ movs r3, #0
+ b LoopCopyDataInit
CopyDataInit:
- ldr r3, =_sidata
- ldr r3, [r3, r1]
- str r3, [r0, r1]
- adds r1, r1, #4
-
+ ldr r4, [r2, r3]
+ str r4, [r0, r3]
+ adds r3, r3, #4
+
LoopCopyDataInit:
- ldr r0, =_sdata
- ldr r3, =_edata
- adds r2, r0, r1
- cmp r2, r3
- bcc CopyDataInit
- ldr r2, =_sbss
- b LoopFillZerobss
-/* Zero fill the bss segment. */
+ adds r4, r0, r3
+ cmp r4, r1
+ bcc CopyDataInit
+
+/* Zero fill the bss segment. */
+ ldr r2, =_sbss
+ ldr r4, =_ebss
+ movs r3, #0
+ b LoopFillZerobss
+
FillZerobss:
- movs r3, #0
- str r3, [r2], #4
-
+ str r3, [r2]
+ adds r2, r2, #4
+
LoopFillZerobss:
- ldr r3, = _ebss
- cmp r2, r3
- bcc FillZerobss
+ cmp r2, r4
+ bcc FillZerobss
/* Call the clock system intitialization function.*/
bl SystemInit
diff --git a/Source/Templates/gcc/startup_stm32f779xx.s b/Source/Templates/gcc/startup_stm32f779xx.s
index 7aa1123..9cc7c54 100644
--- a/Source/Templates/gcc/startup_stm32f779xx.s
+++ b/Source/Templates/gcc/startup_stm32f779xx.s
@@ -62,32 +62,35 @@
ldr sp, =_estack /* set stack pointer */
/* Copy the data segment initializers from flash to SRAM */
- movs r1, #0
- b LoopCopyDataInit
+ ldr r0, =_sdata
+ ldr r1, =_edata
+ ldr r2, =_sidata
+ movs r3, #0
+ b LoopCopyDataInit
CopyDataInit:
- ldr r3, =_sidata
- ldr r3, [r3, r1]
- str r3, [r0, r1]
- adds r1, r1, #4
-
+ ldr r4, [r2, r3]
+ str r4, [r0, r3]
+ adds r3, r3, #4
+
LoopCopyDataInit:
- ldr r0, =_sdata
- ldr r3, =_edata
- adds r2, r0, r1
- cmp r2, r3
- bcc CopyDataInit
- ldr r2, =_sbss
- b LoopFillZerobss
-/* Zero fill the bss segment. */
+ adds r4, r0, r3
+ cmp r4, r1
+ bcc CopyDataInit
+
+/* Zero fill the bss segment. */
+ ldr r2, =_sbss
+ ldr r4, =_ebss
+ movs r3, #0
+ b LoopFillZerobss
+
FillZerobss:
- movs r3, #0
- str r3, [r2], #4
-
+ str r3, [r2]
+ adds r2, r2, #4
+
LoopFillZerobss:
- ldr r3, = _ebss
- cmp r2, r3
- bcc FillZerobss
+ cmp r2, r4
+ bcc FillZerobss
/* Call the clock system intitialization function.*/
bl SystemInit
diff --git a/Source/Templates/system_stm32f7xx.c b/Source/Templates/system_stm32f7xx.c
index 1743640..7736c08 100644
--- a/Source/Templates/system_stm32f7xx.c
+++ b/Source/Templates/system_stm32f7xx.c
@@ -73,11 +73,29 @@
/************************* Miscellaneous Configuration ************************/
-/*!< Uncomment the following line if you need to relocate your vector Table in
- Internal SRAM. */
+/* Note: Following vector table addresses must be defined in line with linker
+ configuration. */
+/*!< Uncomment the following line if you need to relocate the vector table
+ anywhere in Flash or Sram, else the vector table is kept at the automatic
+ remap of boot address selected */
+/* #define USER_VECT_TAB_ADDRESS */
+
+#if defined(USER_VECT_TAB_ADDRESS)
+/*!< Uncomment the following line if you need to relocate your vector Table
+ in Sram else user remap will be done in Flash. */
/* #define VECT_TAB_SRAM */
-#define VECT_TAB_OFFSET 0x00 /*!< Vector Table base offset field.
- This value must be a multiple of 0x200. */
+#if defined(VECT_TAB_SRAM)
+#define VECT_TAB_BASE_ADDRESS RAMDTCM_BASE /*!< Vector Table base address field.
+ This value must be a multiple of 0x200. */
+#define VECT_TAB_OFFSET 0x00000000U /*!< Vector Table base offset field.
+ This value must be a multiple of 0x200. */
+#else
+#define VECT_TAB_BASE_ADDRESS FLASH_BASE /*!< Vector Table base address field.
+ This value must be a multiple of 0x200. */
+#define VECT_TAB_OFFSET 0x00000000U /*!< Vector Table base offset field.
+ This value must be a multiple of 0x200. */
+#endif /* VECT_TAB_SRAM */
+#endif /* USER_VECT_TAB_ADDRESS */
/******************************************************************************/
/**
@@ -138,12 +156,10 @@
SCB->CPACR |= ((3UL << 10*2)|(3UL << 11*2)); /* set CP10 and CP11 Full Access */
#endif
- /* Configure the Vector Table location add offset address ------------------*/
-#ifdef VECT_TAB_SRAM
- SCB->VTOR = RAMDTCM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
-#else
- SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
-#endif
+ /* Configure the Vector Table location -------------------------------------*/
+#if defined(USER_VECT_TAB_ADDRESS)
+ SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
+#endif /* USER_VECT_TAB_ADDRESS */
}
/**
