Release v1.2.8
diff --git a/Inc/Legacy/stm32_hal_legacy.h b/Inc/Legacy/stm32_hal_legacy.h
index b0c8d6c..b59ff6d 100644
--- a/Inc/Legacy/stm32_hal_legacy.h
+++ b/Inc/Legacy/stm32_hal_legacy.h
@@ -7,7 +7,7 @@
******************************************************************************
* @attention
*
- * Copyright (c) 2019 STMicroelectronics.
+ * Copyright (c) 2021 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
@@ -37,6 +37,16 @@
#define AES_CLEARFLAG_CCF CRYP_CLEARFLAG_CCF
#define AES_CLEARFLAG_RDERR CRYP_CLEARFLAG_RDERR
#define AES_CLEARFLAG_WRERR CRYP_CLEARFLAG_WRERR
+#if defined(STM32U5) || defined(STM32H7) || defined(STM32MP1)
+#define CRYP_DATATYPE_32B CRYP_NO_SWAP
+#define CRYP_DATATYPE_16B CRYP_HALFWORD_SWAP
+#define CRYP_DATATYPE_8B CRYP_BYTE_SWAP
+#define CRYP_DATATYPE_1B CRYP_BIT_SWAP
+#if defined(STM32U5)
+#define CRYP_CCF_CLEAR CRYP_CLEAR_CCF
+#define CRYP_ERR_CLEAR CRYP_CLEAR_RWEIF
+#endif /* STM32U5 */
+#endif /* STM32U5 || STM32H7 || STM32MP1 */
/**
* @}
*/
@@ -96,6 +106,16 @@
#if defined(STM32H7)
#define ADC_CHANNEL_VBAT_DIV4 ADC_CHANNEL_VBAT
#endif /* STM32H7 */
+
+#if defined(STM32U5)
+#define ADC_SAMPLETIME_5CYCLE ADC_SAMPLETIME_5CYCLES
+#define ADC_SAMPLETIME_391CYCLES_5 ADC_SAMPLETIME_391CYCLES
+#define ADC4_SAMPLETIME_160CYCLES_5 ADC4_SAMPLETIME_814CYCLES_5
+#endif /* STM32U5 */
+
+#if defined(STM32H5)
+#define ADC_CHANNEL_VCORE ADC_CHANNEL_VDDCORE
+#endif /* STM32H5 */
/**
* @}
*/
@@ -123,7 +143,8 @@
#define COMP_EXTI_LINE_COMP6_EVENT COMP_EXTI_LINE_COMP6
#define COMP_EXTI_LINE_COMP7_EVENT COMP_EXTI_LINE_COMP7
#if defined(STM32L0)
-#define COMP_LPTIMCONNECTION_ENABLED ((uint32_t)0x00000003U) /*!< COMPX output generic naming: connected to LPTIM input 1 for COMP1, LPTIM input 2 for COMP2 */
+#define COMP_LPTIMCONNECTION_ENABLED ((uint32_t)0x00000003U) /*!< COMPX output generic naming: connected to LPTIM
+ input 1 for COMP1, LPTIM input 2 for COMP2 */
#endif
#define COMP_OUTPUT_COMP6TIM2OCREFCLR COMP_OUTPUT_COMP6_TIM2OCREFCLR
#if defined(STM32F373xC) || defined(STM32F378xx)
@@ -197,6 +218,11 @@
#endif
#endif
+
+#if defined(STM32U5)
+#define __HAL_COMP_COMP1_EXTI_CLEAR_RASING_FLAG __HAL_COMP_COMP1_EXTI_CLEAR_RISING_FLAG
+#endif
+
/**
* @}
*/
@@ -205,6 +231,11 @@
* @{
*/
#define __HAL_CORTEX_SYSTICKCLK_CONFIG HAL_SYSTICK_CLKSourceConfig
+#if defined(STM32U5)
+#define MPU_DEVICE_nGnRnE MPU_DEVICE_NGNRNE
+#define MPU_DEVICE_nGnRE MPU_DEVICE_NGNRE
+#define MPU_DEVICE_nGRE MPU_DEVICE_NGRE
+#endif /* STM32U5 */
/**
* @}
*/
@@ -212,8 +243,13 @@
/** @defgroup CRC_Aliases CRC API aliases
* @{
*/
-#define HAL_CRC_Input_Data_Reverse HAL_CRCEx_Input_Data_Reverse /*!< Aliased to HAL_CRCEx_Input_Data_Reverse for inter STM32 series compatibility */
-#define HAL_CRC_Output_Data_Reverse HAL_CRCEx_Output_Data_Reverse /*!< Aliased to HAL_CRCEx_Output_Data_Reverse for inter STM32 series compatibility */
+#if defined(STM32H5) || defined(STM32C0)
+#else
+#define HAL_CRC_Input_Data_Reverse HAL_CRCEx_Input_Data_Reverse /*!< Aliased to HAL_CRCEx_Input_Data_Reverse for
+ inter STM32 series compatibility */
+#define HAL_CRC_Output_Data_Reverse HAL_CRCEx_Output_Data_Reverse /*!< Aliased to HAL_CRCEx_Output_Data_Reverse for
+ inter STM32 series compatibility */
+#endif
/**
* @}
*/
@@ -243,12 +279,25 @@
#define DAC_WAVEGENERATION_NOISE DAC_WAVE_NOISE
#define DAC_WAVEGENERATION_TRIANGLE DAC_WAVE_TRIANGLE
-#if defined(STM32G4) || defined(STM32H7)
+#if defined(STM32G4) || defined(STM32L5) || defined(STM32H7) || defined (STM32U5)
#define DAC_CHIPCONNECT_DISABLE DAC_CHIPCONNECT_EXTERNAL
#define DAC_CHIPCONNECT_ENABLE DAC_CHIPCONNECT_INTERNAL
#endif
-#if defined(STM32L1) || defined(STM32L4) || defined(STM32G0) || defined(STM32L5) || defined(STM32H7) || defined(STM32F4) || defined(STM32G4)
+#if defined(STM32U5)
+#define DAC_TRIGGER_STOP_LPTIM1_OUT DAC_TRIGGER_STOP_LPTIM1_CH1
+#define DAC_TRIGGER_STOP_LPTIM3_OUT DAC_TRIGGER_STOP_LPTIM3_CH1
+#define DAC_TRIGGER_LPTIM1_OUT DAC_TRIGGER_LPTIM1_CH1
+#define DAC_TRIGGER_LPTIM3_OUT DAC_TRIGGER_LPTIM3_CH1
+#endif
+
+#if defined(STM32H5)
+#define DAC_TRIGGER_LPTIM1_OUT DAC_TRIGGER_LPTIM1_CH1
+#define DAC_TRIGGER_LPTIM2_OUT DAC_TRIGGER_LPTIM2_CH1
+#endif
+
+#if defined(STM32L1) || defined(STM32L4) || defined(STM32G0) || defined(STM32L5) || defined(STM32H7) || \
+ defined(STM32F4) || defined(STM32G4)
#define HAL_DAC_MSP_INIT_CB_ID HAL_DAC_MSPINIT_CB_ID
#define HAL_DAC_MSP_DEINIT_CB_ID HAL_DAC_MSPDEINIT_CB_ID
#endif
@@ -313,7 +362,8 @@
#define HAL_DMAMUX_REQUEST_GEN_FALLING HAL_DMAMUX_REQ_GEN_FALLING
#define HAL_DMAMUX_REQUEST_GEN_RISING_FALLING HAL_DMAMUX_REQ_GEN_RISING_FALLING
-#if defined(STM32L4R5xx) || defined(STM32L4R9xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx)
+#if defined(STM32L4R5xx) || defined(STM32L4R9xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || \
+ defined(STM32L4S7xx) || defined(STM32L4S9xx)
#define DMA_REQUEST_DCMI_PSSI DMA_REQUEST_DCMI
#endif
@@ -391,6 +441,9 @@
#endif /* STM32H7 */
+#if defined(STM32U5)
+#define GPDMA1_REQUEST_DCMI GPDMA1_REQUEST_DCMI_PSSI
+#endif /* STM32U5 */
/**
* @}
*/
@@ -470,7 +523,7 @@
#define OB_RDP_LEVEL0 OB_RDP_LEVEL_0
#define OB_RDP_LEVEL1 OB_RDP_LEVEL_1
#define OB_RDP_LEVEL2 OB_RDP_LEVEL_2
-#if defined(STM32G0)
+#if defined(STM32G0) || defined(STM32C0)
#define OB_BOOT_LOCK_DISABLE OB_BOOT_ENTRY_FORCED_NONE
#define OB_BOOT_LOCK_ENABLE OB_BOOT_ENTRY_FORCED_FLASH
#else
@@ -487,6 +540,18 @@
#define FLASH_FLAG_WDW FLASH_FLAG_WBNE
#define OB_WRP_SECTOR_All OB_WRP_SECTOR_ALL
#endif /* STM32H7 */
+#if defined(STM32U5)
+#define OB_USER_nRST_STOP OB_USER_NRST_STOP
+#define OB_USER_nRST_STDBY OB_USER_NRST_STDBY
+#define OB_USER_nRST_SHDW OB_USER_NRST_SHDW
+#define OB_USER_nSWBOOT0 OB_USER_NSWBOOT0
+#define OB_USER_nBOOT0 OB_USER_NBOOT0
+#define OB_nBOOT0_RESET OB_NBOOT0_RESET
+#define OB_nBOOT0_SET OB_NBOOT0_SET
+#define OB_USER_SRAM134_RST OB_USER_SRAM_RST
+#define OB_SRAM134_RST_ERASE OB_SRAM_RST_ERASE
+#define OB_SRAM134_RST_NOT_ERASE OB_SRAM_RST_NOT_ERASE
+#endif /* STM32U5 */
/**
* @}
@@ -529,6 +594,107 @@
#define HAL_SYSCFG_EnableIOAnalogSwitchVDD HAL_SYSCFG_EnableIOSwitchVDD
#define HAL_SYSCFG_DisableIOAnalogSwitchVDD HAL_SYSCFG_DisableIOSwitchVDD
#endif /* STM32G4 */
+
+#if defined(STM32H5)
+#define SYSCFG_IT_FPU_IOC SBS_IT_FPU_IOC
+#define SYSCFG_IT_FPU_DZC SBS_IT_FPU_DZC
+#define SYSCFG_IT_FPU_UFC SBS_IT_FPU_UFC
+#define SYSCFG_IT_FPU_OFC SBS_IT_FPU_OFC
+#define SYSCFG_IT_FPU_IDC SBS_IT_FPU_IDC
+#define SYSCFG_IT_FPU_IXC SBS_IT_FPU_IXC
+
+#define SYSCFG_BREAK_FLASH_ECC SBS_BREAK_FLASH_ECC
+#define SYSCFG_BREAK_PVD SBS_BREAK_PVD
+#define SYSCFG_BREAK_SRAM_ECC SBS_BREAK_SRAM_ECC
+#define SYSCFG_BREAK_LOCKUP SBS_BREAK_LOCKUP
+
+#define SYSCFG_VREFBUF_VOLTAGE_SCALE0 VREFBUF_VOLTAGE_SCALE0
+#define SYSCFG_VREFBUF_VOLTAGE_SCALE1 VREFBUF_VOLTAGE_SCALE1
+#define SYSCFG_VREFBUF_VOLTAGE_SCALE2 VREFBUF_VOLTAGE_SCALE2
+#define SYSCFG_VREFBUF_VOLTAGE_SCALE3 VREFBUF_VOLTAGE_SCALE3
+
+#define SYSCFG_VREFBUF_HIGH_IMPEDANCE_DISABLE VREFBUF_HIGH_IMPEDANCE_DISABLE
+#define SYSCFG_VREFBUF_HIGH_IMPEDANCE_ENABLE VREFBUF_HIGH_IMPEDANCE_ENABLE
+
+#define SYSCFG_FASTMODEPLUS_PB6 SBS_FASTMODEPLUS_PB6
+#define SYSCFG_FASTMODEPLUS_PB7 SBS_FASTMODEPLUS_PB7
+#define SYSCFG_FASTMODEPLUS_PB8 SBS_FASTMODEPLUS_PB8
+#define SYSCFG_FASTMODEPLUS_PB9 SBS_FASTMODEPLUS_PB9
+
+#define SYSCFG_ETH_MII SBS_ETH_MII
+#define SYSCFG_ETH_RMII SBS_ETH_RMII
+#define IS_SYSCFG_ETHERNET_CONFIG IS_SBS_ETHERNET_CONFIG
+
+#define SYSCFG_MEMORIES_ERASE_FLAG_IPMEE SBS_MEMORIES_ERASE_FLAG_IPMEE
+#define SYSCFG_MEMORIES_ERASE_FLAG_MCLR SBS_MEMORIES_ERASE_FLAG_MCLR
+#define IS_SYSCFG_MEMORIES_ERASE_FLAG IS_SBS_MEMORIES_ERASE_FLAG
+
+#define IS_SYSCFG_CODE_CONFIG IS_SBS_CODE_CONFIG
+
+#define SYSCFG_MPU_NSEC SBS_MPU_NSEC
+#define SYSCFG_VTOR_NSEC SBS_VTOR_NSEC
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+#define SYSCFG_SAU SBS_SAU
+#define SYSCFG_MPU_SEC SBS_MPU_SEC
+#define SYSCFG_VTOR_AIRCR_SEC SBS_VTOR_AIRCR_SEC
+#define SYSCFG_LOCK_ALL SBS_LOCK_ALL
+#else
+#define SYSCFG_LOCK_ALL SBS_LOCK_ALL
+#endif /* __ARM_FEATURE_CMSE */
+
+#define SYSCFG_CLK SBS_CLK
+#define SYSCFG_CLASSB SBS_CLASSB
+#define SYSCFG_FPU SBS_FPU
+#define SYSCFG_ALL SBS_ALL
+
+#define SYSCFG_SEC SBS_SEC
+#define SYSCFG_NSEC SBS_NSEC
+
+#define __HAL_SYSCFG_FPU_INTERRUPT_ENABLE __HAL_SBS_FPU_INTERRUPT_ENABLE
+#define __HAL_SYSCFG_FPU_INTERRUPT_DISABLE __HAL_SBS_FPU_INTERRUPT_DISABLE
+
+#define __HAL_SYSCFG_BREAK_ECC_LOCK __HAL_SBS_BREAK_ECC_LOCK
+#define __HAL_SYSCFG_BREAK_LOCKUP_LOCK __HAL_SBS_BREAK_LOCKUP_LOCK
+#define __HAL_SYSCFG_BREAK_PVD_LOCK __HAL_SBS_BREAK_PVD_LOCK
+#define __HAL_SYSCFG_BREAK_SRAM_ECC_LOCK __HAL_SBS_BREAK_SRAM_ECC_LOCK
+
+#define __HAL_SYSCFG_FASTMODEPLUS_ENABLE __HAL_SBS_FASTMODEPLUS_ENABLE
+#define __HAL_SYSCFG_FASTMODEPLUS_DISABLE __HAL_SBS_FASTMODEPLUS_DISABLE
+
+#define __HAL_SYSCFG_GET_MEMORIES_ERASE_STATUS __HAL_SBS_GET_MEMORIES_ERASE_STATUS
+#define __HAL_SYSCFG_CLEAR_MEMORIES_ERASE_STATUS __HAL_SBS_CLEAR_MEMORIES_ERASE_STATUS
+
+#define IS_SYSCFG_FPU_INTERRUPT IS_SBS_FPU_INTERRUPT
+#define IS_SYSCFG_BREAK_CONFIG IS_SBS_BREAK_CONFIG
+#define IS_SYSCFG_VREFBUF_VOLTAGE_SCALE IS_VREFBUF_VOLTAGE_SCALE
+#define IS_SYSCFG_VREFBUF_HIGH_IMPEDANCE IS_VREFBUF_HIGH_IMPEDANCE
+#define IS_SYSCFG_VREFBUF_TRIMMING IS_VREFBUF_TRIMMING
+#define IS_SYSCFG_FASTMODEPLUS IS_SBS_FASTMODEPLUS
+#define IS_SYSCFG_ITEMS_ATTRIBUTES IS_SBS_ITEMS_ATTRIBUTES
+#define IS_SYSCFG_ATTRIBUTES IS_SBS_ATTRIBUTES
+#define IS_SYSCFG_LOCK_ITEMS IS_SBS_LOCK_ITEMS
+
+#define HAL_SYSCFG_VREFBUF_VoltageScalingConfig HAL_VREFBUF_VoltageScalingConfig
+#define HAL_SYSCFG_VREFBUF_HighImpedanceConfig HAL_VREFBUF_HighImpedanceConfig
+#define HAL_SYSCFG_VREFBUF_TrimmingConfig HAL_VREFBUF_TrimmingConfig
+#define HAL_SYSCFG_EnableVREFBUF HAL_EnableVREFBUF
+#define HAL_SYSCFG_DisableVREFBUF HAL_DisableVREFBUF
+
+#define HAL_SYSCFG_EnableIOAnalogSwitchBooster HAL_SBS_EnableIOAnalogSwitchBooster
+#define HAL_SYSCFG_DisableIOAnalogSwitchBooster HAL_SBS_DisableIOAnalogSwitchBooster
+#define HAL_SYSCFG_ETHInterfaceSelect HAL_SBS_ETHInterfaceSelect
+
+#define HAL_SYSCFG_Lock HAL_SBS_Lock
+#define HAL_SYSCFG_GetLock HAL_SBS_GetLock
+
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+#define HAL_SYSCFG_ConfigAttributes HAL_SBS_ConfigAttributes
+#define HAL_SYSCFG_GetConfigAttributes HAL_SBS_GetConfigAttributes
+#endif /* __ARM_FEATURE_CMSE */
+
+#endif /* STM32H5 */
+
+
/**
* @}
*/
@@ -596,19 +762,21 @@
#define GPIO_AF10_OTG2_HS GPIO_AF10_OTG2_FS
#define GPIO_AF10_OTG1_FS GPIO_AF10_OTG1_HS
#define GPIO_AF12_OTG2_FS GPIO_AF12_OTG1_FS
-#endif /*STM32H743xx || STM32H753xx || STM32H750xx || STM32H742xx || STM32H745xx || STM32H755xx || STM32H747xx || STM32H757xx */
+#endif /*STM32H743xx || STM32H753xx || STM32H750xx || STM32H742xx || STM32H745xx || STM32H755xx || STM32H747xx || \
+ STM32H757xx */
#endif /* STM32H7 */
#define GPIO_AF0_LPTIM GPIO_AF0_LPTIM1
#define GPIO_AF1_LPTIM GPIO_AF1_LPTIM1
#define GPIO_AF2_LPTIM GPIO_AF2_LPTIM1
-#if defined(STM32L0) || defined(STM32L4) || defined(STM32F4) || defined(STM32F2) || defined(STM32F7) || defined(STM32G4) || defined(STM32H7) || defined(STM32WB)
+#if defined(STM32L0) || defined(STM32L4) || defined(STM32F4) || defined(STM32F2) || defined(STM32F7) || \
+ defined(STM32G4) || defined(STM32H7) || defined(STM32WB) || defined(STM32U5)
#define GPIO_SPEED_LOW GPIO_SPEED_FREQ_LOW
#define GPIO_SPEED_MEDIUM GPIO_SPEED_FREQ_MEDIUM
#define GPIO_SPEED_FAST GPIO_SPEED_FREQ_HIGH
#define GPIO_SPEED_HIGH GPIO_SPEED_FREQ_VERY_HIGH
-#endif /* STM32L0 || STM32L4 || STM32F4 || STM32F2 || STM32F7 || STM32G4 || STM32H7 || STM32WB*/
+#endif /* STM32L0 || STM32L4 || STM32F4 || STM32F2 || STM32F7 || STM32G4 || STM32H7 || STM32WB || STM32U5*/
#if defined(STM32L1)
#define GPIO_SPEED_VERY_LOW GPIO_SPEED_FREQ_LOW
@@ -624,6 +792,42 @@
#endif /* STM32F0 || STM32F3 || STM32F1 */
#define GPIO_AF6_DFSDM GPIO_AF6_DFSDM1
+
+#if defined(STM32U5) || defined(STM32H5)
+#define GPIO_AF0_RTC_50Hz GPIO_AF0_RTC_50HZ
+#endif /* STM32U5 || STM32H5 */
+#if defined(STM32U5)
+#define GPIO_AF0_S2DSTOP GPIO_AF0_SRDSTOP
+#define GPIO_AF11_LPGPIO GPIO_AF11_LPGPIO1
+#endif /* STM32U5 */
+/**
+ * @}
+ */
+
+/** @defgroup HAL_GTZC_Aliased_Defines HAL GTZC Aliased Defines maintained for legacy purpose
+ * @{
+ */
+#if defined(STM32U5)
+#define GTZC_PERIPH_DCMI GTZC_PERIPH_DCMI_PSSI
+#define GTZC_PERIPH_LTDC GTZC_PERIPH_LTDCUSB
+#endif /* STM32U5 */
+#if defined(STM32H5)
+#define GTZC_PERIPH_DAC12 GTZC_PERIPH_DAC1
+#define GTZC_PERIPH_ADC12 GTZC_PERIPH_ADC
+#define GTZC_PERIPH_USBFS GTZC_PERIPH_USB
+#endif /* STM32H5 */
+#if defined(STM32H5) || defined(STM32U5)
+#define GTZC_MCPBB_NB_VCTR_REG_MAX GTZC_MPCBB_NB_VCTR_REG_MAX
+#define GTZC_MCPBB_NB_LCK_VCTR_REG_MAX GTZC_MPCBB_NB_LCK_VCTR_REG_MAX
+#define GTZC_MCPBB_SUPERBLOCK_UNLOCKED GTZC_MPCBB_SUPERBLOCK_UNLOCKED
+#define GTZC_MCPBB_SUPERBLOCK_LOCKED GTZC_MPCBB_SUPERBLOCK_LOCKED
+#define GTZC_MCPBB_BLOCK_NSEC GTZC_MPCBB_BLOCK_NSEC
+#define GTZC_MCPBB_BLOCK_SEC GTZC_MPCBB_BLOCK_SEC
+#define GTZC_MCPBB_BLOCK_NPRIV GTZC_MPCBB_BLOCK_NPRIV
+#define GTZC_MCPBB_BLOCK_PRIV GTZC_MPCBB_BLOCK_PRIV
+#define GTZC_MCPBB_LOCK_OFF GTZC_MPCBB_LOCK_OFF
+#define GTZC_MCPBB_LOCK_ON GTZC_MPCBB_LOCK_ON
+#endif /* STM32H5 || STM32U5 */
/**
* @}
*/
@@ -804,7 +1008,8 @@
#define I2C_NOSTRETCH_ENABLED I2C_NOSTRETCH_ENABLE
#define I2C_ANALOGFILTER_ENABLED I2C_ANALOGFILTER_ENABLE
#define I2C_ANALOGFILTER_DISABLED I2C_ANALOGFILTER_DISABLE
-#if defined(STM32F0) || defined(STM32F1) || defined(STM32F3) || defined(STM32G0) || defined(STM32L4) || defined(STM32L1) || defined(STM32F7)
+#if defined(STM32F0) || defined(STM32F1) || defined(STM32F3) || defined(STM32G0) || defined(STM32L4) || \
+ defined(STM32L1) || defined(STM32F7)
#define HAL_I2C_STATE_MEM_BUSY_TX HAL_I2C_STATE_BUSY_TX
#define HAL_I2C_STATE_MEM_BUSY_RX HAL_I2C_STATE_BUSY_RX
#define HAL_I2C_STATE_MASTER_BUSY_TX HAL_I2C_STATE_BUSY_TX
@@ -861,6 +1066,20 @@
#define LPTIM_TRIGSAMPLETIME_4TRANSITION LPTIM_TRIGSAMPLETIME_4TRANSITIONS
#define LPTIM_TRIGSAMPLETIME_8TRANSITION LPTIM_TRIGSAMPLETIME_8TRANSITIONS
+
+/** @defgroup HAL_LPTIM_Aliased_Defines HAL LPTIM Aliased Defines maintained for legacy purpose
+ * @{
+ */
+#define HAL_LPTIM_ReadCompare HAL_LPTIM_ReadCapturedValue
+/**
+ * @}
+ */
+
+#if defined(STM32U5)
+#define LPTIM_ISR_CC1 LPTIM_ISR_CC1IF
+#define LPTIM_ISR_CC2 LPTIM_ISR_CC2IF
+#define LPTIM_CHANNEL_ALL 0x00000000U
+#endif /* STM32U5 */
/**
* @}
*/
@@ -928,7 +1147,7 @@
#define OPAMP_PGACONNECT_VM0 OPAMP_PGA_CONNECT_INVERTINGINPUT_IO0
#define OPAMP_PGACONNECT_VM1 OPAMP_PGA_CONNECT_INVERTINGINPUT_IO1
-#if defined(STM32L1) || defined(STM32L4) || defined(STM32L5) || defined(STM32H7) || defined(STM32G4)
+#if defined(STM32L1) || defined(STM32L4) || defined(STM32L5) || defined(STM32H7) || defined(STM32G4) || defined(STM32U5)
#define HAL_OPAMP_MSP_INIT_CB_ID HAL_OPAMP_MSPINIT_CB_ID
#define HAL_OPAMP_MSP_DEINIT_CB_ID HAL_OPAMP_MSPDEINIT_CB_ID
#endif
@@ -1012,8 +1231,8 @@
#define RTC_TAMPER1_2_3_INTERRUPT RTC_ALL_TAMPER_INTERRUPT
#define RTC_TIMESTAMPPIN_PC13 RTC_TIMESTAMPPIN_DEFAULT
-#define RTC_TIMESTAMPPIN_PA0 RTC_TIMESTAMPPIN_POS1
-#define RTC_TIMESTAMPPIN_PI8 RTC_TIMESTAMPPIN_POS1
+#define RTC_TIMESTAMPPIN_PA0 RTC_TIMESTAMPPIN_POS1
+#define RTC_TIMESTAMPPIN_PI8 RTC_TIMESTAMPPIN_POS1
#define RTC_TIMESTAMPPIN_PC1 RTC_TIMESTAMPPIN_POS2
#define RTC_OUTPUT_REMAP_PC13 RTC_OUTPUT_REMAP_NONE
@@ -1024,15 +1243,42 @@
#define RTC_TAMPERPIN_PA0 RTC_TAMPERPIN_POS1
#define RTC_TAMPERPIN_PI8 RTC_TAMPERPIN_POS1
+#if defined(STM32H5)
+#define TAMP_SECRETDEVICE_ERASE_NONE TAMP_DEVICESECRETS_ERASE_NONE
+#define TAMP_SECRETDEVICE_ERASE_BKP_SRAM TAMP_DEVICESECRETS_ERASE_BKPSRAM
+#endif /* STM32H5 */
+
+#if defined(STM32WBA)
+#define TAMP_SECRETDEVICE_ERASE_NONE TAMP_DEVICESECRETS_ERASE_NONE
+#define TAMP_SECRETDEVICE_ERASE_SRAM2 TAMP_DEVICESECRETS_ERASE_SRAM2
+#define TAMP_SECRETDEVICE_ERASE_RHUK TAMP_DEVICESECRETS_ERASE_RHUK
+#define TAMP_SECRETDEVICE_ERASE_ICACHE TAMP_DEVICESECRETS_ERASE_ICACHE
+#define TAMP_SECRETDEVICE_ERASE_SAES_AES_HASH TAMP_DEVICESECRETS_ERASE_SAES_AES_HASH
+#define TAMP_SECRETDEVICE_ERASE_PKA_SRAM TAMP_DEVICESECRETS_ERASE_PKA_SRAM
+#define TAMP_SECRETDEVICE_ERASE_ALL TAMP_DEVICESECRETS_ERASE_ALL
+#endif /* STM32WBA */
+
+#if defined(STM32H5) || defined(STM32WBA)
+#define TAMP_SECRETDEVICE_ERASE_DISABLE TAMP_DEVICESECRETS_ERASE_NONE
+#define TAMP_SECRETDEVICE_ERASE_ENABLE TAMP_SECRETDEVICE_ERASE_ALL
+#endif /* STM32H5 || STM32WBA */
+
+#if defined(STM32F7)
+#define RTC_TAMPCR_TAMPXE RTC_TAMPER_ENABLE_BITS_MASK
+#define RTC_TAMPCR_TAMPXIE RTC_TAMPER_IT_ENABLE_BITS_MASK
+#endif /* STM32F7 */
+
#if defined(STM32H7)
#define RTC_TAMPCR_TAMPXE RTC_TAMPER_X
#define RTC_TAMPCR_TAMPXIE RTC_TAMPER_X_INTERRUPT
+#endif /* STM32H7 */
+#if defined(STM32F7) || defined(STM32H7) || defined(STM32L0)
#define RTC_TAMPER1_INTERRUPT RTC_IT_TAMP1
#define RTC_TAMPER2_INTERRUPT RTC_IT_TAMP2
#define RTC_TAMPER3_INTERRUPT RTC_IT_TAMP3
-#define RTC_ALL_TAMPER_INTERRUPT RTC_IT_TAMPALL
-#endif /* STM32H7 */
+#define RTC_ALL_TAMPER_INTERRUPT RTC_IT_TAMP
+#endif /* STM32F7 || STM32H7 || STM32L0 */
/**
* @}
@@ -1199,6 +1445,10 @@
#define TIM_TIM3_TI1_COMP1COMP2_OUT TIM_TIM3_TI1_COMP1_COMP2
#endif
+#if defined(STM32U5)
+#define OCREF_CLEAR_SELECT_Pos OCREF_CLEAR_SELECT_POS
+#define OCREF_CLEAR_SELECT_Msk OCREF_CLEAR_SELECT_MSK
+#endif
/**
* @}
*/
@@ -1308,30 +1558,40 @@
#define ETH_MMCRFAECR 0x00000198U
#define ETH_MMCRGUFCR 0x000001C4U
-#define ETH_MAC_TXFIFO_FULL 0x02000000U /* Tx FIFO full */
-#define ETH_MAC_TXFIFONOT_EMPTY 0x01000000U /* Tx FIFO not empty */
-#define ETH_MAC_TXFIFO_WRITE_ACTIVE 0x00400000U /* Tx FIFO write active */
-#define ETH_MAC_TXFIFO_IDLE 0x00000000U /* Tx FIFO read status: Idle */
-#define ETH_MAC_TXFIFO_READ 0x00100000U /* Tx FIFO read status: Read (transferring data to the MAC transmitter) */
-#define ETH_MAC_TXFIFO_WAITING 0x00200000U /* Tx FIFO read status: Waiting for TxStatus from MAC transmitter */
-#define ETH_MAC_TXFIFO_WRITING 0x00300000U /* Tx FIFO read status: Writing the received TxStatus or flushing the TxFIFO */
-#define ETH_MAC_TRANSMISSION_PAUSE 0x00080000U /* MAC transmitter in pause */
-#define ETH_MAC_TRANSMITFRAMECONTROLLER_IDLE 0x00000000U /* MAC transmit frame controller: Idle */
-#define ETH_MAC_TRANSMITFRAMECONTROLLER_WAITING 0x00020000U /* MAC transmit frame controller: Waiting for Status of previous frame or IFG/backoff period to be over */
-#define ETH_MAC_TRANSMITFRAMECONTROLLER_GENRATING_PCF 0x00040000U /* MAC transmit frame controller: Generating and transmitting a Pause control frame (in full duplex mode) */
-#define ETH_MAC_TRANSMITFRAMECONTROLLER_TRANSFERRING 0x00060000U /* MAC transmit frame controller: Transferring input frame for transmission */
+#define ETH_MAC_TXFIFO_FULL 0x02000000U /* Tx FIFO full */
+#define ETH_MAC_TXFIFONOT_EMPTY 0x01000000U /* Tx FIFO not empty */
+#define ETH_MAC_TXFIFO_WRITE_ACTIVE 0x00400000U /* Tx FIFO write active */
+#define ETH_MAC_TXFIFO_IDLE 0x00000000U /* Tx FIFO read status: Idle */
+#define ETH_MAC_TXFIFO_READ 0x00100000U /* Tx FIFO read status: Read (transferring data to
+ the MAC transmitter) */
+#define ETH_MAC_TXFIFO_WAITING 0x00200000U /* Tx FIFO read status: Waiting for TxStatus from
+ MAC transmitter */
+#define ETH_MAC_TXFIFO_WRITING 0x00300000U /* Tx FIFO read status: Writing the received TxStatus
+ or flushing the TxFIFO */
+#define ETH_MAC_TRANSMISSION_PAUSE 0x00080000U /* MAC transmitter in pause */
+#define ETH_MAC_TRANSMITFRAMECONTROLLER_IDLE 0x00000000U /* MAC transmit frame controller: Idle */
+#define ETH_MAC_TRANSMITFRAMECONTROLLER_WAITING 0x00020000U /* MAC transmit frame controller: Waiting for Status
+ of previous frame or IFG/backoff period to be over */
+#define ETH_MAC_TRANSMITFRAMECONTROLLER_GENRATING_PCF 0x00040000U /* MAC transmit frame controller: Generating and
+ transmitting a Pause control frame (in full duplex mode) */
+#define ETH_MAC_TRANSMITFRAMECONTROLLER_TRANSFERRING 0x00060000U /* MAC transmit frame controller: Transferring input
+ frame for transmission */
#define ETH_MAC_MII_TRANSMIT_ACTIVE 0x00010000U /* MAC MII transmit engine active */
#define ETH_MAC_RXFIFO_EMPTY 0x00000000U /* Rx FIFO fill level: empty */
-#define ETH_MAC_RXFIFO_BELOW_THRESHOLD 0x00000100U /* Rx FIFO fill level: fill-level below flow-control de-activate threshold */
-#define ETH_MAC_RXFIFO_ABOVE_THRESHOLD 0x00000200U /* Rx FIFO fill level: fill-level above flow-control activate threshold */
+#define ETH_MAC_RXFIFO_BELOW_THRESHOLD 0x00000100U /* Rx FIFO fill level: fill-level below flow-control
+ de-activate threshold */
+#define ETH_MAC_RXFIFO_ABOVE_THRESHOLD 0x00000200U /* Rx FIFO fill level: fill-level above flow-control
+ activate threshold */
#define ETH_MAC_RXFIFO_FULL 0x00000300U /* Rx FIFO fill level: full */
#if defined(STM32F1)
#else
#define ETH_MAC_READCONTROLLER_IDLE 0x00000000U /* Rx FIFO read controller IDLE state */
#define ETH_MAC_READCONTROLLER_READING_DATA 0x00000020U /* Rx FIFO read controller Reading frame data */
-#define ETH_MAC_READCONTROLLER_READING_STATUS 0x00000040U /* Rx FIFO read controller Reading frame status (or time-stamp) */
+#define ETH_MAC_READCONTROLLER_READING_STATUS 0x00000040U /* Rx FIFO read controller Reading frame status
+ (or time-stamp) */
#endif
-#define ETH_MAC_READCONTROLLER_FLUSHING 0x00000060U /* Rx FIFO read controller Flushing the frame data and status */
+#define ETH_MAC_READCONTROLLER_FLUSHING 0x00000060U /* Rx FIFO read controller Flushing the frame data and
+ status */
#define ETH_MAC_RXFIFO_WRITE_ACTIVE 0x00000010U /* Rx FIFO write controller active */
#define ETH_MAC_SMALL_FIFO_NOTACTIVE 0x00000000U /* MAC small FIFO read / write controllers not active */
#define ETH_MAC_SMALL_FIFO_READ_ACTIVE 0x00000002U /* MAC small FIFO read controller active */
@@ -1389,7 +1649,7 @@
#if defined(STM32L4) || defined(STM32F7) || defined(STM32F427xx) || defined(STM32F437xx) \
|| defined(STM32F429xx) || defined(STM32F439xx) || defined(STM32F469xx) || defined(STM32F479xx) \
- || defined(STM32H7)
+ || defined(STM32H7) || defined(STM32U5)
/** @defgroup DMA2D_Aliases DMA2D API Aliases
* @{
*/
@@ -1399,7 +1659,7 @@
* @}
*/
-#endif /* STM32L4 || STM32F7 || STM32F4 || STM32H7 */
+#endif /* STM32L4 || STM32F7 || STM32F4 || STM32H7 || STM32U5 */
/** @defgroup HAL_PPP_Aliased_Defines HAL PPP Aliased Defines maintained for legacy purpose
* @{
@@ -1419,6 +1679,19 @@
* @}
*/
+/** @defgroup HAL_DCACHE_Aliased_Functions HAL DCACHE Aliased Functions maintained for legacy purpose
+ * @{
+ */
+
+#if defined(STM32U5)
+#define HAL_DCACHE_CleanInvalidateByAddr HAL_DCACHE_CleanInvalidByAddr
+#define HAL_DCACHE_CleanInvalidateByAddr_IT HAL_DCACHE_CleanInvalidByAddr_IT
+#endif /* STM32U5 */
+
+/**
+ * @}
+ */
+
#if !defined(STM32F2)
/** @defgroup HASH_alias HASH API alias
* @{
@@ -1489,7 +1762,8 @@
#define HAL_EnableDBGStandbyMode HAL_DBGMCU_EnableDBGStandbyMode
#define HAL_DisableDBGStandbyMode HAL_DBGMCU_DisableDBGStandbyMode
#define HAL_DBG_LowPowerConfig(Periph, cmd) (((cmd\
- )==ENABLE)? HAL_DBGMCU_DBG_EnableLowPowerConfig(Periph) : HAL_DBGMCU_DBG_DisableLowPowerConfig(Periph))
+ )==ENABLE)? HAL_DBGMCU_DBG_EnableLowPowerConfig(Periph) : \
+ HAL_DBGMCU_DBG_DisableLowPowerConfig(Periph))
#define HAL_VREFINT_OutputSelect HAL_SYSCFG_VREFINT_OutputSelect
#define HAL_Lock_Cmd(cmd) (((cmd)==ENABLE) ? HAL_SYSCFG_Enable_Lock_VREFINT() : HAL_SYSCFG_Disable_Lock_VREFINT())
#if defined(STM32L0)
@@ -1498,8 +1772,10 @@
#endif
#define HAL_ADC_EnableBuffer_Cmd(cmd) (((cmd)==ENABLE) ? HAL_ADCEx_EnableVREFINT() : HAL_ADCEx_DisableVREFINT())
#define HAL_ADC_EnableBufferSensor_Cmd(cmd) (((cmd\
- )==ENABLE) ? HAL_ADCEx_EnableVREFINTTempSensor() : HAL_ADCEx_DisableVREFINTTempSensor())
-#if defined(STM32H7A3xx) || defined(STM32H7B3xx) || defined(STM32H7B0xx) || defined(STM32H7A3xxQ) || defined(STM32H7B3xxQ) || defined(STM32H7B0xxQ)
+ )==ENABLE) ? HAL_ADCEx_EnableVREFINTTempSensor() : \
+ HAL_ADCEx_DisableVREFINTTempSensor())
+#if defined(STM32H7A3xx) || defined(STM32H7B3xx) || defined(STM32H7B0xx) || defined(STM32H7A3xxQ) || \
+ defined(STM32H7B3xxQ) || defined(STM32H7B0xxQ)
#define HAL_EnableSRDomainDBGStopMode HAL_EnableDomain3DBGStopMode
#define HAL_DisableSRDomainDBGStopMode HAL_DisableDomain3DBGStopMode
#define HAL_EnableSRDomainDBGStandbyMode HAL_EnableDomain3DBGStandbyMode
@@ -1533,16 +1809,21 @@
#define HAL_FMPI2CEx_AnalogFilter_Config HAL_FMPI2CEx_ConfigAnalogFilter
#define HAL_FMPI2CEx_DigitalFilter_Config HAL_FMPI2CEx_ConfigDigitalFilter
-#define HAL_I2CFastModePlusConfig(SYSCFG_I2CFastModePlus, cmd) (((cmd\
- )==ENABLE)? HAL_I2CEx_EnableFastModePlus(SYSCFG_I2CFastModePlus): HAL_I2CEx_DisableFastModePlus(SYSCFG_I2CFastModePlus))
+#define HAL_I2CFastModePlusConfig(SYSCFG_I2CFastModePlus, cmd) ((cmd == ENABLE)? \
+ HAL_I2CEx_EnableFastModePlus(SYSCFG_I2CFastModePlus): \
+ HAL_I2CEx_DisableFastModePlus(SYSCFG_I2CFastModePlus))
-#if defined(STM32H7) || defined(STM32WB) || defined(STM32G0) || defined(STM32F0) || defined(STM32F1) || defined(STM32F2) || defined(STM32F3) || defined(STM32F4) || defined(STM32F7) || defined(STM32L0) || defined(STM32L4) || defined(STM32L5) || defined(STM32G4) || defined(STM32L1)
+#if defined(STM32H7) || defined(STM32WB) || defined(STM32G0) || defined(STM32F0) || defined(STM32F1) || \
+ defined(STM32F2) || defined(STM32F3) || defined(STM32F4) || defined(STM32F7) || defined(STM32L0) || \
+ defined(STM32L4) || defined(STM32L5) || defined(STM32G4) || defined(STM32L1)
#define HAL_I2C_Master_Sequential_Transmit_IT HAL_I2C_Master_Seq_Transmit_IT
#define HAL_I2C_Master_Sequential_Receive_IT HAL_I2C_Master_Seq_Receive_IT
#define HAL_I2C_Slave_Sequential_Transmit_IT HAL_I2C_Slave_Seq_Transmit_IT
#define HAL_I2C_Slave_Sequential_Receive_IT HAL_I2C_Slave_Seq_Receive_IT
-#endif /* STM32H7 || STM32WB || STM32G0 || STM32F0 || STM32F1 || STM32F2 || STM32F3 || STM32F4 || STM32F7 || STM32L0 || STM32L4 || STM32L5 || STM32G4 || STM32L1 */
-#if defined(STM32H7) || defined(STM32WB) || defined(STM32G0) || defined(STM32F4) || defined(STM32F7) || defined(STM32L0) || defined(STM32L4) || defined(STM32L5) || defined(STM32G4)|| defined(STM32L1)
+#endif /* STM32H7 || STM32WB || STM32G0 || STM32F0 || STM32F1 || STM32F2 || STM32F3 || STM32F4 || STM32F7 || STM32L0 ||
+ STM32L4 || STM32L5 || STM32G4 || STM32L1 */
+#if defined(STM32H7) || defined(STM32WB) || defined(STM32G0) || defined(STM32F4) || defined(STM32F7) || \
+ defined(STM32L0) || defined(STM32L4) || defined(STM32L5) || defined(STM32G4)|| defined(STM32L1)
#define HAL_I2C_Master_Sequential_Transmit_DMA HAL_I2C_Master_Seq_Transmit_DMA
#define HAL_I2C_Master_Sequential_Receive_DMA HAL_I2C_Master_Seq_Receive_DMA
#define HAL_I2C_Slave_Sequential_Transmit_DMA HAL_I2C_Slave_Seq_Transmit_DMA
@@ -1616,10 +1897,111 @@
#define PWR_MODE_EVT PWR_PVD_MODE_NORMAL
+#if defined (STM32U5)
+#define PWR_SRAM1_PAGE1_STOP_RETENTION PWR_SRAM1_PAGE1_STOP
+#define PWR_SRAM1_PAGE2_STOP_RETENTION PWR_SRAM1_PAGE2_STOP
+#define PWR_SRAM1_PAGE3_STOP_RETENTION PWR_SRAM1_PAGE3_STOP
+#define PWR_SRAM1_PAGE4_STOP_RETENTION PWR_SRAM1_PAGE4_STOP
+#define PWR_SRAM1_PAGE5_STOP_RETENTION PWR_SRAM1_PAGE5_STOP
+#define PWR_SRAM1_PAGE6_STOP_RETENTION PWR_SRAM1_PAGE6_STOP
+#define PWR_SRAM1_PAGE7_STOP_RETENTION PWR_SRAM1_PAGE7_STOP
+#define PWR_SRAM1_PAGE8_STOP_RETENTION PWR_SRAM1_PAGE8_STOP
+#define PWR_SRAM1_PAGE9_STOP_RETENTION PWR_SRAM1_PAGE9_STOP
+#define PWR_SRAM1_PAGE10_STOP_RETENTION PWR_SRAM1_PAGE10_STOP
+#define PWR_SRAM1_PAGE11_STOP_RETENTION PWR_SRAM1_PAGE11_STOP
+#define PWR_SRAM1_PAGE12_STOP_RETENTION PWR_SRAM1_PAGE12_STOP
+#define PWR_SRAM1_FULL_STOP_RETENTION PWR_SRAM1_FULL_STOP
+
+#define PWR_SRAM2_PAGE1_STOP_RETENTION PWR_SRAM2_PAGE1_STOP
+#define PWR_SRAM2_PAGE2_STOP_RETENTION PWR_SRAM2_PAGE2_STOP
+#define PWR_SRAM2_FULL_STOP_RETENTION PWR_SRAM2_FULL_STOP
+
+#define PWR_SRAM3_PAGE1_STOP_RETENTION PWR_SRAM3_PAGE1_STOP
+#define PWR_SRAM3_PAGE2_STOP_RETENTION PWR_SRAM3_PAGE2_STOP
+#define PWR_SRAM3_PAGE3_STOP_RETENTION PWR_SRAM3_PAGE3_STOP
+#define PWR_SRAM3_PAGE4_STOP_RETENTION PWR_SRAM3_PAGE4_STOP
+#define PWR_SRAM3_PAGE5_STOP_RETENTION PWR_SRAM3_PAGE5_STOP
+#define PWR_SRAM3_PAGE6_STOP_RETENTION PWR_SRAM3_PAGE6_STOP
+#define PWR_SRAM3_PAGE7_STOP_RETENTION PWR_SRAM3_PAGE7_STOP
+#define PWR_SRAM3_PAGE8_STOP_RETENTION PWR_SRAM3_PAGE8_STOP
+#define PWR_SRAM3_PAGE9_STOP_RETENTION PWR_SRAM3_PAGE9_STOP
+#define PWR_SRAM3_PAGE10_STOP_RETENTION PWR_SRAM3_PAGE10_STOP
+#define PWR_SRAM3_PAGE11_STOP_RETENTION PWR_SRAM3_PAGE11_STOP
+#define PWR_SRAM3_PAGE12_STOP_RETENTION PWR_SRAM3_PAGE12_STOP
+#define PWR_SRAM3_PAGE13_STOP_RETENTION PWR_SRAM3_PAGE13_STOP
+#define PWR_SRAM3_FULL_STOP_RETENTION PWR_SRAM3_FULL_STOP
+
+#define PWR_SRAM4_FULL_STOP_RETENTION PWR_SRAM4_FULL_STOP
+
+#define PWR_SRAM5_PAGE1_STOP_RETENTION PWR_SRAM5_PAGE1_STOP
+#define PWR_SRAM5_PAGE2_STOP_RETENTION PWR_SRAM5_PAGE2_STOP
+#define PWR_SRAM5_PAGE3_STOP_RETENTION PWR_SRAM5_PAGE3_STOP
+#define PWR_SRAM5_PAGE4_STOP_RETENTION PWR_SRAM5_PAGE4_STOP
+#define PWR_SRAM5_PAGE5_STOP_RETENTION PWR_SRAM5_PAGE5_STOP
+#define PWR_SRAM5_PAGE6_STOP_RETENTION PWR_SRAM5_PAGE6_STOP
+#define PWR_SRAM5_PAGE7_STOP_RETENTION PWR_SRAM5_PAGE7_STOP
+#define PWR_SRAM5_PAGE8_STOP_RETENTION PWR_SRAM5_PAGE8_STOP
+#define PWR_SRAM5_PAGE9_STOP_RETENTION PWR_SRAM5_PAGE9_STOP
+#define PWR_SRAM5_PAGE10_STOP_RETENTION PWR_SRAM5_PAGE10_STOP
+#define PWR_SRAM5_PAGE11_STOP_RETENTION PWR_SRAM5_PAGE11_STOP
+#define PWR_SRAM5_PAGE12_STOP_RETENTION PWR_SRAM5_PAGE12_STOP
+#define PWR_SRAM5_PAGE13_STOP_RETENTION PWR_SRAM5_PAGE13_STOP
+#define PWR_SRAM5_FULL_STOP_RETENTION PWR_SRAM5_FULL_STOP
+
+#define PWR_SRAM6_PAGE1_STOP_RETENTION PWR_SRAM6_PAGE1_STOP
+#define PWR_SRAM6_PAGE2_STOP_RETENTION PWR_SRAM6_PAGE2_STOP
+#define PWR_SRAM6_PAGE3_STOP_RETENTION PWR_SRAM6_PAGE3_STOP
+#define PWR_SRAM6_PAGE4_STOP_RETENTION PWR_SRAM6_PAGE4_STOP
+#define PWR_SRAM6_PAGE5_STOP_RETENTION PWR_SRAM6_PAGE5_STOP
+#define PWR_SRAM6_PAGE6_STOP_RETENTION PWR_SRAM6_PAGE6_STOP
+#define PWR_SRAM6_PAGE7_STOP_RETENTION PWR_SRAM6_PAGE7_STOP
+#define PWR_SRAM6_PAGE8_STOP_RETENTION PWR_SRAM6_PAGE8_STOP
+#define PWR_SRAM6_FULL_STOP_RETENTION PWR_SRAM6_FULL_STOP
+
+
+#define PWR_ICACHE_FULL_STOP_RETENTION PWR_ICACHE_FULL_STOP
+#define PWR_DCACHE1_FULL_STOP_RETENTION PWR_DCACHE1_FULL_STOP
+#define PWR_DCACHE2_FULL_STOP_RETENTION PWR_DCACHE2_FULL_STOP
+#define PWR_DMA2DRAM_FULL_STOP_RETENTION PWR_DMA2DRAM_FULL_STOP
+#define PWR_PERIPHRAM_FULL_STOP_RETENTION PWR_PERIPHRAM_FULL_STOP
+#define PWR_PKA32RAM_FULL_STOP_RETENTION PWR_PKA32RAM_FULL_STOP
+#define PWR_GRAPHICPRAM_FULL_STOP_RETENTION PWR_GRAPHICPRAM_FULL_STOP
+#define PWR_DSIRAM_FULL_STOP_RETENTION PWR_DSIRAM_FULL_STOP
+#define PWR_JPEGRAM_FULL_STOP_RETENTION PWR_JPEGRAM_FULL_STOP
+
+
+#define PWR_SRAM2_PAGE1_STANDBY_RETENTION PWR_SRAM2_PAGE1_STANDBY
+#define PWR_SRAM2_PAGE2_STANDBY_RETENTION PWR_SRAM2_PAGE2_STANDBY
+#define PWR_SRAM2_FULL_STANDBY_RETENTION PWR_SRAM2_FULL_STANDBY
+
+#define PWR_SRAM1_FULL_RUN_RETENTION PWR_SRAM1_FULL_RUN
+#define PWR_SRAM2_FULL_RUN_RETENTION PWR_SRAM2_FULL_RUN
+#define PWR_SRAM3_FULL_RUN_RETENTION PWR_SRAM3_FULL_RUN
+#define PWR_SRAM4_FULL_RUN_RETENTION PWR_SRAM4_FULL_RUN
+#define PWR_SRAM5_FULL_RUN_RETENTION PWR_SRAM5_FULL_RUN
+#define PWR_SRAM6_FULL_RUN_RETENTION PWR_SRAM6_FULL_RUN
+
+#define PWR_ALL_RAM_RUN_RETENTION_MASK PWR_ALL_RAM_RUN_MASK
+#endif
+
/**
* @}
*/
+/** @defgroup HAL_RTC_Aliased_Functions HAL RTC Aliased Functions maintained for legacy purpose
+ * @{
+ */
+#if defined(STM32H5) || defined(STM32WBA)
+#define HAL_RTCEx_SetBoothardwareKey HAL_RTCEx_LockBootHardwareKey
+#define HAL_RTCEx_BKUPBlock_Enable HAL_RTCEx_BKUPBlock
+#define HAL_RTCEx_BKUPBlock_Disable HAL_RTCEx_BKUPUnblock
+#define HAL_RTCEx_Erase_SecretDev_Conf HAL_RTCEx_ConfigEraseDeviceSecrets
+#endif /* STM32H5 || STM32WBA */
+
+/**
+ * @}
+ */
+
/** @defgroup HAL_SMBUS_Aliased_Functions HAL SMBUS Aliased Functions maintained for legacy purpose
* @{
*/
@@ -1645,7 +2027,8 @@
#define HAL_TIM_DMAError TIM_DMAError
#define HAL_TIM_DMACaptureCplt TIM_DMACaptureCplt
#define HAL_TIMEx_DMACommutationCplt TIMEx_DMACommutationCplt
-#if defined(STM32H7) || defined(STM32G0) || defined(STM32F0) || defined(STM32F1) || defined(STM32F2) || defined(STM32F3) || defined(STM32F4) || defined(STM32F7) || defined(STM32L0) || defined(STM32L4)
+#if defined(STM32H7) || defined(STM32G0) || defined(STM32F0) || defined(STM32F1) || defined(STM32F2) || \
+ defined(STM32F3) || defined(STM32F4) || defined(STM32F7) || defined(STM32L0) || defined(STM32L4)
#define HAL_TIM_SlaveConfigSynchronization HAL_TIM_SlaveConfigSynchro
#define HAL_TIM_SlaveConfigSynchronization_IT HAL_TIM_SlaveConfigSynchro_IT
#define HAL_TIMEx_CommutationCallback HAL_TIMEx_CommutCallback
@@ -1902,7 +2285,8 @@
#define COMP_STOP __HAL_COMP_DISABLE
#define COMP_LOCK __HAL_COMP_LOCK
-#if defined(STM32F301x8) || defined(STM32F302x8) || defined(STM32F318xx) || defined(STM32F303x8) || defined(STM32F334x8) || defined(STM32F328xx)
+#if defined(STM32F301x8) || defined(STM32F302x8) || defined(STM32F318xx) || defined(STM32F303x8) || \
+ defined(STM32F334x8) || defined(STM32F328xx)
#define __HAL_COMP_EXTI_RISING_IT_ENABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_ENABLE_RISING_EDGE() : \
((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_ENABLE_RISING_EDGE() : \
__HAL_COMP_COMP6_EXTI_ENABLE_RISING_EDGE())
@@ -2074,8 +2458,10 @@
/** @defgroup HAL_COMP_Aliased_Functions HAL COMP Aliased Functions maintained for legacy purpose
* @{
*/
-#define HAL_COMP_Start_IT HAL_COMP_Start /* Function considered as legacy as EXTI event or IT configuration is done into HAL_COMP_Init() */
-#define HAL_COMP_Stop_IT HAL_COMP_Stop /* Function considered as legacy as EXTI event or IT configuration is done into HAL_COMP_Init() */
+#define HAL_COMP_Start_IT HAL_COMP_Start /* Function considered as legacy as EXTI event or IT configuration is
+ done into HAL_COMP_Init() */
+#define HAL_COMP_Stop_IT HAL_COMP_Stop /* Function considered as legacy as EXTI event or IT configuration is
+ done into HAL_COMP_Init() */
/**
* @}
*/
@@ -2234,7 +2620,9 @@
#define __HAL_PWR_INTERNALWAKEUP_ENABLE HAL_PWREx_EnableInternalWakeUpLine
#define __HAL_PWR_PULL_UP_DOWN_CONFIG_DISABLE HAL_PWREx_DisablePullUpPullDownConfig
#define __HAL_PWR_PULL_UP_DOWN_CONFIG_ENABLE HAL_PWREx_EnablePullUpPullDownConfig
-#define __HAL_PWR_PVD_EXTI_CLEAR_EGDE_TRIGGER() do { __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE();__HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE(); } while(0)
+#define __HAL_PWR_PVD_EXTI_CLEAR_EGDE_TRIGGER() do { __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE(); \
+ __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE(); \
+ } while(0)
#define __HAL_PWR_PVD_EXTI_EVENT_DISABLE __HAL_PWR_PVD_EXTI_DISABLE_EVENT
#define __HAL_PWR_PVD_EXTI_EVENT_ENABLE __HAL_PWR_PVD_EXTI_ENABLE_EVENT
#define __HAL_PWR_PVD_EXTI_FALLINGTRIGGER_DISABLE __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE
@@ -2243,8 +2631,12 @@
#define __HAL_PWR_PVD_EXTI_RISINGTRIGGER_ENABLE __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE
#define __HAL_PWR_PVD_EXTI_SET_FALLING_EGDE_TRIGGER __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE
#define __HAL_PWR_PVD_EXTI_SET_RISING_EDGE_TRIGGER __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE
-#define __HAL_PWR_PVM_DISABLE() do { HAL_PWREx_DisablePVM1();HAL_PWREx_DisablePVM2();HAL_PWREx_DisablePVM3();HAL_PWREx_DisablePVM4(); } while(0)
-#define __HAL_PWR_PVM_ENABLE() do { HAL_PWREx_EnablePVM1();HAL_PWREx_EnablePVM2();HAL_PWREx_EnablePVM3();HAL_PWREx_EnablePVM4(); } while(0)
+#define __HAL_PWR_PVM_DISABLE() do { HAL_PWREx_DisablePVM1();HAL_PWREx_DisablePVM2(); \
+ HAL_PWREx_DisablePVM3();HAL_PWREx_DisablePVM4(); \
+ } while(0)
+#define __HAL_PWR_PVM_ENABLE() do { HAL_PWREx_EnablePVM1();HAL_PWREx_EnablePVM2(); \
+ HAL_PWREx_EnablePVM3();HAL_PWREx_EnablePVM4(); \
+ } while(0)
#define __HAL_PWR_SRAM2CONTENT_PRESERVE_DISABLE HAL_PWREx_DisableSRAM2ContentRetention
#define __HAL_PWR_SRAM2CONTENT_PRESERVE_ENABLE HAL_PWREx_EnableSRAM2ContentRetention
#define __HAL_PWR_VDDIO2_DISABLE HAL_PWREx_DisableVddIO2
@@ -2280,8 +2672,8 @@
#define RCC_StopWakeUpClock_HSI RCC_STOP_WAKEUPCLOCK_HSI
#define HAL_RCC_CCSCallback HAL_RCC_CSSCallback
-#define HAL_RC48_EnableBuffer_Cmd(cmd) (((cmd\
- )==ENABLE) ? HAL_RCCEx_EnableHSI48_VREFINT() : HAL_RCCEx_DisableHSI48_VREFINT())
+#define HAL_RC48_EnableBuffer_Cmd(cmd) (((cmd)==ENABLE) ? \
+ HAL_RCCEx_EnableHSI48_VREFINT() : HAL_RCCEx_DisableHSI48_VREFINT())
#define __ADC_CLK_DISABLE __HAL_RCC_ADC_CLK_DISABLE
#define __ADC_CLK_ENABLE __HAL_RCC_ADC_CLK_ENABLE
@@ -2785,6 +3177,11 @@
#define __HAL_RCC_WWDG_IS_CLK_ENABLED __HAL_RCC_WWDG1_IS_CLK_ENABLED
#define __HAL_RCC_WWDG_IS_CLK_DISABLED __HAL_RCC_WWDG1_IS_CLK_DISABLED
+#define RCC_SPI4CLKSOURCE_D2PCLK1 RCC_SPI4CLKSOURCE_D2PCLK2
+#define RCC_SPI5CLKSOURCE_D2PCLK1 RCC_SPI5CLKSOURCE_D2PCLK2
+#define RCC_SPI45CLKSOURCE_D2PCLK1 RCC_SPI45CLKSOURCE_D2PCLK2
+#define RCC_SPI45CLKSOURCE_CDPCLK1 RCC_SPI45CLKSOURCE_CDPCLK2
+#define RCC_SPI45CLKSOURCE_PCLK1 RCC_SPI45CLKSOURCE_PCLK2
#endif
#define __WWDG_CLK_DISABLE __HAL_RCC_WWDG_CLK_DISABLE
@@ -3249,7 +3646,8 @@
#define RCC_MCOSOURCE_PLLCLK_NODIV RCC_MCO1SOURCE_PLLCLK
#define RCC_MCOSOURCE_PLLCLK_DIV2 RCC_MCO1SOURCE_PLLCLK_DIV2
-#if defined(STM32L4) || defined(STM32WB) || defined(STM32G0) || defined(STM32G4) || defined(STM32L5) || defined(STM32WL)
+#if defined(STM32L4) || defined(STM32WB) || defined(STM32G0) || defined(STM32G4) || defined(STM32L5) || \
+ defined(STM32WL) || defined(STM32C0)
#define RCC_RTCCLKSOURCE_NO_CLK RCC_RTCCLKSOURCE_NONE
#else
#define RCC_RTCCLKSOURCE_NONE RCC_RTCCLKSOURCE_NO_CLK
@@ -3361,6 +3759,125 @@
#define RCC_DFSDM1CLKSOURCE_APB2 RCC_DFSDM1CLKSOURCE_PCLK2
#define RCC_DFSDM2CLKSOURCE_APB2 RCC_DFSDM2CLKSOURCE_PCLK2
#define RCC_FMPI2C1CLKSOURCE_APB RCC_FMPI2C1CLKSOURCE_PCLK1
+#if defined(STM32U5)
+#define MSIKPLLModeSEL RCC_MSIKPLL_MODE_SEL
+#define MSISPLLModeSEL RCC_MSISPLL_MODE_SEL
+#define __HAL_RCC_AHB21_CLK_DISABLE __HAL_RCC_AHB2_1_CLK_DISABLE
+#define __HAL_RCC_AHB22_CLK_DISABLE __HAL_RCC_AHB2_2_CLK_DISABLE
+#define __HAL_RCC_AHB1_CLK_Disable_Clear __HAL_RCC_AHB1_CLK_ENABLE
+#define __HAL_RCC_AHB21_CLK_Disable_Clear __HAL_RCC_AHB2_1_CLK_ENABLE
+#define __HAL_RCC_AHB22_CLK_Disable_Clear __HAL_RCC_AHB2_2_CLK_ENABLE
+#define __HAL_RCC_AHB3_CLK_Disable_Clear __HAL_RCC_AHB3_CLK_ENABLE
+#define __HAL_RCC_APB1_CLK_Disable_Clear __HAL_RCC_APB1_CLK_ENABLE
+#define __HAL_RCC_APB2_CLK_Disable_Clear __HAL_RCC_APB2_CLK_ENABLE
+#define __HAL_RCC_APB3_CLK_Disable_Clear __HAL_RCC_APB3_CLK_ENABLE
+#define IS_RCC_MSIPLLModeSelection IS_RCC_MSIPLLMODE_SELECT
+#define RCC_PERIPHCLK_CLK48 RCC_PERIPHCLK_ICLK
+#define RCC_CLK48CLKSOURCE_HSI48 RCC_ICLK_CLKSOURCE_HSI48
+#define RCC_CLK48CLKSOURCE_PLL2 RCC_ICLK_CLKSOURCE_PLL2
+#define RCC_CLK48CLKSOURCE_PLL1 RCC_ICLK_CLKSOURCE_PLL1
+#define RCC_CLK48CLKSOURCE_MSIK RCC_ICLK_CLKSOURCE_MSIK
+#define __HAL_RCC_ADC1_CLK_ENABLE __HAL_RCC_ADC12_CLK_ENABLE
+#define __HAL_RCC_ADC1_CLK_DISABLE __HAL_RCC_ADC12_CLK_DISABLE
+#define __HAL_RCC_ADC1_IS_CLK_ENABLED __HAL_RCC_ADC12_IS_CLK_ENABLED
+#define __HAL_RCC_ADC1_IS_CLK_DISABLED __HAL_RCC_ADC12_IS_CLK_DISABLED
+#define __HAL_RCC_ADC1_FORCE_RESET __HAL_RCC_ADC12_FORCE_RESET
+#define __HAL_RCC_ADC1_RELEASE_RESET __HAL_RCC_ADC12_RELEASE_RESET
+#define __HAL_RCC_ADC1_CLK_SLEEP_ENABLE __HAL_RCC_ADC12_CLK_SLEEP_ENABLE
+#define __HAL_RCC_ADC1_CLK_SLEEP_DISABLE __HAL_RCC_ADC12_CLK_SLEEP_DISABLE
+#define __HAL_RCC_GET_CLK48_SOURCE __HAL_RCC_GET_ICLK_SOURCE
+#define __HAL_RCC_PLLFRACN_ENABLE __HAL_RCC_PLL_FRACN_ENABLE
+#define __HAL_RCC_PLLFRACN_DISABLE __HAL_RCC_PLL_FRACN_DISABLE
+#define __HAL_RCC_PLLFRACN_CONFIG __HAL_RCC_PLL_FRACN_CONFIG
+#define IS_RCC_PLLFRACN_VALUE IS_RCC_PLL_FRACN_VALUE
+#endif /* STM32U5 */
+
+#if defined(STM32H5)
+#define __HAL_RCC_PLLFRACN_ENABLE __HAL_RCC_PLL_FRACN_ENABLE
+#define __HAL_RCC_PLLFRACN_DISABLE __HAL_RCC_PLL_FRACN_DISABLE
+#define __HAL_RCC_PLLFRACN_CONFIG __HAL_RCC_PLL_FRACN_CONFIG
+#define IS_RCC_PLLFRACN_VALUE IS_RCC_PLL_FRACN_VALUE
+
+#define RCC_PLLSOURCE_NONE RCC_PLL1_SOURCE_NONE
+#define RCC_PLLSOURCE_HSI RCC_PLL1_SOURCE_HSI
+#define RCC_PLLSOURCE_CSI RCC_PLL1_SOURCE_CSI
+#define RCC_PLLSOURCE_HSE RCC_PLL1_SOURCE_HSE
+#define RCC_PLLVCIRANGE_0 RCC_PLL1_VCIRANGE_0
+#define RCC_PLLVCIRANGE_1 RCC_PLL1_VCIRANGE_1
+#define RCC_PLLVCIRANGE_2 RCC_PLL1_VCIRANGE_2
+#define RCC_PLLVCIRANGE_3 RCC_PLL1_VCIRANGE_3
+#define RCC_PLL1VCOWIDE RCC_PLL1_VCORANGE_WIDE
+#define RCC_PLL1VCOMEDIUM RCC_PLL1_VCORANGE_MEDIUM
+
+#define IS_RCC_PLLSOURCE IS_RCC_PLL1_SOURCE
+#define IS_RCC_PLLRGE_VALUE IS_RCC_PLL1_VCIRGE_VALUE
+#define IS_RCC_PLLVCORGE_VALUE IS_RCC_PLL1_VCORGE_VALUE
+#define IS_RCC_PLLCLOCKOUT_VALUE IS_RCC_PLL1_CLOCKOUT_VALUE
+#define IS_RCC_PLL_FRACN_VALUE IS_RCC_PLL1_FRACN_VALUE
+#define IS_RCC_PLLM_VALUE IS_RCC_PLL1_DIVM_VALUE
+#define IS_RCC_PLLN_VALUE IS_RCC_PLL1_MULN_VALUE
+#define IS_RCC_PLLP_VALUE IS_RCC_PLL1_DIVP_VALUE
+#define IS_RCC_PLLQ_VALUE IS_RCC_PLL1_DIVQ_VALUE
+#define IS_RCC_PLLR_VALUE IS_RCC_PLL1_DIVR_VALUE
+
+#define __HAL_RCC_PLL_ENABLE __HAL_RCC_PLL1_ENABLE
+#define __HAL_RCC_PLL_DISABLE __HAL_RCC_PLL1_DISABLE
+#define __HAL_RCC_PLL_FRACN_ENABLE __HAL_RCC_PLL1_FRACN_ENABLE
+#define __HAL_RCC_PLL_FRACN_DISABLE __HAL_RCC_PLL1_FRACN_DISABLE
+#define __HAL_RCC_PLL_CONFIG __HAL_RCC_PLL1_CONFIG
+#define __HAL_RCC_PLL_PLLSOURCE_CONFIG __HAL_RCC_PLL1_PLLSOURCE_CONFIG
+#define __HAL_RCC_PLL_DIVM_CONFIG __HAL_RCC_PLL1_DIVM_CONFIG
+#define __HAL_RCC_PLL_FRACN_CONFIG __HAL_RCC_PLL1_FRACN_CONFIG
+#define __HAL_RCC_PLL_VCIRANGE __HAL_RCC_PLL1_VCIRANGE
+#define __HAL_RCC_PLL_VCORANGE __HAL_RCC_PLL1_VCORANGE
+#define __HAL_RCC_GET_PLL_OSCSOURCE __HAL_RCC_GET_PLL1_OSCSOURCE
+#define __HAL_RCC_PLLCLKOUT_ENABLE __HAL_RCC_PLL1_CLKOUT_ENABLE
+#define __HAL_RCC_PLLCLKOUT_DISABLE __HAL_RCC_PLL1_CLKOUT_DISABLE
+#define __HAL_RCC_GET_PLLCLKOUT_CONFIG __HAL_RCC_GET_PLL1_CLKOUT_CONFIG
+
+#define __HAL_RCC_PLL2FRACN_ENABLE __HAL_RCC_PLL2_FRACN_ENABLE
+#define __HAL_RCC_PLL2FRACN_DISABLE __HAL_RCC_PLL2_FRACN_DISABLE
+#define __HAL_RCC_PLL2CLKOUT_ENABLE __HAL_RCC_PLL2_CLKOUT_ENABLE
+#define __HAL_RCC_PLL2CLKOUT_DISABLE __HAL_RCC_PLL2_CLKOUT_DISABLE
+#define __HAL_RCC_PLL2FRACN_CONFIG __HAL_RCC_PLL2_FRACN_CONFIG
+#define __HAL_RCC_GET_PLL2CLKOUT_CONFIG __HAL_RCC_GET_PLL2_CLKOUT_CONFIG
+
+#define __HAL_RCC_PLL3FRACN_ENABLE __HAL_RCC_PLL3_FRACN_ENABLE
+#define __HAL_RCC_PLL3FRACN_DISABLE __HAL_RCC_PLL3_FRACN_DISABLE
+#define __HAL_RCC_PLL3CLKOUT_ENABLE __HAL_RCC_PLL3_CLKOUT_ENABLE
+#define __HAL_RCC_PLL3CLKOUT_DISABLE __HAL_RCC_PLL3_CLKOUT_DISABLE
+#define __HAL_RCC_PLL3FRACN_CONFIG __HAL_RCC_PLL3_FRACN_CONFIG
+#define __HAL_RCC_GET_PLL3CLKOUT_CONFIG __HAL_RCC_GET_PLL3_CLKOUT_CONFIG
+
+#define RCC_PLL2VCIRANGE_0 RCC_PLL2_VCIRANGE_0
+#define RCC_PLL2VCIRANGE_1 RCC_PLL2_VCIRANGE_1
+#define RCC_PLL2VCIRANGE_2 RCC_PLL2_VCIRANGE_2
+#define RCC_PLL2VCIRANGE_3 RCC_PLL2_VCIRANGE_3
+
+#define RCC_PLL2VCOWIDE RCC_PLL2_VCORANGE_WIDE
+#define RCC_PLL2VCOMEDIUM RCC_PLL2_VCORANGE_MEDIUM
+
+#define RCC_PLL2SOURCE_NONE RCC_PLL2_SOURCE_NONE
+#define RCC_PLL2SOURCE_HSI RCC_PLL2_SOURCE_HSI
+#define RCC_PLL2SOURCE_CSI RCC_PLL2_SOURCE_CSI
+#define RCC_PLL2SOURCE_HSE RCC_PLL2_SOURCE_HSE
+
+#define RCC_PLL3VCIRANGE_0 RCC_PLL3_VCIRANGE_0
+#define RCC_PLL3VCIRANGE_1 RCC_PLL3_VCIRANGE_1
+#define RCC_PLL3VCIRANGE_2 RCC_PLL3_VCIRANGE_2
+#define RCC_PLL3VCIRANGE_3 RCC_PLL3_VCIRANGE_3
+
+#define RCC_PLL3VCOWIDE RCC_PLL3_VCORANGE_WIDE
+#define RCC_PLL3VCOMEDIUM RCC_PLL3_VCORANGE_MEDIUM
+
+#define RCC_PLL3SOURCE_NONE RCC_PLL3_SOURCE_NONE
+#define RCC_PLL3SOURCE_HSI RCC_PLL3_SOURCE_HSI
+#define RCC_PLL3SOURCE_CSI RCC_PLL3_SOURCE_CSI
+#define RCC_PLL3SOURCE_HSE RCC_PLL3_SOURCE_HSE
+
+
+#endif /* STM32H5 */
+
/**
* @}
*/
@@ -3377,7 +3894,9 @@
/** @defgroup HAL_RTC_Aliased_Macros HAL RTC Aliased Macros maintained for legacy purpose
* @{
*/
-#if defined (STM32G0) || defined (STM32L5) || defined (STM32L412xx) || defined (STM32L422xx) || defined (STM32L4P5xx) || defined (STM32L4Q5xx) || defined (STM32G4) || defined (STM32WL)
+#if defined (STM32G0) || defined (STM32L5) || defined (STM32L412xx) || defined (STM32L422xx) || \
+ defined (STM32L4P5xx)|| defined (STM32L4Q5xx) || defined (STM32G4) || defined (STM32WL) || defined (STM32U5) || \
+ defined (STM32WBA) || defined (STM32H5) || defined (STM32C0)
#else
#define __HAL_RTC_CLEAR_FLAG __HAL_RTC_EXTI_CLEAR_FLAG
#endif
@@ -3412,6 +3931,11 @@
__HAL_RTC_TAMPER_TIMESTAMP_EXTI_GENERATE_SWIT()))
#endif /* STM32F1 */
+#if defined (STM32F0) || defined (STM32F2) || defined (STM32F3) || defined (STM32F4) || defined (STM32F7) || \
+ defined (STM32L0) || defined (STM32L1)
+#define __HAL_RTC_TAMPER_GET_IT __HAL_RTC_TAMPER_GET_FLAG
+#endif
+
#define IS_ALARM IS_RTC_ALARM
#define IS_ALARM_MASK IS_RTC_ALARM_MASK
#define IS_TAMPER IS_RTC_TAMPER
@@ -3430,17 +3954,31 @@
#define __RTC_WRITEPROTECTION_ENABLE __HAL_RTC_WRITEPROTECTION_ENABLE
#define __RTC_WRITEPROTECTION_DISABLE __HAL_RTC_WRITEPROTECTION_DISABLE
+#if defined (STM32H5)
+#define __HAL_RCC_RTCAPB_CLK_ENABLE __HAL_RCC_RTC_CLK_ENABLE
+#define __HAL_RCC_RTCAPB_CLK_DISABLE __HAL_RCC_RTC_CLK_DISABLE
+#endif /* STM32H5 */
+
/**
* @}
*/
-/** @defgroup HAL_SD_Aliased_Macros HAL SD Aliased Macros maintained for legacy purpose
+/** @defgroup HAL_SD_Aliased_Macros HAL SD/MMC Aliased Macros maintained for legacy purpose
* @{
*/
#define SD_OCR_CID_CSD_OVERWRIETE SD_OCR_CID_CSD_OVERWRITE
#define SD_CMD_SD_APP_STAUS SD_CMD_SD_APP_STATUS
+#if !defined(STM32F1) && !defined(STM32F2) && !defined(STM32F4) && !defined(STM32L1)
+#define eMMC_HIGH_VOLTAGE_RANGE EMMC_HIGH_VOLTAGE_RANGE
+#define eMMC_DUAL_VOLTAGE_RANGE EMMC_DUAL_VOLTAGE_RANGE
+#define eMMC_LOW_VOLTAGE_RANGE EMMC_LOW_VOLTAGE_RANGE
+
+#define SDMMC_NSpeed_CLK_DIV SDMMC_NSPEED_CLK_DIV
+#define SDMMC_HSpeed_CLK_DIV SDMMC_HSPEED_CLK_DIV
+#endif
+
#if defined(STM32F4) || defined(STM32F2)
#define SD_SDMMC_DISABLED SD_SDIO_DISABLED
#define SD_SDMMC_FUNCTION_BUSY SD_SDIO_FUNCTION_BUSY
@@ -3769,6 +4307,16 @@
* @}
*/
+/** @defgroup HAL_Generic_Aliased_Macros HAL Generic Aliased Macros maintained for legacy purpose
+ * @{
+ */
+#if defined (STM32F7)
+#define ART_ACCLERATOR_ENABLE ART_ACCELERATOR_ENABLE
+#endif /* STM32F7 */
+/**
+ * @}
+ */
+
/** @defgroup HAL_PPP_Aliased_Macros HAL PPP Aliased Macros maintained for legacy purpose
* @{
*/
@@ -3782,3 +4330,5 @@
#endif
#endif /* STM32_HAL_LEGACY */
+
+
diff --git a/Inc/stm32_assert_template.h b/Inc/stm32_assert_template.h
index d0c3b72..ff69bd7 100644
--- a/Inc/stm32_assert_template.h
+++ b/Inc/stm32_assert_template.h
@@ -51,3 +51,6 @@
#endif
#endif /* __STM32_ASSERT_H */
+
+
+
diff --git a/Inc/stm32f2xx_hal.h b/Inc/stm32f2xx_hal.h
index fce23cd..553e7bd 100644
--- a/Inc/stm32f2xx_hal.h
+++ b/Inc/stm32f2xx_hal.h
@@ -242,3 +242,5 @@
#endif
#endif /* __STM32F2xx_HAL_H */
+
+
diff --git a/Inc/stm32f2xx_hal_adc.h b/Inc/stm32f2xx_hal_adc.h
index d9a1596..7d4f768 100644
--- a/Inc/stm32f2xx_hal_adc.h
+++ b/Inc/stm32f2xx_hal_adc.h
@@ -885,3 +885,5 @@
#endif
#endif /*__STM32F2xx_ADC_H */
+
+
diff --git a/Inc/stm32f2xx_hal_adc_ex.h b/Inc/stm32f2xx_hal_adc_ex.h
index 6054bfc..3c389db 100644
--- a/Inc/stm32f2xx_hal_adc_ex.h
+++ b/Inc/stm32f2xx_hal_adc_ex.h
@@ -354,3 +354,5 @@
#endif
#endif /*__STM32F2xx_ADC_EX_H */
+
+
diff --git a/Inc/stm32f2xx_hal_conf_template.h b/Inc/stm32f2xx_hal_conf_template.h
index 7596d14..bcefa78 100644
--- a/Inc/stm32f2xx_hal_conf_template.h
+++ b/Inc/stm32f2xx_hal_conf_template.h
@@ -5,6 +5,7 @@
* @brief HAL configuration template file.
* This file should be copied to the application folder and renamed
* to stm32f2xx_hal_conf.h.
+ *
******************************************************************************
* @attention
*
@@ -416,3 +417,5 @@
#endif
#endif /* __STM32F2xx_HAL_CONF_H */
+
+
diff --git a/Inc/stm32f2xx_hal_cortex.h b/Inc/stm32f2xx_hal_cortex.h
index 29ab1b4..9a6fc6a 100644
--- a/Inc/stm32f2xx_hal_cortex.h
+++ b/Inc/stm32f2xx_hal_cortex.h
@@ -404,3 +404,5 @@
#endif
#endif /* __STM32F2xx_HAL_CORTEX_H */
+
+
diff --git a/Inc/stm32f2xx_hal_crc.h b/Inc/stm32f2xx_hal_crc.h
index a130d42..4a438ad 100644
--- a/Inc/stm32f2xx_hal_crc.h
+++ b/Inc/stm32f2xx_hal_crc.h
@@ -157,7 +157,7 @@
/** @defgroup CRC_Exported_Functions_Group3 Peripheral State functions
* @{
*/
-HAL_CRC_StateTypeDef HAL_CRC_GetState(CRC_HandleTypeDef *hcrc);
+HAL_CRC_StateTypeDef HAL_CRC_GetState(const CRC_HandleTypeDef *hcrc);
/**
* @}
*/
diff --git a/Inc/stm32f2xx_hal_cryp.h b/Inc/stm32f2xx_hal_cryp.h
index 19a99f8..7b957a5 100644
--- a/Inc/stm32f2xx_hal_cryp.h
+++ b/Inc/stm32f2xx_hal_cryp.h
@@ -14,7 +14,7 @@
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
- */
+ */
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32F2xx_HAL_CRYP_H
diff --git a/Inc/stm32f2xx_hal_dac.h b/Inc/stm32f2xx_hal_dac.h
index 31ddfc1..2d47dfa 100644
--- a/Inc/stm32f2xx_hal_dac.h
+++ b/Inc/stm32f2xx_hal_dac.h
@@ -78,19 +78,19 @@
__IO uint32_t ErrorCode; /*!< DAC Error code */
#if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
- void (* ConvCpltCallbackCh1) (struct __DAC_HandleTypeDef *hdac);
- void (* ConvHalfCpltCallbackCh1) (struct __DAC_HandleTypeDef *hdac);
- void (* ErrorCallbackCh1) (struct __DAC_HandleTypeDef *hdac);
- void (* DMAUnderrunCallbackCh1) (struct __DAC_HandleTypeDef *hdac);
+ void (* ConvCpltCallbackCh1)(struct __DAC_HandleTypeDef *hdac);
+ void (* ConvHalfCpltCallbackCh1)(struct __DAC_HandleTypeDef *hdac);
+ void (* ErrorCallbackCh1)(struct __DAC_HandleTypeDef *hdac);
+ void (* DMAUnderrunCallbackCh1)(struct __DAC_HandleTypeDef *hdac);
- void (* ConvCpltCallbackCh2) (struct __DAC_HandleTypeDef *hdac);
- void (* ConvHalfCpltCallbackCh2) (struct __DAC_HandleTypeDef *hdac);
- void (* ErrorCallbackCh2) (struct __DAC_HandleTypeDef *hdac);
- void (* DMAUnderrunCallbackCh2) (struct __DAC_HandleTypeDef *hdac);
+ void (* ConvCpltCallbackCh2)(struct __DAC_HandleTypeDef *hdac);
+ void (* ConvHalfCpltCallbackCh2)(struct __DAC_HandleTypeDef *hdac);
+ void (* ErrorCallbackCh2)(struct __DAC_HandleTypeDef *hdac);
+ void (* DMAUnderrunCallbackCh2)(struct __DAC_HandleTypeDef *hdac);
- void (* MspInitCallback) (struct __DAC_HandleTypeDef *hdac);
- void (* MspDeInitCallback) (struct __DAC_HandleTypeDef *hdac);
+ void (* MspInitCallback)(struct __DAC_HandleTypeDef *hdac);
+ void (* MspDeInitCallback)(struct __DAC_HandleTypeDef *hdac);
#endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
} DAC_HandleTypeDef;
@@ -398,7 +398,7 @@
/* IO operation functions *****************************************************/
HAL_StatusTypeDef HAL_DAC_Start(DAC_HandleTypeDef *hdac, uint32_t Channel);
HAL_StatusTypeDef HAL_DAC_Stop(DAC_HandleTypeDef *hdac, uint32_t Channel);
-HAL_StatusTypeDef HAL_DAC_Start_DMA(DAC_HandleTypeDef *hdac, uint32_t Channel, uint32_t *pData, uint32_t Length,
+HAL_StatusTypeDef HAL_DAC_Start_DMA(DAC_HandleTypeDef *hdac, uint32_t Channel, const uint32_t *pData, uint32_t Length,
uint32_t Alignment);
HAL_StatusTypeDef HAL_DAC_Stop_DMA(DAC_HandleTypeDef *hdac, uint32_t Channel);
void HAL_DAC_IRQHandler(DAC_HandleTypeDef *hdac);
@@ -424,8 +424,9 @@
* @{
*/
/* Peripheral Control functions ***********************************************/
-uint32_t HAL_DAC_GetValue(DAC_HandleTypeDef *hdac, uint32_t Channel);
-HAL_StatusTypeDef HAL_DAC_ConfigChannel(DAC_HandleTypeDef *hdac, DAC_ChannelConfTypeDef *sConfig, uint32_t Channel);
+uint32_t HAL_DAC_GetValue(const DAC_HandleTypeDef *hdac, uint32_t Channel);
+HAL_StatusTypeDef HAL_DAC_ConfigChannel(DAC_HandleTypeDef *hdac,
+ const DAC_ChannelConfTypeDef *sConfig, uint32_t Channel);
/**
* @}
*/
@@ -434,8 +435,8 @@
* @{
*/
/* Peripheral State and Error functions ***************************************/
-HAL_DAC_StateTypeDef HAL_DAC_GetState(DAC_HandleTypeDef *hdac);
-uint32_t HAL_DAC_GetError(DAC_HandleTypeDef *hdac);
+HAL_DAC_StateTypeDef HAL_DAC_GetState(const DAC_HandleTypeDef *hdac);
+uint32_t HAL_DAC_GetError(const DAC_HandleTypeDef *hdac);
/**
* @}
diff --git a/Inc/stm32f2xx_hal_dac_ex.h b/Inc/stm32f2xx_hal_dac_ex.h
index d457103..a6e40fc 100644
--- a/Inc/stm32f2xx_hal_dac_ex.h
+++ b/Inc/stm32f2xx_hal_dac_ex.h
@@ -81,6 +81,7 @@
* @}
*/
+
/**
* @}
*/
@@ -149,7 +150,7 @@
HAL_StatusTypeDef HAL_DACEx_DualStart(DAC_HandleTypeDef *hdac);
HAL_StatusTypeDef HAL_DACEx_DualStop(DAC_HandleTypeDef *hdac);
HAL_StatusTypeDef HAL_DACEx_DualSetValue(DAC_HandleTypeDef *hdac, uint32_t Alignment, uint32_t Data1, uint32_t Data2);
-uint32_t HAL_DACEx_DualGetValue(DAC_HandleTypeDef *hdac);
+uint32_t HAL_DACEx_DualGetValue(const DAC_HandleTypeDef *hdac);
void HAL_DACEx_ConvCpltCallbackCh2(DAC_HandleTypeDef *hdac);
void HAL_DACEx_ConvHalfCpltCallbackCh2(DAC_HandleTypeDef *hdac);
diff --git a/Inc/stm32f2xx_hal_dcmi.h b/Inc/stm32f2xx_hal_dcmi.h
index be566af..b6ab036 100644
--- a/Inc/stm32f2xx_hal_dcmi.h
+++ b/Inc/stm32f2xx_hal_dcmi.h
@@ -6,12 +6,13 @@
******************************************************************************
* @attention
*
- * Copyright (c) 2016 STMicroelectronics.
- * All rights reserved.
+ * <h2><center>© Copyright (c) 2016 STMicroelectronics.
+ * All rights reserved.</center></h2>
*
- * This software is licensed under terms that can be found in the LICENSE file
- * in the root directory of this software component.
- * If no LICENSE file comes with this software, it is provided AS-IS.
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
@@ -583,3 +584,5 @@
#endif
#endif /* STM32F2xx_HAL_DCMI_H */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Inc/stm32f2xx_hal_dcmi_ex.h b/Inc/stm32f2xx_hal_dcmi_ex.h
index 408e2d1..9d917e6 100644
--- a/Inc/stm32f2xx_hal_dcmi_ex.h
+++ b/Inc/stm32f2xx_hal_dcmi_ex.h
@@ -6,12 +6,13 @@
******************************************************************************
* @attention
*
- * Copyright (c) 2016 STMicroelectronics.
- * All rights reserved.
+ * <h2><center>© Copyright (c) 2016 STMicroelectronics.
+ * All rights reserved.</center></h2>
*
- * This software is licensed under terms that can be found in the LICENSE file
- * in the root directory of this software component.
- * If no LICENSE file comes with this software, it is provided AS-IS.
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
@@ -32,3 +33,5 @@
/* Private functions ---------------------------------------------------------*/
#endif /* __STM32F2xx_HAL_DCMI_H */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Inc/stm32f2xx_hal_def.h b/Inc/stm32f2xx_hal_def.h
index c683e9a..db5489d 100644
--- a/Inc/stm32f2xx_hal_def.h
+++ b/Inc/stm32f2xx_hal_def.h
@@ -2,8 +2,9 @@
******************************************************************************
* @file stm32f2xx_hal_def.h
* @author MCD Application Team
- * @brief This file contains HAL common defines, enumeration, macros and
- * structures definitions.
+ * @brief This file contains HAL common defines, enumeration, macros and
+ * structures definitions.
+ *
******************************************************************************
* @attention
*
@@ -175,3 +176,5 @@
#endif
#endif /* ___STM32F2xx_HAL_DEF */
+
+
diff --git a/Inc/stm32f2xx_hal_dma.h b/Inc/stm32f2xx_hal_dma.h
index 9f268e4..24a3e4d 100644
--- a/Inc/stm32f2xx_hal_dma.h
+++ b/Inc/stm32f2xx_hal_dma.h
@@ -9,8 +9,8 @@
* Copyright (c) 2016 STMicroelectronics.
* All rights reserved.
*
- * This software is licensed under terms that can be found in the LICENSE file
- * in the root directory of this software component.
+ * This software is licensed under terms that can be found in the LICENSE file in
+ * the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
@@ -770,3 +770,4 @@
#endif
#endif /* __STM32F2xx_HAL_DMA_H */
+
diff --git a/Inc/stm32f2xx_hal_dma_ex.h b/Inc/stm32f2xx_hal_dma_ex.h
index 16532f0..9290fb6 100644
--- a/Inc/stm32f2xx_hal_dma_ex.h
+++ b/Inc/stm32f2xx_hal_dma_ex.h
@@ -9,8 +9,8 @@
* Copyright (c) 2016 STMicroelectronics.
* All rights reserved.
*
- * This software is licensed under terms that can be found in the LICENSE file
- * in the root directory of this software component.
+ * This software is licensed under terms that can be found in the LICENSE file in
+ * the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
@@ -99,3 +99,4 @@
#endif
#endif /* __STM32F2xx_HAL_DMA_H */
+
diff --git a/Inc/stm32f2xx_hal_exti.h b/Inc/stm32f2xx_hal_exti.h
index 19996d5..12442a6 100644
--- a/Inc/stm32f2xx_hal_exti.h
+++ b/Inc/stm32f2xx_hal_exti.h
@@ -288,3 +288,4 @@
#endif
#endif /* STM32F2xx_HAL_EXTI_H */
+
diff --git a/Inc/stm32f2xx_hal_flash.h b/Inc/stm32f2xx_hal_flash.h
index a1282d9..da0b5d8 100644
--- a/Inc/stm32f2xx_hal_flash.h
+++ b/Inc/stm32f2xx_hal_flash.h
@@ -9,10 +9,9 @@
* Copyright (c) 2017 STMicroelectronics.
* All rights reserved.
*
- * This software is licensed under terms that can be found in the LICENSE file
- * in the root directory of this software component.
+ * This software is licensed under terms that can be found in the LICENSE file in
+ * the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
- *
******************************************************************************
*/
@@ -414,3 +413,4 @@
#endif
#endif /* __STM32F2xx_HAL_FLASH_H */
+
diff --git a/Inc/stm32f2xx_hal_flash_ex.h b/Inc/stm32f2xx_hal_flash_ex.h
index 9355d29..25398ce 100644
--- a/Inc/stm32f2xx_hal_flash_ex.h
+++ b/Inc/stm32f2xx_hal_flash_ex.h
@@ -9,10 +9,9 @@
* Copyright (c) 2017 STMicroelectronics.
* All rights reserved.
*
- * This software is licensed under terms that can be found in the LICENSE file
- * in the root directory of this software component.
+ * This software is licensed under terms that can be found in the LICENSE file in
+ * the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
- *
******************************************************************************
*/
@@ -404,3 +403,4 @@
#endif
#endif /* __STM32F2xx_HAL_FLASH_EX_H */
+
diff --git a/Inc/stm32f2xx_hal_gpio.h b/Inc/stm32f2xx_hal_gpio.h
index b17c285..848751f 100644
--- a/Inc/stm32f2xx_hal_gpio.h
+++ b/Inc/stm32f2xx_hal_gpio.h
@@ -320,3 +320,4 @@
#endif
#endif /* __STM32F2xx_HAL_GPIO_H */
+
diff --git a/Inc/stm32f2xx_hal_gpio_ex.h b/Inc/stm32f2xx_hal_gpio_ex.h
index f832a3f..04c2eb0 100644
--- a/Inc/stm32f2xx_hal_gpio_ex.h
+++ b/Inc/stm32f2xx_hal_gpio_ex.h
@@ -276,3 +276,4 @@
#endif
#endif /* __STM32F2xx_HAL_GPIO_EX_H */
+
diff --git a/Inc/stm32f2xx_hal_hash.h b/Inc/stm32f2xx_hal_hash.h
index e3aa5cc..5712f53 100644
--- a/Inc/stm32f2xx_hal_hash.h
+++ b/Inc/stm32f2xx_hal_hash.h
@@ -6,7 +6,7 @@
******************************************************************************
* @attention
*
- * Copyright (c) 2017 STMicroelectronics.
+ * Copyright (c) 2016 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
@@ -585,3 +585,4 @@
#endif /* STM32F2xx_HAL_HASH_H */
+
diff --git a/Inc/stm32f2xx_hal_hcd.h b/Inc/stm32f2xx_hal_hcd.h
index 27090ac..104053a 100644
--- a/Inc/stm32f2xx_hal_hcd.h
+++ b/Inc/stm32f2xx_hal_hcd.h
@@ -159,6 +159,10 @@
#define __HAL_HCD_GET_FLAG(__HANDLE__, __INTERRUPT__) ((USB_ReadInterrupts((__HANDLE__)->Instance)\
& (__INTERRUPT__)) == (__INTERRUPT__))
+
+#define __HAL_HCD_GET_CH_FLAG(__HANDLE__, __chnum__, __INTERRUPT__) \
+ ((USB_ReadChInterrupts((__HANDLE__)->Instance, (__chnum__)) & (__INTERRUPT__)) == (__INTERRUPT__))
+
#define __HAL_HCD_CLEAR_FLAG(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->GINTSTS) = (__INTERRUPT__))
#define __HAL_HCD_IS_INVALID_INTERRUPT(__HANDLE__) (USB_ReadInterrupts((__HANDLE__)->Instance) == 0U)
@@ -167,6 +171,9 @@
#define __HAL_HCD_UNMASK_HALT_HC_INT(chnum) (USBx_HC(chnum)->HCINTMSK |= USB_OTG_HCINTMSK_CHHM)
#define __HAL_HCD_MASK_ACK_HC_INT(chnum) (USBx_HC(chnum)->HCINTMSK &= ~USB_OTG_HCINTMSK_ACKM)
#define __HAL_HCD_UNMASK_ACK_HC_INT(chnum) (USBx_HC(chnum)->HCINTMSK |= USB_OTG_HCINTMSK_ACKM)
+#define __HAL_HCD_SET_HC_CSPLT(chnum) (USBx_HC(chnum)->HCSPLT |= USB_OTG_HCSPLT_COMPLSPLT)
+#define __HAL_HCD_CLEAR_HC_CSPLT(chnum) (USBx_HC(chnum)->HCSPLT &= ~USB_OTG_HCSPLT_COMPLSPLT)
+#define __HAL_HCD_CLEAR_HC_SSPLT(chnum) (USBx_HC(chnum)->HCSPLT &= ~USB_OTG_HCSPLT_SPLITEN)
/**
* @}
*/
@@ -248,6 +255,11 @@
uint8_t token, uint8_t *pbuff,
uint16_t length, uint8_t do_ping);
+HAL_StatusTypeDef HAL_HCD_HC_SetHubInfo(HCD_HandleTypeDef *hhcd, uint8_t ch_num,
+ uint8_t addr, uint8_t PortNbr);
+
+HAL_StatusTypeDef HAL_HCD_HC_ClearHubInfo(HCD_HandleTypeDef *hhcd, uint8_t ch_num);
+
/* Non-Blocking mode: Interrupt */
void HAL_HCD_IRQHandler(HCD_HandleTypeDef *hhcd);
void HAL_HCD_WKUP_IRQHandler(HCD_HandleTypeDef *hhcd);
@@ -277,16 +289,13 @@
/** @addtogroup HCD_Exported_Functions_Group4 Peripheral State functions
* @{
*/
-HCD_StateTypeDef HAL_HCD_GetState(HCD_HandleTypeDef *hhcd);
-HCD_URBStateTypeDef HAL_HCD_HC_GetURBState(HCD_HandleTypeDef *hhcd, uint8_t chnum);
-HCD_HCStateTypeDef HAL_HCD_HC_GetState(HCD_HandleTypeDef *hhcd, uint8_t chnum);
-uint32_t HAL_HCD_HC_GetXferCount(HCD_HandleTypeDef *hhcd, uint8_t chnum);
+HCD_StateTypeDef HAL_HCD_GetState(HCD_HandleTypeDef const *hhcd);
+HCD_URBStateTypeDef HAL_HCD_HC_GetURBState(HCD_HandleTypeDef const *hhcd, uint8_t chnum);
+HCD_HCStateTypeDef HAL_HCD_HC_GetState(HCD_HandleTypeDef const *hhcd, uint8_t chnum);
+uint32_t HAL_HCD_HC_GetXferCount(HCD_HandleTypeDef const *hhcd, uint8_t chnum);
uint32_t HAL_HCD_GetCurrentFrame(HCD_HandleTypeDef *hhcd);
uint32_t HAL_HCD_GetCurrentSpeed(HCD_HandleTypeDef *hhcd);
-/**
- * @}
- */
/**
* @}
@@ -307,6 +316,9 @@
/**
* @}
*/
+/**
+ * @}
+ */
#endif /* defined (USB_OTG_FS) || defined (USB_OTG_HS) */
#ifdef __cplusplus
diff --git a/Inc/stm32f2xx_hal_i2c.h b/Inc/stm32f2xx_hal_i2c.h
index 95e2519..6cf47b6 100644
--- a/Inc/stm32f2xx_hal_i2c.h
+++ b/Inc/stm32f2xx_hal_i2c.h
@@ -735,3 +735,4 @@
#endif /* __STM32F2xx_HAL_I2C_H */
+
diff --git a/Inc/stm32f2xx_hal_i2s.h b/Inc/stm32f2xx_hal_i2s.h
index 5671b13..62dae11 100644
--- a/Inc/stm32f2xx_hal_i2s.h
+++ b/Inc/stm32f2xx_hal_i2s.h
@@ -562,3 +562,4 @@
#endif
#endif /* STM32F2xx_HAL_I2S_H */
+
diff --git a/Inc/stm32f2xx_hal_irda.h b/Inc/stm32f2xx_hal_irda.h
index 7d42321..3cf16f1 100644
--- a/Inc/stm32f2xx_hal_irda.h
+++ b/Inc/stm32f2xx_hal_irda.h
@@ -679,3 +679,4 @@
#endif
#endif /* __STM32F2xx_HAL_IRDA_H */
+
diff --git a/Inc/stm32f2xx_hal_mmc.h b/Inc/stm32f2xx_hal_mmc.h
index 318f3f5..d954bfd 100644
--- a/Inc/stm32f2xx_hal_mmc.h
+++ b/Inc/stm32f2xx_hal_mmc.h
@@ -6,7 +6,7 @@
******************************************************************************
* @attention
*
- * Copyright (c) 2018 STMicroelectronics.
+ * Copyright (c) 2016 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
@@ -14,7 +14,7 @@
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
- */
+ */
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef STM32F2xx_HAL_MMC_H
diff --git a/Inc/stm32f2xx_hal_nand.h b/Inc/stm32f2xx_hal_nand.h
index 3af8bca..9dca732 100644
--- a/Inc/stm32f2xx_hal_nand.h
+++ b/Inc/stm32f2xx_hal_nand.h
@@ -104,9 +104,8 @@
FunctionalState ExtraCommandEnable; /*!< NAND extra command needed for Page reading mode. This
parameter is mandatory for some NAND parts after the read
command (NAND_CMD_AREA_TRUE1) and before DATA reading sequence.
- Example: Toshiba THTH58BYG3S0HBAI6.
This parameter could be ENABLE or DISABLE
- Please check the Read Mode sequnece in the NAND device datasheet */
+ Please check the Read Mode sequence in the NAND device datasheet */
} NAND_DeviceConfigTypeDef;
/**
@@ -126,7 +125,7 @@
__IO HAL_NAND_StateTypeDef State; /*!< NAND device access state */
- NAND_DeviceConfigTypeDef Config; /*!< NAND phusical characteristic information structure */
+ NAND_DeviceConfigTypeDef Config; /*!< NAND physical characteristic information structure */
#if (USE_HAL_NAND_REGISTER_CALLBACKS == 1)
void (* MspInitCallback)(struct __NAND_HandleTypeDef *hnand); /*!< NAND Msp Init callback */
@@ -214,27 +213,27 @@
/* IO operation functions ****************************************************/
HAL_StatusTypeDef HAL_NAND_Reset(NAND_HandleTypeDef *hnand);
-HAL_StatusTypeDef HAL_NAND_Read_Page_8b(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress, uint8_t *pBuffer,
- uint32_t NumPageToRead);
-HAL_StatusTypeDef HAL_NAND_Write_Page_8b(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress, uint8_t *pBuffer,
- uint32_t NumPageToWrite);
-HAL_StatusTypeDef HAL_NAND_Read_SpareArea_8b(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress,
+HAL_StatusTypeDef HAL_NAND_Read_Page_8b(NAND_HandleTypeDef *hnand, const NAND_AddressTypeDef *pAddress,
+ uint8_t *pBuffer, uint32_t NumPageToRead);
+HAL_StatusTypeDef HAL_NAND_Write_Page_8b(NAND_HandleTypeDef *hnand, const NAND_AddressTypeDef *pAddress,
+ const uint8_t *pBuffer, uint32_t NumPageToWrite);
+HAL_StatusTypeDef HAL_NAND_Read_SpareArea_8b(NAND_HandleTypeDef *hnand, const NAND_AddressTypeDef *pAddress,
uint8_t *pBuffer, uint32_t NumSpareAreaToRead);
-HAL_StatusTypeDef HAL_NAND_Write_SpareArea_8b(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress,
- uint8_t *pBuffer, uint32_t NumSpareAreaTowrite);
+HAL_StatusTypeDef HAL_NAND_Write_SpareArea_8b(NAND_HandleTypeDef *hnand, const NAND_AddressTypeDef *pAddress,
+ const uint8_t *pBuffer, uint32_t NumSpareAreaTowrite);
-HAL_StatusTypeDef HAL_NAND_Read_Page_16b(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress, uint16_t *pBuffer,
- uint32_t NumPageToRead);
-HAL_StatusTypeDef HAL_NAND_Write_Page_16b(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress, uint16_t *pBuffer,
- uint32_t NumPageToWrite);
-HAL_StatusTypeDef HAL_NAND_Read_SpareArea_16b(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress,
+HAL_StatusTypeDef HAL_NAND_Read_Page_16b(NAND_HandleTypeDef *hnand, const NAND_AddressTypeDef *pAddress,
+ uint16_t *pBuffer, uint32_t NumPageToRead);
+HAL_StatusTypeDef HAL_NAND_Write_Page_16b(NAND_HandleTypeDef *hnand, const NAND_AddressTypeDef *pAddress,
+ const uint16_t *pBuffer, uint32_t NumPageToWrite);
+HAL_StatusTypeDef HAL_NAND_Read_SpareArea_16b(NAND_HandleTypeDef *hnand, const NAND_AddressTypeDef *pAddress,
uint16_t *pBuffer, uint32_t NumSpareAreaToRead);
-HAL_StatusTypeDef HAL_NAND_Write_SpareArea_16b(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress,
- uint16_t *pBuffer, uint32_t NumSpareAreaTowrite);
+HAL_StatusTypeDef HAL_NAND_Write_SpareArea_16b(NAND_HandleTypeDef *hnand, const NAND_AddressTypeDef *pAddress,
+ const uint16_t *pBuffer, uint32_t NumSpareAreaTowrite);
-HAL_StatusTypeDef HAL_NAND_Erase_Block(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress);
+HAL_StatusTypeDef HAL_NAND_Erase_Block(NAND_HandleTypeDef *hnand, const NAND_AddressTypeDef *pAddress);
-uint32_t HAL_NAND_Address_Inc(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress);
+uint32_t HAL_NAND_Address_Inc(const NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress);
#if (USE_HAL_NAND_REGISTER_CALLBACKS == 1)
/* NAND callback registering/unregistering */
@@ -264,8 +263,8 @@
* @{
*/
/* NAND State functions *******************************************************/
-HAL_NAND_StateTypeDef HAL_NAND_GetState(NAND_HandleTypeDef *hnand);
-uint32_t HAL_NAND_Read_Status(NAND_HandleTypeDef *hnand);
+HAL_NAND_StateTypeDef HAL_NAND_GetState(const NAND_HandleTypeDef *hnand);
+uint32_t HAL_NAND_Read_Status(const NAND_HandleTypeDef *hnand);
/**
* @}
*/
diff --git a/Inc/stm32f2xx_hal_nor.h b/Inc/stm32f2xx_hal_nor.h
index 5667cbd..d767c9b 100644
--- a/Inc/stm32f2xx_hal_nor.h
+++ b/Inc/stm32f2xx_hal_nor.h
@@ -233,7 +233,7 @@
*/
/* NOR State functions ********************************************************/
-HAL_NOR_StateTypeDef HAL_NOR_GetState(NOR_HandleTypeDef *hnor);
+HAL_NOR_StateTypeDef HAL_NOR_GetState(const NOR_HandleTypeDef *hnor);
HAL_NOR_StatusTypeDef HAL_NOR_GetStatus(NOR_HandleTypeDef *hnor, uint32_t Address, uint32_t Timeout);
/**
* @}
diff --git a/Inc/stm32f2xx_hal_pcd.h b/Inc/stm32f2xx_hal_pcd.h
index e5fa668..173d4d2 100644
--- a/Inc/stm32f2xx_hal_pcd.h
+++ b/Inc/stm32f2xx_hal_pcd.h
@@ -106,6 +106,7 @@
uint32_t Setup[12]; /*!< Setup packet buffer */
PCD_LPM_StateTypeDef LPM_State; /*!< LPM State */
uint32_t BESL;
+ uint32_t FrameNumber; /*!< Store Current Frame number */
void *pData; /*!< Pointer to upper stack Handler */
@@ -181,14 +182,14 @@
* @brief macros to handle interrupts and specific clock configurations
* @{
*/
-#if defined (USB_OTG_FS) || defined (USB_OTG_HS)
#define __HAL_PCD_ENABLE(__HANDLE__) (void)USB_EnableGlobalInt ((__HANDLE__)->Instance)
#define __HAL_PCD_DISABLE(__HANDLE__) (void)USB_DisableGlobalInt ((__HANDLE__)->Instance)
#define __HAL_PCD_GET_FLAG(__HANDLE__, __INTERRUPT__) \
((USB_ReadInterrupts((__HANDLE__)->Instance) & (__INTERRUPT__)) == (__INTERRUPT__))
-#define __HAL_PCD_CLEAR_FLAG(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->GINTSTS) &= (__INTERRUPT__))
+#if defined (USB_OTG_FS) || defined (USB_OTG_HS)
+#define __HAL_PCD_CLEAR_FLAG(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->GINTSTS) &= (__INTERRUPT__))
#define __HAL_PCD_IS_INVALID_INTERRUPT(__HANDLE__) (USB_ReadInterrupts((__HANDLE__)->Instance) == 0U)
#define __HAL_PCD_UNGATE_PHYCLOCK(__HANDLE__) \
@@ -279,12 +280,10 @@
* @}
*/
-HAL_StatusTypeDef HAL_PCD_RegisterCallback(PCD_HandleTypeDef *hpcd,
- HAL_PCD_CallbackIDTypeDef CallbackID,
+HAL_StatusTypeDef HAL_PCD_RegisterCallback(PCD_HandleTypeDef *hpcd, HAL_PCD_CallbackIDTypeDef CallbackID,
pPCD_CallbackTypeDef pCallback);
-HAL_StatusTypeDef HAL_PCD_UnRegisterCallback(PCD_HandleTypeDef *hpcd,
- HAL_PCD_CallbackIDTypeDef CallbackID);
+HAL_StatusTypeDef HAL_PCD_UnRegisterCallback(PCD_HandleTypeDef *hpcd, HAL_PCD_CallbackIDTypeDef CallbackID);
HAL_StatusTypeDef HAL_PCD_RegisterDataOutStageCallback(PCD_HandleTypeDef *hpcd,
pPCD_DataOutStageCallbackTypeDef pCallback);
@@ -344,24 +343,21 @@
HAL_StatusTypeDef HAL_PCD_DevConnect(PCD_HandleTypeDef *hpcd);
HAL_StatusTypeDef HAL_PCD_DevDisconnect(PCD_HandleTypeDef *hpcd);
HAL_StatusTypeDef HAL_PCD_SetAddress(PCD_HandleTypeDef *hpcd, uint8_t address);
-HAL_StatusTypeDef HAL_PCD_EP_Open(PCD_HandleTypeDef *hpcd, uint8_t ep_addr,
- uint16_t ep_mps, uint8_t ep_type);
-
+HAL_StatusTypeDef HAL_PCD_EP_Open(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint16_t ep_mps, uint8_t ep_type);
HAL_StatusTypeDef HAL_PCD_EP_Close(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
-HAL_StatusTypeDef HAL_PCD_EP_Receive(PCD_HandleTypeDef *hpcd, uint8_t ep_addr,
- uint8_t *pBuf, uint32_t len);
-
-HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr,
- uint8_t *pBuf, uint32_t len);
-
-
+HAL_StatusTypeDef HAL_PCD_EP_Receive(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len);
+HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len);
HAL_StatusTypeDef HAL_PCD_EP_SetStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
HAL_StatusTypeDef HAL_PCD_EP_ClrStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
HAL_StatusTypeDef HAL_PCD_EP_Flush(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
+HAL_StatusTypeDef HAL_PCD_EP_Abort(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
HAL_StatusTypeDef HAL_PCD_ActivateRemoteWakeup(PCD_HandleTypeDef *hpcd);
HAL_StatusTypeDef HAL_PCD_DeActivateRemoteWakeup(PCD_HandleTypeDef *hpcd);
+#if defined (USB_OTG_FS) || defined (USB_OTG_HS)
+HAL_StatusTypeDef HAL_PCD_SetTestMode(PCD_HandleTypeDef *hpcd, uint8_t testmode);
+#endif /* defined (USB_OTG_FS) || defined (USB_OTG_HS) */
-uint32_t HAL_PCD_EP_GetRxCount(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
+uint32_t HAL_PCD_EP_GetRxCount(PCD_HandleTypeDef const *hpcd, uint8_t ep_addr);
/**
* @}
*/
@@ -370,7 +366,7 @@
/** @addtogroup PCD_Exported_Functions_Group4 Peripheral State functions
* @{
*/
-PCD_StateTypeDef HAL_PCD_GetState(PCD_HandleTypeDef *hpcd);
+PCD_StateTypeDef HAL_PCD_GetState(PCD_HandleTypeDef const *hpcd);
/**
* @}
*/
diff --git a/Inc/stm32f2xx_hal_pcd_ex.h b/Inc/stm32f2xx_hal_pcd_ex.h
index 29052eb..967bf37 100644
--- a/Inc/stm32f2xx_hal_pcd_ex.h
+++ b/Inc/stm32f2xx_hal_pcd_ex.h
@@ -22,7 +22,7 @@
#ifdef __cplusplus
extern "C" {
-#endif
+#endif /* __cplusplus */
/* Includes ------------------------------------------------------------------*/
#include "stm32f2xx_hal_def.h"
@@ -73,7 +73,7 @@
#ifdef __cplusplus
}
-#endif
+#endif /* __cplusplus */
#endif /* STM32F2xx_HAL_PCD_EX_H */
diff --git a/Inc/stm32f2xx_hal_rcc.h b/Inc/stm32f2xx_hal_rcc.h
index ebe7ebf..6605904 100644
--- a/Inc/stm32f2xx_hal_rcc.h
+++ b/Inc/stm32f2xx_hal_rcc.h
@@ -9,10 +9,9 @@
* Copyright (c) 2017 STMicroelectronics.
* All rights reserved.
*
- * This software is licensed under terms that can be found in the LICENSE file
- * in the root directory of this software component.
+ * This software is licensed under terms that can be found in the LICENSE file in
+ * the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
- *
******************************************************************************
*/
@@ -2083,3 +2082,4 @@
#endif
#endif /* __STM32F2xx_HAL_RCC_H */
+
diff --git a/Inc/stm32f2xx_hal_rcc_ex.h b/Inc/stm32f2xx_hal_rcc_ex.h
index 97fea0a..b325709 100644
--- a/Inc/stm32f2xx_hal_rcc_ex.h
+++ b/Inc/stm32f2xx_hal_rcc_ex.h
@@ -9,10 +9,9 @@
* Copyright (c) 2017 STMicroelectronics.
* All rights reserved.
*
- * This software is licensed under terms that can be found in the LICENSE file
- * in the root directory of this software component.
+ * This software is licensed under terms that can be found in the LICENSE file in
+ * the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
- *
******************************************************************************
*/
@@ -417,3 +416,4 @@
#endif
#endif /* __STM32F2xx_HAL_RCC_EX_H */
+
diff --git a/Inc/stm32f2xx_hal_rng.h b/Inc/stm32f2xx_hal_rng.h
index ce4f5d5..357e90d 100644
--- a/Inc/stm32f2xx_hal_rng.h
+++ b/Inc/stm32f2xx_hal_rng.h
@@ -304,7 +304,7 @@
*hrng); /* Obsolete, use HAL_RNG_GenerateRandomNumber_IT() instead */
HAL_StatusTypeDef HAL_RNG_GenerateRandomNumber(RNG_HandleTypeDef *hrng, uint32_t *random32bit);
HAL_StatusTypeDef HAL_RNG_GenerateRandomNumber_IT(RNG_HandleTypeDef *hrng);
-uint32_t HAL_RNG_ReadLastRandomNumber(RNG_HandleTypeDef *hrng);
+uint32_t HAL_RNG_ReadLastRandomNumber(const RNG_HandleTypeDef *hrng);
void HAL_RNG_IRQHandler(RNG_HandleTypeDef *hrng);
void HAL_RNG_ErrorCallback(RNG_HandleTypeDef *hrng);
@@ -317,8 +317,8 @@
/** @defgroup RNG_Exported_Functions_Group3 Peripheral State functions
* @{
*/
-HAL_RNG_StateTypeDef HAL_RNG_GetState(RNG_HandleTypeDef *hrng);
-uint32_t HAL_RNG_GetError(RNG_HandleTypeDef *hrng);
+HAL_RNG_StateTypeDef HAL_RNG_GetState(const RNG_HandleTypeDef *hrng);
+uint32_t HAL_RNG_GetError(const RNG_HandleTypeDef *hrng);
/**
* @}
*/
@@ -358,3 +358,4 @@
#endif /* STM32F2xx_HAL_RNG_H */
+
diff --git a/Inc/stm32f2xx_hal_rtc.h b/Inc/stm32f2xx_hal_rtc.h
index 507a492..e975bdc 100644
--- a/Inc/stm32f2xx_hal_rtc.h
+++ b/Inc/stm32f2xx_hal_rtc.h
@@ -17,14 +17,15 @@
*/
/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __STM32F2xx_HAL_RTC_H
-#define __STM32F2xx_HAL_RTC_H
+#ifndef STM32F2xx_HAL_RTC_H
+#define STM32F2xx_HAL_RTC_H
#ifdef __cplusplus
extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
+
#include "stm32f2xx_hal_def.h"
/** @addtogroup STM32F2xx_HAL_Driver
@@ -36,6 +37,7 @@
*/
/* Exported types ------------------------------------------------------------*/
+
/** @defgroup RTC_Exported_Types RTC Exported Types
* @{
*/
@@ -50,7 +52,6 @@
HAL_RTC_STATE_BUSY = 0x02U, /*!< RTC process is ongoing */
HAL_RTC_STATE_TIMEOUT = 0x03U, /*!< RTC timeout state */
HAL_RTC_STATE_ERROR = 0x04U /*!< RTC error state */
-
} HAL_RTCStateTypeDef;
/**
@@ -65,7 +66,7 @@
This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x7F */
uint32_t SynchPrediv; /*!< Specifies the RTC Synchronous Predivider value.
- This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1FFF */
+ This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0x1FFF */
uint32_t OutPut; /*!< Specifies which signal will be routed to the RTC output.
This parameter can be a value of @ref RTC_Output_selection_Definitions */
@@ -83,8 +84,8 @@
typedef struct
{
uint8_t Hours; /*!< Specifies the RTC Time Hour.
- This parameter must be a number between Min_Data = 0 and Max_Data = 12 if the RTC_HourFormat_12 is selected.
- This parameter must be a number between Min_Data = 0 and Max_Data = 23 if the RTC_HourFormat_24 is selected */
+ This parameter must be a number between Min_Data = 0 and Max_Data = 12 if the RTC_HourFormat_12 is selected
+ This parameter must be a number between Min_Data = 0 and Max_Data = 23 if the RTC_HourFormat_24 is selected */
uint8_t Minutes; /*!< Specifies the RTC Time Minutes.
This parameter must be a number between Min_Data = 0 and Max_Data = 59 */
@@ -95,10 +96,11 @@
uint8_t TimeFormat; /*!< Specifies the RTC AM/PM Time.
This parameter can be a value of @ref RTC_AM_PM_Definitions */
- uint32_t DayLightSaving; /*!< This interface is deprecated. To manage Daylight Saving Time, please use HAL_RTC_DST_xxx functions */
+ uint32_t DayLightSaving; /*!< This interface is deprecated. To manage Daylight
+ Saving Time, please use HAL_RTC_DST_xxx functions */
- uint32_t StoreOperation; /*!< This interface is deprecated. To manage Daylight Saving Time, please use HAL_RTC_DST_xxx functions */
-
+ uint32_t StoreOperation; /*!< This interface is deprecated. To manage Daylight
+ Saving Time, please use HAL_RTC_DST_xxx functions */
} RTC_TimeTypeDef;
/**
@@ -131,7 +133,7 @@
This parameter can be a value of @ref RTC_AlarmMask_Definitions */
uint32_t AlarmDateWeekDaySel; /*!< Specifies the RTC Alarm is on Date or WeekDay.
- This parameter can be a value of @ref RTC_AlarmDateWeekDay_Definitions */
+ This parameter can be a value of @ref RTC_AlarmDateWeekDay_Definitions */
uint8_t AlarmDateWeekDay; /*!< Specifies the RTC Alarm Date/WeekDay.
If the Alarm Date is selected, this parameter must be set to a value in the 1-31 range.
@@ -148,7 +150,7 @@
typedef struct __RTC_HandleTypeDef
#else
typedef struct
-#endif /* (USE_HAL_RTC_REGISTER_CALLBACKS) */
+#endif /* USE_HAL_RTC_REGISTER_CALLBACKS */
{
RTC_TypeDef *Instance; /*!< Register base address */
@@ -159,21 +161,21 @@
__IO HAL_RTCStateTypeDef State; /*!< Time communication state */
#if (USE_HAL_RTC_REGISTER_CALLBACKS == 1)
- void (* AlarmAEventCallback)(struct __RTC_HandleTypeDef *hrtc); /*!< RTC Alarm A Event callback */
+ void (* AlarmAEventCallback) (struct __RTC_HandleTypeDef *hrtc); /*!< RTC Alarm A Event callback */
- void (* AlarmBEventCallback)(struct __RTC_HandleTypeDef *hrtc); /*!< RTC Alarm B Event callback */
+ void (* AlarmBEventCallback) (struct __RTC_HandleTypeDef *hrtc); /*!< RTC Alarm B Event callback */
- void (* TimeStampEventCallback)(struct __RTC_HandleTypeDef *hrtc); /*!< RTC TimeStamp Event callback */
+ void (* TimeStampEventCallback) (struct __RTC_HandleTypeDef *hrtc); /*!< RTC Timestamp Event callback */
- void (* WakeUpTimerEventCallback)(struct __RTC_HandleTypeDef *hrtc); /*!< RTC WakeUpTimer Event callback */
+ void (* WakeUpTimerEventCallback) (struct __RTC_HandleTypeDef *hrtc); /*!< RTC WakeUpTimer Event callback */
- void (* Tamper1EventCallback)(struct __RTC_HandleTypeDef *hrtc); /*!< RTC Tamper 1 Event callback */
+ void (* Tamper1EventCallback) (struct __RTC_HandleTypeDef *hrtc); /*!< RTC Tamper 1 Event callback */
- void (* MspInitCallback)(struct __RTC_HandleTypeDef *hrtc); /*!< RTC Msp Init callback */
+ void (* MspInitCallback) (struct __RTC_HandleTypeDef *hrtc); /*!< RTC Msp Init callback */
- void (* MspDeInitCallback)(struct __RTC_HandleTypeDef *hrtc); /*!< RTC Msp DeInit callback */
+ void (* MspDeInitCallback) (struct __RTC_HandleTypeDef *hrtc); /*!< RTC Msp DeInit callback */
-#endif /* (USE_HAL_RTC_REGISTER_CALLBACKS) */
+#endif /* USE_HAL_RTC_REGISTER_CALLBACKS */
} RTC_HandleTypeDef;
@@ -183,13 +185,13 @@
*/
typedef enum
{
- HAL_RTC_ALARM_A_EVENT_CB_ID = 0x00u, /*!< RTC Alarm A Event Callback ID */
- HAL_RTC_ALARM_B_EVENT_CB_ID = 0x01u, /*!< RTC Alarm B Event Callback ID */
- HAL_RTC_TIMESTAMP_EVENT_CB_ID = 0x02u, /*!< RTC TimeStamp Event Callback ID */
- HAL_RTC_WAKEUPTIMER_EVENT_CB_ID = 0x03u, /*!< RTC Wake-Up Timer Event Callback ID */
- HAL_RTC_TAMPER1_EVENT_CB_ID = 0x04u, /*!< RTC Tamper 1 Callback ID */
- HAL_RTC_MSPINIT_CB_ID = 0x0Eu, /*!< RTC Msp Init callback ID */
- HAL_RTC_MSPDEINIT_CB_ID = 0x0Fu /*!< RTC Msp DeInit callback ID */
+ HAL_RTC_ALARM_A_EVENT_CB_ID = 0x00U, /*!< RTC Alarm A Event Callback ID */
+ HAL_RTC_ALARM_B_EVENT_CB_ID = 0x01U, /*!< RTC Alarm B Event Callback ID */
+ HAL_RTC_TIMESTAMP_EVENT_CB_ID = 0x02U, /*!< RTC Timestamp Event Callback ID */
+ HAL_RTC_WAKEUPTIMER_EVENT_CB_ID = 0x03U, /*!< RTC Wakeup Timer Event Callback ID */
+ HAL_RTC_TAMPER1_EVENT_CB_ID = 0x04U, /*!< RTC Tamper 1 Callback ID */
+ HAL_RTC_MSPINIT_CB_ID = 0x0EU, /*!< RTC Msp Init callback ID */
+ HAL_RTC_MSPDEINIT_CB_ID = 0x0FU /*!< RTC Msp DeInit callback ID */
} HAL_RTC_CallbackIDTypeDef;
/**
@@ -203,6 +205,7 @@
*/
/* Exported constants --------------------------------------------------------*/
+
/** @defgroup RTC_Exported_Constants RTC Exported Constants
* @{
*/
@@ -211,7 +214,7 @@
* @{
*/
#define RTC_HOURFORMAT_24 0x00000000U
-#define RTC_HOURFORMAT_12 0x00000040U
+#define RTC_HOURFORMAT_12 RTC_CR_FMT
/**
* @}
*/
@@ -220,9 +223,9 @@
* @{
*/
#define RTC_OUTPUT_DISABLE 0x00000000U
-#define RTC_OUTPUT_ALARMA 0x00200000U
-#define RTC_OUTPUT_ALARMB 0x00400000U
-#define RTC_OUTPUT_WAKEUP 0x00600000U
+#define RTC_OUTPUT_ALARMA RTC_CR_OSEL_0
+#define RTC_OUTPUT_ALARMB RTC_CR_OSEL_1
+#define RTC_OUTPUT_WAKEUP RTC_CR_OSEL
/**
* @}
*/
@@ -231,7 +234,7 @@
* @{
*/
#define RTC_OUTPUT_POLARITY_HIGH 0x00000000U
-#define RTC_OUTPUT_POLARITY_LOW 0x00100000U
+#define RTC_OUTPUT_POLARITY_LOW RTC_CR_POL
/**
* @}
*/
@@ -240,7 +243,7 @@
* @{
*/
#define RTC_OUTPUT_TYPE_OPENDRAIN 0x00000000U
-#define RTC_OUTPUT_TYPE_PUSHPULL 0x00040000U
+#define RTC_OUTPUT_TYPE_PUSHPULL RTC_TAFCR_ALARMOUTTYPE
/**
* @}
*/
@@ -249,7 +252,7 @@
* @{
*/
#define RTC_HOURFORMAT12_AM ((uint8_t)0x00)
-#define RTC_HOURFORMAT12_PM ((uint8_t)0x40)
+#define RTC_HOURFORMAT12_PM ((uint8_t)0x01)
/**
* @}
*/
@@ -257,8 +260,8 @@
/** @defgroup RTC_DayLightSaving_Definitions RTC DayLight Saving Definitions
* @{
*/
-#define RTC_DAYLIGHTSAVING_SUB1H 0x00020000U
-#define RTC_DAYLIGHTSAVING_ADD1H 0x00010000U
+#define RTC_DAYLIGHTSAVING_SUB1H RTC_CR_SUB1H
+#define RTC_DAYLIGHTSAVING_ADD1H RTC_CR_ADD1H
#define RTC_DAYLIGHTSAVING_NONE 0x00000000U
/**
* @}
@@ -268,7 +271,7 @@
* @{
*/
#define RTC_STOREOPERATION_RESET 0x00000000U
-#define RTC_STOREOPERATION_SET 0x00040000U
+#define RTC_STOREOPERATION_SET RTC_CR_BKP
/**
* @}
*/
@@ -276,16 +279,15 @@
/** @defgroup RTC_Input_parameter_format_definitions RTC Input Parameter Format Definitions
* @{
*/
-#define RTC_FORMAT_BIN 0x00000000U
-#define RTC_FORMAT_BCD 0x00000001U
+#define RTC_FORMAT_BIN 0x00000000U
+#define RTC_FORMAT_BCD 0x00000001U
/**
* @}
*/
-/** @defgroup RTC_Month_Date_Definitions RTC Month Date Definitions
+/** @defgroup RTC_Month_Date_Definitions RTC Month Date Definitions (in BCD format)
* @{
*/
-/* Coded in BCD format */
#define RTC_MONTH_JANUARY ((uint8_t)0x01)
#define RTC_MONTH_FEBRUARY ((uint8_t)0x02)
#define RTC_MONTH_MARCH ((uint8_t)0x03)
@@ -320,7 +322,7 @@
* @{
*/
#define RTC_ALARMDATEWEEKDAYSEL_DATE 0x00000000U
-#define RTC_ALARMDATEWEEKDAYSEL_WEEKDAY 0x40000000U
+#define RTC_ALARMDATEWEEKDAYSEL_WEEKDAY RTC_ALRMAR_WDSEL
/**
* @}
*/
@@ -333,7 +335,10 @@
#define RTC_ALARMMASK_HOURS RTC_ALRMAR_MSK3
#define RTC_ALARMMASK_MINUTES RTC_ALRMAR_MSK2
#define RTC_ALARMMASK_SECONDS RTC_ALRMAR_MSK1
-#define RTC_ALARMMASK_ALL 0x80808080U
+#define RTC_ALARMMASK_ALL (RTC_ALARMMASK_DATEWEEKDAY | \
+ RTC_ALARMMASK_HOURS | \
+ RTC_ALARMMASK_MINUTES | \
+ RTC_ALARMMASK_SECONDS)
/**
* @}
*/
@@ -350,12 +355,10 @@
/** @defgroup RTC_Interrupts_Definitions RTC Interrupts Definitions
* @{
*/
-#define RTC_IT_TS 0x00008000U
-#define RTC_IT_WUT 0x00004000U
-#define RTC_IT_ALRB 0x00002000U
-#define RTC_IT_ALRA 0x00001000U
-#define RTC_IT_TAMP 0x00000004U /* Used only to Enable the Tamper Interrupt */
-#define RTC_IT_TAMP1 0x00020000U
+#define RTC_IT_TS RTC_CR_TSIE /*!< Enable Timestamp Interrupt */
+#define RTC_IT_WUT RTC_CR_WUTIE /*!< Enable Wakeup timer Interrupt */
+#define RTC_IT_ALRB RTC_CR_ALRBIE /*!< Enable Alarm B Interrupt */
+#define RTC_IT_ALRA RTC_CR_ALRAIE /*!< Enable Alarm A Interrupt */
/**
* @}
*/
@@ -363,18 +366,18 @@
/** @defgroup RTC_Flags_Definitions RTC Flags Definitions
* @{
*/
-#define RTC_FLAG_TAMP1F 0x00002000U
-#define RTC_FLAG_TSOVF 0x00001000U
-#define RTC_FLAG_TSF 0x00000800U
-#define RTC_FLAG_WUTF 0x00000400U
-#define RTC_FLAG_ALRBF 0x00000200U
-#define RTC_FLAG_ALRAF 0x00000100U
-#define RTC_FLAG_INITF 0x00000040U
-#define RTC_FLAG_RSF 0x00000020U
-#define RTC_FLAG_INITS 0x00000010U
-#define RTC_FLAG_WUTWF 0x00000004U
-#define RTC_FLAG_ALRBWF 0x00000002U
-#define RTC_FLAG_ALRAWF 0x00000001U
+#define RTC_FLAG_TAMP1F RTC_ISR_TAMP1F /*!< Tamper 1 event flag */
+#define RTC_FLAG_TSOVF RTC_ISR_TSOVF /*!< Timestamp overflow flag */
+#define RTC_FLAG_TSF RTC_ISR_TSF /*!< Timestamp event flag */
+#define RTC_FLAG_WUTF RTC_ISR_WUTF /*!< Wakeup timer event flag */
+#define RTC_FLAG_ALRBF RTC_ISR_ALRBF /*!< Alarm B event flag */
+#define RTC_FLAG_ALRAF RTC_ISR_ALRAF /*!< Alarm A event flag */
+#define RTC_FLAG_INITF RTC_ISR_INITF /*!< RTC in initialization mode flag */
+#define RTC_FLAG_RSF RTC_ISR_RSF /*!< Register synchronization flag */
+#define RTC_FLAG_INITS RTC_ISR_INITS /*!< RTC initialization status flag */
+#define RTC_FLAG_WUTWF RTC_ISR_WUTWF /*!< WUTR register write allowance flag */
+#define RTC_FLAG_ALRBWF RTC_ISR_ALRBWF /*!< ALRMBR register write allowance flag */
+#define RTC_FLAG_ALRAWF RTC_ISR_ALRAWF /*!< ALRMAR register write allowance flag */
/**
* @}
*/
@@ -383,7 +386,8 @@
* @}
*/
-/* Exported macro ------------------------------------------------------------*/
+/* Exported macros -----------------------------------------------------------*/
+
/** @defgroup RTC_Exported_Macros RTC Exported Macros
* @{
*/
@@ -393,11 +397,11 @@
* @retval None
*/
#if (USE_HAL_RTC_REGISTER_CALLBACKS == 1)
-#define __HAL_RTC_RESET_HANDLE_STATE(__HANDLE__) do{\
- (__HANDLE__)->State = HAL_RTC_STATE_RESET;\
- (__HANDLE__)->MspInitCallback = NULL;\
- (__HANDLE__)->MspDeInitCallback = NULL;\
- }while(0u)
+#define __HAL_RTC_RESET_HANDLE_STATE(__HANDLE__) do { \
+ (__HANDLE__)->State = HAL_RTC_STATE_RESET; \
+ (__HANDLE__)->MspInitCallback = NULL; \
+ (__HANDLE__)->MspDeInitCallback = NULL; \
+ } while(0U)
#else
#define __HAL_RTC_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_RTC_STATE_RESET)
#endif /* USE_HAL_RTC_REGISTER_CALLBACKS */
@@ -407,21 +411,26 @@
* @param __HANDLE__ specifies the RTC handle.
* @retval None
*/
-#define __HAL_RTC_WRITEPROTECTION_DISABLE(__HANDLE__) \
- do{ \
- (__HANDLE__)->Instance->WPR = 0xCAU; \
- (__HANDLE__)->Instance->WPR = 0x53U; \
- } while(0U)
+#define __HAL_RTC_WRITEPROTECTION_DISABLE(__HANDLE__) do { \
+ (__HANDLE__)->Instance->WPR = 0xCAU; \
+ (__HANDLE__)->Instance->WPR = 0x53U; \
+ } while(0U)
/**
* @brief Enable the write protection for RTC registers.
* @param __HANDLE__ specifies the RTC handle.
* @retval None
*/
-#define __HAL_RTC_WRITEPROTECTION_ENABLE(__HANDLE__) \
- do{ \
- (__HANDLE__)->Instance->WPR = 0xFFU; \
- } while(0U)
+#define __HAL_RTC_WRITEPROTECTION_ENABLE(__HANDLE__) do { \
+ (__HANDLE__)->Instance->WPR = 0xFFU; \
+ } while(0U)
+
+/**
+ * @brief Check whether the RTC Calendar is initialized.
+ * @param __HANDLE__ specifies the RTC handle.
+ * @retval None
+ */
+#define __HAL_RTC_IS_CALENDAR_INITIALIZED(__HANDLE__) (((((__HANDLE__)->Instance->ISR) & (RTC_FLAG_INITS)) == RTC_FLAG_INITS) ? 1U : 0U)
/**
* @brief Enable the RTC ALARMA peripheral.
@@ -466,9 +475,9 @@
* @brief Disable the RTC Alarm interrupt.
* @param __HANDLE__ specifies the RTC handle.
* @param __INTERRUPT__ specifies the RTC Alarm interrupt sources to be enabled or disabled.
- * This parameter can be any combination of the following values:
- * @arg RTC_IT_ALRA: Alarm A interrupt
- * @arg RTC_IT_ALRB: Alarm B interrupt
+ * This parameter can be any combination of the following values:
+ * @arg RTC_IT_ALRA: Alarm A interrupt
+ * @arg RTC_IT_ALRB: Alarm B interrupt
* @retval None
*/
#define __HAL_RTC_ALARM_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR &= ~(__INTERRUPT__))
@@ -482,25 +491,25 @@
* @arg RTC_IT_ALRB: Alarm B interrupt
* @retval None
*/
-#define __HAL_RTC_ALARM_GET_IT(__HANDLE__, __INTERRUPT__) (((((__HANDLE__)->Instance->ISR)& ((__INTERRUPT__)>> 4U)) != RESET)? SET : RESET)
+#define __HAL_RTC_ALARM_GET_IT(__HANDLE__, __INTERRUPT__) (((((__HANDLE__)->Instance->ISR) & ((__INTERRUPT__) >> 4U)) != 0U) ? 1U : 0U)
/**
* @brief Get the selected RTC Alarm's flag status.
* @param __HANDLE__ specifies the RTC handle.
* @param __FLAG__ specifies the RTC Alarm Flag to check.
* This parameter can be:
- * @arg RTC_FLAG_ALRAF
- * @arg RTC_FLAG_ALRBF
- * @arg RTC_FLAG_ALRAWF
- * @arg RTC_FLAG_ALRBWF
+ * @arg RTC_FLAG_ALRAF: Alarm A interrupt flag
+ * @arg RTC_FLAG_ALRAWF: Alarm A 'write allowed' flag
+ * @arg RTC_FLAG_ALRBF: Alarm B interrupt flag
+ * @arg RTC_FLAG_ALRBWF: Alarm B 'write allowed' flag
* @retval None
*/
-#define __HAL_RTC_ALARM_GET_FLAG(__HANDLE__, __FLAG__) (((((__HANDLE__)->Instance->ISR) & (__FLAG__)) != RESET)? SET : RESET)
+#define __HAL_RTC_ALARM_GET_FLAG(__HANDLE__, __FLAG__) (((((__HANDLE__)->Instance->ISR) & (__FLAG__)) != 0U) ? 1U : 0U)
/**
* @brief Clear the RTC Alarm's pending flags.
* @param __HANDLE__ specifies the RTC handle.
- * @param __FLAG__ specifies the RTC Alarm Flag sources to be enabled or disabled.
+ * @param __FLAG__ specifies the RTC Alarm flag to be cleared.
* This parameter can be:
* @arg RTC_FLAG_ALRAF
* @arg RTC_FLAG_ALRBF
@@ -508,7 +517,6 @@
*/
#define __HAL_RTC_ALARM_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ISR) = (~((__FLAG__) | RTC_ISR_INIT)|((__HANDLE__)->Instance->ISR & RTC_ISR_INIT))
-
/**
* @brief Check whether the specified RTC Alarm interrupt has been enabled or not.
* @param __HANDLE__ specifies the RTC handle.
@@ -518,86 +526,88 @@
* @arg RTC_IT_ALRB: Alarm B interrupt
* @retval None
*/
-#define __HAL_RTC_ALARM_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) (((((__HANDLE__)->Instance->CR) & (__INTERRUPT__)) != RESET) ? SET : RESET)
+#define __HAL_RTC_ALARM_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) (((((__HANDLE__)->Instance->CR) & (__INTERRUPT__)) != 0U) ? 1U : 0U)
/**
- * @brief Enable interrupt on the RTC Alarm associated Exti line.
+ * @brief Enable interrupt on the RTC Alarm associated EXTI line.
* @retval None
*/
#define __HAL_RTC_ALARM_EXTI_ENABLE_IT() (EXTI->IMR |= RTC_EXTI_LINE_ALARM_EVENT)
/**
- * @brief Disable interrupt on the RTC Alarm associated Exti line.
+ * @brief Disable interrupt on the RTC Alarm associated EXTI line.
* @retval None
*/
-#define __HAL_RTC_ALARM_EXTI_DISABLE_IT() (EXTI->IMR &= ~(RTC_EXTI_LINE_ALARM_EVENT))
+#define __HAL_RTC_ALARM_EXTI_DISABLE_IT() (EXTI->IMR &= ~RTC_EXTI_LINE_ALARM_EVENT)
/**
- * @brief Enable event on the RTC Alarm associated Exti line.
+ * @brief Enable event on the RTC Alarm associated EXTI line.
* @retval None.
*/
-#define __HAL_RTC_ALARM_EXTI_ENABLE_EVENT() (EXTI->EMR |= RTC_EXTI_LINE_ALARM_EVENT)
+#define __HAL_RTC_ALARM_EXTI_ENABLE_EVENT() (EXTI->EMR |= RTC_EXTI_LINE_ALARM_EVENT)
/**
- * @brief Disable event on the RTC Alarm associated Exti line.
+ * @brief Disable event on the RTC Alarm associated EXTI line.
* @retval None.
*/
-#define __HAL_RTC_ALARM_EXTI_DISABLE_EVENT() (EXTI->EMR &= ~(RTC_EXTI_LINE_ALARM_EVENT))
+#define __HAL_RTC_ALARM_EXTI_DISABLE_EVENT() (EXTI->EMR &= ~RTC_EXTI_LINE_ALARM_EVENT)
/**
- * @brief Enable falling edge trigger on the RTC Alarm associated Exti line.
+ * @brief Enable falling edge trigger on the RTC Alarm associated EXTI line.
* @retval None.
*/
#define __HAL_RTC_ALARM_EXTI_ENABLE_FALLING_EDGE() (EXTI->FTSR |= RTC_EXTI_LINE_ALARM_EVENT)
/**
- * @brief Disable falling edge trigger on the RTC Alarm associated Exti line.
+ * @brief Disable falling edge trigger on the RTC Alarm associated EXTI line.
* @retval None.
*/
-#define __HAL_RTC_ALARM_EXTI_DISABLE_FALLING_EDGE() (EXTI->FTSR &= ~(RTC_EXTI_LINE_ALARM_EVENT))
+#define __HAL_RTC_ALARM_EXTI_DISABLE_FALLING_EDGE() (EXTI->FTSR &= ~RTC_EXTI_LINE_ALARM_EVENT)
/**
- * @brief Enable rising edge trigger on the RTC Alarm associated Exti line.
+ * @brief Enable rising edge trigger on the RTC Alarm associated EXTI line.
* @retval None.
*/
#define __HAL_RTC_ALARM_EXTI_ENABLE_RISING_EDGE() (EXTI->RTSR |= RTC_EXTI_LINE_ALARM_EVENT)
/**
- * @brief Disable rising edge trigger on the RTC Alarm associated Exti line.
+ * @brief Disable rising edge trigger on the RTC Alarm associated EXTI line.
* @retval None.
*/
-#define __HAL_RTC_ALARM_EXTI_DISABLE_RISING_EDGE() (EXTI->RTSR &= ~(RTC_EXTI_LINE_ALARM_EVENT))
+#define __HAL_RTC_ALARM_EXTI_DISABLE_RISING_EDGE() (EXTI->RTSR &= ~RTC_EXTI_LINE_ALARM_EVENT)
/**
- * @brief Enable rising & falling edge trigger on the RTC Alarm associated Exti line.
+ * @brief Enable rising & falling edge trigger on the RTC Alarm associated EXTI line.
* @retval None.
*/
-#define __HAL_RTC_ALARM_EXTI_ENABLE_RISING_FALLING_EDGE() do{ __HAL_RTC_ALARM_EXTI_ENABLE_RISING_EDGE();\
- __HAL_RTC_ALARM_EXTI_ENABLE_FALLING_EDGE();\
- }while(0U)
+#define __HAL_RTC_ALARM_EXTI_ENABLE_RISING_FALLING_EDGE() do { \
+ __HAL_RTC_ALARM_EXTI_ENABLE_RISING_EDGE(); \
+ __HAL_RTC_ALARM_EXTI_ENABLE_FALLING_EDGE(); \
+ } while(0U)
/**
- * @brief Disable rising & falling edge trigger on the RTC Alarm associated Exti line.
+ * @brief Disable rising & falling edge trigger on the RTC Alarm associated EXTI line.
* @retval None.
*/
-#define __HAL_RTC_ALARM_EXTI_DISABLE_RISING_FALLING_EDGE() do{ __HAL_RTC_ALARM_EXTI_DISABLE_RISING_EDGE();\
- __HAL_RTC_ALARM_EXTI_DISABLE_FALLING_EDGE();\
- }while(0U)
+#define __HAL_RTC_ALARM_EXTI_DISABLE_RISING_FALLING_EDGE() do { \
+ __HAL_RTC_ALARM_EXTI_DISABLE_RISING_EDGE(); \
+ __HAL_RTC_ALARM_EXTI_DISABLE_FALLING_EDGE(); \
+ } while(0U)
/**
- * @brief Check whether the RTC Alarm associated Exti line interrupt flag is set or not.
+ * @brief Check whether the RTC Alarm associated EXTI line interrupt flag is set or not.
* @retval Line Status.
*/
#define __HAL_RTC_ALARM_EXTI_GET_FLAG() (EXTI->PR & RTC_EXTI_LINE_ALARM_EVENT)
/**
- * @brief Clear the RTC Alarm associated Exti line flag.
+ * @brief Clear the RTC Alarm associated EXTI line flag.
* @retval None.
*/
#define __HAL_RTC_ALARM_EXTI_CLEAR_FLAG() (EXTI->PR = RTC_EXTI_LINE_ALARM_EVENT)
/**
- * @brief Generate a Software interrupt on RTC Alarm associated Exti line.
+ * @brief Generate a Software interrupt on RTC Alarm associated EXTI line.
* @retval None.
*/
#define __HAL_RTC_ALARM_EXTI_GENERATE_SWIT() (EXTI->SWIER |= RTC_EXTI_LINE_ALARM_EVENT)
@@ -605,10 +615,11 @@
* @}
*/
-/* Include RTC HAL Extension module */
+/* Include RTC HAL Extended module */
#include "stm32f2xx_hal_rtc_ex.h"
/* Exported functions --------------------------------------------------------*/
+
/** @addtogroup RTC_Exported_Functions
* @{
*/
@@ -619,8 +630,8 @@
/* Initialization and de-initialization functions ****************************/
HAL_StatusTypeDef HAL_RTC_Init(RTC_HandleTypeDef *hrtc);
HAL_StatusTypeDef HAL_RTC_DeInit(RTC_HandleTypeDef *hrtc);
-void HAL_RTC_MspInit(RTC_HandleTypeDef *hrtc);
-void HAL_RTC_MspDeInit(RTC_HandleTypeDef *hrtc);
+void HAL_RTC_MspInit(RTC_HandleTypeDef *hrtc);
+void HAL_RTC_MspDeInit(RTC_HandleTypeDef *hrtc);
/* Callbacks Register/UnRegister functions ***********************************/
#if (USE_HAL_RTC_REGISTER_CALLBACKS == 1)
@@ -639,13 +650,6 @@
HAL_StatusTypeDef HAL_RTC_GetTime(RTC_HandleTypeDef *hrtc, RTC_TimeTypeDef *sTime, uint32_t Format);
HAL_StatusTypeDef HAL_RTC_SetDate(RTC_HandleTypeDef *hrtc, RTC_DateTypeDef *sDate, uint32_t Format);
HAL_StatusTypeDef HAL_RTC_GetDate(RTC_HandleTypeDef *hrtc, RTC_DateTypeDef *sDate, uint32_t Format);
-
-/* RTC Daylight Saving Time functions *****************************************/
-void HAL_RTC_DST_Add1Hour(RTC_HandleTypeDef *hrtc);
-void HAL_RTC_DST_Sub1Hour(RTC_HandleTypeDef *hrtc);
-void HAL_RTC_DST_SetStoreOperation(RTC_HandleTypeDef *hrtc);
-void HAL_RTC_DST_ClearStoreOperation(RTC_HandleTypeDef *hrtc);
-uint32_t HAL_RTC_DST_ReadStoreOperation(RTC_HandleTypeDef *hrtc);
/**
* @}
*/
@@ -658,9 +662,9 @@
HAL_StatusTypeDef HAL_RTC_SetAlarm_IT(RTC_HandleTypeDef *hrtc, RTC_AlarmTypeDef *sAlarm, uint32_t Format);
HAL_StatusTypeDef HAL_RTC_DeactivateAlarm(RTC_HandleTypeDef *hrtc, uint32_t Alarm);
HAL_StatusTypeDef HAL_RTC_GetAlarm(RTC_HandleTypeDef *hrtc, RTC_AlarmTypeDef *sAlarm, uint32_t Alarm, uint32_t Format);
-void HAL_RTC_AlarmIRQHandler(RTC_HandleTypeDef *hrtc);
-HAL_StatusTypeDef HAL_RTC_PollForAlarmAEvent(RTC_HandleTypeDef *hrtc, uint32_t Timeout);
-void HAL_RTC_AlarmAEventCallback(RTC_HandleTypeDef *hrtc);
+void HAL_RTC_AlarmIRQHandler(RTC_HandleTypeDef *hrtc);
+HAL_StatusTypeDef HAL_RTC_PollForAlarmAEvent(RTC_HandleTypeDef *hrtc, uint32_t Timeout);
+void HAL_RTC_AlarmAEventCallback(RTC_HandleTypeDef *hrtc);
/**
* @}
*/
@@ -670,6 +674,13 @@
*/
/* Peripheral Control functions ***********************************************/
HAL_StatusTypeDef HAL_RTC_WaitForSynchro(RTC_HandleTypeDef *hrtc);
+
+/* RTC Daylight Saving Time functions *****************************************/
+void HAL_RTC_DST_Add1Hour(RTC_HandleTypeDef *hrtc);
+void HAL_RTC_DST_Sub1Hour(RTC_HandleTypeDef *hrtc);
+void HAL_RTC_DST_SetStoreOperation(RTC_HandleTypeDef *hrtc);
+void HAL_RTC_DST_ClearStoreOperation(RTC_HandleTypeDef *hrtc);
+uint32_t HAL_RTC_DST_ReadStoreOperation(RTC_HandleTypeDef *hrtc);
/**
* @}
*/
@@ -690,27 +701,38 @@
/* Private types -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
/* Private constants ---------------------------------------------------------*/
+
/** @defgroup RTC_Private_Constants RTC Private Constants
* @{
*/
/* Masks Definition */
-#define RTC_TR_RESERVED_MASK 0x007F7F7FU
-#define RTC_DR_RESERVED_MASK 0x00FFFF3FU
+#define RTC_TR_RESERVED_MASK ((uint32_t)(RTC_TR_HT | RTC_TR_HU | \
+ RTC_TR_MNT | RTC_TR_MNU | \
+ RTC_TR_ST | RTC_TR_SU | \
+ RTC_TR_PM))
+#define RTC_DR_RESERVED_MASK ((uint32_t)(RTC_DR_YT | RTC_DR_YU | \
+ RTC_DR_MT | RTC_DR_MU | \
+ RTC_DR_DT | RTC_DR_DU | \
+ RTC_DR_WDU))
+#define RTC_ISR_RESERVED_MASK ((uint32_t)(RTC_FLAGS_MASK | RTC_ISR_INIT))
#define RTC_INIT_MASK 0xFFFFFFFFU
-#define RTC_RSF_MASK 0xFFFFFF5FU
-#define RTC_FLAGS_MASK ((uint32_t)(RTC_FLAG_TSOVF | RTC_FLAG_TSF | RTC_FLAG_WUTF | \
- RTC_FLAG_ALRBF | RTC_FLAG_ALRAF | RTC_FLAG_INITF | \
- RTC_FLAG_RSF | RTC_FLAG_INITS | RTC_FLAG_WUTWF | \
- RTC_FLAG_ALRBWF | RTC_FLAG_ALRAWF | RTC_FLAG_TAMP1F))
+#define RTC_RSF_MASK ((uint32_t)~(RTC_ISR_INIT | RTC_ISR_RSF))
+#define RTC_FLAGS_MASK ((uint32_t)(RTC_FLAG_INITF | RTC_FLAG_INITS | \
+ RTC_FLAG_ALRAF | RTC_FLAG_ALRAWF | \
+ RTC_FLAG_ALRBF | RTC_FLAG_ALRBWF | \
+ RTC_FLAG_WUTF | RTC_FLAG_WUTWF | \
+ RTC_FLAG_TSF | RTC_FLAG_TSOVF | \
+ RTC_FLAG_RSF | RTC_TAMPER_FLAGS_MASK))
#define RTC_TIMEOUT_VALUE 1000U
-#define RTC_EXTI_LINE_ALARM_EVENT ((uint32_t)EXTI_IMR_MR17) /*!< External interrupt line 17 Connected to the RTC Alarm event */
+#define RTC_EXTI_LINE_ALARM_EVENT EXTI_IMR_MR17 /*!< External interrupt line 17 Connected to the RTC Alarm event */
/**
* @}
*/
/* Private macros ------------------------------------------------------------*/
+
/** @defgroup RTC_Private_Macros RTC Private Macros
* @{
*/
@@ -720,31 +742,42 @@
*/
#define IS_RTC_HOUR_FORMAT(FORMAT) (((FORMAT) == RTC_HOURFORMAT_12) || \
((FORMAT) == RTC_HOURFORMAT_24))
+
#define IS_RTC_OUTPUT(OUTPUT) (((OUTPUT) == RTC_OUTPUT_DISABLE) || \
((OUTPUT) == RTC_OUTPUT_ALARMA) || \
((OUTPUT) == RTC_OUTPUT_ALARMB) || \
((OUTPUT) == RTC_OUTPUT_WAKEUP))
+
#define IS_RTC_OUTPUT_POL(POL) (((POL) == RTC_OUTPUT_POLARITY_HIGH) || \
((POL) == RTC_OUTPUT_POLARITY_LOW))
+
#define IS_RTC_OUTPUT_TYPE(TYPE) (((TYPE) == RTC_OUTPUT_TYPE_OPENDRAIN) || \
((TYPE) == RTC_OUTPUT_TYPE_PUSHPULL))
-#define IS_RTC_HOUR12(HOUR) (((HOUR) > 0U) && ((HOUR) <= 12U))
-#define IS_RTC_HOUR24(HOUR) ((HOUR) <= 23U)
+
#define IS_RTC_ASYNCH_PREDIV(PREDIV) ((PREDIV) <= 0x7FU)
#define IS_RTC_SYNCH_PREDIV(PREDIV) ((PREDIV) <= 0x1FFFU)
+
+#define IS_RTC_HOUR12(HOUR) (((HOUR) > 0U) && ((HOUR) <= 12U))
+#define IS_RTC_HOUR24(HOUR) ((HOUR) <= 23U)
#define IS_RTC_MINUTES(MINUTES) ((MINUTES) <= 59U)
#define IS_RTC_SECONDS(SECONDS) ((SECONDS) <= 59U)
-#define IS_RTC_HOURFORMAT12(PM) (((PM) == RTC_HOURFORMAT12_AM) || ((PM) == RTC_HOURFORMAT12_PM))
+#define IS_RTC_HOURFORMAT12(PM) (((PM) == RTC_HOURFORMAT12_AM) || \
+ ((PM) == RTC_HOURFORMAT12_PM))
+
#define IS_RTC_DAYLIGHT_SAVING(SAVE) (((SAVE) == RTC_DAYLIGHTSAVING_SUB1H) || \
((SAVE) == RTC_DAYLIGHTSAVING_ADD1H) || \
((SAVE) == RTC_DAYLIGHTSAVING_NONE))
+
#define IS_RTC_STORE_OPERATION(OPERATION) (((OPERATION) == RTC_STOREOPERATION_RESET) || \
((OPERATION) == RTC_STOREOPERATION_SET))
+
#define IS_RTC_FORMAT(FORMAT) (((FORMAT) == RTC_FORMAT_BIN) || ((FORMAT) == RTC_FORMAT_BCD))
+
#define IS_RTC_YEAR(YEAR) ((YEAR) <= 99U)
#define IS_RTC_MONTH(MONTH) (((MONTH) >= 1U) && ((MONTH) <= 12U))
#define IS_RTC_DATE(DATE) (((DATE) >= 1U) && ((DATE) <= 31U))
+
#define IS_RTC_WEEKDAY(WEEKDAY) (((WEEKDAY) == RTC_WEEKDAY_MONDAY) || \
((WEEKDAY) == RTC_WEEKDAY_TUESDAY) || \
((WEEKDAY) == RTC_WEEKDAY_WEDNESDAY) || \
@@ -752,7 +785,9 @@
((WEEKDAY) == RTC_WEEKDAY_FRIDAY) || \
((WEEKDAY) == RTC_WEEKDAY_SATURDAY) || \
((WEEKDAY) == RTC_WEEKDAY_SUNDAY))
+
#define IS_RTC_ALARM_DATE_WEEKDAY_DATE(DATE) (((DATE) > 0U) && ((DATE) <= 31U))
+
#define IS_RTC_ALARM_DATE_WEEKDAY_WEEKDAY(WEEKDAY) (((WEEKDAY) == RTC_WEEKDAY_MONDAY) || \
((WEEKDAY) == RTC_WEEKDAY_TUESDAY) || \
((WEEKDAY) == RTC_WEEKDAY_WEDNESDAY) || \
@@ -760,10 +795,14 @@
((WEEKDAY) == RTC_WEEKDAY_FRIDAY) || \
((WEEKDAY) == RTC_WEEKDAY_SATURDAY) || \
((WEEKDAY) == RTC_WEEKDAY_SUNDAY))
+
#define IS_RTC_ALARM_DATE_WEEKDAY_SEL(SEL) (((SEL) == RTC_ALARMDATEWEEKDAYSEL_DATE) || \
((SEL) == RTC_ALARMDATEWEEKDAYSEL_WEEKDAY))
-#define IS_RTC_ALARM_MASK(MASK) (((MASK) & 0x7F7F7F7FU) == (uint32_t)RESET)
+
+#define IS_RTC_ALARM_MASK(MASK) (((MASK) & ((uint32_t)~RTC_ALARMMASK_ALL)) == 0U)
+
#define IS_RTC_ALARM(ALARM) (((ALARM) == RTC_ALARM_A) || ((ALARM) == RTC_ALARM_B))
+
/**
* @}
*/
@@ -773,12 +812,14 @@
*/
/* Private functions ---------------------------------------------------------*/
+
/** @defgroup RTC_Private_Functions RTC Private Functions
* @{
*/
HAL_StatusTypeDef RTC_EnterInitMode(RTC_HandleTypeDef *hrtc);
-uint8_t RTC_ByteToBcd2(uint8_t Value);
-uint8_t RTC_Bcd2ToByte(uint8_t Value);
+HAL_StatusTypeDef RTC_ExitInitMode(RTC_HandleTypeDef *hrtc);
+uint8_t RTC_ByteToBcd2(uint8_t number);
+uint8_t RTC_Bcd2ToByte(uint8_t number);
/**
* @}
*/
@@ -795,4 +836,4 @@
}
#endif
-#endif /* __STM32F2xx_HAL_RTC_H */
+#endif /* STM32F2xx_HAL_RTC_H */
diff --git a/Inc/stm32f2xx_hal_rtc_ex.h b/Inc/stm32f2xx_hal_rtc_ex.h
index 7b6b19b..b72c22f 100644
--- a/Inc/stm32f2xx_hal_rtc_ex.h
+++ b/Inc/stm32f2xx_hal_rtc_ex.h
@@ -2,7 +2,7 @@
******************************************************************************
* @file stm32f2xx_hal_rtc_ex.h
* @author MCD Application Team
- * @brief Header file of RTC HAL Extension module.
+ * @brief Header file of RTC HAL Extended module.
******************************************************************************
* @attention
*
@@ -17,14 +17,15 @@
*/
/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __STM32F2xx_HAL_RTC_EX_H
-#define __STM32F2xx_HAL_RTC_EX_H
+#ifndef STM32F2xx_HAL_RTC_EX_H
+#define STM32F2xx_HAL_RTC_EX_H
#ifdef __cplusplus
extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
+
#include "stm32f2xx_hal_def.h"
/** @addtogroup STM32F2xx_HAL_Driver
@@ -36,33 +37,36 @@
*/
/* Exported types ------------------------------------------------------------*/
-/** @defgroup RTCEx_Exported_Types RTC Exported Types
+
+/** @defgroup RTCEx_Exported_Types RTCEx Exported Types
* @{
*/
-/** @brief RTC Tamper structure definition
+/**
+ * @brief RTC Tamper structure definition
*/
typedef struct
{
uint32_t Tamper; /*!< Specifies the Tamper Pin.
- This parameter can be a value of @ref RTCEx_Tamper_Pins_Definitions */
+ This parameter can be a value of @ref RTCEx_Tamper_Pin_Definitions */
uint32_t PinSelection; /*!< Specifies the Tamper Pin.
- This parameter can be a value of @ref RTCEx_Tamper_Pins_Selection */
+ This parameter can be a value of @ref RTCEx_Tamper_Pin_Selection */
uint32_t Trigger; /*!< Specifies the Tamper Trigger.
- This parameter can be a value of @ref RTCEx_Tamper_Trigger_Definitions */
+ This parameter can be a value of @ref RTCEx_Tamper_Trigger_Definitions */
} RTC_TamperTypeDef;
/**
* @}
*/
/* Exported constants --------------------------------------------------------*/
-/** @defgroup RTCEx_Exported_Constants RTC Exported Constants
+
+/** @defgroup RTCEx_Exported_Constants RTCEx Exported Constants
* @{
*/
-/** @defgroup RTCEx_Backup_Registers_Definitions RTC Backup Registers Definitions
+/** @defgroup RTCEx_Backup_Registers_Definitions RTCEx Backup Registers Definitions
* @{
*/
#define RTC_BKP_DR0 0x00000000U
@@ -89,16 +93,25 @@
* @}
*/
-/** @defgroup RTCEx_Time_Stamp_Edges_definitions RTC TimeStamp Edges Definitions
+/** @defgroup RTCEx_Timestamp_Edges_Definitions RTCEx Timestamp Edges Definitions
* @{
*/
#define RTC_TIMESTAMPEDGE_RISING 0x00000000U
-#define RTC_TIMESTAMPEDGE_FALLING 0x00000008U
+#define RTC_TIMESTAMPEDGE_FALLING RTC_CR_TSEDGE
/**
* @}
*/
-/** @defgroup RTCEx_Tamper_Pins_Definitions RTC Tamper Pins Definitions
+/** @defgroup RTCEx_Timestamp_Pin_Selection RTC Timestamp Pin Selection
+ * @{
+ */
+#define RTC_TIMESTAMPPIN_DEFAULT 0x00000000U
+#define RTC_TIMESTAMPPIN_POS1 RTC_TAFCR_TSINSEL
+/**
+ * @}
+ */
+
+/** @defgroup RTCEx_Tamper_Pin_Definitions RTCEx Tamper Pins Definitions
* @{
*/
#define RTC_TAMPER_1 RTC_TAFCR_TAMP1E
@@ -106,54 +119,50 @@
* @}
*/
-/** @defgroup RTCEx_Tamper_Pins_Selection RTC tamper Pins Selection
+/** @defgroup RTCEx_Tamper_Pin_Selection RTC tamper Pins Selection
* @{
*/
#define RTC_TAMPERPIN_DEFAULT 0x00000000U
-#define RTC_TAMPERPIN_POS1 0x00010000U
-
+#define RTC_TAMPERPIN_POS1 RTC_TAFCR_TAMP1INSEL
/**
* @}
*/
-/** @defgroup RTCEx_TimeStamp_Pin_Selection RTC TimeStamp Pins Selection
+/** @defgroup RTCEx_Tamper_Interrupt_Definitions RTCEx Tamper Interrupt Definitions
* @{
*/
-#define RTC_TIMESTAMPPIN_DEFAULT 0x00000000U
-#define RTC_TIMESTAMPPIN_POS1 0x00020000U
-
+#define RTC_IT_TAMP RTC_TAFCR_TAMPIE /*!< Enable global Tamper Interrupt */
/**
* @}
*/
-/** @defgroup RTCEx_Tamper_Trigger_Definitions RTC Tamper Triggers Definitions
+/** @defgroup RTCEx_Tamper_Trigger_Definitions RTCEx Tamper Triggers Definitions
* @{
*/
#define RTC_TAMPERTRIGGER_RISINGEDGE 0x00000000U
#define RTC_TAMPERTRIGGER_FALLINGEDGE 0x00000002U
-
/**
* @}
*/
-/** @defgroup RTCEx_Wakeup_Timer_Definitions RTC Wake-up Timer Definitions
+/** @defgroup RTCEx_Wakeup_Timer_Definitions RTCEx Wakeup Timer Definitions
* @{
*/
#define RTC_WAKEUPCLOCK_RTCCLK_DIV16 0x00000000U
-#define RTC_WAKEUPCLOCK_RTCCLK_DIV8 0x00000001U
-#define RTC_WAKEUPCLOCK_RTCCLK_DIV4 0x00000002U
-#define RTC_WAKEUPCLOCK_RTCCLK_DIV2 0x00000003U
-#define RTC_WAKEUPCLOCK_CK_SPRE_16BITS 0x00000004U
-#define RTC_WAKEUPCLOCK_CK_SPRE_17BITS 0x00000006U
+#define RTC_WAKEUPCLOCK_RTCCLK_DIV8 RTC_CR_WUCKSEL_0
+#define RTC_WAKEUPCLOCK_RTCCLK_DIV4 RTC_CR_WUCKSEL_1
+#define RTC_WAKEUPCLOCK_RTCCLK_DIV2 (RTC_CR_WUCKSEL_0 | RTC_CR_WUCKSEL_1)
+#define RTC_WAKEUPCLOCK_CK_SPRE_16BITS RTC_CR_WUCKSEL_2
+#define RTC_WAKEUPCLOCK_CK_SPRE_17BITS (RTC_CR_WUCKSEL_1 | RTC_CR_WUCKSEL_2)
/**
* @}
*/
-/** @defgroup RTCEx_Digital_Calibration_Definitions RTC Digital Calib Definitions
+/** @defgroup RTCEx_Coarse_Calibration_Definitions RTCEx Coarse Calib Definitions
* @{
*/
#define RTC_CALIBSIGN_POSITIVE 0x00000000U
-#define RTC_CALIBSIGN_NEGATIVE 0x00000080U
+#define RTC_CALIBSIGN_NEGATIVE RTC_CALIBR_DCS
/**
* @}
*/
@@ -162,13 +171,15 @@
* @}
*/
-/* Exported macro ------------------------------------------------------------*/
-/** @defgroup RTCEx_Exported_Macros RTC Exported Macros
+/* Exported macros -----------------------------------------------------------*/
+
+/** @defgroup RTCEx_Exported_Macros RTCEx Exported Macros
* @{
*/
-/* ---------------------------------WAKEUPTIMER---------------------------------*/
-/** @defgroup RTCEx_WakeUp_Timer RTC WakeUp Timer
+/* ---------------------------------WAKEUPTIMER-------------------------------*/
+
+/** @defgroup RTCEx_WakeUp_Timer RTCEx WakeUp Timer
* @{
*/
@@ -180,152 +191,154 @@
#define __HAL_RTC_WAKEUPTIMER_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= (RTC_CR_WUTE))
/**
- * @brief Disable the RTC Wake-up Timer peripheral.
+ * @brief Disable the RTC Wakeup Timer peripheral.
* @param __HANDLE__ specifies the RTC handle.
* @retval None
*/
#define __HAL_RTC_WAKEUPTIMER_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= ~(RTC_CR_WUTE))
/**
- * @brief Enable the RTC WakeUpTimer interrupt.
+ * @brief Enable the RTC Wakeup Timer interrupt.
* @param __HANDLE__ specifies the RTC handle.
- * @param __INTERRUPT__ specifies the RTC WakeUpTimer interrupt sources to be enabled or disabled.
+ * @param __INTERRUPT__ specifies the RTC Wakeup Timer interrupt sources to be enabled or disabled.
* This parameter can be:
- * @arg RTC_IT_WUT: WakeUpTimer A interrupt
+ * @arg RTC_IT_WUT: Wakeup Timer interrupt
* @retval None
*/
#define __HAL_RTC_WAKEUPTIMER_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR |= (__INTERRUPT__))
/**
- * @brief Disable the RTC WakeUpTimer interrupt.
+ * @brief Disable the RTC Wakeup Timer interrupt.
* @param __HANDLE__ specifies the RTC handle.
- * @param __INTERRUPT__ specifies the RTC WakeUpTimer interrupt sources to be enabled or disabled.
+ * @param __INTERRUPT__ specifies the RTC Wakeup Timer interrupt sources to be enabled or disabled.
* This parameter can be:
- * @arg RTC_IT_WUT: WakeUpTimer A interrupt
+ * @arg RTC_IT_WUT: Wakeup Timer interrupt
* @retval None
*/
#define __HAL_RTC_WAKEUPTIMER_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR &= ~(__INTERRUPT__))
/**
- * @brief Check whether the specified RTC WakeUpTimer interrupt has occurred or not.
+ * @brief Check whether the specified RTC Wakeup Timer interrupt has occurred or not.
* @param __HANDLE__ specifies the RTC handle.
- * @param __INTERRUPT__ specifies the RTC WakeUpTimer interrupt to check.
+ * @param __INTERRUPT__ specifies the RTC Wakeup Timer interrupt to check.
* This parameter can be:
- * @arg RTC_IT_WUT: WakeUpTimer A interrupt
+ * @arg RTC_IT_WUT: Wakeup Timer interrupt
* @retval None
*/
-#define __HAL_RTC_WAKEUPTIMER_GET_IT(__HANDLE__, __INTERRUPT__) (((((__HANDLE__)->Instance->ISR) & ((__INTERRUPT__)>> 4U)) != RESET)? SET : RESET)
+#define __HAL_RTC_WAKEUPTIMER_GET_IT(__HANDLE__, __INTERRUPT__) (((((__HANDLE__)->Instance->ISR) & ((__INTERRUPT__) >> 4U)) != 0U) ? 1U : 0U)
/**
- * @brief Check whether the specified RTC Wake Up timer interrupt has been enabled or not.
+ * @brief Check whether the specified RTC Wakeup timer interrupt has been enabled or not.
* @param __HANDLE__ specifies the RTC handle.
- * @param __INTERRUPT__ specifies the RTC Wake Up timer interrupt sources to check.
+ * @param __INTERRUPT__ specifies the RTC Wakeup timer interrupt sources to check.
* This parameter can be:
- * @arg RTC_IT_WUT: WakeUpTimer interrupt
+ * @arg RTC_IT_WUT: WakeUpTimer interrupt
* @retval None
*/
-#define __HAL_RTC_WAKEUPTIMER_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) (((((__HANDLE__)->Instance->CR) & (__INTERRUPT__)) != RESET) ? SET : RESET)
+#define __HAL_RTC_WAKEUPTIMER_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) (((((__HANDLE__)->Instance->CR) & (__INTERRUPT__)) != 0U) ? 1U : 0U)
/**
- * @brief Get the selected RTC WakeUpTimer's flag status.
+ * @brief Get the selected RTC Wakeup Timer's flag status.
* @param __HANDLE__ specifies the RTC handle.
- * @param __FLAG__ specifies the RTC WakeUpTimer Flag to check.
+ * @param __FLAG__ specifies the RTC Wakeup Timer flag to check.
* This parameter can be:
- * @arg RTC_FLAG_WUTF
- * @arg RTC_FLAG_WUTWF
+ * @arg RTC_FLAG_WUTF: Wakeup Timer interrupt flag
+ * @arg RTC_FLAG_WUTWF: Wakeup Timer 'write allowed' flag
* @retval None
*/
-#define __HAL_RTC_WAKEUPTIMER_GET_FLAG(__HANDLE__, __FLAG__) (((((__HANDLE__)->Instance->ISR) & (__FLAG__)) != RESET)? SET : RESET)
+#define __HAL_RTC_WAKEUPTIMER_GET_FLAG(__HANDLE__, __FLAG__) (((((__HANDLE__)->Instance->ISR) & (__FLAG__)) != 0U)? 1U : 0U)
/**
- * @brief Clear the RTC Wake Up timer's pending flags.
+ * @brief Clear the RTC Wakeup timer's pending flags.
* @param __HANDLE__ specifies the RTC handle.
- * @param __FLAG__ specifies the RTC Tamper Flag sources to be enabled or disabled.
+ * @param __FLAG__ specifies the RTC Wakeup Timer Flag to clear.
* This parameter can be:
- * @arg RTC_FLAG_WUTF
+ * @arg RTC_FLAG_WUTF: Wakeup Timer interrupt Flag
* @retval None
*/
#define __HAL_RTC_WAKEUPTIMER_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ISR) = (~((__FLAG__) | RTC_ISR_INIT)|((__HANDLE__)->Instance->ISR & RTC_ISR_INIT))
/**
- * @brief Enable interrupt on the RTC Wake-up Timer associated Exti line.
+ * @brief Enable interrupt on the RTC Wakeup Timer associated EXTI line.
* @retval None
*/
#define __HAL_RTC_WAKEUPTIMER_EXTI_ENABLE_IT() (EXTI->IMR |= RTC_EXTI_LINE_WAKEUPTIMER_EVENT)
/**
- * @brief Disable interrupt on the RTC Wake-up Timer associated Exti line.
+ * @brief Disable interrupt on the RTC Wakeup Timer associated EXTI line.
* @retval None
*/
-#define __HAL_RTC_WAKEUPTIMER_EXTI_DISABLE_IT() (EXTI->IMR &= ~(RTC_EXTI_LINE_WAKEUPTIMER_EVENT))
+#define __HAL_RTC_WAKEUPTIMER_EXTI_DISABLE_IT() (EXTI->IMR &= ~RTC_EXTI_LINE_WAKEUPTIMER_EVENT)
/**
- * @brief Enable event on the RTC Wake-up Timer associated Exti line.
+ * @brief Enable event on the RTC Wakeup Timer associated EXTI line.
* @retval None.
*/
#define __HAL_RTC_WAKEUPTIMER_EXTI_ENABLE_EVENT() (EXTI->EMR |= RTC_EXTI_LINE_WAKEUPTIMER_EVENT)
/**
- * @brief Disable event on the RTC Wake-up Timer associated Exti line.
+ * @brief Disable event on the RTC Wakeup Timer associated EXTI line.
* @retval None.
*/
-#define __HAL_RTC_WAKEUPTIMER_EXTI_DISABLE_EVENT() (EXTI->EMR &= ~(RTC_EXTI_LINE_WAKEUPTIMER_EVENT))
+#define __HAL_RTC_WAKEUPTIMER_EXTI_DISABLE_EVENT() (EXTI->EMR &= ~RTC_EXTI_LINE_WAKEUPTIMER_EVENT)
/**
- * @brief Enable falling edge trigger on the RTC Wake-up Timer associated Exti line.
+ * @brief Enable falling edge trigger on the RTC Wakeup Timer associated EXTI line.
* @retval None.
*/
#define __HAL_RTC_WAKEUPTIMER_EXTI_ENABLE_FALLING_EDGE() (EXTI->FTSR |= RTC_EXTI_LINE_WAKEUPTIMER_EVENT)
/**
- * @brief Disable falling edge trigger on the RTC Wake-up Timer associated Exti line.
+ * @brief Disable falling edge trigger on the RTC Wakeup Timer associated EXTI line.
* @retval None.
*/
-#define __HAL_RTC_WAKEUPTIMER_EXTI_DISABLE_FALLING_EDGE() (EXTI->FTSR &= ~(RTC_EXTI_LINE_WAKEUPTIMER_EVENT))
+#define __HAL_RTC_WAKEUPTIMER_EXTI_DISABLE_FALLING_EDGE() (EXTI->FTSR &= ~RTC_EXTI_LINE_WAKEUPTIMER_EVENT)
/**
- * @brief Enable rising edge trigger on the RTC Wake-up Timer associated Exti line.
+ * @brief Enable rising edge trigger on the RTC Wakeup Timer associated EXTI line.
* @retval None.
*/
#define __HAL_RTC_WAKEUPTIMER_EXTI_ENABLE_RISING_EDGE() (EXTI->RTSR |= RTC_EXTI_LINE_WAKEUPTIMER_EVENT)
/**
- * @brief Disable rising edge trigger on the RTC Wake-up Timer associated Exti line.
+ * @brief Disable rising edge trigger on the RTC Wakeup Timer associated EXTI line.
* @retval None.
*/
-#define __HAL_RTC_WAKEUPTIMER_EXTI_DISABLE_RISING_EDGE() (EXTI->RTSR &= ~(RTC_EXTI_LINE_WAKEUPTIMER_EVENT))
+#define __HAL_RTC_WAKEUPTIMER_EXTI_DISABLE_RISING_EDGE() (EXTI->RTSR &= ~RTC_EXTI_LINE_WAKEUPTIMER_EVENT)
/**
- * @brief Enable rising & falling edge trigger on the RTC Wake-up Timer associated Exti line.
+ * @brief Enable rising & falling edge trigger on the RTC Wakeup Timer associated EXTI line.
* @retval None.
*/
-#define __HAL_RTC_WAKEUPTIMER_EXTI_ENABLE_RISING_FALLING_EDGE() do{ __HAL_RTC_WAKEUPTIMER_EXTI_ENABLE_RISING_EDGE();\
- __HAL_RTC_WAKEUPTIMER_EXTI_ENABLE_FALLING_EDGE();\
- }while(0U)
+#define __HAL_RTC_WAKEUPTIMER_EXTI_ENABLE_RISING_FALLING_EDGE() do { \
+ __HAL_RTC_WAKEUPTIMER_EXTI_ENABLE_RISING_EDGE(); \
+ __HAL_RTC_WAKEUPTIMER_EXTI_ENABLE_FALLING_EDGE(); \
+ } while(0U)
/**
- * @brief Disable rising & falling edge trigger on the RTC Wake-up Timer associated Exti line.
+ * @brief Disable rising & falling edge trigger on the RTC Wakeup Timer associated EXTI line.
* This parameter can be:
* @retval None.
*/
-#define __HAL_RTC_WAKEUPTIMER_EXTI_DISABLE_RISING_FALLING_EDGE() do{ __HAL_RTC_WAKEUPTIMER_EXTI_DISABLE_RISING_EDGE();\
- __HAL_RTC_WAKEUPTIMER_EXTI_DISABLE_FALLING_EDGE();\
- }while(0U)
+#define __HAL_RTC_WAKEUPTIMER_EXTI_DISABLE_RISING_FALLING_EDGE() do { \
+ __HAL_RTC_WAKEUPTIMER_EXTI_DISABLE_RISING_EDGE(); \
+ __HAL_RTC_WAKEUPTIMER_EXTI_DISABLE_FALLING_EDGE(); \
+ } while(0U)
/**
- * @brief Check whether the RTC Wake-up Timer associated Exti line interrupt flag is set or not.
+ * @brief Check whether the RTC Wakeup Timer associated EXTI line interrupt flag is set or not.
* @retval Line Status.
*/
#define __HAL_RTC_WAKEUPTIMER_EXTI_GET_FLAG() (EXTI->PR & RTC_EXTI_LINE_WAKEUPTIMER_EVENT)
/**
- * @brief Clear the RTC Wake-up Timer associated Exti line flag.
+ * @brief Clear the RTC Wakeup Timer associated EXTI line flag.
* @retval None.
*/
#define __HAL_RTC_WAKEUPTIMER_EXTI_CLEAR_FLAG() (EXTI->PR = RTC_EXTI_LINE_WAKEUPTIMER_EVENT)
/**
- * @brief Generate a Software interrupt on the RTC Wake-up Timer associated Exti line.
+ * @brief Generate a Software interrupt on the RTC Wakeup Timer associated EXTI line.
* @retval None.
*/
#define __HAL_RTC_WAKEUPTIMER_EXTI_GENERATE_SWIT() (EXTI->SWIER |= RTC_EXTI_LINE_WAKEUPTIMER_EVENT)
@@ -335,28 +348,29 @@
*/
/* ---------------------------------TIMESTAMP---------------------------------*/
-/** @defgroup RTCEx_Timestamp RTC Timestamp
+
+/** @defgroup RTCEx_Timestamp RTCEx Timestamp
* @{
*/
/**
- * @brief Enable the RTC TimeStamp peripheral.
+ * @brief Enable the RTC Timestamp peripheral.
* @param __HANDLE__ specifies the RTC handle.
* @retval None
*/
#define __HAL_RTC_TIMESTAMP_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= (RTC_CR_TSE))
/**
- * @brief Disable the RTC TimeStamp peripheral.
+ * @brief Disable the RTC Timestamp peripheral.
* @param __HANDLE__ specifies the RTC handle.
* @retval None
*/
#define __HAL_RTC_TIMESTAMP_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= ~(RTC_CR_TSE))
/**
- * @brief Enable the RTC TimeStamp interrupt.
+ * @brief Enable the RTC Timestamp interrupt.
* @param __HANDLE__ specifies the RTC handle.
- * @param __INTERRUPT__ specifies the RTC TimeStamp interrupt sources to be enabled or disabled.
+ * @param __INTERRUPT__ specifies the RTC Timestamp interrupt sources to be enabled or disabled.
* This parameter can be:
* @arg RTC_IT_TS: TimeStamp interrupt
* @retval None
@@ -364,9 +378,9 @@
#define __HAL_RTC_TIMESTAMP_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR |= (__INTERRUPT__))
/**
- * @brief Disable the RTC TimeStamp interrupt.
+ * @brief Disable the RTC Timestamp interrupt.
* @param __HANDLE__ specifies the RTC handle.
- * @param __INTERRUPT__ specifies the RTC TimeStamp interrupt sources to be enabled or disabled.
+ * @param __INTERRUPT__ specifies the RTC Timestamp interrupt sources to be enabled or disabled.
* This parameter can be:
* @arg RTC_IT_TS: TimeStamp interrupt
* @retval None
@@ -374,42 +388,43 @@
#define __HAL_RTC_TIMESTAMP_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR &= ~(__INTERRUPT__))
/**
- * @brief Check whether the specified RTC TimeStamp interrupt has occurred or not.
+ * @brief Check whether the specified RTC Timestamp interrupt has occurred or not.
* @param __HANDLE__ specifies the RTC handle.
- * @param __INTERRUPT__ specifies the RTC TimeStamp interrupt to check.
+ * @param __INTERRUPT__ specifies the RTC Timestamp interrupt to check.
* This parameter can be:
* @arg RTC_IT_TS: TimeStamp interrupt
* @retval None
*/
-#define __HAL_RTC_TIMESTAMP_GET_IT(__HANDLE__, __INTERRUPT__) (((((__HANDLE__)->Instance->ISR) & ((__INTERRUPT__)>> 4U)) != RESET)? SET : RESET)
+#define __HAL_RTC_TIMESTAMP_GET_IT(__HANDLE__, __INTERRUPT__) (((((__HANDLE__)->Instance->ISR) & ((__INTERRUPT__) >> 4U)) != 0U) ? 1U : 0U)
/**
- * @brief Check whether the specified RTC Time Stamp interrupt has been enabled or not.
+ * @brief Check whether the specified RTC Timestamp interrupt has been enabled or not.
* @param __HANDLE__ specifies the RTC handle.
- * @param __INTERRUPT__ specifies the RTC Time Stamp interrupt source to check.
+ * @param __INTERRUPT__ specifies the RTC Timestamp interrupt source to check.
* This parameter can be:
* @arg RTC_IT_TS: TimeStamp interrupt
* @retval None
*/
-#define __HAL_RTC_TIMESTAMP_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) (((((__HANDLE__)->Instance->CR) & (__INTERRUPT__)) != RESET) ? SET : RESET)
+#define __HAL_RTC_TIMESTAMP_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) (((((__HANDLE__)->Instance->CR) & (__INTERRUPT__)) != 0U) ? 1U : 0U)
/**
- * @brief Get the selected RTC TimeStamp's flag status.
+ * @brief Get the selected RTC Timestamp's flag status.
* @param __HANDLE__ specifies the RTC handle.
- * @param __FLAG__ specifies the RTC TimeStamp flag to check.
+ * @param __FLAG__ specifies the RTC Timestamp flag to check.
* This parameter can be:
- * @arg RTC_FLAG_TSF
- * @arg RTC_FLAG_TSOVF
+ * @arg RTC_FLAG_TSF: Timestamp interrupt flag
+ * @arg RTC_FLAG_TSOVF: Timestamp overflow flag
* @retval None
*/
-#define __HAL_RTC_TIMESTAMP_GET_FLAG(__HANDLE__, __FLAG__) (((((__HANDLE__)->Instance->ISR) & (__FLAG__)) != RESET)? SET : RESET)
+#define __HAL_RTC_TIMESTAMP_GET_FLAG(__HANDLE__, __FLAG__) (((((__HANDLE__)->Instance->ISR) & (__FLAG__)) != 0U)? 1U : 0U)
/**
- * @brief Clear the RTC Time Stamp's pending flags.
+ * @brief Clear the RTC Timestamp's pending flags.
* @param __HANDLE__ specifies the RTC handle.
- * @param __FLAG__ specifies the RTC Alarm Flag sources to be enabled or disabled.
- * This parameter can be:
- * @arg RTC_FLAG_TSF
+ * @param __FLAG__ specifies the RTC Timestamp flag to clear.
+ * This parameter can be:
+ * @arg RTC_FLAG_TSF: Timestamp interrupt flag
+ * @arg RTC_FLAG_TSOVF: Timestamp overflow flag
* @retval None
*/
#define __HAL_RTC_TIMESTAMP_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ISR) = (~((__FLAG__) | RTC_ISR_INIT)|((__HANDLE__)->Instance->ISR & RTC_ISR_INIT))
@@ -419,7 +434,8 @@
*/
/* ---------------------------------TAMPER------------------------------------*/
-/** @defgroup RTCEx_Tamper RTC Tamper
+
+/** @defgroup RTCEx_Tamper RTCEx Tamper
* @{
*/
@@ -438,41 +454,51 @@
#define __HAL_RTC_TAMPER1_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->TAFCR &= ~(RTC_TAFCR_TAMP1E))
/**
- * @brief Check whether the specified RTC Tamper interrupt has occurred or not.
+ * @brief Enable the RTC Tamper interrupt.
* @param __HANDLE__ specifies the RTC handle.
- * @param __INTERRUPT__ specifies the RTC Tamper interrupt to check.
- * This parameter can be:
- * @arg RTC_IT_TAMP1
+ * @param __INTERRUPT__ specifies the RTC Tamper interrupt sources to be enabled.
+ * This parameter can be any combination of the following values:
+ * @arg RTC_IT_TAMP: Tamper global interrupt
* @retval None
*/
-#define __HAL_RTC_TAMPER_GET_IT(__HANDLE__, __INTERRUPT__) (((((__HANDLE__)->Instance->ISR) & ((__INTERRUPT__)>> 4U)) != RESET)? SET : RESET)
+#define __HAL_RTC_TAMPER_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->TAFCR |= (__INTERRUPT__))
+
+/**
+ * @brief Disable the RTC Tamper interrupt.
+ * @param __HANDLE__ specifies the RTC handle.
+ * @param __INTERRUPT__ specifies the RTC Tamper interrupt sources to be disabled.
+ * This parameter can be any combination of the following values:
+ * @arg RTC_IT_TAMP: Tamper global interrupt
+ * @retval None
+ */
+#define __HAL_RTC_TAMPER_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->TAFCR &= ~(__INTERRUPT__))
/**
* @brief Check whether the specified RTC Tamper interrupt has been enabled or not.
* @param __HANDLE__ specifies the RTC handle.
* @param __INTERRUPT__ specifies the RTC Tamper interrupt source to check.
* This parameter can be:
- * @arg RTC_IT_TAMP: Tamper interrupt
+ * @arg RTC_IT_TAMP: Tamper global interrupt
* @retval None
*/
-#define __HAL_RTC_TAMPER_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) (((((__HANDLE__)->Instance->TAFCR) & (__INTERRUPT__)) != RESET) ? SET : RESET)
+#define __HAL_RTC_TAMPER_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) (((((__HANDLE__)->Instance->TAFCR) & (__INTERRUPT__)) != 0U) ? 1U : 0U)
/**
* @brief Get the selected RTC Tamper's flag status.
* @param __HANDLE__ specifies the RTC handle.
- * @param __FLAG__ specifies the RTC Tamper Flag sources to be enabled or disabled.
+ * @param __FLAG__ specifies the RTC Tamper flag to be checked.
* This parameter can be:
- * @arg RTC_FLAG_TAMP1F
+ * @arg RTC_FLAG_TAMP1F: Tamper 1 interrupt flag
* @retval None
*/
-#define __HAL_RTC_TAMPER_GET_FLAG(__HANDLE__, __FLAG__) (((((__HANDLE__)->Instance->ISR) & (__FLAG__)) != RESET)? SET : RESET)
+#define __HAL_RTC_TAMPER_GET_FLAG(__HANDLE__, __FLAG__) (((((__HANDLE__)->Instance->ISR) & (__FLAG__)) != 0U)? 1U : 0U)
/**
* @brief Clear the RTC Tamper's pending flags.
* @param __HANDLE__ specifies the RTC handle.
* @param __FLAG__ specifies the RTC Tamper Flag to clear.
* This parameter can be:
- * @arg RTC_FLAG_TAMP1F
+ * @arg RTC_FLAG_TAMP1F: Tamper 1 interrupt flag
* @retval None
*/
#define __HAL_RTC_TAMPER_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ISR) = (~((__FLAG__) | RTC_ISR_INIT)|((__HANDLE__)->Instance->ISR & RTC_ISR_INIT))
@@ -486,84 +512,86 @@
*/
/**
- * @brief Enable interrupt on the RTC Tamper and Timestamp associated Exti line.
+ * @brief Enable interrupt on the RTC Tamper and Timestamp associated EXTI line.
* @retval None
*/
#define __HAL_RTC_TAMPER_TIMESTAMP_EXTI_ENABLE_IT() (EXTI->IMR |= RTC_EXTI_LINE_TAMPER_TIMESTAMP_EVENT)
/**
- * @brief Disable interrupt on the RTC Tamper and Timestamp associated Exti line.
+ * @brief Disable interrupt on the RTC Tamper and Timestamp associated EXTI line.
* @retval None
*/
-#define __HAL_RTC_TAMPER_TIMESTAMP_EXTI_DISABLE_IT() (EXTI->IMR &= ~(RTC_EXTI_LINE_TAMPER_TIMESTAMP_EVENT))
+#define __HAL_RTC_TAMPER_TIMESTAMP_EXTI_DISABLE_IT() (EXTI->IMR &= ~RTC_EXTI_LINE_TAMPER_TIMESTAMP_EVENT)
/**
- * @brief Enable event on the RTC Tamper and Timestamp associated Exti line.
+ * @brief Enable event on the RTC Tamper and Timestamp associated EXTI line.
* @retval None.
*/
#define __HAL_RTC_TAMPER_TIMESTAMP_EXTI_ENABLE_EVENT() (EXTI->EMR |= RTC_EXTI_LINE_TAMPER_TIMESTAMP_EVENT)
/**
- * @brief Disable event on the RTC Tamper and Timestamp associated Exti line.
+ * @brief Disable event on the RTC Tamper and Timestamp associated EXTI line.
* @retval None.
*/
-#define __HAL_RTC_TAMPER_TIMESTAMP_EXTI_DISABLE_EVENT() (EXTI->EMR &= ~(RTC_EXTI_LINE_TAMPER_TIMESTAMP_EVENT))
+#define __HAL_RTC_TAMPER_TIMESTAMP_EXTI_DISABLE_EVENT() (EXTI->EMR &= ~RTC_EXTI_LINE_TAMPER_TIMESTAMP_EVENT)
/**
- * @brief Enable falling edge trigger on the RTC Tamper and Timestamp associated Exti line.
+ * @brief Enable falling edge trigger on the RTC Tamper and Timestamp associated EXTI line.
* @retval None.
*/
#define __HAL_RTC_TAMPER_TIMESTAMP_EXTI_ENABLE_FALLING_EDGE() (EXTI->FTSR |= RTC_EXTI_LINE_TAMPER_TIMESTAMP_EVENT)
/**
- * @brief Disable falling edge trigger on the RTC Tamper and Timestamp associated Exti line.
+ * @brief Disable falling edge trigger on the RTC Tamper and Timestamp associated EXTI line.
* @retval None.
*/
-#define __HAL_RTC_TAMPER_TIMESTAMP_EXTI_DISABLE_FALLING_EDGE() (EXTI->FTSR &= ~(RTC_EXTI_LINE_TAMPER_TIMESTAMP_EVENT))
+#define __HAL_RTC_TAMPER_TIMESTAMP_EXTI_DISABLE_FALLING_EDGE() (EXTI->FTSR &= ~RTC_EXTI_LINE_TAMPER_TIMESTAMP_EVENT)
/**
- * @brief Enable rising edge trigger on the RTC Tamper and Timestamp associated Exti line.
+ * @brief Enable rising edge trigger on the RTC Tamper and Timestamp associated EXTI line.
* @retval None.
*/
#define __HAL_RTC_TAMPER_TIMESTAMP_EXTI_ENABLE_RISING_EDGE() (EXTI->RTSR |= RTC_EXTI_LINE_TAMPER_TIMESTAMP_EVENT)
/**
- * @brief Disable rising edge trigger on the RTC Tamper and Timestamp associated Exti line.
+ * @brief Disable rising edge trigger on the RTC Tamper and Timestamp associated EXTI line.
* @retval None.
*/
-#define __HAL_RTC_TAMPER_TIMESTAMP_EXTI_DISABLE_RISING_EDGE() (EXTI->RTSR &= ~(RTC_EXTI_LINE_TAMPER_TIMESTAMP_EVENT))
+#define __HAL_RTC_TAMPER_TIMESTAMP_EXTI_DISABLE_RISING_EDGE() (EXTI->RTSR &= ~RTC_EXTI_LINE_TAMPER_TIMESTAMP_EVENT)
/**
- * @brief Enable rising & falling edge trigger on the RTC Tamper and Timestamp associated Exti line.
+ * @brief Enable rising & falling edge trigger on the RTC Tamper and Timestamp associated EXTI line.
* @retval None.
*/
-#define __HAL_RTC_TAMPER_TIMESTAMP_EXTI_ENABLE_RISING_FALLING_EDGE() do{ __HAL_RTC_TAMPER_TIMESTAMP_EXTI_ENABLE_RISING_EDGE();\
- __HAL_RTC_TAMPER_TIMESTAMP_EXTI_ENABLE_FALLING_EDGE();\
- }while(0U)
+#define __HAL_RTC_TAMPER_TIMESTAMP_EXTI_ENABLE_RISING_FALLING_EDGE() do { \
+ __HAL_RTC_TAMPER_TIMESTAMP_EXTI_ENABLE_RISING_EDGE(); \
+ __HAL_RTC_TAMPER_TIMESTAMP_EXTI_ENABLE_FALLING_EDGE(); \
+ } while(0U)
/**
- * @brief Disable rising & falling edge trigger on the RTC Tamper and Timestamp associated Exti line.
+ * @brief Disable rising & falling edge trigger on the RTC Tamper and Timestamp associated EXTI line.
* This parameter can be:
* @retval None.
*/
-#define __HAL_RTC_TAMPER_TIMESTAMP_EXTI_DISABLE_RISING_FALLING_EDGE() do{ __HAL_RTC_TAMPER_TIMESTAMP_EXTI_DISABLE_RISING_EDGE();\
- __HAL_RTC_TAMPER_TIMESTAMP_EXTI_DISABLE_FALLING_EDGE();\
- }while(0U)
+#define __HAL_RTC_TAMPER_TIMESTAMP_EXTI_DISABLE_RISING_FALLING_EDGE() do { \
+ __HAL_RTC_TAMPER_TIMESTAMP_EXTI_DISABLE_RISING_EDGE(); \
+ __HAL_RTC_TAMPER_TIMESTAMP_EXTI_DISABLE_FALLING_EDGE(); \
+ } while(0U)
/**
- * @brief Check whether the RTC Tamper and Timestamp associated Exti line interrupt flag is set or not.
+ * @brief Check whether the RTC Tamper and Timestamp associated EXTI line interrupt flag is set or not.
* @retval Line Status.
*/
#define __HAL_RTC_TAMPER_TIMESTAMP_EXTI_GET_FLAG() (EXTI->PR & RTC_EXTI_LINE_TAMPER_TIMESTAMP_EVENT)
/**
- * @brief Clear the RTC Tamper and Timestamp associated Exti line flag.
+ * @brief Clear the RTC Tamper and Timestamp associated EXTI line flag.
* @retval None.
*/
#define __HAL_RTC_TAMPER_TIMESTAMP_EXTI_CLEAR_FLAG() (EXTI->PR = RTC_EXTI_LINE_TAMPER_TIMESTAMP_EVENT)
/**
- * @brief Generate a Software interrupt on the RTC Tamper and Timestamp associated Exti line
+ * @brief Generate a Software interrupt on the RTC Tamper and Timestamp associated EXTI line
* @retval None.
*/
#define __HAL_RTC_TAMPER_TIMESTAMP_EXTI_GENERATE_SWIT() (EXTI->SWIER |= RTC_EXTI_LINE_TAMPER_TIMESTAMP_EVENT)
@@ -571,8 +599,9 @@
* @}
*/
-/* ------------------------------Calibration----------------------------------*/
-/** @defgroup RTCEx_Calibration RTC Calibration
+/* ------------------------------CALIBRATION----------------------------------*/
+
+/** @defgroup RTCEx_Calibration RTCEx Calibration
* @{
*/
@@ -622,31 +651,28 @@
* @}
*/
-/**
- * @}
- */
-
/* Exported functions --------------------------------------------------------*/
-/** @defgroup RTCEx_Exported_Functions RTC Exported Functions
+
+/** @defgroup RTCEx_Exported_Functions RTCEx Exported Functions
* @{
*/
/** @addtogroup RTCEx_Exported_Functions_Group1
* @{
*/
-/* RTC TimeStamp and Tamper functions *****************************************/
-HAL_StatusTypeDef HAL_RTCEx_SetTimeStamp(RTC_HandleTypeDef *hrtc, uint32_t TimeStampEdge, uint32_t RTC_TimeStampPin);
-HAL_StatusTypeDef HAL_RTCEx_SetTimeStamp_IT(RTC_HandleTypeDef *hrtc, uint32_t TimeStampEdge, uint32_t RTC_TimeStampPin);
+/* RTC Timestamp and Tamper functions *****************************************/
+HAL_StatusTypeDef HAL_RTCEx_SetTimeStamp(RTC_HandleTypeDef *hrtc, uint32_t RTC_TimeStampEdge, uint32_t RTC_TimeStampPin);
+HAL_StatusTypeDef HAL_RTCEx_SetTimeStamp_IT(RTC_HandleTypeDef *hrtc, uint32_t RTC_TimeStampEdge, uint32_t RTC_TimeStampPin);
HAL_StatusTypeDef HAL_RTCEx_DeactivateTimeStamp(RTC_HandleTypeDef *hrtc);
HAL_StatusTypeDef HAL_RTCEx_GetTimeStamp(RTC_HandleTypeDef *hrtc, RTC_TimeTypeDef *sTimeStamp, RTC_DateTypeDef *sTimeStampDate, uint32_t Format);
HAL_StatusTypeDef HAL_RTCEx_SetTamper(RTC_HandleTypeDef *hrtc, RTC_TamperTypeDef *sTamper);
HAL_StatusTypeDef HAL_RTCEx_SetTamper_IT(RTC_HandleTypeDef *hrtc, RTC_TamperTypeDef *sTamper);
HAL_StatusTypeDef HAL_RTCEx_DeactivateTamper(RTC_HandleTypeDef *hrtc, uint32_t Tamper);
-void HAL_RTCEx_TamperTimeStampIRQHandler(RTC_HandleTypeDef *hrtc);
+void HAL_RTCEx_TamperTimeStampIRQHandler(RTC_HandleTypeDef *hrtc);
-void HAL_RTCEx_Tamper1EventCallback(RTC_HandleTypeDef *hrtc);
-void HAL_RTCEx_TimeStampEventCallback(RTC_HandleTypeDef *hrtc);
+void HAL_RTCEx_Tamper1EventCallback(RTC_HandleTypeDef *hrtc);
+void HAL_RTCEx_TimeStampEventCallback(RTC_HandleTypeDef *hrtc);
HAL_StatusTypeDef HAL_RTCEx_PollForTimeStampEvent(RTC_HandleTypeDef *hrtc, uint32_t Timeout);
HAL_StatusTypeDef HAL_RTCEx_PollForTamper1Event(RTC_HandleTypeDef *hrtc, uint32_t Timeout);
/**
@@ -656,13 +682,13 @@
/** @addtogroup RTCEx_Exported_Functions_Group2
* @{
*/
-/* RTC Wake-up functions ******************************************************/
+/* RTC Wakeup functions ******************************************************/
HAL_StatusTypeDef HAL_RTCEx_SetWakeUpTimer(RTC_HandleTypeDef *hrtc, uint32_t WakeUpCounter, uint32_t WakeUpClock);
HAL_StatusTypeDef HAL_RTCEx_SetWakeUpTimer_IT(RTC_HandleTypeDef *hrtc, uint32_t WakeUpCounter, uint32_t WakeUpClock);
-uint32_t HAL_RTCEx_DeactivateWakeUpTimer(RTC_HandleTypeDef *hrtc);
-uint32_t HAL_RTCEx_GetWakeUpTimer(RTC_HandleTypeDef *hrtc);
-void HAL_RTCEx_WakeUpTimerIRQHandler(RTC_HandleTypeDef *hrtc);
-void HAL_RTCEx_WakeUpTimerEventCallback(RTC_HandleTypeDef *hrtc);
+HAL_StatusTypeDef HAL_RTCEx_DeactivateWakeUpTimer(RTC_HandleTypeDef *hrtc);
+uint32_t HAL_RTCEx_GetWakeUpTimer(RTC_HandleTypeDef *hrtc);
+void HAL_RTCEx_WakeUpTimerIRQHandler(RTC_HandleTypeDef *hrtc);
+void HAL_RTCEx_WakeUpTimerEventCallback(RTC_HandleTypeDef *hrtc);
HAL_StatusTypeDef HAL_RTCEx_PollForWakeUpTimerEvent(RTC_HandleTypeDef *hrtc, uint32_t Timeout);
/**
* @}
@@ -671,9 +697,9 @@
/** @addtogroup RTCEx_Exported_Functions_Group3
* @{
*/
-/* Extension Control functions ************************************************/
-void HAL_RTCEx_BKUPWrite(RTC_HandleTypeDef *hrtc, uint32_t BackupRegister, uint32_t Data);
-uint32_t HAL_RTCEx_BKUPRead(RTC_HandleTypeDef *hrtc, uint32_t BackupRegister);
+/* Extended Control functions ************************************************/
+void HAL_RTCEx_BKUPWrite(RTC_HandleTypeDef *hrtc, uint32_t BackupRegister, uint32_t Data);
+uint32_t HAL_RTCEx_BKUPRead(RTC_HandleTypeDef *hrtc, uint32_t BackupRegister);
HAL_StatusTypeDef HAL_RTCEx_SetCoarseCalib(RTC_HandleTypeDef *hrtc, uint32_t CalibSign, uint32_t Value);
HAL_StatusTypeDef HAL_RTCEx_DeactivateCoarseCalib(RTC_HandleTypeDef *hrtc);
@@ -688,7 +714,7 @@
/** @addtogroup RTCEx_Exported_Functions_Group4
* @{
*/
-/* Extension RTC features functions *******************************************/
+/* Extended RTC features functions *******************************************/
void HAL_RTCEx_AlarmBEventCallback(RTC_HandleTypeDef *hrtc);
HAL_StatusTypeDef HAL_RTCEx_PollForAlarmBEvent(RTC_HandleTypeDef *hrtc, uint32_t Timeout);
/**
@@ -702,53 +728,50 @@
/* Private types -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
/* Private constants ---------------------------------------------------------*/
-/** @defgroup RTCEx_Private_Constants RTC Private Constants
+
+/** @defgroup RTCEx_Private_Constants RTCEx Private Constants
* @{
*/
-#define RTC_EXTI_LINE_TAMPER_TIMESTAMP_EVENT ((uint32_t)EXTI_IMR_MR21) /*!< External interrupt line 21 Connected to the RTC Tamper and Time Stamp events */
-#define RTC_EXTI_LINE_WAKEUPTIMER_EVENT ((uint32_t)EXTI_IMR_MR22) /*!< External interrupt line 22 Connected to the RTC Wake-up event */
+#define RTC_EXTI_LINE_TAMPER_TIMESTAMP_EVENT EXTI_IMR_MR21 /*!< External interrupt line 21 Connected to the RTC Tamper and Timestamp event */
+#define RTC_EXTI_LINE_WAKEUPTIMER_EVENT EXTI_IMR_MR22 /*!< External interrupt line 22 Connected to the RTC Wakeup event */
+/**
+ * @}
+ */
+
+/** @defgroup RTCEx_Private_Constants RTCEx Private Constants
+ * @{
+ */
+/* Masks Definition */
+#define RTC_TAMPER_ENABLE_BITS_MASK RTC_TAMPER_1
+
+#define RTC_TAMPER_FLAGS_MASK RTC_FLAG_TAMP1F
/**
* @}
*/
/* Private macros ------------------------------------------------------------*/
-/** @defgroup RTCEx_Private_Macros RTC Private Macros
+
+/** @defgroup RTCEx_Private_Macros RTCEx Private Macros
* @{
*/
/** @defgroup RTCEx_IS_RTC_Definitions Private macros to check input parameters
* @{
*/
-#define IS_RTC_BKP(BKP) (((BKP) == RTC_BKP_DR0) || \
- ((BKP) == RTC_BKP_DR1) || \
- ((BKP) == RTC_BKP_DR2) || \
- ((BKP) == RTC_BKP_DR3) || \
- ((BKP) == RTC_BKP_DR4) || \
- ((BKP) == RTC_BKP_DR5) || \
- ((BKP) == RTC_BKP_DR6) || \
- ((BKP) == RTC_BKP_DR7) || \
- ((BKP) == RTC_BKP_DR8) || \
- ((BKP) == RTC_BKP_DR9) || \
- ((BKP) == RTC_BKP_DR10) || \
- ((BKP) == RTC_BKP_DR11) || \
- ((BKP) == RTC_BKP_DR12) || \
- ((BKP) == RTC_BKP_DR13) || \
- ((BKP) == RTC_BKP_DR14) || \
- ((BKP) == RTC_BKP_DR15) || \
- ((BKP) == RTC_BKP_DR16) || \
- ((BKP) == RTC_BKP_DR17) || \
- ((BKP) == RTC_BKP_DR18) || \
- ((BKP) == RTC_BKP_DR19))
+#define IS_RTC_BKP(BKP) ((BKP) < (uint32_t) RTC_BKP_NUMBER)
+
#define IS_TIMESTAMP_EDGE(EDGE) (((EDGE) == RTC_TIMESTAMPEDGE_RISING) || \
((EDGE) == RTC_TIMESTAMPEDGE_FALLING))
+#define IS_RTC_TAMPER(TAMPER) ((((TAMPER) & ((uint32_t)~RTC_TAMPER_ENABLE_BITS_MASK)) == 0x00U) && ((TAMPER) != 0U))
+
#define IS_RTC_TAMPER_PIN(PIN) (((PIN) == RTC_TAMPERPIN_DEFAULT) || \
((PIN) == RTC_TAMPERPIN_POS1))
#define IS_RTC_TIMESTAMP_PIN(PIN) (((PIN) == RTC_TIMESTAMPPIN_DEFAULT) || \
((PIN) == RTC_TIMESTAMPPIN_POS1))
-#define IS_RTC_TAMPER_TRIGGER(TRIGGER) (((TRIGGER) == RTC_TAMPERTRIGGER_RISINGEDGE) || \
+#define IS_RTC_TAMPER_TRIGGER(TRIGGER) (((TRIGGER) == RTC_TAMPERTRIGGER_RISINGEDGE) || \
((TRIGGER) == RTC_TAMPERTRIGGER_FALLINGEDGE))
#define IS_RTC_WAKEUP_CLOCK(CLOCK) (((CLOCK) == RTC_WAKEUPCLOCK_RTCCLK_DIV16) || \
@@ -758,12 +781,13 @@
((CLOCK) == RTC_WAKEUPCLOCK_CK_SPRE_16BITS) || \
((CLOCK) == RTC_WAKEUPCLOCK_CK_SPRE_17BITS))
-#define IS_RTC_WAKEUP_COUNTER(COUNTER) ((COUNTER) <= 0xFFFFU)
+#define IS_RTC_WAKEUP_COUNTER(COUNTER) ((COUNTER) <= RTC_WUTR_WUT)
+
#define IS_RTC_CALIB_SIGN(SIGN) (((SIGN) == RTC_CALIBSIGN_POSITIVE) || \
((SIGN) == RTC_CALIBSIGN_NEGATIVE))
#define IS_RTC_CALIB_VALUE(VALUE) ((VALUE) < 0x20U)
-#define IS_RTC_TAMPER(TAMPER) ((((TAMPER) & ((uint32_t)~(RTC_TAFCR_TAMP1E))) == 0x00U) && ((TAMPER) != (uint32_t)RESET))
+
/**
* @}
*/
@@ -784,4 +808,4 @@
}
#endif
-#endif /* __STM32F2xx_HAL_RTC_EX_H */
+#endif /* STM32F2xx_HAL_RTC_EX_H */
diff --git a/Inc/stm32f2xx_hal_sd.h b/Inc/stm32f2xx_hal_sd.h
index d91688c..6e4807d 100644
--- a/Inc/stm32f2xx_hal_sd.h
+++ b/Inc/stm32f2xx_hal_sd.h
@@ -6,7 +6,7 @@
******************************************************************************
* @attention
*
- * Copyright (c) 2018 STMicroelectronics.
+ * Copyright (c) 2016 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
@@ -14,7 +14,7 @@
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
- */
+ */
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef STM32F2xx_HAL_SD_H
diff --git a/Inc/stm32f2xx_hal_smartcard.h b/Inc/stm32f2xx_hal_smartcard.h
index a260d07..2f3bdbe 100644
--- a/Inc/stm32f2xx_hal_smartcard.h
+++ b/Inc/stm32f2xx_hal_smartcard.h
@@ -752,3 +752,4 @@
#endif
#endif /* __STM32F2xx_HAL_SMARTCARD_H */
+
diff --git a/Inc/stm32f2xx_hal_spi.h b/Inc/stm32f2xx_hal_spi.h
index e67b769..68503e4 100644
--- a/Inc/stm32f2xx_hal_spi.h
+++ b/Inc/stm32f2xx_hal_spi.h
@@ -655,7 +655,8 @@
/* Callbacks Register/UnRegister functions ***********************************/
#if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U)
-HAL_StatusTypeDef HAL_SPI_RegisterCallback(SPI_HandleTypeDef *hspi, HAL_SPI_CallbackIDTypeDef CallbackID, pSPI_CallbackTypeDef pCallback);
+HAL_StatusTypeDef HAL_SPI_RegisterCallback(SPI_HandleTypeDef *hspi, HAL_SPI_CallbackIDTypeDef CallbackID,
+ pSPI_CallbackTypeDef pCallback);
HAL_StatusTypeDef HAL_SPI_UnRegisterCallback(SPI_HandleTypeDef *hspi, HAL_SPI_CallbackIDTypeDef CallbackID);
#endif /* USE_HAL_SPI_REGISTER_CALLBACKS */
/**
@@ -725,3 +726,4 @@
#endif
#endif /* STM32F2xx_HAL_SPI_H */
+
diff --git a/Inc/stm32f2xx_hal_sram.h b/Inc/stm32f2xx_hal_sram.h
index d444bb4..7fe7034 100644
--- a/Inc/stm32f2xx_hal_sram.h
+++ b/Inc/stm32f2xx_hal_sram.h
@@ -204,7 +204,7 @@
*/
/* SRAM State functions ******************************************************/
-HAL_SRAM_StateTypeDef HAL_SRAM_GetState(SRAM_HandleTypeDef *hsram);
+HAL_SRAM_StateTypeDef HAL_SRAM_GetState(const SRAM_HandleTypeDef *hsram);
/**
* @}
diff --git a/Inc/stm32f2xx_hal_tim.h b/Inc/stm32f2xx_hal_tim.h
index fe672cc..1eb13ac 100644
--- a/Inc/stm32f2xx_hal_tim.h
+++ b/Inc/stm32f2xx_hal_tim.h
@@ -705,6 +705,15 @@
* @}
*/
+/** @defgroup TIM_CC_DMA_Request CCx DMA request selection
+ * @{
+ */
+#define TIM_CCDMAREQUEST_CC 0x00000000U /*!< CCx DMA request sent when capture or compare match event occurs */
+#define TIM_CCDMAREQUEST_UPDATE TIM_CR2_CCDS /*!< CCx DMA requests sent when update event occurs */
+/**
+ * @}
+ */
+
/** @defgroup TIM_Flag_definition TIM Flag Definition
* @{
*/
@@ -739,16 +748,16 @@
/** @defgroup TIM_Clock_Source TIM Clock Source
* @{
*/
-#define TIM_CLOCKSOURCE_ETRMODE2 TIM_SMCR_ETPS_1 /*!< External clock source mode 2 */
#define TIM_CLOCKSOURCE_INTERNAL TIM_SMCR_ETPS_0 /*!< Internal clock source */
+#define TIM_CLOCKSOURCE_ETRMODE1 TIM_TS_ETRF /*!< External clock source mode 1 (ETRF) */
+#define TIM_CLOCKSOURCE_ETRMODE2 TIM_SMCR_ETPS_1 /*!< External clock source mode 2 */
+#define TIM_CLOCKSOURCE_TI1ED TIM_TS_TI1F_ED /*!< External clock source mode 1 (TTI1FP1 + edge detect.) */
+#define TIM_CLOCKSOURCE_TI1 TIM_TS_TI1FP1 /*!< External clock source mode 1 (TTI1FP1) */
+#define TIM_CLOCKSOURCE_TI2 TIM_TS_TI2FP2 /*!< External clock source mode 1 (TTI2FP2) */
#define TIM_CLOCKSOURCE_ITR0 TIM_TS_ITR0 /*!< External clock source mode 1 (ITR0) */
#define TIM_CLOCKSOURCE_ITR1 TIM_TS_ITR1 /*!< External clock source mode 1 (ITR1) */
#define TIM_CLOCKSOURCE_ITR2 TIM_TS_ITR2 /*!< External clock source mode 1 (ITR2) */
#define TIM_CLOCKSOURCE_ITR3 TIM_TS_ITR3 /*!< External clock source mode 1 (ITR3) */
-#define TIM_CLOCKSOURCE_TI1ED TIM_TS_TI1F_ED /*!< External clock source mode 1 (TTI1FP1 + edge detect.) */
-#define TIM_CLOCKSOURCE_TI1 TIM_TS_TI1FP1 /*!< External clock source mode 1 (TTI1FP1) */
-#define TIM_CLOCKSOURCE_TI2 TIM_TS_TI2FP2 /*!< External clock source mode 1 (TTI2FP2) */
-#define TIM_CLOCKSOURCE_ETRMODE1 TIM_TS_ETRF /*!< External clock source mode 1 (ETRF) */
/**
* @}
*/
@@ -1526,6 +1535,17 @@
TIM_SET_CAPTUREPOLARITY((__HANDLE__), (__CHANNEL__), (__POLARITY__)); \
}while(0)
+/** @brief Select the Capture/compare DMA request source.
+ * @param __HANDLE__ specifies the TIM Handle.
+ * @param __CCDMA__ specifies Capture/compare DMA request source
+ * This parameter can be one of the following values:
+ * @arg TIM_CCDMAREQUEST_CC: CCx DMA request generated on Capture/Compare event
+ * @arg TIM_CCDMAREQUEST_UPDATE: CCx DMA request generated on Update event
+ * @retval None
+ */
+#define __HAL_TIM_SELECT_CCDMAREQUEST(__HANDLE__, __CCDMA__) \
+ MODIFY_REG((__HANDLE__)->Instance->CR2, TIM_CR2_CCDS, (__CCDMA__))
+
/**
* @}
*/
@@ -1634,20 +1654,23 @@
#define IS_TIM_OPM_CHANNELS(__CHANNEL__) (((__CHANNEL__) == TIM_CHANNEL_1) || \
((__CHANNEL__) == TIM_CHANNEL_2))
+#define IS_TIM_PERIOD(__HANDLE__, __PERIOD__) \
+ ((IS_TIM_32B_COUNTER_INSTANCE(((__HANDLE__)->Instance)) == 0U) ? (((__PERIOD__) > 0U) && ((__PERIOD__) <= 0x0000FFFFU)) : ((__PERIOD__) > 0U))
+
#define IS_TIM_COMPLEMENTARY_CHANNELS(__CHANNEL__) (((__CHANNEL__) == TIM_CHANNEL_1) || \
((__CHANNEL__) == TIM_CHANNEL_2) || \
((__CHANNEL__) == TIM_CHANNEL_3))
#define IS_TIM_CLOCKSOURCE(__CLOCK__) (((__CLOCK__) == TIM_CLOCKSOURCE_INTERNAL) || \
+ ((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE1) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE2) || \
- ((__CLOCK__) == TIM_CLOCKSOURCE_ITR0) || \
- ((__CLOCK__) == TIM_CLOCKSOURCE_ITR1) || \
- ((__CLOCK__) == TIM_CLOCKSOURCE_ITR2) || \
- ((__CLOCK__) == TIM_CLOCKSOURCE_ITR3) || \
((__CLOCK__) == TIM_CLOCKSOURCE_TI1ED) || \
((__CLOCK__) == TIM_CLOCKSOURCE_TI1) || \
((__CLOCK__) == TIM_CLOCKSOURCE_TI2) || \
- ((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE1))
+ ((__CLOCK__) == TIM_CLOCKSOURCE_ITR0) || \
+ ((__CLOCK__) == TIM_CLOCKSOURCE_ITR1) || \
+ ((__CLOCK__) == TIM_CLOCKSOURCE_ITR2) || \
+ ((__CLOCK__) == TIM_CLOCKSOURCE_ITR3))
#define IS_TIM_CLOCKPOLARITY(__POLARITY__) (((__POLARITY__) == TIM_CLOCKPOLARITY_INVERTED) || \
((__POLARITY__) == TIM_CLOCKPOLARITY_NONINVERTED) || \
@@ -1723,13 +1746,13 @@
((__MODE__) == TIM_OCMODE_FORCED_ACTIVE) || \
((__MODE__) == TIM_OCMODE_FORCED_INACTIVE))
-#define IS_TIM_TRIGGER_SELECTION(__SELECTION__) (((__SELECTION__) == TIM_TS_ITR0) || \
- ((__SELECTION__) == TIM_TS_ITR1) || \
- ((__SELECTION__) == TIM_TS_ITR2) || \
- ((__SELECTION__) == TIM_TS_ITR3) || \
+#define IS_TIM_TRIGGER_SELECTION(__SELECTION__) (((__SELECTION__) == TIM_TS_ITR0) || \
+ ((__SELECTION__) == TIM_TS_ITR1) || \
+ ((__SELECTION__) == TIM_TS_ITR2) || \
+ ((__SELECTION__) == TIM_TS_ITR3) || \
((__SELECTION__) == TIM_TS_TI1F_ED) || \
- ((__SELECTION__) == TIM_TS_TI1FP1) || \
- ((__SELECTION__) == TIM_TS_TI2FP2) || \
+ ((__SELECTION__) == TIM_TS_TI1FP1) || \
+ ((__SELECTION__) == TIM_TS_TI2FP2) || \
((__SELECTION__) == TIM_TS_ETRF))
#define IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION(__SELECTION__) (((__SELECTION__) == TIM_TS_ITR0) || \
@@ -1818,11 +1841,11 @@
((__HANDLE__)->ChannelState[3] = (__CHANNEL_STATE__)))
#define TIM_CHANNEL_STATE_SET_ALL(__HANDLE__, __CHANNEL_STATE__) do { \
- (__HANDLE__)->ChannelState[0] = (__CHANNEL_STATE__); \
- (__HANDLE__)->ChannelState[1] = (__CHANNEL_STATE__); \
- (__HANDLE__)->ChannelState[2] = (__CHANNEL_STATE__); \
- (__HANDLE__)->ChannelState[3] = (__CHANNEL_STATE__); \
- } while(0)
+ (__HANDLE__)->ChannelState[0] = (__CHANNEL_STATE__); \
+ (__HANDLE__)->ChannelState[1] = (__CHANNEL_STATE__); \
+ (__HANDLE__)->ChannelState[2] = (__CHANNEL_STATE__); \
+ (__HANDLE__)->ChannelState[3] = (__CHANNEL_STATE__); \
+ } while(0)
#define TIM_CHANNEL_N_STATE_GET(__HANDLE__, __CHANNEL__)\
(((__CHANNEL__) == TIM_CHANNEL_1) ? (__HANDLE__)->ChannelNState[0] :\
@@ -1837,15 +1860,15 @@
((__HANDLE__)->ChannelNState[3] = (__CHANNEL_STATE__)))
#define TIM_CHANNEL_N_STATE_SET_ALL(__HANDLE__, __CHANNEL_STATE__) do { \
- (__HANDLE__)->ChannelNState[0] = \
- (__CHANNEL_STATE__); \
- (__HANDLE__)->ChannelNState[1] = \
- (__CHANNEL_STATE__); \
- (__HANDLE__)->ChannelNState[2] = \
- (__CHANNEL_STATE__); \
- (__HANDLE__)->ChannelNState[3] = \
- (__CHANNEL_STATE__); \
- } while(0)
+ (__HANDLE__)->ChannelNState[0] = \
+ (__CHANNEL_STATE__); \
+ (__HANDLE__)->ChannelNState[1] = \
+ (__CHANNEL_STATE__); \
+ (__HANDLE__)->ChannelNState[2] = \
+ (__CHANNEL_STATE__); \
+ (__HANDLE__)->ChannelNState[3] = \
+ (__CHANNEL_STATE__); \
+ } while(0)
/**
* @}
@@ -1974,7 +1997,7 @@
* @{
*/
/* Timer Encoder functions ****************************************************/
-HAL_StatusTypeDef HAL_TIM_Encoder_Init(TIM_HandleTypeDef *htim, TIM_Encoder_InitTypeDef *sConfig);
+HAL_StatusTypeDef HAL_TIM_Encoder_Init(TIM_HandleTypeDef *htim, const TIM_Encoder_InitTypeDef *sConfig);
HAL_StatusTypeDef HAL_TIM_Encoder_DeInit(TIM_HandleTypeDef *htim);
void HAL_TIM_Encoder_MspInit(TIM_HandleTypeDef *htim);
void HAL_TIM_Encoder_MspDeInit(TIM_HandleTypeDef *htim);
diff --git a/Inc/stm32f2xx_hal_tim_ex.h b/Inc/stm32f2xx_hal_tim_ex.h
index a4522fa..222549d 100644
--- a/Inc/stm32f2xx_hal_tim_ex.h
+++ b/Inc/stm32f2xx_hal_tim_ex.h
@@ -257,7 +257,7 @@
/* End of exported functions -------------------------------------------------*/
/* Private functions----------------------------------------------------------*/
-/** @addtogroup TIMEx_Private_Functions TIMEx Private Functions
+/** @addtogroup TIMEx_Private_Functions TIM Extended Private Functions
* @{
*/
void TIMEx_DMACommutationCplt(DMA_HandleTypeDef *hdma);
diff --git a/Inc/stm32f2xx_hal_uart.h b/Inc/stm32f2xx_hal_uart.h
index 2c2f84d..a4e79c6 100644
--- a/Inc/stm32f2xx_hal_uart.h
+++ b/Inc/stm32f2xx_hal_uart.h
@@ -163,7 +163,7 @@
UART_InitTypeDef Init; /*!< UART communication parameters */
- uint8_t *pTxBuffPtr; /*!< Pointer to UART Tx transfer Buffer */
+ const uint8_t *pTxBuffPtr; /*!< Pointer to UART Tx transfer Buffer */
uint16_t TxXferSize; /*!< UART Tx Transfer size */
@@ -906,3 +906,4 @@
#endif
#endif /* __STM32F2xx_HAL_UART_H */
+
diff --git a/Inc/stm32f2xx_hal_usart.h b/Inc/stm32f2xx_hal_usart.h
index db29cf4..803f1c5 100644
--- a/Inc/stm32f2xx_hal_usart.h
+++ b/Inc/stm32f2xx_hal_usart.h
@@ -645,3 +645,4 @@
#endif
#endif /* __STM32F2xx_HAL_USART_H */
+
diff --git a/Inc/stm32f2xx_hal_wwdg.h b/Inc/stm32f2xx_hal_wwdg.h
index f95211d..3d865e5 100644
--- a/Inc/stm32f2xx_hal_wwdg.h
+++ b/Inc/stm32f2xx_hal_wwdg.h
@@ -183,7 +183,7 @@
/**
* @brief Enable the WWDG early wakeup interrupt.
- * @param __HANDLE__: WWDG handle
+ * @param __HANDLE__ WWDG handle
* @param __INTERRUPT__ specifies the interrupt to enable.
* This parameter can be one of the following values:
* @arg WWDG_IT_EWI: Early wakeup interrupt
diff --git a/Inc/stm32f2xx_ll_adc.h b/Inc/stm32f2xx_ll_adc.h
index afd1060..a90cc8c 100644
--- a/Inc/stm32f2xx_ll_adc.h
+++ b/Inc/stm32f2xx_ll_adc.h
@@ -4617,3 +4617,4 @@
#endif
#endif /* __STM32F2xx_LL_ADC_H */
+
diff --git a/Inc/stm32f2xx_ll_bus.h b/Inc/stm32f2xx_ll_bus.h
index d0a1189..eac82a3 100644
--- a/Inc/stm32f2xx_ll_bus.h
+++ b/Inc/stm32f2xx_ll_bus.h
@@ -26,10 +26,9 @@
* Copyright (c) 2017 STMicroelectronics.
* All rights reserved.
*
- * This software is licensed under terms that can be found in the LICENSE file
- * in the root directory of this software component.
+ * This software is licensed under terms that can be found in the LICENSE file in
+ * the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
- *
******************************************************************************
*/
@@ -1515,3 +1514,4 @@
#endif
#endif /* __STM32F2xx_LL_BUS_H */
+
diff --git a/Inc/stm32f2xx_ll_cortex.h b/Inc/stm32f2xx_ll_cortex.h
index f23e416..33a8362 100644
--- a/Inc/stm32f2xx_ll_cortex.h
+++ b/Inc/stm32f2xx_ll_cortex.h
@@ -10,7 +10,7 @@
[..]
The LL CORTEX driver contains a set of generic APIs that can be
used by user:
- (+) SYSTICK configuration used by @ref LL_mDelay and @ref LL_Init1msTick
+ (+) SYSTICK configuration used by LL_mDelay and LL_Init1msTick
functions
(+) Low power mode configuration (SCB register of Cortex-MCU)
(+) MPU API to configure and enable regions
@@ -25,8 +25,8 @@
* Copyright (c) 2017 STMicroelectronics.
* All rights reserved.
*
- * This software is licensed under terms that can be found in the LICENSE file
- * in the root directory of this software component.
+ * This software is licensed under terms that can be found in the LICENSE file in
+ * the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
@@ -635,3 +635,4 @@
#endif
#endif /* __STM32F2xx_LL_CORTEX_H */
+
diff --git a/Inc/stm32f2xx_ll_crc.h b/Inc/stm32f2xx_ll_crc.h
index ae4768a..186ff7b 100644
--- a/Inc/stm32f2xx_ll_crc.h
+++ b/Inc/stm32f2xx_ll_crc.h
@@ -135,7 +135,7 @@
* @param CRCx CRC Instance
* @retval Current CRC calculation result as stored in CRC_DR register (32 bits).
*/
-__STATIC_INLINE uint32_t LL_CRC_ReadData32(CRC_TypeDef *CRCx)
+__STATIC_INLINE uint32_t LL_CRC_ReadData32(const CRC_TypeDef *CRCx)
{
return (uint32_t)(READ_REG(CRCx->DR));
}
@@ -173,7 +173,7 @@
* @{
*/
-ErrorStatus LL_CRC_DeInit(CRC_TypeDef *CRCx);
+ErrorStatus LL_CRC_DeInit(const CRC_TypeDef *CRCx);
/**
* @}
diff --git a/Inc/stm32f2xx_ll_dac.h b/Inc/stm32f2xx_ll_dac.h
index 8c9c32c..9207a10 100644
--- a/Inc/stm32f2xx_ll_dac.h
+++ b/Inc/stm32f2xx_ll_dac.h
@@ -471,12 +471,10 @@
* @arg @ref LL_DAC_RESOLUTION_8B
* @retval DAC conversion data (unit: digital value)
*/
-#define __LL_DAC_CALC_VOLTAGE_TO_DATA(__VREFANALOG_VOLTAGE__,\
- __DAC_VOLTAGE__,\
- __DAC_RESOLUTION__) \
-((__DAC_VOLTAGE__) * __LL_DAC_DIGITAL_SCALE(__DAC_RESOLUTION__) \
- / (__VREFANALOG_VOLTAGE__) \
-)
+#define __LL_DAC_CALC_VOLTAGE_TO_DATA(__VREFANALOG_VOLTAGE__, __DAC_VOLTAGE__, __DAC_RESOLUTION__) \
+ ((__DAC_VOLTAGE__) * __LL_DAC_DIGITAL_SCALE(__DAC_RESOLUTION__) \
+ / (__VREFANALOG_VOLTAGE__) \
+ )
/**
* @}
@@ -491,6 +489,7 @@
/** @defgroup DAC_LL_Exported_Functions DAC Exported Functions
* @{
*/
+
/**
* @brief Set the conversion trigger source for the selected DAC channel.
* @note For conversion trigger source to be effective, DAC trigger
@@ -545,7 +544,7 @@
* @arg @ref LL_DAC_TRIG_EXT_TIM2_TRGO
* @arg @ref LL_DAC_TRIG_EXT_EXTI_LINE9
*/
-__STATIC_INLINE uint32_t LL_DAC_GetTriggerSource(DAC_TypeDef *DACx, uint32_t DAC_Channel)
+__STATIC_INLINE uint32_t LL_DAC_GetTriggerSource(const DAC_TypeDef *DACx, uint32_t DAC_Channel)
{
return (uint32_t)(READ_BIT(DACx->CR, DAC_CR_TSEL1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK))
>> (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK)
@@ -588,7 +587,7 @@
* @arg @ref LL_DAC_WAVE_AUTO_GENERATION_NOISE
* @arg @ref LL_DAC_WAVE_AUTO_GENERATION_TRIANGLE
*/
-__STATIC_INLINE uint32_t LL_DAC_GetWaveAutoGeneration(DAC_TypeDef *DACx, uint32_t DAC_Channel)
+__STATIC_INLINE uint32_t LL_DAC_GetWaveAutoGeneration(const DAC_TypeDef *DACx, uint32_t DAC_Channel)
{
return (uint32_t)(READ_BIT(DACx->CR, DAC_CR_WAVE1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK))
>> (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK)
@@ -654,7 +653,7 @@
* @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS10_0
* @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS11_0
*/
-__STATIC_INLINE uint32_t LL_DAC_GetWaveNoiseLFSR(DAC_TypeDef *DACx, uint32_t DAC_Channel)
+__STATIC_INLINE uint32_t LL_DAC_GetWaveNoiseLFSR(const DAC_TypeDef *DACx, uint32_t DAC_Channel)
{
return (uint32_t)(READ_BIT(DACx->CR, DAC_CR_MAMP1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK))
>> (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK)
@@ -721,7 +720,7 @@
* @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_2047
* @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_4095
*/
-__STATIC_INLINE uint32_t LL_DAC_GetWaveTriangleAmplitude(DAC_TypeDef *DACx, uint32_t DAC_Channel)
+__STATIC_INLINE uint32_t LL_DAC_GetWaveTriangleAmplitude(const DAC_TypeDef *DACx, uint32_t DAC_Channel)
{
return (uint32_t)(READ_BIT(DACx->CR, DAC_CR_MAMP1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK))
>> (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK)
@@ -760,7 +759,7 @@
* @arg @ref LL_DAC_OUTPUT_BUFFER_ENABLE
* @arg @ref LL_DAC_OUTPUT_BUFFER_DISABLE
*/
-__STATIC_INLINE uint32_t LL_DAC_GetOutputBuffer(DAC_TypeDef *DACx, uint32_t DAC_Channel)
+__STATIC_INLINE uint32_t LL_DAC_GetOutputBuffer(const DAC_TypeDef *DACx, uint32_t DAC_Channel)
{
return (uint32_t)(READ_BIT(DACx->CR, DAC_CR_BOFF1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK))
>> (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK)
@@ -822,7 +821,7 @@
* @arg @ref LL_DAC_CHANNEL_2
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_DAC_IsDMAReqEnabled(DAC_TypeDef *DACx, uint32_t DAC_Channel)
+__STATIC_INLINE uint32_t LL_DAC_IsDMAReqEnabled(const DAC_TypeDef *DACx, uint32_t DAC_Channel)
{
return ((READ_BIT(DACx->CR,
DAC_CR_DMAEN1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK))
@@ -861,7 +860,7 @@
* @arg @ref LL_DAC_DMA_REG_DATA_8BITS_RIGHT_ALIGNED
* @retval DAC register address
*/
-__STATIC_INLINE uint32_t LL_DAC_DMA_GetRegAddr(DAC_TypeDef *DACx, uint32_t DAC_Channel, uint32_t Register)
+__STATIC_INLINE uint32_t LL_DAC_DMA_GetRegAddr(const DAC_TypeDef *DACx, uint32_t DAC_Channel, uint32_t Register)
{
/* Retrieve address of register DHR12Rx, DHR12Lx or DHR8Rx depending on */
/* DAC channel selected. */
@@ -922,7 +921,7 @@
* @arg @ref LL_DAC_CHANNEL_2
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_DAC_IsEnabled(DAC_TypeDef *DACx, uint32_t DAC_Channel)
+__STATIC_INLINE uint32_t LL_DAC_IsEnabled(const DAC_TypeDef *DACx, uint32_t DAC_Channel)
{
return ((READ_BIT(DACx->CR,
DAC_CR_EN1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK))
@@ -980,7 +979,7 @@
* @arg @ref LL_DAC_CHANNEL_2
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_DAC_IsTriggerEnabled(DAC_TypeDef *DACx, uint32_t DAC_Channel)
+__STATIC_INLINE uint32_t LL_DAC_IsTriggerEnabled(const DAC_TypeDef *DACx, uint32_t DAC_Channel)
{
return ((READ_BIT(DACx->CR,
DAC_CR_TEN1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK))
@@ -1153,7 +1152,7 @@
* @arg @ref LL_DAC_CHANNEL_2
* @retval Value between Min_Data=0x000 and Max_Data=0xFFF
*/
-__STATIC_INLINE uint32_t LL_DAC_RetrieveOutputData(DAC_TypeDef *DACx, uint32_t DAC_Channel)
+__STATIC_INLINE uint32_t LL_DAC_RetrieveOutputData(const DAC_TypeDef *DACx, uint32_t DAC_Channel)
{
__IO uint32_t const *preg = __DAC_PTR_REG_OFFSET(DACx->DOR1, (DAC_Channel >> DAC_REG_DORX_REGOFFSET_BITOFFSET_POS)
& DAC_REG_DORX_REGOFFSET_MASK_POSBIT0);
@@ -1175,7 +1174,7 @@
* @param DACx DAC instance
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_DAC_IsActiveFlag_DMAUDR1(DAC_TypeDef *DACx)
+__STATIC_INLINE uint32_t LL_DAC_IsActiveFlag_DMAUDR1(const DAC_TypeDef *DACx)
{
return ((READ_BIT(DACx->SR, LL_DAC_FLAG_DMAUDR1) == (LL_DAC_FLAG_DMAUDR1)) ? 1UL : 0UL);
}
@@ -1187,7 +1186,7 @@
* @param DACx DAC instance
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_DAC_IsActiveFlag_DMAUDR2(DAC_TypeDef *DACx)
+__STATIC_INLINE uint32_t LL_DAC_IsActiveFlag_DMAUDR2(const DAC_TypeDef *DACx)
{
return ((READ_BIT(DACx->SR, LL_DAC_FLAG_DMAUDR2) == (LL_DAC_FLAG_DMAUDR2)) ? 1UL : 0UL);
}
@@ -1279,7 +1278,7 @@
* @param DACx DAC instance
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_DAC_IsEnabledIT_DMAUDR1(DAC_TypeDef *DACx)
+__STATIC_INLINE uint32_t LL_DAC_IsEnabledIT_DMAUDR1(const DAC_TypeDef *DACx)
{
return ((READ_BIT(DACx->CR, LL_DAC_IT_DMAUDRIE1) == (LL_DAC_IT_DMAUDRIE1)) ? 1UL : 0UL);
}
@@ -1291,7 +1290,7 @@
* @param DACx DAC instance
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_DAC_IsEnabledIT_DMAUDR2(DAC_TypeDef *DACx)
+__STATIC_INLINE uint32_t LL_DAC_IsEnabledIT_DMAUDR2(const DAC_TypeDef *DACx)
{
return ((READ_BIT(DACx->CR, LL_DAC_IT_DMAUDRIE2) == (LL_DAC_IT_DMAUDRIE2)) ? 1UL : 0UL);
}
@@ -1306,8 +1305,8 @@
* @{
*/
-ErrorStatus LL_DAC_DeInit(DAC_TypeDef *DACx);
-ErrorStatus LL_DAC_Init(DAC_TypeDef *DACx, uint32_t DAC_Channel, LL_DAC_InitTypeDef *DAC_InitStruct);
+ErrorStatus LL_DAC_DeInit(const DAC_TypeDef *DACx);
+ErrorStatus LL_DAC_Init(DAC_TypeDef *DACx, uint32_t DAC_Channel, const LL_DAC_InitTypeDef *DAC_InitStruct);
void LL_DAC_StructInit(LL_DAC_InitTypeDef *DAC_InitStruct);
/**
diff --git a/Inc/stm32f2xx_ll_dma.h b/Inc/stm32f2xx_ll_dma.h
index f5d7535..7b518fe 100644
--- a/Inc/stm32f2xx_ll_dma.h
+++ b/Inc/stm32f2xx_ll_dma.h
@@ -9,8 +9,8 @@
* Copyright (c) 2016 STMicroelectronics.
* All rights reserved.
*
- * This software is licensed under terms that can be found in the LICENSE file
- * in the root directory of this software component.
+ * This software is licensed under terms that can be found in the LICENSE file in
+ * the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
@@ -2719,7 +2719,7 @@
}
/**
- * @brief Check if Half transfer interrup is enabled.
+ * @brief Check if Half transfer interrupt is enabled.
* @rmtoll CR HTIE LL_DMA_IsEnabledIT_HT
* @param DMAx DMAx Instance
* @param Stream This parameter can be one of the following values:
@@ -2759,7 +2759,7 @@
}
/**
- * @brief Check if Transfer complete interrup is enabled.
+ * @brief Check if Transfer complete interrupt is enabled.
* @rmtoll CR TCIE LL_DMA_IsEnabledIT_TC
* @param DMAx DMAx Instance
* @param Stream This parameter can be one of the following values:
@@ -2799,7 +2799,7 @@
}
/**
- * @brief Check if FIFO error interrup is enabled.
+ * @brief Check if FIFO error interrupt is enabled.
* @rmtoll FCR FEIE LL_DMA_IsEnabledIT_FE
* @param DMAx DMAx Instance
* @param Stream This parameter can be one of the following values:
@@ -2855,3 +2855,4 @@
#endif
#endif /* __STM32F2xx_LL_DMA_H */
+
diff --git a/Inc/stm32f2xx_ll_exti.h b/Inc/stm32f2xx_ll_exti.h
index e709b87..ac77fec 100644
--- a/Inc/stm32f2xx_ll_exti.h
+++ b/Inc/stm32f2xx_ll_exti.h
@@ -929,3 +929,4 @@
#endif
#endif /* __STM32F2xx_LL_EXTI_H */
+
diff --git a/Inc/stm32f2xx_ll_gpio.h b/Inc/stm32f2xx_ll_gpio.h
index dfab589..0043650 100644
--- a/Inc/stm32f2xx_ll_gpio.h
+++ b/Inc/stm32f2xx_ll_gpio.h
@@ -978,3 +978,4 @@
#endif
#endif /* __STM32F2xx_LL_GPIO_H */
+
diff --git a/Inc/stm32f2xx_ll_i2c.h b/Inc/stm32f2xx_ll_i2c.h
index 0da6218..3b29523 100644
--- a/Inc/stm32f2xx_ll_i2c.h
+++ b/Inc/stm32f2xx_ll_i2c.h
@@ -240,7 +240,7 @@
* @}
*/
-/** @defgroup I2C_LL_EM_Exported_Macros_Helper Exported_Macros_Helper
+/** @defgroup I2C_LL_EM_Exported_Macros_Helper Exported Macros Helper
* @{
*/
@@ -761,7 +761,7 @@
/**
* @brief Configure peripheral mode.
- * @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
+ * @note Macro IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
* SMBus feature is supported by the I2Cx Instance.
* @rmtoll CR1 SMBUS LL_I2C_SetMode\n
* CR1 SMBTYPE LL_I2C_SetMode\n
@@ -781,7 +781,7 @@
/**
* @brief Get peripheral mode.
- * @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
+ * @note Macro IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
* SMBus feature is supported by the I2Cx Instance.
* @rmtoll CR1 SMBUS LL_I2C_GetMode\n
* CR1 SMBTYPE LL_I2C_GetMode\n
@@ -800,7 +800,7 @@
/**
* @brief Enable SMBus alert (Host or Device mode)
- * @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
+ * @note Macro IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
* SMBus feature is supported by the I2Cx Instance.
* @note SMBus Device mode:
* - SMBus Alert pin is drived low and
@@ -818,7 +818,7 @@
/**
* @brief Disable SMBus alert (Host or Device mode)
- * @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
+ * @note Macro IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
* SMBus feature is supported by the I2Cx Instance.
* @note SMBus Device mode:
* - SMBus Alert pin is not drived (can be used as a standard GPIO) and
@@ -836,7 +836,7 @@
/**
* @brief Check if SMBus alert (Host or Device mode) is enabled or disabled.
- * @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
+ * @note Macro IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
* SMBus feature is supported by the I2Cx Instance.
* @rmtoll CR1 ALERT LL_I2C_IsEnabledSMBusAlert
* @param I2Cx I2C Instance.
@@ -849,7 +849,7 @@
/**
* @brief Enable SMBus Packet Error Calculation (PEC).
- * @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
+ * @note Macro IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
* SMBus feature is supported by the I2Cx Instance.
* @rmtoll CR1 ENPEC LL_I2C_EnableSMBusPEC
* @param I2Cx I2C Instance.
@@ -862,7 +862,7 @@
/**
* @brief Disable SMBus Packet Error Calculation (PEC).
- * @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
+ * @note Macro IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
* SMBus feature is supported by the I2Cx Instance.
* @rmtoll CR1 ENPEC LL_I2C_DisableSMBusPEC
* @param I2Cx I2C Instance.
@@ -875,7 +875,7 @@
/**
* @brief Check if SMBus Packet Error Calculation (PEC) is enabled or disabled.
- * @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
+ * @note Macro IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
* SMBus feature is supported by the I2Cx Instance.
* @rmtoll CR1 ENPEC LL_I2C_IsEnabledSMBusPEC
* @param I2Cx I2C Instance.
@@ -1058,7 +1058,7 @@
/**
* @brief Enable Error interrupts.
- * @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
+ * @note Macro IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
* SMBus feature is supported by the I2Cx Instance.
* @note Any of these errors will generate interrupt :
* Bus Error detection (BERR)
@@ -1079,7 +1079,7 @@
/**
* @brief Disable Error interrupts.
- * @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
+ * @note Macro IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
* SMBus feature is supported by the I2Cx Instance.
* @note Any of these errors will generate interrupt :
* Bus Error detection (BERR)
@@ -1262,7 +1262,7 @@
/**
* @brief Indicate the status of SMBus PEC error flag in reception.
- * @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
+ * @note Macro IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
* SMBus feature is supported by the I2Cx Instance.
* @rmtoll SR1 PECERR LL_I2C_IsActiveSMBusFlag_PECERR
* @param I2Cx I2C Instance.
@@ -1275,7 +1275,7 @@
/**
* @brief Indicate the status of SMBus Timeout detection flag.
- * @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
+ * @note Macro IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
* SMBus feature is supported by the I2Cx Instance.
* @rmtoll SR1 TIMEOUT LL_I2C_IsActiveSMBusFlag_TIMEOUT
* @param I2Cx I2C Instance.
@@ -1288,7 +1288,7 @@
/**
* @brief Indicate the status of SMBus alert flag.
- * @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
+ * @note Macro IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
* SMBus feature is supported by the I2Cx Instance.
* @rmtoll SR1 SMBALERT LL_I2C_IsActiveSMBusFlag_ALERT
* @param I2Cx I2C Instance.
@@ -1327,7 +1327,7 @@
/**
* @brief Indicate the status of SMBus Host address reception (Slave mode).
- * @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
+ * @note Macro IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
* SMBus feature is supported by the I2Cx Instance.
* @note RESET: No SMBus Host address
* SET: SMBus Host address received.
@@ -1343,7 +1343,7 @@
/**
* @brief Indicate the status of SMBus Device default address reception (Slave mode).
- * @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
+ * @note Macro IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
* SMBus feature is supported by the I2Cx Instance.
* @note RESET: No SMBus Device default address
* SET: SMBus Device default address received.
@@ -1475,7 +1475,7 @@
/**
* @brief Clear SMBus Timeout detection flag.
- * @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
+ * @note Macro IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
* SMBus feature is supported by the I2Cx Instance.
* @rmtoll SR1 TIMEOUT LL_I2C_ClearSMBusFlag_TIMEOUT
* @param I2Cx I2C Instance.
@@ -1488,7 +1488,7 @@
/**
* @brief Clear SMBus Alert flag.
- * @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
+ * @note Macro IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
* SMBus feature is supported by the I2Cx Instance.
* @rmtoll SR1 SMBALERT LL_I2C_ClearSMBusFlag_ALERT
* @param I2Cx I2C Instance.
@@ -1666,7 +1666,7 @@
/**
* @brief Enable transfer or internal comparison of the SMBus Packet Error byte (transmission or reception mode).
- * @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
+ * @note Macro IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
* SMBus feature is supported by the I2Cx Instance.
* @note This feature is cleared by hardware when the PEC byte is transferred or compared,
* or by a START or STOP condition, it is also cleared by software.
@@ -1681,7 +1681,7 @@
/**
* @brief Disable transfer or internal comparison of the SMBus Packet Error byte (transmission or reception mode).
- * @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
+ * @note Macro IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
* SMBus feature is supported by the I2Cx Instance.
* @rmtoll CR1 PEC LL_I2C_DisableSMBusPECCompare
* @param I2Cx I2C Instance.
@@ -1694,7 +1694,7 @@
/**
* @brief Check if the SMBus Packet Error byte transfer or internal comparison is requested or not.
- * @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
+ * @note Macro IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
* SMBus feature is supported by the I2Cx Instance.
* @rmtoll CR1 PEC LL_I2C_IsEnabledSMBusPECCompare
* @param I2Cx I2C Instance.
@@ -1707,7 +1707,7 @@
/**
* @brief Get the SMBus Packet Error byte calculated.
- * @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
+ * @note Macro IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
* SMBus feature is supported by the I2Cx Instance.
* @rmtoll SR2 PEC LL_I2C_GetSMBusPEC
* @param I2Cx I2C Instance.
@@ -1779,3 +1779,4 @@
#endif
#endif /* __STM32F2xx_LL_I2C_H */
+
diff --git a/Inc/stm32f2xx_ll_rcc.h b/Inc/stm32f2xx_ll_rcc.h
index d152bb0..64ae78b 100644
--- a/Inc/stm32f2xx_ll_rcc.h
+++ b/Inc/stm32f2xx_ll_rcc.h
@@ -9,10 +9,9 @@
* Copyright (c) 2017 STMicroelectronics.
* All rights reserved.
*
- * This software is licensed under terms that can be found in the LICENSE file
- * in the root directory of this software component.
+ * This software is licensed under terms that can be found in the LICENSE file in
+ * the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
- *
******************************************************************************
*/
@@ -2435,3 +2434,4 @@
#endif
#endif /* __STM32F2xx_LL_RCC_H */
+
diff --git a/Inc/stm32f2xx_ll_rng.h b/Inc/stm32f2xx_ll_rng.h
index 6c8e01a..2ee2d6b 100644
--- a/Inc/stm32f2xx_ll_rng.h
+++ b/Inc/stm32f2xx_ll_rng.h
@@ -38,6 +38,7 @@
*/
/* Private types -------------------------------------------------------------*/
+/* Private defines -----------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
/* Private constants ---------------------------------------------------------*/
/* Private macros ------------------------------------------------------------*/
@@ -145,7 +146,7 @@
* @param RNGx RNG Instance
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_RNG_IsEnabled(RNG_TypeDef *RNGx)
+__STATIC_INLINE uint32_t LL_RNG_IsEnabled(const RNG_TypeDef *RNGx)
{
return ((READ_BIT(RNGx->CR, RNG_CR_RNGEN) == (RNG_CR_RNGEN)) ? 1UL : 0UL);
}
@@ -164,7 +165,7 @@
* @param RNGx RNG Instance
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_RNG_IsActiveFlag_DRDY(RNG_TypeDef *RNGx)
+__STATIC_INLINE uint32_t LL_RNG_IsActiveFlag_DRDY(const RNG_TypeDef *RNGx)
{
return ((READ_BIT(RNGx->SR, RNG_SR_DRDY) == (RNG_SR_DRDY)) ? 1UL : 0UL);
}
@@ -175,7 +176,7 @@
* @param RNGx RNG Instance
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_RNG_IsActiveFlag_CECS(RNG_TypeDef *RNGx)
+__STATIC_INLINE uint32_t LL_RNG_IsActiveFlag_CECS(const RNG_TypeDef *RNGx)
{
return ((READ_BIT(RNGx->SR, RNG_SR_CECS) == (RNG_SR_CECS)) ? 1UL : 0UL);
}
@@ -186,7 +187,7 @@
* @param RNGx RNG Instance
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_RNG_IsActiveFlag_SECS(RNG_TypeDef *RNGx)
+__STATIC_INLINE uint32_t LL_RNG_IsActiveFlag_SECS(const RNG_TypeDef *RNGx)
{
return ((READ_BIT(RNGx->SR, RNG_SR_SECS) == (RNG_SR_SECS)) ? 1UL : 0UL);
}
@@ -197,7 +198,7 @@
* @param RNGx RNG Instance
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_RNG_IsActiveFlag_CEIS(RNG_TypeDef *RNGx)
+__STATIC_INLINE uint32_t LL_RNG_IsActiveFlag_CEIS(const RNG_TypeDef *RNGx)
{
return ((READ_BIT(RNGx->SR, RNG_SR_CEIS) == (RNG_SR_CEIS)) ? 1UL : 0UL);
}
@@ -208,7 +209,7 @@
* @param RNGx RNG Instance
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_RNG_IsActiveFlag_SEIS(RNG_TypeDef *RNGx)
+__STATIC_INLINE uint32_t LL_RNG_IsActiveFlag_SEIS(const RNG_TypeDef *RNGx)
{
return ((READ_BIT(RNGx->SR, RNG_SR_SEIS) == (RNG_SR_SEIS)) ? 1UL : 0UL);
}
@@ -274,7 +275,7 @@
* @param RNGx RNG Instance
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_RNG_IsEnabledIT(RNG_TypeDef *RNGx)
+__STATIC_INLINE uint32_t LL_RNG_IsEnabledIT(const RNG_TypeDef *RNGx)
{
return ((READ_BIT(RNGx->CR, RNG_CR_IE) == (RNG_CR_IE)) ? 1UL : 0UL);
}
@@ -293,7 +294,7 @@
* @param RNGx RNG Instance
* @retval Generated 32-bit random value
*/
-__STATIC_INLINE uint32_t LL_RNG_ReadRandData32(RNG_TypeDef *RNGx)
+__STATIC_INLINE uint32_t LL_RNG_ReadRandData32(const RNG_TypeDef *RNGx)
{
return (uint32_t)(READ_REG(RNGx->DR));
}
@@ -306,7 +307,7 @@
/** @defgroup RNG_LL_EF_Init Initialization and de-initialization functions
* @{
*/
-ErrorStatus LL_RNG_DeInit(RNG_TypeDef *RNGx);
+ErrorStatus LL_RNG_DeInit(const RNG_TypeDef *RNGx);
/**
* @}
@@ -332,3 +333,4 @@
#endif
#endif /* __STM32F2xx_LL_RNG_H */
+
diff --git a/Inc/stm32f2xx_ll_rtc.h b/Inc/stm32f2xx_ll_rtc.h
index 6819fd7..5ca0a5f 100644
--- a/Inc/stm32f2xx_ll_rtc.h
+++ b/Inc/stm32f2xx_ll_rtc.h
@@ -17,8 +17,8 @@
*/
/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __STM32F2xx_LL_RTC_H
-#define __STM32F2xx_LL_RTC_H
+#ifndef STM32F2xx_LL_RTC_H
+#define STM32F2xx_LL_RTC_H
#ifdef __cplusplus
extern "C" {
@@ -45,7 +45,7 @@
*/
/* Masks Definition */
#define RTC_INIT_MASK 0xFFFFFFFFU
-#define RTC_RSF_MASK 0xFFFFFF5FU
+#define RTC_RSF_MASK ((uint32_t)~(RTC_ISR_INIT | RTC_ISR_RSF))
/* Write protection defines */
#define RTC_WRITE_PROTECTION_DISABLE ((uint8_t)0xFFU)
@@ -167,7 +167,7 @@
This parameter can be a value of @ref RTC_LL_EC_ALMA_MASK for ALARM A or @ref RTC_LL_EC_ALMB_MASK for ALARM B.
This feature can be modified afterwards using unitary function @ref LL_RTC_ALMA_SetMask() for ALARM A
- or @ref LL_RTC_ALMB_SetMask() for ALARM B
+ or @ref LL_RTC_ALMB_SetMask() for ALARM B.
*/
uint32_t AlarmDateWeekDaySel; /*!< Specifies the RTC Alarm is on day or WeekDay.
@@ -204,8 +204,8 @@
/** @defgroup RTC_LL_EC_FORMAT FORMAT
* @{
*/
-#define LL_RTC_FORMAT_BIN 0x000000000U /*!< Binary data format */
-#define LL_RTC_FORMAT_BCD 0x000000001U /*!< BCD data format */
+#define LL_RTC_FORMAT_BIN 0x00000000U /*!< Binary data format */
+#define LL_RTC_FORMAT_BCD 0x00000001U /*!< BCD data format */
/**
* @}
*/
@@ -234,8 +234,6 @@
* @brief Flags defines which can be used with LL_RTC_ReadReg function
* @{
*/
-#define LL_RTC_ISR_TAMP3F RTC_ISR_TAMP3F
-#define LL_RTC_ISR_TAMP2F RTC_ISR_TAMP2F
#define LL_RTC_ISR_TAMP1F RTC_ISR_TAMP1F
#define LL_RTC_ISR_TSOVF RTC_ISR_TSOVF
#define LL_RTC_ISR_TSF RTC_ISR_TSF
@@ -346,7 +344,6 @@
* @}
*/
-
/** @defgroup RTC_LL_EC_ALMA_MASK ALARMA MASK
* @{
*/
@@ -372,11 +369,11 @@
/** @defgroup RTC_LL_EC_ALMB_MASK ALARMB MASK
* @{
*/
-#define LL_RTC_ALMB_MASK_NONE 0x00000000U /*!< No masks applied on Alarm B*/
+#define LL_RTC_ALMB_MASK_NONE 0x00000000U /*!< No masks applied on Alarm B */
#define LL_RTC_ALMB_MASK_DATEWEEKDAY RTC_ALRMBR_MSK4 /*!< Date/day do not care in Alarm B comparison */
-#define LL_RTC_ALMB_MASK_HOURS RTC_ALRMBR_MSK3 /*!< Hours do not care in Alarm B comparison */
-#define LL_RTC_ALMB_MASK_MINUTES RTC_ALRMBR_MSK2 /*!< Minutes do not care in Alarm B comparison */
-#define LL_RTC_ALMB_MASK_SECONDS RTC_ALRMBR_MSK1 /*!< Seconds do not care in Alarm B comparison */
+#define LL_RTC_ALMB_MASK_HOURS RTC_ALRMBR_MSK3 /*!< Hours do not care in Alarm B comparison */
+#define LL_RTC_ALMB_MASK_MINUTES RTC_ALRMBR_MSK2 /*!< Minutes do not care in Alarm B comparison */
+#define LL_RTC_ALMB_MASK_SECONDS RTC_ALRMBR_MSK1 /*!< Seconds do not care in Alarm B comparison */
#define LL_RTC_ALMB_MASK_ALL (RTC_ALRMBR_MSK4 | RTC_ALRMBR_MSK3 | RTC_ALRMBR_MSK2 | RTC_ALRMBR_MSK1) /*!< Masks all */
/**
* @}
@@ -417,69 +414,10 @@
* @}
*/
-/** @defgroup RTC_LL_EC_TAMPER_MASK TAMPER MASK
- * @{
- */
-#define LL_RTC_TAMPER_MASK_TAMPER1 RTC_TAFCR_TAMP1MF /*!< Tamper 1 event generates a trigger event. TAMP1F is masked and internally cleared by hardware.The backup registers are not erased */
-/**
- * @}
- */
-
-/** @defgroup RTC_LL_EC_TAMPER_NOERASE TAMPER NO ERASE
- * @{
- */
-#define LL_RTC_TAMPER_NOERASE_TAMPER1 RTC_TAFCR_TAMP1NOERASE /*!< Tamper 1 event does not erase the backup registers. */
-/**
- * @}
- */
-
-#if defined(RTC_TAFCR_TAMPPRCH)
-/** @defgroup RTC_LL_EC_TAMPER_DURATION TAMPER DURATION
- * @{
- */
-#define LL_RTC_TAMPER_DURATION_1RTCCLK 0x00000000U /*!< Tamper pins are pre-charged before sampling during 1 RTCCLK cycle */
-#define LL_RTC_TAMPER_DURATION_2RTCCLK RTC_TAFCR_TAMPPRCH_0 /*!< Tamper pins are pre-charged before sampling during 2 RTCCLK cycles */
-#define LL_RTC_TAMPER_DURATION_4RTCCLK RTC_TAFCR_TAMPPRCH_1 /*!< Tamper pins are pre-charged before sampling during 4 RTCCLK cycles */
-#define LL_RTC_TAMPER_DURATION_8RTCCLK RTC_TAFCR_TAMPPRCH /*!< Tamper pins are pre-charged before sampling during 8 RTCCLK cycles */
-/**
- * @}
- */
-#endif /* RTC_TAFCR_TAMPPRCH */
-
-#if defined(RTC_TAFCR_TAMPFLT)
-/** @defgroup RTC_LL_EC_TAMPER_FILTER TAMPER FILTER
- * @{
- */
-#define LL_RTC_TAMPER_FILTER_DISABLE 0x00000000U /*!< Tamper filter is disabled */
-#define LL_RTC_TAMPER_FILTER_2SAMPLE RTC_TAFCR_TAMPFLT_0 /*!< Tamper is activated after 2 consecutive samples at the active level */
-#define LL_RTC_TAMPER_FILTER_4SAMPLE RTC_TAFCR_TAMPFLT_1 /*!< Tamper is activated after 4 consecutive samples at the active level */
-#define LL_RTC_TAMPER_FILTER_8SAMPLE RTC_TAFCR_TAMPFLT /*!< Tamper is activated after 8 consecutive samples at the active level. */
-/**
- * @}
- */
-#endif /* RTC_TAFCR_TAMPFLT */
-
-#if defined(RTC_TAFCR_TAMPFREQ)
-/** @defgroup RTC_LL_EC_TAMPER_SAMPLFREQDIV TAMPER SAMPLING FREQUENCY DIVIDER
- * @{
- */
-#define LL_RTC_TAMPER_SAMPLFREQDIV_32768 0x00000000U /*!< Each of the tamper inputs are sampled with a frequency = RTCCLK / 32768 */
-#define LL_RTC_TAMPER_SAMPLFREQDIV_16384 RTC_TAFCR_TAMPFREQ_0 /*!< Each of the tamper inputs are sampled with a frequency = RTCCLK / 16384 */
-#define LL_RTC_TAMPER_SAMPLFREQDIV_8192 RTC_TAFCR_TAMPFREQ_1 /*!< Each of the tamper inputs are sampled with a frequency = RTCCLK / 8192 */
-#define LL_RTC_TAMPER_SAMPLFREQDIV_4096 (RTC_TAFCR_TAMPFREQ_1 | RTC_TAFCR_TAMPFREQ_0) /*!< Each of the tamper inputs are sampled with a frequency = RTCCLK / 4096 */
-#define LL_RTC_TAMPER_SAMPLFREQDIV_2048 RTC_TAFCR_TAMPFREQ_2 /*!< Each of the tamper inputs are sampled with a frequency = RTCCLK / 2048 */
-#define LL_RTC_TAMPER_SAMPLFREQDIV_1024 (RTC_TAFCR_TAMPFREQ_2 | RTC_TAFCR_TAMPFREQ_0) /*!< Each of the tamper inputs are sampled with a frequency = RTCCLK / 1024 */
-#define LL_RTC_TAMPER_SAMPLFREQDIV_512 (RTC_TAFCR_TAMPFREQ_2 | RTC_TAFCR_TAMPFREQ_1) /*!< Each of the tamper inputs are sampled with a frequency = RTCCLK / 512 */
-#define LL_RTC_TAMPER_SAMPLFREQDIV_256 RTC_TAFCR_TAMPFREQ /*!< Each of the tamper inputs are sampled with a frequency = RTCCLK / 256 */
-/**
- * @}
- */
-#endif /* RTC_TAFCR_TAMPFREQ */
-
/** @defgroup RTC_LL_EC_TAMPER_ACTIVELEVEL TAMPER ACTIVE LEVEL
* @{
*/
-#define LL_RTC_TAMPER_ACTIVELEVEL_TAMP1 RTC_TAFCR_TAMP1TRG /*!< RTC_TAMP1 input falling edge (if TAMPFLT = 00) or staying high (if TAMPFLT != 00) triggers a tamper detection event*/
+#define LL_RTC_TAMPER_ACTIVELEVEL_TAMP1 RTC_TAFCR_TAMP1TRG /*!< RTC_TAMP1 input falling edge triggers a tamper detection event */
/**
* @}
*/
@@ -505,7 +443,6 @@
#define LL_RTC_BKP_DR2 0x00000002U
#define LL_RTC_BKP_DR3 0x00000003U
#define LL_RTC_BKP_DR4 0x00000004U
-#if RTC_BKP_NUMBER > 5
#define LL_RTC_BKP_DR5 0x00000005U
#define LL_RTC_BKP_DR6 0x00000006U
#define LL_RTC_BKP_DR7 0x00000007U
@@ -517,14 +454,10 @@
#define LL_RTC_BKP_DR13 0x0000000DU
#define LL_RTC_BKP_DR14 0x0000000EU
#define LL_RTC_BKP_DR15 0x0000000FU
-#endif /* RTC_BKP_NUMBER > 5 */
-
-#if RTC_BKP_NUMBER > 16
#define LL_RTC_BKP_DR16 0x00000010U
#define LL_RTC_BKP_DR17 0x00000011U
#define LL_RTC_BKP_DR18 0x00000012U
#define LL_RTC_BKP_DR19 0x00000013U
-#endif /* RTC_BKP_NUMBER > 16 */
/**
* @}
*/
@@ -1145,12 +1078,12 @@
*/
__STATIC_INLINE void LL_RTC_TIME_Config(RTC_TypeDef *RTCx, uint32_t Format12_24, uint32_t Hours, uint32_t Minutes, uint32_t Seconds)
{
- register uint32_t temp = 0U;
+ uint32_t temp;
- temp = Format12_24 | \
- (((Hours & 0xF0U) << (RTC_TR_HT_Pos - 4U)) | ((Hours & 0x0FU) << RTC_TR_HU_Pos)) | \
+ temp = Format12_24 | \
+ (((Hours & 0xF0U) << (RTC_TR_HT_Pos - 4U)) | ((Hours & 0x0FU) << RTC_TR_HU_Pos)) | \
(((Minutes & 0xF0U) << (RTC_TR_MNT_Pos - 4U)) | ((Minutes & 0x0FU) << RTC_TR_MNU_Pos)) | \
- (((Seconds & 0xF0U) << (RTC_TR_ST_Pos - 4U)) | ((Seconds & 0x0FU) << RTC_TR_SU_Pos));
+ (((Seconds & 0xF0U) << (RTC_TR_ST_Pos - 4U)) | ((Seconds & 0x0FU) << RTC_TR_SU_Pos));
MODIFY_REG(RTCx->TR, (RTC_TR_PM | RTC_TR_HT | RTC_TR_HU | RTC_TR_MNT | RTC_TR_MNU | RTC_TR_ST | RTC_TR_SU), temp);
}
@@ -1173,12 +1106,7 @@
*/
__STATIC_INLINE uint32_t LL_RTC_TIME_Get(RTC_TypeDef *RTCx)
{
- register uint32_t temp = 0U;
-
- temp = READ_BIT(RTCx->TR, (RTC_TR_HT | RTC_TR_HU | RTC_TR_MNT | RTC_TR_MNU | RTC_TR_ST | RTC_TR_SU));
- return (uint32_t)((((((temp & RTC_TR_HT) >> RTC_TR_HT_Pos) << 4U) | ((temp & RTC_TR_HU) >> RTC_TR_HU_Pos)) << RTC_OFFSET_HOUR) | \
- (((((temp & RTC_TR_MNT) >> RTC_TR_MNT_Pos) << 4U) | ((temp & RTC_TR_MNU) >> RTC_TR_MNU_Pos)) << RTC_OFFSET_MINUTE) | \
- ((((temp & RTC_TR_ST) >> RTC_TR_ST_Pos) << 4U) | ((temp & RTC_TR_SU) >> RTC_TR_SU_Pos)));
+ return (uint32_t)(READ_BIT(RTCx->TR, (RTC_TR_HT | RTC_TR_HU | RTC_TR_MNT | RTC_TR_MNU | RTC_TR_ST | RTC_TR_SU)));
}
/**
@@ -1213,7 +1141,7 @@
*/
__STATIC_INLINE uint32_t LL_RTC_TIME_IsDayLightStoreEnabled(RTC_TypeDef *RTCx)
{
- return (READ_BIT(RTCx->CR, RTC_CR_BKP) == (RTC_CR_BKP));
+ return ((READ_BIT(RTCx->CR, RTC_CR_BKP) == (RTC_CR_BKP)) ? 1UL : 0UL);
}
/**
@@ -1240,8 +1168,6 @@
SET_BIT(RTCx->CR, RTC_CR_ADD1H);
}
-
-
/**
* @}
*/
@@ -1440,12 +1366,12 @@
*/
__STATIC_INLINE void LL_RTC_DATE_Config(RTC_TypeDef *RTCx, uint32_t WeekDay, uint32_t Day, uint32_t Month, uint32_t Year)
{
- register uint32_t temp = 0U;
+ uint32_t temp;
- temp = (WeekDay << RTC_DR_WDU_Pos) | \
- (((Year & 0xF0U) << (RTC_DR_YT_Pos - 4U)) | ((Year & 0x0FU) << RTC_DR_YU_Pos)) | \
+ temp = ( WeekDay << RTC_DR_WDU_Pos) | \
+ (((Year & 0xF0U) << (RTC_DR_YT_Pos - 4U)) | ((Year & 0x0FU) << RTC_DR_YU_Pos)) | \
(((Month & 0xF0U) << (RTC_DR_MT_Pos - 4U)) | ((Month & 0x0FU) << RTC_DR_MU_Pos)) | \
- (((Day & 0xF0U) << (RTC_DR_DT_Pos - 4U)) | ((Day & 0x0FU) << RTC_DR_DU_Pos));
+ (((Day & 0xF0U) << (RTC_DR_DT_Pos - 4U)) | ((Day & 0x0FU) << RTC_DR_DU_Pos));
MODIFY_REG(RTCx->DR, (RTC_DR_WDU | RTC_DR_MT | RTC_DR_MU | RTC_DR_DT | RTC_DR_DU | RTC_DR_YT | RTC_DR_YU), temp);
}
@@ -1468,13 +1394,14 @@
*/
__STATIC_INLINE uint32_t LL_RTC_DATE_Get(RTC_TypeDef *RTCx)
{
- register uint32_t temp = 0U;
+ uint32_t temp;
temp = READ_BIT(RTCx->DR, (RTC_DR_WDU | RTC_DR_MT | RTC_DR_MU | RTC_DR_DT | RTC_DR_DU | RTC_DR_YT | RTC_DR_YU));
- return (uint32_t)((((temp & RTC_DR_WDU) >> RTC_DR_WDU_Pos) << RTC_OFFSET_WEEKDAY) | \
- (((((temp & RTC_DR_DT) >> RTC_DR_DT_Pos) << 4U) | ((temp & RTC_DR_DU) >> RTC_DR_DU_Pos)) << RTC_OFFSET_DAY) | \
- (((((temp & RTC_DR_MT) >> RTC_DR_MT_Pos) << 4U) | ((temp & RTC_DR_MU) >> RTC_DR_MU_Pos)) << RTC_OFFSET_MONTH) | \
- ((((temp & RTC_DR_YT) >> RTC_DR_YT_Pos) << 4U) | ((temp & RTC_DR_YU) >> RTC_DR_YU_Pos)));
+
+ return (uint32_t)((((temp & RTC_DR_WDU) >> RTC_DR_WDU_Pos) << RTC_OFFSET_WEEKDAY) | \
+ (((temp & (RTC_DR_DT | RTC_DR_DU)) >> RTC_DR_DU_Pos) << RTC_OFFSET_DAY) | \
+ (((temp & (RTC_DR_MT | RTC_DR_MU)) >> RTC_DR_MU_Pos) << RTC_OFFSET_MONTH) | \
+ ((temp & (RTC_DR_YT | RTC_DR_YU)) >> RTC_DR_YU_Pos));
}
/**
@@ -1768,11 +1695,12 @@
*/
__STATIC_INLINE void LL_RTC_ALMA_ConfigTime(RTC_TypeDef *RTCx, uint32_t Format12_24, uint32_t Hours, uint32_t Minutes, uint32_t Seconds)
{
- register uint32_t temp = 0U;
+ uint32_t temp;
- temp = Format12_24 | (((Hours & 0xF0U) << (RTC_ALRMAR_HT_Pos - 4U)) | ((Hours & 0x0FU) << RTC_ALRMAR_HU_Pos)) | \
+ temp = Format12_24 | \
+ (((Hours & 0xF0U) << (RTC_ALRMAR_HT_Pos - 4U)) | ((Hours & 0x0FU) << RTC_ALRMAR_HU_Pos)) | \
(((Minutes & 0xF0U) << (RTC_ALRMAR_MNT_Pos - 4U)) | ((Minutes & 0x0FU) << RTC_ALRMAR_MNU_Pos)) | \
- (((Seconds & 0xF0U) << (RTC_ALRMAR_ST_Pos - 4U)) | ((Seconds & 0x0FU) << RTC_ALRMAR_SU_Pos));
+ (((Seconds & 0xF0U) << (RTC_ALRMAR_ST_Pos - 4U)) | ((Seconds & 0x0FU) << RTC_ALRMAR_SU_Pos));
MODIFY_REG(RTCx->ALRMAR, RTC_ALRMAR_PM | RTC_ALRMAR_HT | RTC_ALRMAR_HU | RTC_ALRMAR_MNT | RTC_ALRMAR_MNU | RTC_ALRMAR_ST | RTC_ALRMAR_SU, temp);
}
@@ -1795,7 +1723,6 @@
return (uint32_t)((LL_RTC_ALMA_GetHour(RTCx) << RTC_OFFSET_HOUR) | (LL_RTC_ALMA_GetMinute(RTCx) << RTC_OFFSET_MINUTE) | LL_RTC_ALMA_GetSecond(RTCx));
}
-
/**
* @}
*/
@@ -2064,10 +1991,7 @@
*/
__STATIC_INLINE uint32_t LL_RTC_ALMB_GetSecond(RTC_TypeDef *RTCx)
{
- register uint32_t temp = 0U;
-
- temp = READ_BIT(RTCx->ALRMBR, (RTC_ALRMBR_ST | RTC_ALRMBR_SU));
- return (uint32_t)((((temp & RTC_ALRMBR_ST) >> RTC_ALRMBR_ST_Pos) << 4U) | ((temp & RTC_ALRMBR_SU) >> RTC_ALRMBR_SU_Pos));
+ return (uint32_t)((READ_BIT(RTCx->ALRMBR, (RTC_ALRMBR_ST | RTC_ALRMBR_SU))) >> RTC_ALRMBR_SU_Pos);
}
/**
@@ -2090,11 +2014,12 @@
*/
__STATIC_INLINE void LL_RTC_ALMB_ConfigTime(RTC_TypeDef *RTCx, uint32_t Format12_24, uint32_t Hours, uint32_t Minutes, uint32_t Seconds)
{
- register uint32_t temp = 0U;
+ uint32_t temp;
- temp = Format12_24 | (((Hours & 0xF0U) << (RTC_ALRMBR_HT_Pos - 4U)) | ((Hours & 0x0FU) << RTC_ALRMBR_HU_Pos)) | \
+ temp = Format12_24 | \
+ (((Hours & 0xF0U) << (RTC_ALRMBR_HT_Pos - 4U)) | ((Hours & 0x0FU) << RTC_ALRMBR_HU_Pos)) | \
(((Minutes & 0xF0U) << (RTC_ALRMBR_MNT_Pos - 4U)) | ((Minutes & 0x0FU) << RTC_ALRMBR_MNU_Pos)) | \
- (((Seconds & 0xF0U) << (RTC_ALRMBR_ST_Pos - 4U)) | ((Seconds & 0x0FU) << RTC_ALRMBR_SU_Pos));
+ (((Seconds & 0xF0U) << (RTC_ALRMBR_ST_Pos - 4U)) | ((Seconds & 0x0FU) << RTC_ALRMBR_SU_Pos));
MODIFY_REG(RTCx->ALRMBR, RTC_ALRMBR_PM | RTC_ALRMBR_HT | RTC_ALRMBR_HU | RTC_ALRMBR_MNT | RTC_ALRMBR_MNU | RTC_ALRMBR_ST | RTC_ALRMBR_SU, temp);
}
@@ -2117,7 +2042,6 @@
return (uint32_t)((LL_RTC_ALMB_GetHour(RTCx) << RTC_OFFSET_HOUR) | (LL_RTC_ALMB_GetMinute(RTCx) << RTC_OFFSET_MINUTE) | LL_RTC_ALMB_GetSecond(RTCx));
}
-
/**
* @}
*/
@@ -2324,7 +2248,6 @@
return (uint32_t)(READ_BIT(RTCx->TSDR, RTC_TSDR_WDU | RTC_TSDR_MT | RTC_TSDR_MU | RTC_TSDR_DT | RTC_TSDR_DU));
}
-
#if defined(RTC_TAFCR_TAMPTS)
/**
* @brief Activate timestamp on tamper detection event
@@ -2353,10 +2276,10 @@
* @brief Set timestamp Pin
* @rmtoll TAFCR TSINSEL LL_RTC_TS_SetPin
* @param RTCx RTC Instance
- * @param TSPin specifies the RTC TimeStamp Pin.
+ * @param TSPin specifies the RTC Timestamp Pin.
* This parameter can be one of the following values:
- * @arg LL_RTC_TimeStampPin_Default: RTC_AF1 is used as RTC TimeStamp.
- * @arg LL_RTC_TimeStampPin_Pos1: RTC_AF2 is selected as RTC TimeStamp.
+ * @arg LL_RTC_TimeStampPin_Default: RTC_AF1 is used as RTC Timestamp Pin.
+ * @arg LL_RTC_TimeStampPin_Pos1: RTC_AF2 is used as RTC Timestamp Pin.
* @retval None
*/
__STATIC_INLINE void LL_RTC_TS_SetPin(RTC_TypeDef *RTCx, uint32_t TSPin)
@@ -2369,11 +2292,10 @@
* @rmtoll TAFCR TSINSEL LL_RTC_TS_GetPin
* @param RTCx RTC Instance
* @retval Returned value can be one of the following values:
- * @arg LL_RTC_TimeStampPin_Default: RTC_AF1 is used as RTC TimeStamp Pin.
- * @arg LL_RTC_TimeStampPin_Pos1: RTC_AF2 is selected as RTC TimeStamp Pin.
+ * @arg LL_RTC_TimeStampPin_Default: RTC_AF1 is used as RTC Timestamp Pin.
+ * @arg LL_RTC_TimeStampPin_Pos1: RTC_AF2 is used as RTC Timestamp Pin.
* @retval None
*/
-
__STATIC_INLINE uint32_t LL_RTC_TS_GetPin(RTC_TypeDef *RTCx)
{
return (uint32_t)(READ_BIT(RTCx->TAFCR, RTC_TAFCR_TSINSEL));
@@ -2415,137 +2337,6 @@
CLEAR_BIT(RTCx->TAFCR, Tamper);
}
-#if defined(RTC_TAFCR_TAMPPUDIS)
-/**
- * @brief Disable RTC_TAMPx pull-up disable (Disable precharge of RTC_TAMPx pins)
- * @rmtoll TAFCR TAMPPUDIS LL_RTC_TAMPER_DisablePullUp
- * @param RTCx RTC Instance
- * @retval None
- */
-__STATIC_INLINE void LL_RTC_TAMPER_DisablePullUp(RTC_TypeDef *RTCx)
-{
- SET_BIT(RTCx->TAFCR, RTC_TAFCR_TAMPPUDIS);
-}
-
-/**
- * @brief Enable RTC_TAMPx pull-up disable ( Precharge RTC_TAMPx pins before sampling)
- * @rmtoll TAFCR TAMPPUDIS LL_RTC_TAMPER_EnablePullUp
- * @param RTCx RTC Instance
- * @retval None
- */
-__STATIC_INLINE void LL_RTC_TAMPER_EnablePullUp(RTC_TypeDef *RTCx)
-{
- CLEAR_BIT(RTCx->TAFCR, RTC_TAFCR_TAMPPUDIS);
-}
-#endif /* RTC_TAFCR_TAMPPUDIS */
-
-#if defined(RTC_TAFCR_TAMPPRCH)
-/**
- * @brief Set RTC_TAMPx precharge duration
- * @rmtoll TAFCR TAMPPRCH LL_RTC_TAMPER_SetPrecharge
- * @param RTCx RTC Instance
- * @param Duration This parameter can be one of the following values:
- * @arg @ref LL_RTC_TAMPER_DURATION_1RTCCLK
- * @arg @ref LL_RTC_TAMPER_DURATION_2RTCCLK
- * @arg @ref LL_RTC_TAMPER_DURATION_4RTCCLK
- * @arg @ref LL_RTC_TAMPER_DURATION_8RTCCLK
- * @retval None
- */
-__STATIC_INLINE void LL_RTC_TAMPER_SetPrecharge(RTC_TypeDef *RTCx, uint32_t Duration)
-{
- MODIFY_REG(RTCx->TAFCR, RTC_TAFCR_TAMPPRCH, Duration);
-}
-
-/**
- * @brief Get RTC_TAMPx precharge duration
- * @rmtoll TAFCR TAMPPRCH LL_RTC_TAMPER_GetPrecharge
- * @param RTCx RTC Instance
- * @retval Returned value can be one of the following values:
- * @arg @ref LL_RTC_TAMPER_DURATION_1RTCCLK
- * @arg @ref LL_RTC_TAMPER_DURATION_2RTCCLK
- * @arg @ref LL_RTC_TAMPER_DURATION_4RTCCLK
- * @arg @ref LL_RTC_TAMPER_DURATION_8RTCCLK
- */
-__STATIC_INLINE uint32_t LL_RTC_TAMPER_GetPrecharge(RTC_TypeDef *RTCx)
-{
- return (uint32_t)(READ_BIT(RTCx->TAFCR, RTC_TAFCR_TAMPPRCH));
-}
-#endif /* RTC_TAFCR_TAMPPRCH */
-
-#if defined(RTC_TAFCR_TAMPFLT)
-/**
- * @brief Set RTC_TAMPx filter count
- * @rmtoll TAFCR TAMPFLT LL_RTC_TAMPER_SetFilterCount
- * @param RTCx RTC Instance
- * @param FilterCount This parameter can be one of the following values:
- * @arg @ref LL_RTC_TAMPER_FILTER_DISABLE
- * @arg @ref LL_RTC_TAMPER_FILTER_2SAMPLE
- * @arg @ref LL_RTC_TAMPER_FILTER_4SAMPLE
- * @arg @ref LL_RTC_TAMPER_FILTER_8SAMPLE
- * @retval None
- */
-__STATIC_INLINE void LL_RTC_TAMPER_SetFilterCount(RTC_TypeDef *RTCx, uint32_t FilterCount)
-{
- MODIFY_REG(RTCx->TAFCR, RTC_TAFCR_TAMPFLT, FilterCount);
-}
-
-/**
- * @brief Get RTC_TAMPx filter count
- * @rmtoll TAFCR TAMPFLT LL_RTC_TAMPER_GetFilterCount
- * @param RTCx RTC Instance
- * @retval Returned value can be one of the following values:
- * @arg @ref LL_RTC_TAMPER_FILTER_DISABLE
- * @arg @ref LL_RTC_TAMPER_FILTER_2SAMPLE
- * @arg @ref LL_RTC_TAMPER_FILTER_4SAMPLE
- * @arg @ref LL_RTC_TAMPER_FILTER_8SAMPLE
- */
-__STATIC_INLINE uint32_t LL_RTC_TAMPER_GetFilterCount(RTC_TypeDef *RTCx)
-{
- return (uint32_t)(READ_BIT(RTCx->TAFCR, RTC_TAFCR_TAMPFLT));
-}
-#endif /* RTC_TAFCR_TAMPFLT */
-
-#if defined(RTC_TAFCR_TAMPFREQ)
-/**
- * @brief Set Tamper sampling frequency
- * @rmtoll TAFCR TAMPFREQ LL_RTC_TAMPER_SetSamplingFreq
- * @param RTCx RTC Instance
- * @param SamplingFreq This parameter can be one of the following values:
- * @arg @ref LL_RTC_TAMPER_SAMPLFREQDIV_32768
- * @arg @ref LL_RTC_TAMPER_SAMPLFREQDIV_16384
- * @arg @ref LL_RTC_TAMPER_SAMPLFREQDIV_8192
- * @arg @ref LL_RTC_TAMPER_SAMPLFREQDIV_4096
- * @arg @ref LL_RTC_TAMPER_SAMPLFREQDIV_2048
- * @arg @ref LL_RTC_TAMPER_SAMPLFREQDIV_1024
- * @arg @ref LL_RTC_TAMPER_SAMPLFREQDIV_512
- * @arg @ref LL_RTC_TAMPER_SAMPLFREQDIV_256
- * @retval None
- */
-__STATIC_INLINE void LL_RTC_TAMPER_SetSamplingFreq(RTC_TypeDef *RTCx, uint32_t SamplingFreq)
-{
- MODIFY_REG(RTCx->TAFCR, RTC_TAFCR_TAMPFREQ, SamplingFreq);
-}
-
-/**
- * @brief Get Tamper sampling frequency
- * @rmtoll TAFCR TAMPFREQ LL_RTC_TAMPER_GetSamplingFreq
- * @param RTCx RTC Instance
- * @retval Returned value can be one of the following values:
- * @arg @ref LL_RTC_TAMPER_SAMPLFREQDIV_32768
- * @arg @ref LL_RTC_TAMPER_SAMPLFREQDIV_16384
- * @arg @ref LL_RTC_TAMPER_SAMPLFREQDIV_8192
- * @arg @ref LL_RTC_TAMPER_SAMPLFREQDIV_4096
- * @arg @ref LL_RTC_TAMPER_SAMPLFREQDIV_2048
- * @arg @ref LL_RTC_TAMPER_SAMPLFREQDIV_1024
- * @arg @ref LL_RTC_TAMPER_SAMPLFREQDIV_512
- * @arg @ref LL_RTC_TAMPER_SAMPLFREQDIV_256
- */
-__STATIC_INLINE uint32_t LL_RTC_TAMPER_GetSamplingFreq(RTC_TypeDef *RTCx)
-{
- return (uint32_t)(READ_BIT(RTCx->TAFCR, RTC_TAFCR_TAMPFREQ));
-}
-#endif /* RTC_TAFCR_TAMPFREQ */
-
/**
* @brief Enable Active level for Tamper input
* @rmtoll TAFCR TAMP1TRG LL_RTC_TAMPER_EnableActiveLevel\n
@@ -2580,8 +2371,8 @@
* @param RTCx RTC Instance
* @param TamperPin specifies the RTC Tamper Pin.
* This parameter can be one of the following values:
- * @arg LL_RTC_TamperPin_Default: RTC_AF1 is used as RTC Tamper.
- * @arg LL_RTC_TamperPin_Pos1: RTC_AF2 is selected as RTC Tamper.
+ * @arg LL_RTC_TamperPin_Default: RTC_AF1 is used as RTC Tamper Pin.
+ * @arg LL_RTC_TamperPin_Pos1: RTC_AF2 is used as RTC Tamper Pin.
* @retval None
*/
__STATIC_INLINE void LL_RTC_TAMPER_SetPin(RTC_TypeDef *RTCx, uint32_t TamperPin)
@@ -2644,13 +2435,13 @@
*/
__STATIC_INLINE uint32_t LL_RTC_WAKEUP_IsEnabled(RTC_TypeDef *RTCx)
{
- return (READ_BIT(RTCx->CR, RTC_CR_WUTE) == (RTC_CR_WUTE));
+ return ((READ_BIT(RTCx->CR, RTC_CR_WUTE) == (RTC_CR_WUTE)) ? 1UL : 0UL);
}
/**
* @brief Select Wakeup clock
* @note Bit is write-protected. @ref LL_RTC_DisableWriteProtection function should be called before.
- * @note Bit can be written only when RTC_CR WUTE bit = 0 and RTC_ISR WUTWF bit = 1
+ * @note Bit can be written only when RTC_CR WUTE bit = 0 and RTC_ISR WUTWF bit = 1
* @rmtoll CR WUCKSEL LL_RTC_WAKEUP_SetClock
* @param RTCx RTC Instance
* @param WakeupClock This parameter can be one of the following values:
@@ -2686,7 +2477,7 @@
/**
* @brief Set Wakeup auto-reload value
- * @note Bit can be written only when WUTWF is set to 1 in RTC_ISR
+ * @note Bit can be written only when WUTWF is set to 1 in RTC_ISR
* @rmtoll WUTR WUT LL_RTC_WAKEUP_SetAutoReload
* @param RTCx RTC Instance
* @param Value Value between Min_Data=0x00 and Max_Data=0xFFFF
@@ -2746,13 +2537,13 @@
*/
__STATIC_INLINE void LL_RTC_BAK_SetRegister(RTC_TypeDef *RTCx, uint32_t BackupRegister, uint32_t Data)
{
- register uint32_t tmp = 0U;
+ uint32_t temp;
- tmp = (uint32_t)(&(RTCx->BKP0R));
- tmp += (BackupRegister * 4U);
+ temp = (uint32_t)(&(RTCx->BKP0R));
+ temp += (BackupRegister * 4U);
/* Write the specified register */
- *(__IO uint32_t *)tmp = (uint32_t)Data;
+ *(__IO uint32_t *)temp = (uint32_t)Data;
}
/**
@@ -2784,13 +2575,13 @@
*/
__STATIC_INLINE uint32_t LL_RTC_BAK_GetRegister(RTC_TypeDef *RTCx, uint32_t BackupRegister)
{
- register uint32_t tmp = 0U;
+ uint32_t temp;
- tmp = (uint32_t)(&(RTCx->BKP0R));
- tmp += (BackupRegister * 4U);
+ temp = (uint32_t)(&(RTCx->BKP0R));
+ temp += (BackupRegister * 4U);
/* Read the specified register */
- return (*(__IO uint32_t *)tmp);
+ return (*(__IO uint32_t *)temp);
}
/**
@@ -2805,11 +2596,11 @@
* @brief Set Calibration output frequency (1 Hz or 512 Hz)
* @note Bits are write-protected. @ref LL_RTC_DisableWriteProtection function should be called before.
* @rmtoll CR COE LL_RTC_CAL_SetOutputFreq\n
- * CR COSEL LL_RTC_CAL_SetOutputFreq
* @param RTCx RTC Instance
* @param Frequency This parameter can be one of the following values:
* @arg @ref LL_RTC_CALIB_OUTPUT_NONE
* @arg @ref LL_RTC_CALIB_OUTPUT_512HZ
+ *
* @retval None
*/
__STATIC_INLINE void LL_RTC_CAL_SetOutputFreq(RTC_TypeDef *RTCx, uint32_t Frequency)
@@ -2820,11 +2611,11 @@
/**
* @brief Get Calibration output frequency (1 Hz or 512 Hz)
* @rmtoll CR COE LL_RTC_CAL_GetOutputFreq\n
- * CR COSEL LL_RTC_CAL_GetOutputFreq
* @param RTCx RTC Instance
* @retval Returned value can be one of the following values:
* @arg @ref LL_RTC_CALIB_OUTPUT_NONE
* @arg @ref LL_RTC_CALIB_OUTPUT_512HZ
+ *
*/
__STATIC_INLINE uint32_t LL_RTC_CAL_GetOutputFreq(RTC_TypeDef *RTCx)
{
@@ -2901,7 +2692,6 @@
return (uint32_t)(READ_BIT(RTCx->CALIBR, RTC_CALIBR_DCS));
}
-
/**
* @}
*/
@@ -2910,9 +2700,6 @@
* @{
*/
-
-
-
/**
* @brief Get RTC_TAMP1 detection flag
* @rmtoll ISR TAMP1F LL_RTC_IsActiveFlag_TAMP1
@@ -2921,7 +2708,7 @@
*/
__STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_TAMP1(RTC_TypeDef *RTCx)
{
- return (READ_BIT(RTCx->ISR, RTC_ISR_TAMP1F) == (RTC_ISR_TAMP1F));
+ return ((READ_BIT(RTCx->ISR, RTC_ISR_TAMP1F) == (RTC_ISR_TAMP1F)) ? 1UL : 0UL);
}
/**
@@ -2932,7 +2719,7 @@
*/
__STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_TSOV(RTC_TypeDef *RTCx)
{
- return (READ_BIT(RTCx->ISR, RTC_ISR_TSOVF) == (RTC_ISR_TSOVF));
+ return ((READ_BIT(RTCx->ISR, RTC_ISR_TSOVF) == (RTC_ISR_TSOVF)) ? 1UL : 0UL);
}
/**
@@ -2943,7 +2730,7 @@
*/
__STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_TS(RTC_TypeDef *RTCx)
{
- return (READ_BIT(RTCx->ISR, RTC_ISR_TSF) == (RTC_ISR_TSF));
+ return ((READ_BIT(RTCx->ISR, RTC_ISR_TSF) == (RTC_ISR_TSF)) ? 1UL : 0UL);
}
/**
@@ -2954,7 +2741,7 @@
*/
__STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_WUT(RTC_TypeDef *RTCx)
{
- return (READ_BIT(RTCx->ISR, RTC_ISR_WUTF) == (RTC_ISR_WUTF));
+ return ((READ_BIT(RTCx->ISR, RTC_ISR_WUTF) == (RTC_ISR_WUTF)) ? 1UL : 0UL);
}
/**
@@ -2965,7 +2752,7 @@
*/
__STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_ALRB(RTC_TypeDef *RTCx)
{
- return (READ_BIT(RTCx->ISR, RTC_ISR_ALRBF) == (RTC_ISR_ALRBF));
+ return ((READ_BIT(RTCx->ISR, RTC_ISR_ALRBF) == (RTC_ISR_ALRBF)) ? 1UL : 0UL);
}
/**
@@ -2976,11 +2763,9 @@
*/
__STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_ALRA(RTC_TypeDef *RTCx)
{
- return (READ_BIT(RTCx->ISR, RTC_ISR_ALRAF) == (RTC_ISR_ALRAF));
+ return ((READ_BIT(RTCx->ISR, RTC_ISR_ALRAF) == (RTC_ISR_ALRAF)) ? 1UL : 0UL);
}
-
-
/**
* @brief Clear RTC_TAMP1 detection flag
* @rmtoll ISR TAMP1F LL_RTC_ClearFlag_TAMP1
@@ -3055,7 +2840,7 @@
*/
__STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_INIT(RTC_TypeDef *RTCx)
{
- return (READ_BIT(RTCx->ISR, RTC_ISR_INITF) == (RTC_ISR_INITF));
+ return ((READ_BIT(RTCx->ISR, RTC_ISR_INITF) == (RTC_ISR_INITF)) ? 1UL : 0UL);
}
/**
@@ -3066,7 +2851,7 @@
*/
__STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_RS(RTC_TypeDef *RTCx)
{
- return (READ_BIT(RTCx->ISR, RTC_ISR_RSF) == (RTC_ISR_RSF));
+ return ((READ_BIT(RTCx->ISR, RTC_ISR_RSF) == (RTC_ISR_RSF)) ? 1UL : 0UL);
}
/**
@@ -3088,10 +2873,9 @@
*/
__STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_INITS(RTC_TypeDef *RTCx)
{
- return (READ_BIT(RTCx->ISR, RTC_ISR_INITS) == (RTC_ISR_INITS));
+ return ((READ_BIT(RTCx->ISR, RTC_ISR_INITS) == (RTC_ISR_INITS)) ? 1UL : 0UL);
}
-
/**
* @brief Get Wakeup timer write flag
* @rmtoll ISR WUTWF LL_RTC_IsActiveFlag_WUTW
@@ -3100,7 +2884,7 @@
*/
__STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_WUTW(RTC_TypeDef *RTCx)
{
- return (READ_BIT(RTCx->ISR, RTC_ISR_WUTWF) == (RTC_ISR_WUTWF));
+ return ((READ_BIT(RTCx->ISR, RTC_ISR_WUTWF) == (RTC_ISR_WUTWF)) ? 1UL : 0UL);
}
/**
@@ -3111,7 +2895,7 @@
*/
__STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_ALRBW(RTC_TypeDef *RTCx)
{
- return (READ_BIT(RTCx->ISR, RTC_ISR_ALRBWF) == (RTC_ISR_ALRBWF));
+ return ((READ_BIT(RTCx->ISR, RTC_ISR_ALRBWF) == (RTC_ISR_ALRBWF)) ? 1UL : 0UL);
}
/**
@@ -3122,7 +2906,7 @@
*/
__STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_ALRAW(RTC_TypeDef *RTCx)
{
- return (READ_BIT(RTCx->ISR, RTC_ISR_ALRAWF) == (RTC_ISR_ALRAWF));
+ return ((READ_BIT(RTCx->ISR, RTC_ISR_ALRAWF) == (RTC_ISR_ALRAWF)) ? 1UL : 0UL);
}
/**
@@ -3259,7 +3043,7 @@
*/
__STATIC_INLINE uint32_t LL_RTC_IsEnabledIT_TS(RTC_TypeDef *RTCx)
{
- return (READ_BIT(RTCx->CR, RTC_CR_TSIE) == (RTC_CR_TSIE));
+ return ((READ_BIT(RTCx->CR, RTC_CR_TSIE) == (RTC_CR_TSIE)) ? 1UL : 0UL);
}
/**
@@ -3270,7 +3054,7 @@
*/
__STATIC_INLINE uint32_t LL_RTC_IsEnabledIT_WUT(RTC_TypeDef *RTCx)
{
- return (READ_BIT(RTCx->CR, RTC_CR_WUTIE) == (RTC_CR_WUTIE));
+ return ((READ_BIT(RTCx->CR, RTC_CR_WUTIE) == (RTC_CR_WUTIE)) ? 1UL : 0UL);
}
/**
@@ -3281,7 +3065,7 @@
*/
__STATIC_INLINE uint32_t LL_RTC_IsEnabledIT_ALRB(RTC_TypeDef *RTCx)
{
- return (READ_BIT(RTCx->CR, RTC_CR_ALRBIE) == (RTC_CR_ALRBIE));
+ return ((READ_BIT(RTCx->CR, RTC_CR_ALRBIE) == (RTC_CR_ALRBIE)) ? 1UL : 0UL);
}
/**
@@ -3292,7 +3076,7 @@
*/
__STATIC_INLINE uint32_t LL_RTC_IsEnabledIT_ALRA(RTC_TypeDef *RTCx)
{
- return (READ_BIT(RTCx->CR, RTC_CR_ALRAIE) == (RTC_CR_ALRAIE));
+ return ((READ_BIT(RTCx->CR, RTC_CR_ALRAIE) == (RTC_CR_ALRAIE)) ? 1UL : 0UL);
}
/**
@@ -3303,8 +3087,8 @@
*/
__STATIC_INLINE uint32_t LL_RTC_IsEnabledIT_TAMP(RTC_TypeDef *RTCx)
{
- return (READ_BIT(RTCx->TAFCR,
- RTC_TAFCR_TAMPIE) == (RTC_TAFCR_TAMPIE));
+ return ((READ_BIT(RTCx->TAFCR,
+ RTC_TAFCR_TAMPIE) == (RTC_TAFCR_TAMPIE)) ? 1UL : 0UL);
}
/**
@@ -3354,4 +3138,4 @@
}
#endif
-#endif /* __STM32F2xx_LL_RTC_H */
+#endif /* STM32F2xx_LL_RTC_H */
diff --git a/Inc/stm32f2xx_ll_spi.h b/Inc/stm32f2xx_ll_spi.h
index 537a893..10d9772 100644
--- a/Inc/stm32f2xx_ll_spi.h
+++ b/Inc/stm32f2xx_ll_spi.h
@@ -1986,3 +1986,4 @@
#endif
#endif /* STM32F2xx_LL_SPI_H */
+
diff --git a/Inc/stm32f2xx_ll_system.h b/Inc/stm32f2xx_ll_system.h
index 238594a..bb45b44 100644
--- a/Inc/stm32f2xx_ll_system.h
+++ b/Inc/stm32f2xx_ll_system.h
@@ -3,6 +3,18 @@
* @file stm32f2xx_ll_system.h
* @author MCD Application Team
* @brief Header file of SYSTEM LL module.
+ *
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2016 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
@verbatim
==============================================================================
##### How to use this driver #####
@@ -16,16 +28,6 @@
@endverbatim
******************************************************************************
- * @attention
- *
- * Copyright (c) 2016 STMicroelectronics.
- * All rights reserved.
- *
- * This software is licensed under terms that can be found in the LICENSE file
- * in the root directory of this software component.
- * If no LICENSE file comes with this software, it is provided AS-IS.
- *
- ******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
@@ -841,3 +843,5 @@
#endif
#endif /* __STM32F2xx_LL_SYSTEM_H */
+
+
diff --git a/Inc/stm32f2xx_ll_tim.h b/Inc/stm32f2xx_ll_tim.h
index fea93fe..3608090 100644
--- a/Inc/stm32f2xx_ll_tim.h
+++ b/Inc/stm32f2xx_ll_tim.h
@@ -953,6 +953,7 @@
* @}
*/
+
/**
* @}
*/
@@ -985,10 +986,6 @@
* @}
*/
-/** @defgroup TIM_LL_EM_Exported_Macros Exported_Macros
- * @{
- */
-
/**
* @brief HELPER macro calculating DTG[0:7] in the TIMx_BDTR register to achieve the requested dead time duration.
* @note ex: @ref __LL_TIM_CALC_DEADTIME (80000000, @ref LL_TIM_GetClockDivision (), 120);
@@ -1080,11 +1077,6 @@
* @}
*/
-
-/**
- * @}
- */
-
/* Exported functions --------------------------------------------------------*/
/** @defgroup TIM_LL_Exported_Functions TIM Exported Functions
* @{
@@ -1634,7 +1626,7 @@
* @arg @ref LL_TIM_CHANNEL_CH4
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_TIM_CC_IsEnabledChannel(TIM_TypeDef *TIMx, uint32_t Channels)
+__STATIC_INLINE uint32_t LL_TIM_CC_IsEnabledChannel(const TIM_TypeDef *TIMx, uint32_t Channels)
{
return ((READ_BIT(TIMx->CCER, Channels) == (Channels)) ? 1UL : 0UL);
}
@@ -1919,7 +1911,7 @@
* @arg @ref LL_TIM_CHANNEL_CH4
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_TIM_OC_IsEnabledFast(TIM_TypeDef *TIMx, uint32_t Channel)
+__STATIC_INLINE uint32_t LL_TIM_OC_IsEnabledFast(const TIM_TypeDef *TIMx, uint32_t Channel)
{
uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel]));
@@ -1983,7 +1975,7 @@
* @arg @ref LL_TIM_CHANNEL_CH4
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_TIM_OC_IsEnabledPreload(TIM_TypeDef *TIMx, uint32_t Channel)
+__STATIC_INLINE uint32_t LL_TIM_OC_IsEnabledPreload(const TIM_TypeDef *TIMx, uint32_t Channel)
{
uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel]));
@@ -2056,7 +2048,7 @@
* @arg @ref LL_TIM_CHANNEL_CH4
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_TIM_OC_IsEnabledClear(TIM_TypeDef *TIMx, uint32_t Channel)
+__STATIC_INLINE uint32_t LL_TIM_OC_IsEnabledClear(const TIM_TypeDef *TIMx, uint32_t Channel)
{
uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel]));
@@ -2531,7 +2523,7 @@
* @param TIMx Timer instance
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_TIM_IC_IsEnabledXORCombination(TIM_TypeDef *TIMx)
+__STATIC_INLINE uint32_t LL_TIM_IC_IsEnabledXORCombination(const TIM_TypeDef *TIMx)
{
return ((READ_BIT(TIMx->CR2, TIM_CR2_TI1S) == (TIM_CR2_TI1S)) ? 1UL : 0UL);
}
@@ -3659,7 +3651,7 @@
* @}
*/
-/** @defgroup TIM_LL_EF_DMA_Management DMA-Management
+/** @defgroup TIM_LL_EF_DMA_Management DMA Management
* @{
*/
/**
@@ -3997,7 +3989,7 @@
* @{
*/
-ErrorStatus LL_TIM_DeInit(TIM_TypeDef *TIMx);
+ErrorStatus LL_TIM_DeInit(const TIM_TypeDef *TIMx);
void LL_TIM_StructInit(LL_TIM_InitTypeDef *TIM_InitStruct);
ErrorStatus LL_TIM_Init(TIM_TypeDef *TIMx, const LL_TIM_InitTypeDef *TIM_InitStruct);
void LL_TIM_OC_StructInit(LL_TIM_OC_InitTypeDef *TIM_OC_InitStruct);
diff --git a/Inc/stm32f2xx_ll_usart.h b/Inc/stm32f2xx_ll_usart.h
index 854e0a5..7da1de6 100644
--- a/Inc/stm32f2xx_ll_usart.h
+++ b/Inc/stm32f2xx_ll_usart.h
@@ -2518,3 +2518,4 @@
#endif
#endif /* __STM32F2xx_LL_USART_H */
+
diff --git a/Inc/stm32f2xx_ll_usb.h b/Inc/stm32f2xx_ll_usb.h
index 48d17cc..553bd1c 100644
--- a/Inc/stm32f2xx_ll_usb.h
+++ b/Inc/stm32f2xx_ll_usb.h
@@ -22,7 +22,7 @@
#ifdef __cplusplus
extern "C" {
-#endif
+#endif /* __cplusplus */
/* Includes ------------------------------------------------------------------*/
#include "stm32f2xx_hal_def.h"
@@ -41,14 +41,13 @@
/**
* @brief USB Mode definition
*/
-#if defined (USB_OTG_FS) || defined (USB_OTG_HS)
typedef enum
{
- USB_DEVICE_MODE = 0,
- USB_HOST_MODE = 1,
- USB_DRD_MODE = 2
-} USB_OTG_ModeTypeDef;
+ USB_DEVICE_MODE = 0,
+ USB_HOST_MODE = 1,
+ USB_DRD_MODE = 2
+} USB_ModeTypeDef;
/**
* @brief URB States definition
@@ -61,7 +60,7 @@
URB_NYET,
URB_ERROR,
URB_STALL
-} USB_OTG_URBStateTypeDef;
+} USB_URBStateTypeDef;
/**
* @brief Host channel States definition
@@ -71,13 +70,15 @@
HC_IDLE = 0,
HC_XFRC,
HC_HALTED,
+ HC_ACK,
HC_NAK,
HC_NYET,
HC_STALL,
HC_XACTERR,
HC_BBLERR,
HC_DATATGLERR
-} USB_OTG_HCStateTypeDef;
+} USB_HCStateTypeDef;
+
/**
* @brief USB Instance Initialization Structure definition
@@ -92,12 +93,13 @@
This parameter Depends on the used USB core.
This parameter must be a number between Min_Data = 1 and Max_Data = 15 */
+ uint32_t dma_enable; /*!< USB DMA state.
+ If DMA is not supported this parameter shall be set by default to zero */
+
uint32_t speed; /*!< USB Core speed.
This parameter can be any value of @ref PCD_Speed/HCD_Speed
(HCD_SPEED_xxx, HCD_SPEED_xxx) */
- uint32_t dma_enable; /*!< Enable or disable of the USB embedded DMA used only for OTG HS. */
-
uint32_t ep0_mps; /*!< Set the Endpoint 0 Max Packet size. */
uint32_t phy_itface; /*!< Select the used PHY interface.
@@ -105,7 +107,7 @@
uint32_t Sof_enable; /*!< Enable or disable the output of the SOF signal. */
- uint32_t low_power_enable; /*!< Enable or disable the low power mode. */
+ uint32_t low_power_enable; /*!< Enable or disable the low Power Mode. */
uint32_t lpm_enable; /*!< Enable or disable Link Power Management. */
@@ -117,7 +119,7 @@
uint32_t use_external_vbus; /*!< Enable or disable the use of the external VBUS. */
-} USB_OTG_CfgTypeDef;
+} USB_CfgTypeDef;
typedef struct
{
@@ -130,31 +132,34 @@
uint8_t is_stall; /*!< Endpoint stall condition
This parameter must be a number between Min_Data = 0 and Max_Data = 1 */
+ uint8_t is_iso_incomplete; /*!< Endpoint isoc condition
+ This parameter must be a number between Min_Data = 0 and Max_Data = 1 */
+
uint8_t type; /*!< Endpoint type
This parameter can be any value of @ref USB_LL_EP_Type */
uint8_t data_pid_start; /*!< Initial data PID
This parameter must be a number between Min_Data = 0 and Max_Data = 1 */
+ uint32_t maxpacket; /*!< Endpoint Max packet size
+ This parameter must be a number between Min_Data = 0 and Max_Data = 64KB */
+
+ uint8_t *xfer_buff; /*!< Pointer to transfer buffer */
+
+ uint32_t xfer_len; /*!< Current transfer length */
+
+ uint32_t xfer_count; /*!< Partial transfer length in case of multi packet transfer */
+
uint8_t even_odd_frame; /*!< IFrame parity
This parameter must be a number between Min_Data = 0 and Max_Data = 1 */
uint16_t tx_fifo_num; /*!< Transmission FIFO number
This parameter must be a number between Min_Data = 1 and Max_Data = 15 */
- uint32_t maxpacket; /*!< Endpoint Max packet size
- This parameter must be a number between Min_Data = 0 and Max_Data = 64KB */
-
- uint8_t *xfer_buff; /*!< Pointer to transfer buffer */
-
uint32_t dma_addr; /*!< 32 bits aligned transfer buffer address */
- uint32_t xfer_len; /*!< Current transfer length */
-
uint32_t xfer_size; /*!< requested transfer size */
-
- uint32_t xfer_count; /*!< Partial transfer length in case of multi packet transfer */
-} USB_OTG_EPTypeDef;
+} USB_EPTypeDef;
typedef struct
{
@@ -175,8 +180,13 @@
(HCD_DEVICE_SPEED_xxx) */
uint8_t do_ping; /*!< Enable or disable the use of the PING protocol for HS mode. */
+ uint8_t do_ssplit; /*!< Enable start split transaction in HS mode. */
+ uint8_t do_csplit; /*!< Enable complete split transaction in HS mode. */
+ uint8_t ep_ss_schedule; /*!< Enable periodic endpoint start split schedule . */
+ uint32_t iso_splt_xactPos; /*!< iso split transfer transaction position. */
- uint8_t process_ping; /*!< Execute the PING protocol for HS mode. */
+ uint8_t hub_port_nbr; /*!< USB HUB port number */
+ uint8_t hub_addr; /*!< USB HUB address */
uint8_t ep_type; /*!< Endpoint Type.
This parameter can be any value of @ref USB_LL_EP_Type */
@@ -189,7 +199,7 @@
uint8_t *xfer_buff; /*!< Pointer to transfer buffer. */
- uint32_t XferSize; /*!< OTG Channel transfer size. */
+ uint32_t XferSize; /*!< OTG Channel transfer size. */
uint32_t xfer_len; /*!< Current transfer length. */
@@ -204,15 +214,21 @@
uint32_t dma_addr; /*!< 32 bits aligned transfer buffer address. */
uint32_t ErrCnt; /*!< Host channel error count. */
+ uint32_t NyetErrCnt; /*!< Complete Split NYET Host channel error count. */
- USB_OTG_URBStateTypeDef urb_state; /*!< URB state.
- This parameter can be any value of @ref USB_OTG_URBStateTypeDef */
+ USB_URBStateTypeDef urb_state; /*!< URB state.
+ This parameter can be any value of @ref USB_URBStateTypeDef */
- USB_OTG_HCStateTypeDef state; /*!< Host Channel state.
- This parameter can be any value of @ref USB_OTG_HCStateTypeDef */
-} USB_OTG_HCTypeDef;
-#endif /* defined (USB_OTG_FS) || defined (USB_OTG_HS) */
+ USB_HCStateTypeDef state; /*!< Host Channel state.
+ This parameter can be any value of @ref USB_HCStateTypeDef */
+} USB_HCTypeDef;
+typedef USB_ModeTypeDef USB_OTG_ModeTypeDef;
+typedef USB_CfgTypeDef USB_OTG_CfgTypeDef;
+typedef USB_EPTypeDef USB_OTG_EPTypeDef;
+typedef USB_URBStateTypeDef USB_OTG_URBStateTypeDef;
+typedef USB_HCStateTypeDef USB_OTG_HCStateTypeDef;
+typedef USB_HCTypeDef USB_OTG_HCTypeDef;
/* Exported constants --------------------------------------------------------*/
@@ -240,18 +256,6 @@
* @}
*/
-/** @defgroup USB_LL Device Speed
- * @{
- */
-#define USBD_HS_SPEED 0U
-#define USBD_HSINFS_SPEED 1U
-#define USBH_HS_SPEED 0U
-#define USBD_FS_SPEED 2U
-#define USBH_FSLS_SPEED 1U
-/**
- * @}
- */
-
/** @defgroup USB_LL_Core_Speed USB Low Layer Core Speed
* @{
*/
@@ -315,24 +319,14 @@
/**
* @}
*/
-
+#endif /* defined (USB_OTG_FS) || defined (USB_OTG_HS) */
/** @defgroup USB_LL_EP0_MPS USB Low Layer EP0 MPS
* @{
*/
-#define EP_MPS_64 0U
-#define EP_MPS_32 1U
-#define EP_MPS_16 2U
-#define EP_MPS_8 3U
-/**
- * @}
- */
-
-/** @defgroup USB_LL_EP_Speed USB Low Layer EP Speed
- * @{
- */
-#define EP_SPEED_LOW 0U
-#define EP_SPEED_FULL 1U
-#define EP_SPEED_HIGH 2U
+#define EP_MPS_64 0U
+#define EP_MPS_32 1U
+#define EP_MPS_16 2U
+#define EP_MPS_8 3U
/**
* @}
*/
@@ -349,6 +343,40 @@
* @}
*/
+/** @defgroup USB_LL_EP_Speed USB Low Layer EP Speed
+ * @{
+ */
+#define EP_SPEED_LOW 0U
+#define EP_SPEED_FULL 1U
+#define EP_SPEED_HIGH 2U
+/**
+ * @}
+ */
+
+/** @defgroup USB_LL_CH_PID_Type USB Low Layer Channel PID Type
+ * @{
+ */
+#define HC_PID_DATA0 0U
+#define HC_PID_DATA2 1U
+#define HC_PID_DATA1 2U
+#define HC_PID_SETUP 3U
+/**
+ * @}
+ */
+
+/** @defgroup USB_LL Device Speed
+ * @{
+ */
+#define USBD_HS_SPEED 0U
+#define USBD_HSINFS_SPEED 1U
+#define USBH_HS_SPEED 0U
+#define USBD_FS_SPEED 2U
+#define USBH_FSLS_SPEED 1U
+/**
+ * @}
+ */
+
+#if defined (USB_OTG_FS) || defined (USB_OTG_HS)
/** @defgroup USB_LL_STS_Defines USB Low Layer STS Defines
* @{
*/
@@ -371,6 +399,16 @@
* @}
*/
+/** @defgroup USB_LL_HFIR_Defines USB Low Layer frame interval Defines
+ * @{
+ */
+#define HFIR_6_MHZ 6000U
+#define HFIR_60_MHZ 60000U
+#define HFIR_48_MHZ 48000U
+/**
+ * @}
+ */
+
/** @defgroup USB_LL_HPRT0_PRTSPD_SPEED_Defines USB Low Layer HPRT0 PRTSPD Speed Defines
* @{
*/
@@ -386,16 +424,27 @@
#define HCCHAR_BULK 2U
#define HCCHAR_INTR 3U
-#define HC_PID_DATA0 0U
-#define HC_PID_DATA2 1U
-#define HC_PID_DATA1 2U
-#define HC_PID_SETUP 3U
-
#define GRXSTS_PKTSTS_IN 2U
#define GRXSTS_PKTSTS_IN_XFER_COMP 3U
#define GRXSTS_PKTSTS_DATA_TOGGLE_ERR 5U
#define GRXSTS_PKTSTS_CH_HALTED 7U
+#define CLEAR_INTERRUPT_MASK 0xFFFFFFFFU
+
+#define HC_MAX_PKT_CNT 256U
+#define ISO_SPLT_MPS 188U
+
+#define HCSPLT_BEGIN 1U
+#define HCSPLT_MIDDLE 2U
+#define HCSPLT_END 3U
+#define HCSPLT_FULL 4U
+
+#define TEST_J 1U
+#define TEST_K 2U
+#define TEST_SE0_NAK 3U
+#define TEST_PACKET 4U
+#define TEST_FORCE_EN 5U
+
#define USBx_PCGCCTL *(__IO uint32_t *)((uint32_t)USBx_BASE + USB_OTG_PCGCCTL_BASE)
#define USBx_HPRT0 *(__IO uint32_t *)((uint32_t)USBx_BASE + USB_OTG_HOST_PORT_BASE)
@@ -413,9 +462,9 @@
+ USB_OTG_HOST_CHANNEL_BASE\
+ ((i) * USB_OTG_HOST_CHANNEL_SIZE)))
-#endif /* defined (USB_OTG_FS) || defined (USB_OTG_HS) */
#define EP_ADDR_MSK 0xFU
+#endif /* defined (USB_OTG_FS) || defined (USB_OTG_HS) */
/**
* @}
*/
@@ -454,13 +503,13 @@
HAL_StatusTypeDef USB_ActivateDedicatedEndpoint(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep);
HAL_StatusTypeDef USB_DeactivateDedicatedEndpoint(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep);
HAL_StatusTypeDef USB_EPStartXfer(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep, uint8_t dma);
-HAL_StatusTypeDef USB_EP0StartXfer(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep, uint8_t dma);
HAL_StatusTypeDef USB_WritePacket(USB_OTG_GlobalTypeDef *USBx, uint8_t *src,
uint8_t ch_ep_num, uint16_t len, uint8_t dma);
void *USB_ReadPacket(USB_OTG_GlobalTypeDef *USBx, uint8_t *dest, uint16_t len);
HAL_StatusTypeDef USB_EPSetStall(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep);
HAL_StatusTypeDef USB_EPClearStall(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep);
+HAL_StatusTypeDef USB_EPStopXfer(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep);
HAL_StatusTypeDef USB_SetDevAddress(USB_OTG_GlobalTypeDef *USBx, uint8_t address);
HAL_StatusTypeDef USB_DevConnect(USB_OTG_GlobalTypeDef *USBx);
HAL_StatusTypeDef USB_DevDisconnect(USB_OTG_GlobalTypeDef *USBx);
@@ -469,7 +518,8 @@
HAL_StatusTypeDef USB_EP0_OutStart(USB_OTG_GlobalTypeDef *USBx, uint8_t dma, uint8_t *psetup);
uint8_t USB_GetDevSpeed(USB_OTG_GlobalTypeDef *USBx);
uint32_t USB_GetMode(USB_OTG_GlobalTypeDef *USBx);
-uint32_t USB_ReadInterrupts(USB_OTG_GlobalTypeDef *USBx);
+uint32_t USB_ReadInterrupts(USB_OTG_GlobalTypeDef const *USBx);
+uint32_t USB_ReadChInterrupts(USB_OTG_GlobalTypeDef *USBx, uint8_t chnum);
uint32_t USB_ReadDevAllOutEpInterrupt(USB_OTG_GlobalTypeDef *USBx);
uint32_t USB_ReadDevOutEPInterrupt(USB_OTG_GlobalTypeDef *USBx, uint8_t epnum);
uint32_t USB_ReadDevAllInEpInterrupt(USB_OTG_GlobalTypeDef *USBx);
@@ -480,8 +530,8 @@
HAL_StatusTypeDef USB_InitFSLSPClkSel(USB_OTG_GlobalTypeDef *USBx, uint8_t freq);
HAL_StatusTypeDef USB_ResetPort(USB_OTG_GlobalTypeDef *USBx);
HAL_StatusTypeDef USB_DriveVbus(USB_OTG_GlobalTypeDef *USBx, uint8_t state);
-uint32_t USB_GetHostSpeed(USB_OTG_GlobalTypeDef *USBx);
-uint32_t USB_GetCurrentFrame(USB_OTG_GlobalTypeDef *USBx);
+uint32_t USB_GetHostSpeed(USB_OTG_GlobalTypeDef const *USBx);
+uint32_t USB_GetCurrentFrame(USB_OTG_GlobalTypeDef const *USBx);
HAL_StatusTypeDef USB_HC_Init(USB_OTG_GlobalTypeDef *USBx, uint8_t ch_num,
uint8_t epnum, uint8_t dev_address, uint8_t speed,
uint8_t ep_type, uint16_t mps);
@@ -515,7 +565,7 @@
#ifdef __cplusplus
}
-#endif
+#endif /* __cplusplus */
#endif /* STM32F2xx_LL_USB_H */
diff --git a/Inc/stm32f2xx_ll_utils.h b/Inc/stm32f2xx_ll_utils.h
index 87cf952..569b4e2 100644
--- a/Inc/stm32f2xx_ll_utils.h
+++ b/Inc/stm32f2xx_ll_utils.h
@@ -3,6 +3,17 @@
* @file stm32f2xx_ll_utils.h
* @author MCD Application Team
* @brief Header file of UTILS LL module.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2017 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
@verbatim
==============================================================================
##### How to use this driver #####
@@ -16,16 +27,6 @@
@endverbatim
******************************************************************************
- * @attention
- *
- * Copyright (c) 2017 STMicroelectronics.
- * All rights reserved.
- *
- * This software is licensed under terms that can be found in the LICENSE file
- * in the root directory of this software component.
- * If no LICENSE file comes with this software, it is provided AS-IS.
- *
- ******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
diff --git a/README.md b/README.md
index 7b54a79..16a1409 100644
--- a/README.md
+++ b/README.md
@@ -27,17 +27,7 @@
## Compatibility information
-In this table, you can find the successive versions of this HAL-LL Driver component, in line with the corresponding versions of the full MCU package:
-
-It is **crucial** that you use a consistent set of versions for the CMSIS Core - CMSIS Device - HAL, as mentioned in this table.
-
-HAL Driver F2 | CMSIS Device F2 | CMSIS Core | Was delivered in the full MCU package
-------------- | --------------- | ---------- | -------------------------------------
-Tag v1.2.3 | Tag v2.2.2 | Tag v5.4.0_cm3 | Tag v1.8.0 (and following, if any, till HAL tag)
-Tag v1.2.4 | Tag v2.2.3 | Tag v5.4.0_cm3 | Tag v1.9.0 (and following, if any, till HAL tag)
-Tag v1.2.5 | Tag v2.2.4 | Tag v5.4.0_cm3 | Tag v1.9.1 (and following, if any, till HAL tag)
-Tag v1.2.6 | Tag v2.2.4 | Tag v5.4.0_cm3 | Tag v1.9.2 (and following, if any, till HAL tag)
-Tag v1.2.7 | Tag v2.2.5 | Tag v5.4.0_cm3 | Tag v1.9.3 (and following, if any, till HAL tag)
+It is **crucial** that you use a consistent set of versions for the CMSIS Core - CMSIS Device - HAL, as mentioned in [this](https://htmlpreview.github.io/?https://github.com/STMicroelectronics/STM32CubeF2/blob/master/Release_Notes.html) release note.
The full **STM32CubeF2** MCU package is available [here](https://github.com/STMicroelectronics/STM32CubeF2).
diff --git a/Release_Notes.html b/Release_Notes.html
index 4e12fa6..62c4ea9 100644
--- a/Release_Notes.html
+++ b/Release_Notes.html
@@ -11,44 +11,188 @@
span.underline{text-decoration: underline;}
div.column{display: inline-block; vertical-align: top; width: 50%;}
</style>
- <link rel="stylesheet" href="_htmresc/mini-st.css" />
+ <style type="text/css">@charset "UTF-8";:root {--fore-color: #03234b;--secondary-fore-color: #03234b;--back-color: #ffffff;--secondary-back-color: #ffffff;--blockquote-color: #e6007e;--pre-color: #e6007e;--border-color: #3cb4e6;--secondary-border-color: #3cb4e6;--heading-ratio: 1.2;--universal-margin: 0.5rem;--universal-padding: 0.25rem;--universal-border-radius: 0.075rem;--background-margin: 1.5%;--a-link-color: #3cb4e6;--a-visited-color: #8c0078; }html {font-size: 13.5px; }a, b, del, em, i, ins, q, span, strong, u {font-size: 1em; }html, * {font-family: -apple-system, BlinkMacSystemFont, Helvetica, arial, sans-serif;line-height: 1.25;-webkit-text-size-adjust: 100%; }* {font-size: 1rem; }body {margin: 0;color: var(--fore-color);@background: var(--back-color);background: var(--back-color) linear-gradient(#ffd200, #ffd200) repeat-y left top;background-size: var(--background-margin);}details {display: block; }summary {display: list-item; }abbr[title] {border-bottom: none;text-decoration: underline dotted; }input {overflow: visible; }img {max-width: 100%;height: auto; }h1, h2, h3, h4, h5, h6 {line-height: 1.25;margin: calc(1.5 * var(--universal-margin)) var(--universal-margin);font-weight: 400; }h1 small, h2 small, h3 small, h4 small, h5 small, h6 small {color: var(--secondary-fore-color);display: block;margin-top: -0.25rem; }h1 {font-size: calc(1rem * var(--heading-ratio) * var(--heading-ratio) * var(--heading-ratio)); }h2 {font-size: calc(1rem * var(--heading-ratio) * var(--heading-ratio) );border-style: none none solid none ; border-width: thin;border-color: var(--border-color); }h3 {font-size: calc(1rem * var(--heading-ratio) ); }h4 {font-size: calc(1rem * var(--heading-ratio)); }h5 {font-size: 1rem; }h6 {font-size: calc(1rem / var(--heading-ratio)); }p {margin: var(--universal-margin); }ol, ul {margin: var(--universal-margin);padding-left: calc(3 * var(--universal-margin)); }b, strong {font-weight: 700; }hr {box-sizing: content-box;border: 0;line-height: 1.25em;margin: var(--universal-margin);height: 0.0714285714rem;background: linear-gradient(to right, transparent, var(--border-color) 20%, var(--border-color) 80%, transparent); }blockquote {display: block;position: relative;font-style: italic;color: var(--secondary-fore-color);margin: var(--universal-margin);padding: calc(3 * var(--universal-padding));border: 0.0714285714rem solid var(--secondary-border-color);border-left: 0.3rem solid var(--blockquote-color);border-radius: 0 var(--universal-border-radius) var(--universal-border-radius) 0; }blockquote:before {position: absolute;top: calc(0rem - var(--universal-padding));left: 0;font-family: sans-serif;font-size: 2rem;font-weight: 800;content: "\201c";color: var(--blockquote-color); }blockquote[cite]:after {font-style: normal;font-size: 0.75em;font-weight: 700;content: "\a— " attr(cite);white-space: pre; }code, kbd, pre, samp {font-family: Menlo, Consolas, monospace;font-size: 0.85em; }code {background: var(--secondary-back-color);border-radius: var(--universal-border-radius);padding: calc(var(--universal-padding) / 4) calc(var(--universal-padding) / 2); }kbd {background: var(--fore-color);color: var(--back-color);border-radius: var(--universal-border-radius);padding: calc(var(--universal-padding) / 4) calc(var(--universal-padding) / 2); }pre {overflow: auto;background: var(--secondary-back-color);padding: calc(1.5 * var(--universal-padding));margin: var(--universal-margin);border: 0.0714285714rem solid var(--secondary-border-color);border-left: 0.2857142857rem solid var(--pre-color);border-radius: 0 var(--universal-border-radius) var(--universal-border-radius) 0; }sup, sub, code, kbd {line-height: 0;position: relative;vertical-align: baseline; }small, sup, sub, figcaption {font-size: 0.75em; }sup {top: -0.5em; }sub {bottom: -0.25em; }figure {margin: var(--universal-margin); }figcaption {color: var(--secondary-fore-color); }a {text-decoration: none; }a:link {color: var(--a-link-color); }a:visited {color: var(--a-visited-color); }a:hover, a:focus {text-decoration: underline; }.container {margin: 0 auto;padding: 0 calc(1.5 * var(--universal-padding)); }.row {box-sizing: border-box;display: flex;flex: 0 1 auto;flex-flow: row wrap;margin: 0 0 0 var(--background-margin); }.col-sm,[class^='col-sm-'],[class^='col-sm-offset-'],.row[class*='cols-sm-'] > * {box-sizing: border-box;flex: 0 0 auto;padding: 0 calc(var(--universal-padding) / 2); }.col-sm,.row.cols-sm > * {max-width: 100%;flex-grow: 1;flex-basis: 0; }.col-sm-1,.row.cols-sm-1 > * {max-width: 8.3333333333%;flex-basis: 8.3333333333%; }.col-sm-offset-0 {margin-left: 0; }.col-sm-2,.row.cols-sm-2 > * {max-width: 16.6666666667%;flex-basis: 16.6666666667%; }.col-sm-offset-1 {margin-left: 8.3333333333%; }.col-sm-3,.row.cols-sm-3 > * {max-width: 25%;flex-basis: 25%; }.col-sm-offset-2 {margin-left: 16.6666666667%; }.col-sm-4,.row.cols-sm-4 > * {max-width: 33.3333333333%;flex-basis: 33.3333333333%; }.col-sm-offset-3 {margin-left: 25%; }.col-sm-5,.row.cols-sm-5 > * {max-width: 41.6666666667%;flex-basis: 41.6666666667%; }.col-sm-offset-4 {margin-left: 33.3333333333%; }.col-sm-6,.row.cols-sm-6 > * {max-width: 50%;flex-basis: 50%; }.col-sm-offset-5 {margin-left: 41.6666666667%; }.col-sm-7,.row.cols-sm-7 > * {max-width: 58.3333333333%;flex-basis: 58.3333333333%; }.col-sm-offset-6 {margin-left: 50%; }.col-sm-8,.row.cols-sm-8 > * {max-width: 66.6666666667%;flex-basis: 66.6666666667%; }.col-sm-offset-7 {margin-left: 58.3333333333%; }.col-sm-9,.row.cols-sm-9 > * {max-width: 75%;flex-basis: 75%; }.col-sm-offset-8 {margin-left: 66.6666666667%; }.col-sm-10,.row.cols-sm-10 > * {max-width: 83.3333333333%;flex-basis: 83.3333333333%; }.col-sm-offset-9 {margin-left: 75%; }.col-sm-11,.row.cols-sm-11 > * {max-width: 91.6666666667%;flex-basis: 91.6666666667%; }.col-sm-offset-10 {margin-left: 83.3333333333%; }.col-sm-12,.row.cols-sm-12 > * {max-width: 100%;flex-basis: 100%; }.col-sm-offset-11 {margin-left: 91.6666666667%; }.col-sm-normal {order: initial; }.col-sm-first {order: -999; }.col-sm-last {order: 999; }@media screen and (min-width: 500px) {.col-md,[class^='col-md-'],[class^='col-md-offset-'],.row[class*='cols-md-'] > * {box-sizing: border-box;flex: 0 0 auto;padding: 0 calc(var(--universal-padding) / 2); }.col-md,.row.cols-md > * {max-width: 100%;flex-grow: 1;flex-basis: 0; }.col-md-1,.row.cols-md-1 > * {max-width: 8.3333333333%;flex-basis: 8.3333333333%; }.col-md-offset-0 {margin-left: 0; }.col-md-2,.row.cols-md-2 > * {max-width: 16.6666666667%;flex-basis: 16.6666666667%; }.col-md-offset-1 {margin-left: 8.3333333333%; }.col-md-3,.row.cols-md-3 > * {max-width: 25%;flex-basis: 25%; }.col-md-offset-2 {margin-left: 16.6666666667%; }.col-md-4,.row.cols-md-4 > * {max-width: 33.3333333333%;flex-basis: 33.3333333333%; }.col-md-offset-3 {margin-left: 25%; }.col-md-5,.row.cols-md-5 > * {max-width: 41.6666666667%;flex-basis: 41.6666666667%; }.col-md-offset-4 {margin-left: 33.3333333333%; }.col-md-6,.row.cols-md-6 > * {max-width: 50%;flex-basis: 50%; }.col-md-offset-5 {margin-left: 41.6666666667%; }.col-md-7,.row.cols-md-7 > * {max-width: 58.3333333333%;flex-basis: 58.3333333333%; }.col-md-offset-6 {margin-left: 50%; }.col-md-8,.row.cols-md-8 > * {max-width: 66.6666666667%;flex-basis: 66.6666666667%; }.col-md-offset-7 {margin-left: 58.3333333333%; }.col-md-9,.row.cols-md-9 > * {max-width: 75%;flex-basis: 75%; }.col-md-offset-8 {margin-left: 66.6666666667%; }.col-md-10,.row.cols-md-10 > * {max-width: 83.3333333333%;flex-basis: 83.3333333333%; }.col-md-offset-9 {margin-left: 75%; }.col-md-11,.row.cols-md-11 > * {max-width: 91.6666666667%;flex-basis: 91.6666666667%; }.col-md-offset-10 {margin-left: 83.3333333333%; }.col-md-12,.row.cols-md-12 > * {max-width: 100%;flex-basis: 100%; }.col-md-offset-11 {margin-left: 91.6666666667%; }.col-md-normal {order: initial; }.col-md-first {order: -999; }.col-md-last {order: 999; } }@media screen and (min-width: 1280px) {.col-lg,[class^='col-lg-'],[class^='col-lg-offset-'],.row[class*='cols-lg-'] > * {box-sizing: border-box;flex: 0 0 auto;padding: 0 calc(var(--universal-padding) / 2); }.col-lg,.row.cols-lg > * {max-width: 100%;flex-grow: 1;flex-basis: 0; }.col-lg-1,.row.cols-lg-1 > * {max-width: 8.3333333333%;flex-basis: 8.3333333333%; }.col-lg-offset-0 {margin-left: 0; }.col-lg-2,.row.cols-lg-2 > * {max-width: 16.6666666667%;flex-basis: 16.6666666667%; }.col-lg-offset-1 {margin-left: 8.3333333333%; }.col-lg-3,.row.cols-lg-3 > * {max-width: 25%;flex-basis: 25%; }.col-lg-offset-2 {margin-left: 16.6666666667%; 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}.col-lg-offset-11 {margin-left: 91.6666666667%; }.col-lg-normal {order: initial; }.col-lg-first {order: -999; }.col-lg-last {order: 999; } }:root {--card-back-color: #3cb4e6;--card-fore-color: #03234b;--card-border-color: #03234b; }.card {display: flex;flex-direction: column;justify-content: space-between;align-self: center;position: relative;width: 100%;background: var(--card-back-color);color: var(--card-fore-color);border: 0.0714285714rem solid var(--card-border-color);border-radius: var(--universal-border-radius);margin: var(--universal-margin);overflow: hidden; }@media screen and (min-width: 320px) {.card {max-width: 320px; } }.card > .sectione {background: var(--card-back-color);color: var(--card-fore-color);box-sizing: border-box;margin: 0;border: 0;border-radius: 0;border-bottom: 0.0714285714rem solid var(--card-border-color);padding: var(--universal-padding);width: 100%; }.card > .sectione.media {height: 200px;padding: 0;-o-object-fit: cover;object-fit: cover; }.card > .sectione:last-child {border-bottom: 0; }@media screen and (min-width: 240px) {.card.small {max-width: 240px; } }@media screen and (min-width: 480px) {.card.large {max-width: 480px; } }.card.fluid {max-width: 100%;width: auto; }.card.warning {--card-back-color: #e5b8b7;--card-fore-color: #3b234b;--card-border-color: #8c0078; }.card.error {--card-back-color: #464650;--card-fore-color: #ffffff;--card-border-color: #8c0078; }.card > .sectione.dark {--card-back-color: #3b234b;--card-fore-color: #ffffff; }.card > .sectione.double-padded {padding: calc(1.5 * var(--universal-padding)); }:root {--form-back-color: #ffe97f;--form-fore-color: #03234b;--form-border-color: #3cb4e6;--input-back-color: #ffffff;--input-fore-color: #03234b;--input-border-color: #3cb4e6;--input-focus-color: #0288d1;--input-invalid-color: #d32f2f;--button-back-color: #e2e2e2;--button-hover-back-color: #dcdcdc;--button-fore-color: #212121;--button-border-color: transparent;--button-hover-border-color: transparent;--button-group-border-color: rgba(124, 124, 124, 0.54); }form {background: var(--form-back-color);color: var(--form-fore-color);border: 0.0714285714rem solid var(--form-border-color);border-radius: var(--universal-border-radius);margin: var(--universal-margin);padding: calc(2 * var(--universal-padding)) var(--universal-padding); }fieldset {border: 0.0714285714rem solid var(--form-border-color);border-radius: var(--universal-border-radius);margin: calc(var(--universal-margin) / 4);padding: var(--universal-padding); }legend {box-sizing: border-box;display: table;max-width: 100%;white-space: normal;font-weight: 500;padding: calc(var(--universal-padding) / 2); }label {padding: calc(var(--universal-padding) / 2) var(--universal-padding); }.input-group {display: inline-block; }.input-group.fluid {display: flex;align-items: center;justify-content: center; }.input-group.fluid > input {max-width: 100%;flex-grow: 1;flex-basis: 0px; }@media screen and (max-width: 499px) {.input-group.fluid {align-items: stretch;flex-direction: column; } }.input-group.vertical {display: flex;align-items: stretch;flex-direction: column; }.input-group.vertical > input {max-width: 100%;flex-grow: 1;flex-basis: 0px; }[type="number"]::-webkit-inner-spin-button, [type="number"]::-webkit-outer-spin-button {height: auto; }[type="search"] {-webkit-appearance: textfield;outline-offset: -2px; }[type="search"]::-webkit-search-cancel-button,[type="search"]::-webkit-search-decoration {-webkit-appearance: none; }input:not([type]), [type="text"], [type="email"], [type="number"], [type="search"],[type="password"], [type="url"], [type="tel"], [type="checkbox"], [type="radio"], textarea, select {box-sizing: border-box;background: var(--input-back-color);color: var(--input-fore-color);border: 0.0714285714rem solid var(--input-border-color);border-radius: var(--universal-border-radius);margin: calc(var(--universal-margin) / 2);padding: var(--universal-padding) calc(1.5 * var(--universal-padding)); }input:not([type="button"]):not([type="submit"]):not([type="reset"]):hover, input:not([type="button"]):not([type="submit"]):not([type="reset"]):focus, textarea:hover, textarea:focus, select:hover, select:focus {border-color: var(--input-focus-color);box-shadow: none; }input:not([type="button"]):not([type="submit"]):not([type="reset"]):invalid, input:not([type="button"]):not([type="submit"]):not([type="reset"]):focus:invalid, textarea:invalid, textarea:focus:invalid, select:invalid, select:focus:invalid {border-color: var(--input-invalid-color);box-shadow: none; }input:not([type="button"]):not([type="submit"]):not([type="reset"])[readonly], textarea[readonly], select[readonly] {background: var(--secondary-back-color); }select {max-width: 100%; }option {overflow: hidden;text-overflow: ellipsis; }[type="checkbox"], [type="radio"] {-webkit-appearance: none;-moz-appearance: none;appearance: none;position: relative;height: calc(1rem + var(--universal-padding) / 2);width: calc(1rem + var(--universal-padding) / 2);vertical-align: text-bottom;padding: 0;flex-basis: calc(1rem + var(--universal-padding) / 2) !important;flex-grow: 0 !important; }[type="checkbox"]:checked:before, [type="radio"]:checked:before {position: absolute; }[type="checkbox"]:checked:before {content: '\2713';font-family: sans-serif;font-size: calc(1rem + var(--universal-padding) / 2);top: calc(0rem - var(--universal-padding));left: calc(var(--universal-padding) / 4); }[type="radio"] {border-radius: 100%; }[type="radio"]:checked:before {border-radius: 100%;content: '';top: calc(0.0714285714rem + var(--universal-padding) / 2);left: calc(0.0714285714rem + var(--universal-padding) / 2);background: var(--input-fore-color);width: 0.5rem;height: 0.5rem; }:placeholder-shown {color: var(--input-fore-color); }::-ms-placeholder {color: var(--input-fore-color);opacity: 0.54; }button::-moz-focus-inner, [type="button"]::-moz-focus-inner, [type="reset"]::-moz-focus-inner, [type="submit"]::-moz-focus-inner {border-style: none;padding: 0; }button, html [type="button"], [type="reset"], [type="submit"] {-webkit-appearance: button; }button {overflow: visible;text-transform: none; }button, [type="button"], [type="submit"], [type="reset"],a.button, label.button, .button,a[role="button"], label[role="button"], [role="button"] {display: inline-block;background: var(--button-back-color);color: var(--button-fore-color);border: 0.0714285714rem solid var(--button-border-color);border-radius: var(--universal-border-radius);padding: var(--universal-padding) calc(1.5 * var(--universal-padding));margin: var(--universal-margin);text-decoration: none;cursor: pointer;transition: background 0.3s; }button:hover, button:focus, [type="button"]:hover, [type="button"]:focus, [type="submit"]:hover, [type="submit"]:focus, [type="reset"]:hover, [type="reset"]:focus,a.button:hover,a.button:focus, label.button:hover, label.button:focus, .button:hover, .button:focus,a[role="button"]:hover,a[role="button"]:focus, label[role="button"]:hover, label[role="button"]:focus, [role="button"]:hover, [role="button"]:focus {background: var(--button-hover-back-color);border-color: var(--button-hover-border-color); }input:disabled, input[disabled], textarea:disabled, textarea[disabled], select:disabled, select[disabled], button:disabled, button[disabled], .button:disabled, .button[disabled], [role="button"]:disabled, [role="button"][disabled] {cursor: not-allowed;opacity: 0.75; }.button-group {display: flex;border: 0.0714285714rem solid var(--button-group-border-color);border-radius: var(--universal-border-radius);margin: var(--universal-margin); }.button-group > button, .button-group [type="button"], .button-group > [type="submit"], .button-group > [type="reset"], .button-group > .button, .button-group > [role="button"] {margin: 0;max-width: 100%;flex: 1 1 auto;text-align: center;border: 0;border-radius: 0;box-shadow: none; }.button-group > :not(:first-child) {border-left: 0.0714285714rem solid var(--button-group-border-color); }@media screen and (max-width: 499px) {.button-group {flex-direction: column; }.button-group > :not(:first-child) {border: 0;border-top: 0.0714285714rem solid var(--button-group-border-color); } }button.primary, [type="button"].primary, [type="submit"].primary, [type="reset"].primary, .button.primary, [role="button"].primary {--button-back-color: #1976d2;--button-fore-color: #f8f8f8; }button.primary:hover, button.primary:focus, [type="button"].primary:hover, [type="button"].primary:focus, [type="submit"].primary:hover, [type="submit"].primary:focus, [type="reset"].primary:hover, [type="reset"].primary:focus, .button.primary:hover, .button.primary:focus, [role="button"].primary:hover, [role="button"].primary:focus {--button-hover-back-color: #1565c0; }button.secondary, [type="button"].secondary, [type="submit"].secondary, [type="reset"].secondary, .button.secondary, [role="button"].secondary {--button-back-color: #d32f2f;--button-fore-color: #f8f8f8; }button.secondary:hover, button.secondary:focus, [type="button"].secondary:hover, [type="button"].secondary:focus, [type="submit"].secondary:hover, [type="submit"].secondary:focus, [type="reset"].secondary:hover, [type="reset"].secondary:focus, .button.secondary:hover, .button.secondary:focus, [role="button"].secondary:hover, [role="button"].secondary:focus {--button-hover-back-color: #c62828; }button.tertiary, [type="button"].tertiary, [type="submit"].tertiary, [type="reset"].tertiary, .button.tertiary, [role="button"].tertiary {--button-back-color: #308732;--button-fore-color: #f8f8f8; }button.tertiary:hover, button.tertiary:focus, [type="button"].tertiary:hover, [type="button"].tertiary:focus, [type="submit"].tertiary:hover, [type="submit"].tertiary:focus, [type="reset"].tertiary:hover, [type="reset"].tertiary:focus, .button.tertiary:hover, .button.tertiary:focus, [role="button"].tertiary:hover, [role="button"].tertiary:focus {--button-hover-back-color: #277529; }button.inverse, [type="button"].inverse, [type="submit"].inverse, [type="reset"].inverse, .button.inverse, [role="button"].inverse {--button-back-color: #212121;--button-fore-color: #f8f8f8; }button.inverse:hover, button.inverse:focus, [type="button"].inverse:hover, [type="button"].inverse:focus, [type="submit"].inverse:hover, [type="submit"].inverse:focus, [type="reset"].inverse:hover, [type="reset"].inverse:focus, .button.inverse:hover, .button.inverse:focus, [role="button"].inverse:hover, [role="button"].inverse:focus {--button-hover-back-color: #111; }button.small, [type="button"].small, [type="submit"].small, [type="reset"].small, .button.small, [role="button"].small {padding: calc(0.5 * var(--universal-padding)) calc(0.75 * var(--universal-padding));margin: var(--universal-margin); }button.large, [type="button"].large, [type="submit"].large, [type="reset"].large, .button.large, [role="button"].large {padding: calc(1.5 * var(--universal-padding)) calc(2 * var(--universal-padding));margin: var(--universal-margin); }:root {--header-back-color: #03234b;--header-hover-back-color: #ffd200;--header-fore-color: #ffffff;--header-border-color: #3cb4e6;--nav-back-color: #ffffff;--nav-hover-back-color: #ffe97f;--nav-fore-color: #e6007e;--nav-border-color: #3cb4e6;--nav-link-color: #3cb4e6;--footer-fore-color: #ffffff;--footer-back-color: #03234b;--footer-border-color: #3cb4e6;--footer-link-color: #3cb4e6;--drawer-back-color: #ffffff;--drawer-hover-back-color: #ffe97f;--drawer-border-color: #3cb4e6;--drawer-close-color: #e6007e; }header {height: 2.75rem;background: var(--header-back-color);color: var(--header-fore-color);border-bottom: 0.0714285714rem solid var(--header-border-color);padding: calc(var(--universal-padding) / 4) 0;white-space: nowrap;overflow-x: auto;overflow-y: hidden; }header.row {box-sizing: content-box; }header .logo {color: var(--header-fore-color);font-size: 1.75rem;padding: var(--universal-padding) calc(2 * var(--universal-padding));text-decoration: none; }header button, header [type="button"], header .button, header [role="button"] {box-sizing: border-box;position: relative;top: calc(0rem - var(--universal-padding) / 4);height: calc(3.1875rem + var(--universal-padding) / 2);background: var(--header-back-color);line-height: calc(3.1875rem - var(--universal-padding) * 1.5);text-align: center;color: var(--header-fore-color);border: 0;border-radius: 0;margin: 0;text-transform: uppercase; }header button:hover, header button:focus, header [type="button"]:hover, header [type="button"]:focus, header .button:hover, header .button:focus, header [role="button"]:hover, header [role="button"]:focus {background: var(--header-hover-back-color); }nav {background: var(--nav-back-color);color: var(--nav-fore-color);border: 0.0714285714rem solid var(--nav-border-color);border-radius: var(--universal-border-radius);margin: var(--universal-margin); }nav * {padding: var(--universal-padding) calc(1.5 * var(--universal-padding)); }nav a, nav a:visited {display: block;color: var(--nav-link-color);border-radius: var(--universal-border-radius);transition: background 0.3s; }nav a:hover, nav a:focus, nav a:visited:hover, nav a:visited:focus {text-decoration: none;background: var(--nav-hover-back-color); }nav .sublink-1 {position: relative;margin-left: calc(2 * var(--universal-padding)); }nav .sublink-1:before {position: absolute;left: calc(var(--universal-padding) - 1 * var(--universal-padding));top: -0.0714285714rem;content: '';height: 100%;border: 0.0714285714rem solid var(--nav-border-color);border-left: 0; }nav .sublink-2 {position: relative;margin-left: calc(4 * var(--universal-padding)); }nav .sublink-2:before {position: absolute;left: calc(var(--universal-padding) - 3 * var(--universal-padding));top: -0.0714285714rem;content: '';height: 100%;border: 0.0714285714rem solid var(--nav-border-color);border-left: 0; }footer {background: var(--footer-back-color);color: var(--footer-fore-color);border-top: 0.0714285714rem solid var(--footer-border-color);padding: calc(2 * var(--universal-padding)) var(--universal-padding);font-size: 0.875rem; }footer a, footer a:visited {color: var(--footer-link-color); }header.sticky {position: -webkit-sticky;position: sticky;z-index: 1101;top: 0; }footer.sticky {position: -webkit-sticky;position: sticky;z-index: 1101;bottom: 0; }.drawer-toggle:before {display: inline-block;position: relative;vertical-align: bottom;content: '\00a0\2261\00a0';font-family: sans-serif;font-size: 1.5em; }@media screen and (min-width: 500px) {.drawer-toggle:not(.persistent) {display: none; } }[type="checkbox"].drawer {height: 1px;width: 1px;margin: -1px;overflow: hidden;position: absolute;clip: rect(0 0 0 0);-webkit-clip-path: inset(100%);clip-path: inset(100%); }[type="checkbox"].drawer + * {display: block;box-sizing: border-box;position: fixed;top: 0;width: 320px;height: 100vh;overflow-y: auto;background: var(--drawer-back-color);border: 0.0714285714rem solid var(--drawer-border-color);border-radius: 0;margin: 0;z-index: 1110;right: -320px;transition: right 0.3s; }[type="checkbox"].drawer + * .drawer-close {position: absolute;top: var(--universal-margin);right: var(--universal-margin);z-index: 1111;width: 2rem;height: 2rem;border-radius: var(--universal-border-radius);padding: var(--universal-padding);margin: 0;cursor: pointer;transition: background 0.3s; }[type="checkbox"].drawer + * .drawer-close:before {display: block;content: '\00D7';color: var(--drawer-close-color);position: relative;font-family: sans-serif;font-size: 2rem;line-height: 1;text-align: center; }[type="checkbox"].drawer + * .drawer-close:hover, [type="checkbox"].drawer + * .drawer-close:focus {background: var(--drawer-hover-back-color); }@media screen and (max-width: 320px) {[type="checkbox"].drawer + * {width: 100%; } }[type="checkbox"].drawer:checked + * {right: 0; }@media screen and (min-width: 500px) {[type="checkbox"].drawer:not(.persistent) + * {position: static;height: 100%;z-index: 1100; }[type="checkbox"].drawer:not(.persistent) + * .drawer-close {display: none; } }:root {--table-border-color: #03234b;--table-border-separator-color: #03234b;--table-head-back-color: #03234b;--table-head-fore-color: #ffffff;--table-body-back-color: #ffffff;--table-body-fore-color: #03234b;--table-body-alt-back-color: #f4f4f4; }table {border-collapse: separate;border-spacing: 0;margin: 0;display: flex;flex: 0 1 auto;flex-flow: row wrap;padding: var(--universal-padding);padding-top: 0; }table caption {font-size: 1rem;margin: calc(2 * var(--universal-margin)) 0;max-width: 100%;flex: 0 0 100%; }table thead, table tbody {display: flex;flex-flow: row wrap;border: 0.0714285714rem solid var(--table-border-color); }table thead {z-index: 999;border-radius: var(--universal-border-radius) var(--universal-border-radius) 0 0;border-bottom: 0.0714285714rem solid var(--table-border-separator-color); }table tbody {border-top: 0;margin-top: calc(0 - var(--universal-margin));border-radius: 0 0 var(--universal-border-radius) var(--universal-border-radius); }table tr {display: flex;padding: 0; }table th, table td {padding: calc(0.5 * var(--universal-padding));font-size: 0.9rem; }table th {text-align: left;background: var(--table-head-back-color);color: var(--table-head-fore-color); }table td {background: var(--table-body-back-color);color: var(--table-body-fore-color);border-top: 0.0714285714rem solid var(--table-border-color); }table:not(.horizontal) {overflow: auto;max-height: 100%; }table:not(.horizontal) thead, table:not(.horizontal) tbody {max-width: 100%;flex: 0 0 100%; }table:not(.horizontal) tr {flex-flow: row wrap;flex: 0 0 100%; }table:not(.horizontal) th, table:not(.horizontal) td {flex: 1 0 0%;overflow: hidden;text-overflow: ellipsis; }table:not(.horizontal) thead {position: sticky;top: 0; }table:not(.horizontal) tbody tr:first-child td {border-top: 0; }table.horizontal {border: 0; }table.horizontal thead, table.horizontal tbody {border: 0;flex: .2 0 0;flex-flow: row nowrap; }table.horizontal tbody {overflow: auto;justify-content: space-between;flex: .8 0 0;margin-left: 0;padding-bottom: calc(var(--universal-padding) / 4); }table.horizontal tr {flex-direction: column;flex: 1 0 auto; }table.horizontal th, table.horizontal td {width: auto;border: 0;border-bottom: 0.0714285714rem solid var(--table-border-color); }table.horizontal th:not(:first-child), table.horizontal td:not(:first-child) {border-top: 0; }table.horizontal th {text-align: right;border-left: 0.0714285714rem solid var(--table-border-color);border-right: 0.0714285714rem solid var(--table-border-separator-color); }table.horizontal thead tr:first-child {padding-left: 0; }table.horizontal th:first-child, table.horizontal td:first-child {border-top: 0.0714285714rem solid var(--table-border-color); }table.horizontal tbody tr:last-child td {border-right: 0.0714285714rem solid var(--table-border-color); }table.horizontal tbody tr:last-child td:first-child {border-top-right-radius: 0.25rem; }table.horizontal tbody tr:last-child td:last-child {border-bottom-right-radius: 0.25rem; }table.horizontal thead tr:first-child th:first-child {border-top-left-radius: 0.25rem; }table.horizontal thead tr:first-child th:last-child {border-bottom-left-radius: 0.25rem; }@media screen and (max-width: 499px) {table, table.horizontal {border-collapse: collapse;border: 0;width: 100%;display: table; }table thead, table th, table.horizontal thead, table.horizontal th {border: 0;height: 1px;width: 1px;margin: -1px;overflow: hidden;padding: 0;position: absolute;clip: rect(0 0 0 0);-webkit-clip-path: inset(100%);clip-path: inset(100%); }table tbody, table.horizontal tbody {border: 0;display: table-row-group; }table tr, table.horizontal tr {display: block;border: 0.0714285714rem solid var(--table-border-color);border-radius: var(--universal-border-radius);background: #ffffff;padding: var(--universal-padding);margin: var(--universal-margin);margin-bottom: calc(1 * var(--universal-margin)); }table th, table td, table.horizontal th, table.horizontal td {width: auto; }table td, table.horizontal td {display: block;border: 0;text-align: right; }table td:before, table.horizontal td:before {content: attr(data-label);float: left;font-weight: 600; }table th:first-child, table td:first-child, table.horizontal th:first-child, table.horizontal td:first-child {border-top: 0; }table tbody tr:last-child td, table.horizontal tbody tr:last-child td {border-right: 0; } }table tr:nth-of-type(2n) > td {background: var(--table-body-alt-back-color); }@media screen and (max-width: 500px) {table tr:nth-of-type(2n) {background: var(--table-body-alt-back-color); } }:root {--table-body-hover-back-color: #90caf9; }table.hoverable tr:hover, table.hoverable tr:hover > td, table.hoverable tr:focus, table.hoverable tr:focus > td {background: var(--table-body-hover-back-color); }@media screen and (max-width: 500px) {table.hoverable tr:hover, table.hoverable tr:hover > td, table.hoverable tr:focus, table.hoverable tr:focus > td {background: var(--table-body-hover-back-color); } }:root {--mark-back-color: #3cb4e6;--mark-fore-color: #ffffff; }mark {background: var(--mark-back-color);color: var(--mark-fore-color);font-size: 0.95em;line-height: 1em;border-radius: var(--universal-border-radius);padding: calc(var(--universal-padding) / 4) var(--universal-padding); }mark.inline-block {display: inline-block;font-size: 1em;line-height: 1.4;padding: calc(var(--universal-padding) / 2) var(--universal-padding); }:root {--toast-back-color: #424242;--toast-fore-color: #fafafa; }.toast {position: fixed;bottom: calc(var(--universal-margin) * 3);left: 50%;transform: translate(-50%, -50%);z-index: 1111;color: var(--toast-fore-color);background: var(--toast-back-color);border-radius: calc(var(--universal-border-radius) * 16);padding: var(--universal-padding) calc(var(--universal-padding) * 3); }:root {--tooltip-back-color: #212121;--tooltip-fore-color: #fafafa; }.tooltip {position: relative;display: inline-block; }.tooltip:before, .tooltip:after {position: absolute;opacity: 0;clip: rect(0 0 0 0);-webkit-clip-path: inset(100%);clip-path: inset(100%);transition: all 0.3s;z-index: 1010;left: 50%; }.tooltip:not(.bottom):before, .tooltip:not(.bottom):after {bottom: 75%; }.tooltip.bottom:before, .tooltip.bottom:after {top: 75%; }.tooltip:hover:before, .tooltip:hover:after, .tooltip:focus:before, .tooltip:focus:after {opacity: 1;clip: auto;-webkit-clip-path: inset(0%);clip-path: inset(0%); }.tooltip:before {content: '';background: transparent;border: var(--universal-margin) solid transparent;left: calc(50% - var(--universal-margin)); }.tooltip:not(.bottom):before {border-top-color: #212121; }.tooltip.bottom:before {border-bottom-color: #212121; }.tooltip:after {content: attr(aria-label);color: var(--tooltip-fore-color);background: var(--tooltip-back-color);border-radius: var(--universal-border-radius);padding: var(--universal-padding);white-space: nowrap;transform: translateX(-50%); }.tooltip:not(.bottom):after {margin-bottom: calc(2 * var(--universal-margin)); }.tooltip.bottom:after {margin-top: calc(2 * var(--universal-margin)); }:root {--modal-overlay-color: rgba(0, 0, 0, 0.45);--modal-close-color: #e6007e;--modal-close-hover-color: #ffe97f; }[type="checkbox"].modal {height: 1px;width: 1px;margin: -1px;overflow: hidden;position: absolute;clip: rect(0 0 0 0);-webkit-clip-path: inset(100%);clip-path: inset(100%); }[type="checkbox"].modal + div {position: fixed;top: 0;left: 0;display: none;width: 100vw;height: 100vh;background: var(--modal-overlay-color); }[type="checkbox"].modal + div .card {margin: 0 auto;max-height: 50vh;overflow: auto; }[type="checkbox"].modal + div .card .modal-close {position: absolute;top: 0;right: 0;width: 1.75rem;height: 1.75rem;border-radius: var(--universal-border-radius);padding: var(--universal-padding);margin: 0;cursor: pointer;transition: background 0.3s; }[type="checkbox"].modal + div .card .modal-close:before {display: block;content: '\00D7';color: var(--modal-close-color);position: relative;font-family: sans-serif;font-size: 1.75rem;line-height: 1;text-align: center; }[type="checkbox"].modal + div .card .modal-close:hover, [type="checkbox"].modal + div .card .modal-close:focus {background: var(--modal-close-hover-color); }[type="checkbox"].modal:checked + div {display: flex;flex: 0 1 auto;z-index: 1200; }[type="checkbox"].modal:checked + div .card .modal-close {z-index: 1211; }:root {--collapse-label-back-color: #03234b;--collapse-label-fore-color: #ffffff;--collapse-label-hover-back-color: #3cb4e6;--collapse-selected-label-back-color: #3cb4e6;--collapse-border-color: var(--collapse-label-back-color);--collapse-selected-border-color: #ceecf8;--collapse-content-back-color: #ffffff;--collapse-selected-label-border-color: #3cb4e6; }.collapse {width: calc(100% - 2 * var(--universal-margin));opacity: 1;display: flex;flex-direction: column;margin: var(--universal-margin);border-radius: var(--universal-border-radius); }.collapse > [type="radio"], .collapse > [type="checkbox"] {height: 1px;width: 1px;margin: -1px;overflow: hidden;position: absolute;clip: rect(0 0 0 0);-webkit-clip-path: inset(100%);clip-path: inset(100%); }.collapse > label {flex-grow: 1;display: inline-block;height: 1.25rem;cursor: pointer;transition: background 0.2s;color: var(--collapse-label-fore-color);background: var(--collapse-label-back-color);border: 0.0714285714rem solid var(--collapse-selected-border-color);padding: calc(1.25 * var(--universal-padding)); }.collapse > label:hover, .collapse > label:focus {background: var(--collapse-label-hover-back-color); }.collapse > label + div {flex-basis: auto;height: 1px;width: 1px;margin: -1px;overflow: hidden;position: absolute;clip: rect(0 0 0 0);-webkit-clip-path: inset(100%);clip-path: inset(100%);transition: max-height 0.3s;max-height: 1px; }.collapse > :checked + label {background: var(--collapse-selected-label-back-color);border-color: var(--collapse-selected-label-border-color); }.collapse > :checked + label + div {box-sizing: border-box;position: relative;width: 100%;height: auto;overflow: auto;margin: 0;background: var(--collapse-content-back-color);border: 0.0714285714rem solid var(--collapse-selected-border-color);border-top: 0;padding: var(--universal-padding);clip: auto;-webkit-clip-path: inset(0%);clip-path: inset(0%);max-height: 100%; }.collapse > label:not(:first-of-type) {border-top: 0; }.collapse > label:first-of-type {border-radius: var(--universal-border-radius) var(--universal-border-radius) 0 0; }.collapse > label:last-of-type:not(:first-of-type) {border-radius: 0 0 var(--universal-border-radius) var(--universal-border-radius); }.collapse > label:last-of-type:first-of-type {border-radius: var(--universal-border-radius); }.collapse > :checked:last-of-type:not(:first-of-type) + label {border-radius: 0; }.collapse > :checked:last-of-type + label + div {border-radius: 0 0 var(--universal-border-radius) var(--universal-border-radius); }mark.tertiary {--mark-back-color: #3cb4e6; }mark.tag {padding: calc(var(--universal-padding)/2) var(--universal-padding);border-radius: 1em; }:root {--progress-back-color: #3cb4e6;--progress-fore-color: #555; }progress {display: block;vertical-align: baseline;-webkit-appearance: none;-moz-appearance: none;appearance: none;height: 0.75rem;width: calc(100% - 2 * var(--universal-margin));margin: var(--universal-margin);border: 0;border-radius: calc(2 * var(--universal-border-radius));background: var(--progress-back-color);color: var(--progress-fore-color); }progress::-webkit-progress-value {background: var(--progress-fore-color);border-top-left-radius: calc(2 * var(--universal-border-radius));border-bottom-left-radius: calc(2 * var(--universal-border-radius)); }progress::-webkit-progress-bar {background: var(--progress-back-color); }progress::-moz-progress-bar {background: var(--progress-fore-color);border-top-left-radius: calc(2 * var(--universal-border-radius));border-bottom-left-radius: calc(2 * var(--universal-border-radius)); }progress[value="1000"]::-webkit-progress-value {border-radius: calc(2 * var(--universal-border-radius)); }progress[value="1000"]::-moz-progress-bar {border-radius: calc(2 * var(--universal-border-radius)); }progress.inline {display: inline-block;vertical-align: middle;width: 60%; }:root {--spinner-back-color: #ddd;--spinner-fore-color: #555; }@keyframes spinner-donut-anim {0% {transform: rotate(0deg); }100% {transform: rotate(360deg); } }.spinner {display: inline-block;margin: var(--universal-margin);border: 0.25rem solid var(--spinner-back-color);border-left: 0.25rem solid var(--spinner-fore-color);border-radius: 50%;width: 1.25rem;height: 1.25rem;animation: spinner-donut-anim 1.2s linear infinite; }progress.primary {--progress-fore-color: #1976d2; }progress.secondary {--progress-fore-color: #d32f2f; }progress.tertiary {--progress-fore-color: #308732; }.spinner.primary {--spinner-fore-color: #1976d2; }.spinner.secondary {--spinner-fore-color: #d32f2f; }.spinner.tertiary {--spinner-fore-color: #308732; }span[class^='icon-'] {display: inline-block;height: 1em;width: 1em;vertical-align: -0.125em;background-size: contain;margin: 0 calc(var(--universal-margin) / 4); }span[class^='icon-'].secondary {-webkit-filter: invert(25%);filter: invert(25%); }span[class^='icon-'].inverse {-webkit-filter: invert(100%);filter: invert(100%); }span.icon-alert {background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Ccircle cx='12' cy='12' r='10'%3E%3C/circle%3E%3Cline x1='12' y1='8' x2='12' y2='12'%3E%3C/line%3E%3Cline x1='12' y1='16' x2='12' y2='16'%3E%3C/line%3E%3C/svg%3E"); }span.icon-bookmark {background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Cpath d='M19 21l-7-5-7 5V5a2 2 0 0 1 2-2h10a2 2 0 0 1 2 2z'%3E%3C/path%3E%3C/svg%3E"); }span.icon-calendar {background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Crect x='3' y='4' width='18' height='18' rx='2' ry='2'%3E%3C/rect%3E%3Cline x1='16' y1='2' x2='16' y2='6'%3E%3C/line%3E%3Cline x1='8' y1='2' x2='8' y2='6'%3E%3C/line%3E%3Cline x1='3' y1='10' x2='21' y2='10'%3E%3C/line%3E%3C/svg%3E"); }span.icon-credit {background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Crect x='1' y='4' width='22' height='16' rx='2' ry='2'%3E%3C/rect%3E%3Cline x1='1' y1='10' x2='23' y2='10'%3E%3C/line%3E%3C/svg%3E"); }span.icon-edit {background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Cpath d='M20 14.66V20a2 2 0 0 1-2 2H4a2 2 0 0 1-2-2V6a2 2 0 0 1 2-2h5.34'%3E%3C/path%3E%3Cpolygon points='18 2 22 6 12 16 8 16 8 12 18 2'%3E%3C/polygon%3E%3C/svg%3E"); }span.icon-link {background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Cpath d='M18 13v6a2 2 0 0 1-2 2H5a2 2 0 0 1-2-2V8a2 2 0 0 1 2-2h6'%3E%3C/path%3E%3Cpolyline points='15 3 21 3 21 9'%3E%3C/polyline%3E%3Cline x1='10' y1='14' x2='21' y2='3'%3E%3C/line%3E%3C/svg%3E"); }span.icon-help {background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Cpath d='M9.09 9a3 3 0 0 1 5.83 1c0 2-3 3-3 3'%3E%3C/path%3E%3Ccircle cx='12' cy='12' r='10'%3E%3C/circle%3E%3Cline x1='12' y1='17' x2='12' y2='17'%3E%3C/line%3E%3C/svg%3E"); }span.icon-home {background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Cpath d='M3 9l9-7 9 7v11a2 2 0 0 1-2 2H5a2 2 0 0 1-2-2z'%3E%3C/path%3E%3Cpolyline points='9 22 9 12 15 12 15 22'%3E%3C/polyline%3E%3C/svg%3E"); }span.icon-info {background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Ccircle cx='12' cy='12' r='10'%3E%3C/circle%3E%3Cline x1='12' y1='16' x2='12' y2='12'%3E%3C/line%3E%3Cline x1='12' y1='8' x2='12' y2='8'%3E%3C/line%3E%3C/svg%3E"); }span.icon-lock {background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Crect x='3' y='11' width='18' height='11' rx='2' ry='2'%3E%3C/rect%3E%3Cpath d='M7 11V7a5 5 0 0 1 10 0v4'%3E%3C/path%3E%3C/svg%3E"); }span.icon-mail {background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Cpath d='M4 4h16c1.1 0 2 .9 2 2v12c0 1.1-.9 2-2 2H4c-1.1 0-2-.9-2-2V6c0-1.1.9-2 2-2z'%3E%3C/path%3E%3Cpolyline points='22,6 12,13 2,6'%3E%3C/polyline%3E%3C/svg%3E"); }span.icon-location {background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Cpath d='M21 10c0 7-9 13-9 13s-9-6-9-13a9 9 0 0 1 18 0z'%3E%3C/path%3E%3Ccircle cx='12' cy='10' r='3'%3E%3C/circle%3E%3C/svg%3E"); }span.icon-phone {background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Cpath d='M22 16.92v3a2 2 0 0 1-2.18 2 19.79 19.79 0 0 1-8.63-3.07 19.5 19.5 0 0 1-6-6 19.79 19.79 0 0 1-3.07-8.67A2 2 0 0 1 4.11 2h3a2 2 0 0 1 2 1.72 12.84 12.84 0 0 0 .7 2.81 2 2 0 0 1-.45 2.11L8.09 9.91a16 16 0 0 0 6 6l1.27-1.27a2 2 0 0 1 2.11-.45 12.84 12.84 0 0 0 2.81.7A2 2 0 0 1 22 16.92z'%3E%3C/path%3E%3C/svg%3E"); }span.icon-rss {background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Cpath d='M4 11a9 9 0 0 1 9 9'%3E%3C/path%3E%3Cpath d='M4 4a16 16 0 0 1 16 16'%3E%3C/path%3E%3Ccircle cx='5' cy='19' r='1'%3E%3C/circle%3E%3C/svg%3E"); }span.icon-search {background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Ccircle cx='11' cy='11' r='8'%3E%3C/circle%3E%3Cline x1='21' y1='21' x2='16.65' y2='16.65'%3E%3C/line%3E%3C/svg%3E"); }span.icon-settings {background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Ccircle cx='12' cy='12' r='3'%3E%3C/circle%3E%3Cpath d='M19.4 15a1.65 1.65 0 0 0 .33 1.82l.06.06a2 2 0 0 1 0 2.83 2 2 0 0 1-2.83 0l-.06-.06a1.65 1.65 0 0 0-1.82-.33 1.65 1.65 0 0 0-1 1.51V21a2 2 0 0 1-2 2 2 2 0 0 1-2-2v-.09A1.65 1.65 0 0 0 9 19.4a1.65 1.65 0 0 0-1.82.33l-.06.06a2 2 0 0 1-2.83 0 2 2 0 0 1 0-2.83l.06-.06a1.65 1.65 0 0 0 .33-1.82 1.65 1.65 0 0 0-1.51-1H3a2 2 0 0 1-2-2 2 2 0 0 1 2-2h.09A1.65 1.65 0 0 0 4.6 9a1.65 1.65 0 0 0-.33-1.82l-.06-.06a2 2 0 0 1 0-2.83 2 2 0 0 1 2.83 0l.06.06a1.65 1.65 0 0 0 1.82.33H9a1.65 1.65 0 0 0 1-1.51V3a2 2 0 0 1 2-2 2 2 0 0 1 2 2v.09a1.65 1.65 0 0 0 1 1.51 1.65 1.65 0 0 0 1.82-.33l.06-.06a2 2 0 0 1 2.83 0 2 2 0 0 1 0 2.83l-.06.06a1.65 1.65 0 0 0-.33 1.82V9a1.65 1.65 0 0 0 1.51 1H21a2 2 0 0 1 2 2 2 2 0 0 1-2 2h-.09a1.65 1.65 0 0 0-1.51 1z'%3E%3C/path%3E%3C/svg%3E"); }span.icon-share {background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Ccircle cx='18' cy='5' r='3'%3E%3C/circle%3E%3Ccircle cx='6' cy='12' r='3'%3E%3C/circle%3E%3Ccircle cx='18' cy='19' r='3'%3E%3C/circle%3E%3Cline x1='8.59' y1='13.51' x2='15.42' y2='17.49'%3E%3C/line%3E%3Cline x1='15.41' y1='6.51' x2='8.59' y2='10.49'%3E%3C/line%3E%3C/svg%3E"); }span.icon-cart {background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Ccircle cx='9' cy='21' r='1'%3E%3C/circle%3E%3Ccircle cx='20' cy='21' r='1'%3E%3C/circle%3E%3Cpath d='M1 1h4l2.68 13.39a2 2 0 0 0 2 1.61h9.72a2 2 0 0 0 2-1.61L23 6H6'%3E%3C/path%3E%3C/svg%3E"); }span.icon-upload {background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Cpath d='M21 15v4a2 2 0 0 1-2 2H5a2 2 0 0 1-2-2v-4'%3E%3C/path%3E%3Cpolyline points='17 8 12 3 7 8'%3E%3C/polyline%3E%3Cline x1='12' y1='3' x2='12' y2='15'%3E%3C/line%3E%3C/svg%3E"); }span.icon-user {background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Cpath d='M20 21v-2a4 4 0 0 0-4-4H8a4 4 0 0 0-4 4v2'%3E%3C/path%3E%3Ccircle cx='12' cy='7' r='4'%3E%3C/circle%3E%3C/svg%3E"); }:root {--generic-border-color: rgba(0, 0, 0, 0.3);--generic-box-shadow: 0 0.2857142857rem 0.2857142857rem 0 rgba(0, 0, 0, 0.125), 0 0.1428571429rem 0.1428571429rem -0.1428571429rem rgba(0, 0, 0, 0.125); }.hidden {display: none !important; }.visually-hidden {position: absolute !important;width: 1px !important;height: 1px !important;margin: -1px !important;border: 0 !important;padding: 0 !important;clip: rect(0 0 0 0) !important;-webkit-clip-path: inset(100%) !important;clip-path: inset(100%) !important;overflow: hidden !important; }.bordered {border: 0.0714285714rem solid var(--generic-border-color) !important; }.rounded {border-radius: var(--universal-border-radius) !important; }.circular {border-radius: 50% !important; }.shadowed {box-shadow: var(--generic-box-shadow) !important; }.responsive-margin {margin: calc(var(--universal-margin) / 4) !important; }@media screen and (min-width: 500px) {.responsive-margin {margin: calc(var(--universal-margin) / 2) !important; } }@media screen and (min-width: 1280px) {.responsive-margin {margin: var(--universal-margin) !important; } }.responsive-padding {padding: calc(var(--universal-padding) / 4) !important; }@media screen and (min-width: 500px) {.responsive-padding {padding: calc(var(--universal-padding) / 2) !important; } }@media screen and (min-width: 1280px) {.responsive-padding {padding: var(--universal-padding) !important; } }@media screen and (max-width: 499px) {.hidden-sm {display: none !important; } }@media screen and (min-width: 500px) and (max-width: 1279px) {.hidden-md {display: none !important; } }@media screen and (min-width: 1280px) {.hidden-lg {display: none !important; } }@media screen and (max-width: 499px) {.visually-hidden-sm {position: absolute !important;width: 1px !important;height: 1px !important;margin: -1px !important;border: 0 !important;padding: 0 !important;clip: rect(0 0 0 0) !important;-webkit-clip-path: inset(100%) !important;clip-path: inset(100%) !important;overflow: hidden !important; } }@media screen and (min-width: 500px) and (max-width: 1279px) {.visually-hidden-md {position: absolute !important;width: 1px !important;height: 1px !important;margin: -1px !important;border: 0 !important;padding: 0 !important;clip: rect(0 0 0 0) !important;-webkit-clip-path: inset(100%) !important;clip-path: inset(100%) !important;overflow: hidden !important; } }@media screen and (min-width: 1280px) {.visually-hidden-lg {position: absolute !important;width: 1px !important;height: 1px !important;margin: -1px !important;border: 0 !important;padding: 0 !important;clip: rect(0 0 0 0) !important;-webkit-clip-path: inset(100%) !important;clip-path: inset(100%) !important;overflow: hidden !important; } }img[alt="ST logo"] { display: block; margin: auto; width: 75%; max-width: 250px; min-width: 71px; }img[alt="Cube logo"] { float: right; width: 30%; max-width: 10rem; min-width: 8rem; padding-right: 1rem;}.figure {display: block;margin-left: auto;margin-right: auto;text-align: center;}</style>
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<center>
-<h1 id="release-notes-for-stm32f2xx-hal-drivers"><strong>Release Notes for STM32F2xx HAL Drivers</strong></h1>
+<h1 id="release-notes-forstm32f2xx-hal-drivers"><small>Release Notes for</small><mark>STM32F2xx HAL Drivers</mark></h1>
<p>Copyright © 2017 STMicroelectronics<br />
</p>
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+<a href="https://www.st.com" class="logo"><img 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AAAAAAAAAAAAAAAAAAAgApj7P8B7rljbw+FKrEAAAAASUVORK5CYII=" alt="ST logo" /></a>
</center>
-</div>
-</div>
-<h1 id="license"><strong>License</strong></h1>
-This software component is licensed by ST under BSD 3-Clause license, the “License”; You may not use this component except in compliance with the License. You may obtain a copy of the License at:
-<center>
-<a href="https://opensource.org/licenses/BSD-3-Clause">https://opensource.org/licenses/BSD-3-Clause</a>
-</center>
+<h1 id="purpose">Purpose</h1>
+<p>The STM32Cube HAL and LL, an STM32 abstraction layer embedded software, ensure maximized portability across STM32 portfolio.</p>
+<p>The portable APIs layer provides a generic, multi instanced and simple set of APIs to interact with the upper layer (application, libraries and stacks). It is composed of native and extended APIs set. It is directly built around a generic architecture and allows the build-upon layers, like the middleware layer, to implement its functions without knowing in-depth the used STM32 device. This improves the library code reusability and guarantees an easy portability on other devices and STM32 families.</p>
+<p>The Low Layer (LL) drivers are part of the STM32Cube firmware HAL that provides a basic set of optimized and one shot services. The Low layer drivers, contrary to the HAL ones are not fully portable across the STM32 families; the availability of some functions depends on the physical availability of the relative features on the product. The Low Layer (LL) drivers are designed to offer the following features:</p>
+<ul>
+<li>New set of inline functions for direct and atomic register access</li>
+<li>One-shot operations that can be used by the HAL drivers or from application level</li>
+<li>Full independence from HAL and standalone usage (without HAL drivers)</li>
+<li>Full features coverage of all the supported peripherals</li>
+</ul>
</div>
<div class="col-sm-12 col-lg-8">
<h1 id="update-history"><strong>Update History</strong></h1>
<div class="collapse">
-<input type="checkbox" id="collapse-section1_2_7" aria-hidden="true"> <label for="collapse-section1_2_7" aria-hidden="true"><strong>V1.2.7 / 21-May-2021</strong></label>
+<input type="checkbox" id="collapse-section1_2_8" checked aria-hidden="true"> <label for="collapse-section1_2_8" aria-hidden="true"><strong>V1.2.8 / 07-April-2023</strong></label>
<div>
<h2 id="main-changes">Main Changes</h2>
<ul>
-<li>General updates to fix known defects.</li>
+<li>General updates to fix known defects and enhancements implementation.</li>
+<li>HAL code quality enhancement for MISRA-C Rule-8.13 by adding const qualifiers.</li>
+<li>All source files: update disclaimer to add reference to the new license agreement.</li>
</ul>
<h2 id="contents">Contents</h2>
<ul>
+<li><strong>HAL Generic</strong> driver
+<ul>
+<li>Allow redefinition of macro UNUSED(x).</li>
+</ul></li>
+<li><strong>HAL GPIO</strong> driver
+<ul>
+<li>Reorder EXTI configuration sequence in order to avoid unexpected level detection.</li>
+</ul></li>
+<li><strong>HAL EXTI</strong> driver
+<ul>
+<li>Fix computation of pExtiConfig->GPIOSel in HAL_EXTI_GetConfigLine().</li>
+</ul></li>
+<li><strong>HAL ADC</strong> driver
+<ul>
+<li>Remove multiple volatile reads or writes in interrupt handler for better performance.</li>
+</ul></li>
+<li><strong>HAL DAC</strong> driver
+<ul>
+<li>Fix incorrect word ‘surcharged’ in functions headers.</li>
+</ul></li>
+<li><strong>HAL/LL TIM</strong> driver
+<ul>
+<li>Manage configuration of the Capture/compare DMA request source:
+<ul>
+<li>Add related new exported constants (TIM_CCDMAREQUEST_CC, TIM_CCDMAREQUEST_UPDATE).</li>
+<li>Create a new macro __HAL_TIM_SELECT_CCDMAREQUEST() allowing to program the TIMx_CR2.CCDS bitfield.</li>
+</ul></li>
+<li>Improved driver robustness against wrong period values.</li>
+<li>Improved driver robustness against wrong DMA related parameters.</li>
+<li>__LL_TIM_CALC_PSC() macro update to round up the evaluate value when the fractional part of the division is greater than 0.5.</li>
+<li>Removed lock management from callback management functions.</li>
+</ul></li>
+<li><strong>HAL RTC</strong> driver
+<ul>
+<li>Use bits definitions from CMSIS Device header file instead of hard-coded values.</li>
+<li>Wrap comments to be 80-character long and correct typos.</li>
+<li>Move constants RTC_IT_TAMP. from hal_rtc.h to hal_rtc_ex.h.</li>
+<li>Gather all instructions related to exiting the “init” mode into new function RTC_ExitInitMode().</li>
+<li>Rework functions HAL_RTCEx_SetTamper() and HAL_RTCEx_SetTamper_IT() to:
+<ul>
+<li>Write in TAFCR register in one single access instead of two.</li>
+<li>Avoid modifying user structure sTamper.</li>
+</ul></li>
+<li>Check if the RTC calendar has been previously initialized before entering initialization mode.</li>
+<li>Add a new API HAL_UARTEx_GetRxEventType that could be used to retrieve the type of event that has led the RxEventCallback execution.</li>
+<li>Remove macro __HAL_RTC_TAMPER_GET_IT() as it is redundant with macro __HAL_RTC_TAMPER_GET_FLAG() and create an alias into the hal_legacy.h file.</li>
+</ul></li>
+<li><strong>HAL UART</strong> driver
+<ul>
+<li>Handling of UART concurrent register access in case of race condition between Tx and Rx transfers.</li>
+<li>Improve header description of UART_WaitOnFlagUntilTimeout() function.</li>
+<li>Add a check on the UART parity before enabling the parity error interruption.</li>
+<li>Fix typo in UART_IT_TXE bit description.</li>
+<li>Removal of HAL_LOCK/HAL_UNLOCK calls in HAL UART Tx and Rx APIs.</li>
+<li>Remove __HAL_LOCK() from HAL_xxx_RegisterCallback()/HAL_xxx_UnRegisterCallback().</li>
+</ul></li>
+<li><strong>HAL SMARTCARD</strong> driver
+<ul>
+<li>Improve header description of SMARTCARD_WaitOnFlagUntilTimeout() function.</li>
+<li>Remove __HAL_LOCK() from HAL_xxx_RegisterCallback()/HAL_xxx_UnRegisterCallback().</li>
+</ul></li>
+<li><strong>HAL IRDA</strong> driver
+<ul>
+<li>Improve header description of IRDA_WaitOnFlagUntilTimeout() function.</li>
+<li>Add a check on the IRDA parity before enabling the parity error interrupt.</li>
+<li>Remove __HAL_LOCK() from HAL_xxx_RegisterCallback()/HAL_xxx_UnRegisterCallback().</li>
+</ul></li>
+<li><strong>HAL SDMMC</strong> driver
+<ul>
+<li>Take in account the voltage range in the CMD1 command.</li>
+<li>Add new LL function to have correct response for MMC driver.</li>
+<li>Update the driver to have all fields correctly initialized.</li>
+<li>Add a internal to manage the power class and call it before to update speed of bus width.</li>
+<li>Add new API to get the value of the Extended CSD register and populate the ExtCSD field of the MMC handle.</li>
+</ul></li>
+<li><strong>HAL/LL USART</strong> driver
+<ul>
+<li>Handle USART concurrent register accesses in case of race condition between Tx and Rx transfers.</li>
+<li>Improve header description of USART_WaitOnFlagUntilTimeout() function.</li>
+<li>Add a check on the USART parity before enabling the parity error interrupt.</li>
+<li>Remove __HAL_LOCK() from HAL_xxx_RegisterCallback()/HAL_xxx_UnRegisterCallback().</li>
+</ul></li>
+<li><strong>HAL CAN</strong> driver
+<ul>
+<li>Removal of never reached code.</li>
+<li>Improve protection against bad inputs.</li>
+</ul></li>
+<li><strong>HAL HASH</strong> driver
+<ul>
+<li>HAL code quality enhancement for MISRA-C2012 Rule-2.2_c.</li>
+</ul></li>
+<li><strong>HAL NOR</strong> driver
+<ul>
+<li>Enable write operations before effective write to NOR memory in HAL_NOR_Init() function to avoid HardFault.</li>
+<li>FMC_WRITE_OPERATION_DISABLE for NOR cause Hardfault for Read operations.</li>
+</ul></li>
+<li><strong>HAL SPI</strong> driver
+<ul>
+<li>Fix driver to don’t update state in case of error (HAL_SPI_STATE_READY will be set only in case of HAL_TIMEOUT).</li>
+</ul></li>
+<li><strong>HAL IWDG</strong> driver
+<ul>
+<li>Update comment describing the calculation of HAL_IWDG_DEFAULT_TIMEOUT macro.</li>
+</ul></li>
+<li><strong>HAL DMA</strong> driver
+<ul>
+<li>Manage the case of an invalid callback ID passed to the HAL_DMA_RegisterCallback() function.</li>
+</ul></li>
+<li><strong>HAL I2C</strong> driver
+<ul>
+<li>Update HAL_I2C_Mem_Write_DMA() and HAL_I2C_Mem_Read_DMA() APIs to add initialization for Devaddress, Memaddress and EventCount parameters.</li>
+<li>Update I2C_MasterReceive_RXNE() process to safely manage data N=2 and N=3, Disable BUF interrupt if nothing to do.</li>
+<li>Update HAL_I2C_Master_Transmit_IT to return HAL_BUSY instead of HAL_ERROR when timeout occur and I2C_FLAG_BUSY is SET.</li>
+<li>Clear ACK bit once 3 bytes to read remain to be able to send the NACK once the transfer ends.</li>
+<li>Duplicate the test condition after timeout detection to avoid false timeout detection.</li>
+</ul></li>
+<li><strong>HAL/LL USB</strong> driver
+<ul>
+<li>PCD: add handling of USB OUT Endpoint disable interrupt.</li>
+<li>PCD: fix device IN endpoint isoc incomplete transfer interrupt handling.</li>
+<li>PCD: fix USB device Isoc OUT Endpoint incomplete transfer interrupt handling.</li>
+<li>HCD: fix handling of ODDFRM bit in OTG_HCCHARx for Isochronous IN transactions.</li>
+<li>PCD: added fix to correct received transfer length with USB DMA activated.</li>
+<li>Fix added to USB_ClearInterrupts() and USB_HC_Halt() APIs.</li>
+<li>Remove useless software setting to setup the frame interval at 80%.</li>
+<li>Adding support of hub split transactions.</li>
+</ul></li>
+</ul>
+</div>
+</div>
+<div class="collapse">
+<input type="checkbox" id="collapse-section1_2_7" aria-hidden="true"> <label for="collapse-section1_2_7" aria-hidden="true"><strong>V1.2.7 / 21-May-2021</strong></label>
+<div>
+<h2 id="main-changes-1">Main Changes</h2>
+<ul>
+<li>General updates to fix known defects.</li>
+</ul>
+<h2 id="contents-1">Contents</h2>
+<ul>
<li><strong>HAL/LL ADC</strong> driver
<ul>
<li>Update timeout mechanism to avoid false timeout detection in case of preemption.</li>
+<li>Update HAL ADC driver to add include of the LL ADC driver.</li>
<li>Update LL_ADC_DeInit() API to clear missing SQR3 register.</li>
</ul></li>
<li><strong>HAL CAN</strong> driver
@@ -139,7 +283,6 @@
<li>Update HAL_I2C_Master_Transmit_IT(), HAL_I2C_Master_Receive_IT(), HAL_I2C_Master_Transmit_DMA() and HAL_I2C_Master_Receive_DMA() APIs to unlock the I2C peripheral before generating the start.</li>
</ul></li>
<li>Update to use the right macro to clear I2C ADDR flag inside I2C_Slave_ADDR() API as it’s indicated in the reference manual.</li>
-<li>Update HAL_I2C_EV_IRQHandler() and I2C_MasterTransmit_BTF() APIs to fix an issue where the transfer of the first few bytes to an I2C memory fails.</li>
</ul></li>
<li><strong>HAL RNG</strong> driver
<ul>
@@ -172,11 +315,11 @@
<div class="collapse">
<input type="checkbox" id="collapse-section13" aria-hidden="true"> <label for="collapse-section13" aria-hidden="true"><strong>V1.2.6 / 22-October-2020</strong></label>
<div>
-<h2 id="main-changes-1">Main Changes</h2>
+<h2 id="main-changes-2">Main Changes</h2>
<ul>
<li>General updates to fix known defects.</li>
</ul>
-<h2 id="contents-1">Contents</h2>
+<h2 id="contents-2">Contents</h2>
<ul>
<li><strong>HAL/LL I2C</strong> driver
<ul>
@@ -191,7 +334,7 @@
<div class="collapse">
<input type="checkbox" id="collapse-section12" aria-hidden="true"> <label for="collapse-section12" aria-hidden="true"><strong>V1.2.5 / 09-September-2020</strong></label>
<div>
-<h2 id="main-changes-2">Main Changes</h2>
+<h2 id="main-changes-3">Main Changes</h2>
<ul>
<li>General updates to fix known defects and enhancements implementation.</li>
<li><strong>HAL</strong> driver
@@ -453,7 +596,7 @@
<div class="collapse">
<input type="checkbox" id="collapse-section11" aria-hidden="true"> <label for="collapse-section11" aria-hidden="true"><strong>V1.2.4 / 31-December-2019</strong></label>
<div>
-<h2 id="main-changes-3">Main Changes</h2>
+<h2 id="main-changes-4">Main Changes</h2>
<ul>
<li>General updates to fix known defects and enhancements implementation</li>
<li><strong>HAL/LL GPIO</strong> update
@@ -519,7 +662,7 @@
<div class="collapse">
<input type="checkbox" id="collapse-section10" aria-hidden="true"> <label for="collapse-section10" aria-hidden="true"><strong>V1.2.3 / 26-June-2019</strong></label>
<div>
-<h2 id="main-changes-4">Main Changes</h2>
+<h2 id="main-changes-5">Main Changes</h2>
<ul>
<li>General updates to fix known defects and enhancements implementation</li>
<li>HAL drivers clean up: remove double casting ‘uint32_t’ and ‘U’</li>
@@ -882,7 +1025,7 @@
<div class="collapse">
<input type="checkbox" id="collapse-section9" aria-hidden="true"> <label for="collapse-section9" aria-hidden="true"><strong>V1.2.2 / 29-September-2017</strong></label>
<div>
-<h2 id="main-changes-5">Main Changes</h2>
+<h2 id="main-changes-6">Main Changes</h2>
<ul>
<li>General updates to fix known defects and enhancements implementation</li>
<li>Fix compilation warning with GCC compiler</li>
@@ -948,7 +1091,7 @@
<div class="collapse">
<input type="checkbox" id="collapse-section8" aria-hidden="true"> <label for="collapse-section8" aria-hidden="true"><strong>V1.2.1 / 14-April-2017</strong></label>
<div>
-<h2 id="main-changes-6">Main Changes</h2>
+<h2 id="main-changes-7">Main Changes</h2>
<ul>
<li>General updates to fix known defects and enhancements implementation</li>
<li><strong>HAL CONF Template</strong> update
@@ -969,7 +1112,7 @@
<div class="collapse">
<input type="checkbox" id="collapse-section7" aria-hidden="true"> <label for="collapse-section7" aria-hidden="true"><strong>V1.2.0 / 17-March-2017</strong></label>
<div>
-<h2 id="main-changes-7">Main Changes</h2>
+<h2 id="main-changes-8">Main Changes</h2>
<ul>
<li><strong>Add Low Layer drivers allowing performance and footprint optimization</strong>
<ul>
@@ -1087,7 +1230,7 @@
<div class="collapse">
<input type="checkbox" id="collapse-section6" aria-hidden="true"> <label for="collapse-section6" aria-hidden="true"><strong>V1.1.3 / 29-June-2016</strong></label>
<div>
-<h2 id="main-changes-8">Main Changes</h2>
+<h2 id="main-changes-9">Main Changes</h2>
<ul>
<li>General updates to fix known defects and enhancements implementation</li>
<li>Enhance HAL delay and time base implementation:
@@ -1441,7 +1584,7 @@
<div class="collapse">
<input type="checkbox" id="collapse-section5" aria-hidden="true"> <label for="collapse-section5" aria-hidden="true"><strong>V1.1.2 / 11-December-2015</strong></label>
<div>
-<h2 id="main-changes-9">Main Changes</h2>
+<h2 id="main-changes-10">Main Changes</h2>
<ul>
<li><strong>HAL RCC</strong> update
<ul>
@@ -1457,7 +1600,7 @@
<div class="collapse">
<input type="checkbox" id="collapse-section4" aria-hidden="true"> <label for="collapse-section4" aria-hidden="true"><strong>V1.1.1 / 20-November-2015</strong></label>
<div>
-<h2 id="main-changes-10">Main Changes</h2>
+<h2 id="main-changes-11">Main Changes</h2>
<ul>
<li>General updates to fix known defects and enhancements implementation</li>
<li><strong>One change done on the HAL CRYP requires an update on the application code based on HAL V1.1.0</strong>
@@ -1520,7 +1663,7 @@
<div class="collapse">
<input type="checkbox" id="collapse-section3" aria-hidden="true"> <label for="collapse-section3" aria-hidden="true"><strong>V1.1.0 / 09-October-2015</strong></label>
<div>
-<h2 id="main-changes-11">Main Changes</h2>
+<h2 id="main-changes-12">Main Changes</h2>
<ul>
<li><strong>Maintenance release to fix known defects and enhancements implementation</strong></li>
<li><strong>Macros and literals renaming to ensure compatibles across STM32 series</strong>, backward compatibility maintained thanks to new added file stm32_hal_legacy.h under /Inc/Legacy</li>
@@ -1758,7 +1901,7 @@
<li>PVD macros:
<ul>
<li>Remove the <strong>EXTILINE</strong> parameter</li>
-<li>Update to use prefix "__HAL_PWR_PVD_" instead of prefix "__HAL_PVD"</li>
+<li>Update to use prefix "__HAL_PWR_PVD_" instead of prefix "__HAL_PVD"</li>
</ul></li>
<li>Rename HAL_PWR_PVDConfig() function by HAL_PWR_ConfigPVD()</li>
</ul></li>
@@ -1912,7 +2055,7 @@
<li>In stm32f2xx_it.c file, UASRTx_IRQHandler() function: add a call to HAL_IRDA_IRQHandler() function</li>
</ul></li>
<li>IT transmit process; the code has been updated to avoid waiting on TC flag under IRDA ISR, IrDA TC interrupt is used instead. No impact on user application</li>
-<li>Rename Macros: add prefix "__HAL"
+<li>Rename Macros: add prefix "__HAL"
<ul>
<li>__IRDA_ENABLE() by __HAL_IRDA_ENABLE()</li>
<li>__IRDA_DISABLE() by __HAL_IRDA_DISABLE()</li>
@@ -2096,7 +2239,7 @@
<li><ul>
<li>Reading RTC current time locks the values in calendar shadow registers until Current date is read.</li>
</ul></li>
-<li>Rename literals: add prefix "__HAL"
+<li>Rename literals: add prefix "__HAL"
<ul>
<li>FORMAT_BIN by RTC_FORMAT_BIN</li>
<li>FORMAT_BCD by RTC_FORMAT_BCD</li>
@@ -2163,7 +2306,7 @@
<li>In stm32f2xx_it.c file, UASRTx_IRQHandler() function: add a call to HAL_SMARTCARD_IRQHandler() function</li>
</ul></li>
<li>IT transmit process; the code has been updated to avoid waiting on TC flag under SMARTCARD ISR, SMARTCARD TC interrupt is used instead. No impact on user application</li>
-<li>Rename macros: add prefix "__HAL"
+<li>Rename macros: add prefix "__HAL"
<ul>
<li>__SMARTCARD_ENABLE() by __HAL_SMARTCARD_ENABLE()</li>
<li>__SMARTCARD_DISABLE() by __HAL_SMARTCARD_DISABLE()</li>
@@ -2350,7 +2493,7 @@
<div class="collapse">
<input type="checkbox" id="collapse-section2" aria-hidden="true"> <label for="collapse-section2" aria-hidden="true"><strong>V1.0.1 / 25-March-2014</strong></label>
<div>
-<h2 id="main-changes-12">Main Changes</h2>
+<h2 id="main-changes-13">Main Changes</h2>
<ul>
<li>Patch release : moved macros related to RNG from hal_rcc_ex.h to hal_rcc.h as RNG is present in all versions of the STM32F2</li>
</ul>
@@ -2359,7 +2502,7 @@
<div class="collapse">
<input type="checkbox" id="collapse-section1" aria-hidden="true"> <label for="collapse-section1" aria-hidden="true"><strong>V1.0.0 / 07-March-2014</strong></label>
<div>
-<h2 id="main-changes-13">Main Changes</h2>
+<h2 id="main-changes-14">Main Changes</h2>
<ul>
<li>First official release</li>
</ul>
diff --git a/Src/Legacy/stm32f2xx_hal_can.c b/Src/Legacy/stm32f2xx_hal_can.c
index 82b5cc2..24c8c8b 100644
--- a/Src/Legacy/stm32f2xx_hal_can.c
+++ b/Src/Legacy/stm32f2xx_hal_can.c
@@ -12,7 +12,7 @@
******************************************************************************
* @attention
*
- * Copyright (c) 2017 STMicroelectronics.
+ * Copyright (c) 2016 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
@@ -88,6 +88,7 @@
(@) You can refer to the CAN Legacy HAL driver header file for more useful macros
@endverbatim
+
******************************************************************************
*/
diff --git a/Src/stm32f2xx_hal.c b/Src/stm32f2xx_hal.c
index 2265118..b3b93fe 100644
--- a/Src/stm32f2xx_hal.c
+++ b/Src/stm32f2xx_hal.c
@@ -50,11 +50,11 @@
* @{
*/
/**
- * @brief STM32F2xx HAL Driver version number V1.2.7
+ * @brief STM32F2xx HAL Driver version number
*/
#define __STM32F2xx_HAL_VERSION_MAIN 0x01U /*!< [31:24] main version */
#define __STM32F2xx_HAL_VERSION_SUB1 0x02U /*!< [23:16] sub1 version */
-#define __STM32F2xx_HAL_VERSION_SUB2 0x07U /*!< [15:8] sub2 version */
+#define __STM32F2xx_HAL_VERSION_SUB2 0x08U /*!< [15:8] sub2 version */
#define __STM32F2xx_HAL_VERSION_RC 0x00U /*!< [7:0] release candidate */
#define __STM32F2xx_HAL_VERSION ((__STM32F2xx_HAL_VERSION_MAIN << 24U)\
|(__STM32F2xx_HAL_VERSION_SUB1 << 16U)\
@@ -574,3 +574,5 @@
/**
* @}
*/
+
+
diff --git a/Src/stm32f2xx_hal_adc.c b/Src/stm32f2xx_hal_adc.c
index ce505b6..965c805 100644
--- a/Src/stm32f2xx_hal_adc.c
+++ b/Src/stm32f2xx_hal_adc.c
@@ -5,9 +5,9 @@
* @brief This file provides firmware functions to manage the following
* functionalities of the Analog to Digital Converter (ADC) peripheral:
* + Initialization and de-initialization functions
- * + IO operation functions
- * + State and errors functions
- *
+ * + Peripheral Control functions
+ * + Peripheral State functions
+ *
******************************************************************************
* @attention
*
@@ -174,11 +174,11 @@
The compilation flag USE_HAL_ADC_REGISTER_CALLBACKS, when set to 1,
allows the user to configure dynamically the driver callbacks.
- Use Functions @ref HAL_ADC_RegisterCallback()
+ Use Functions HAL_ADC_RegisterCallback()
to register an interrupt callback.
[..]
- Function @ref HAL_ADC_RegisterCallback() allows to register following callbacks:
+ Function HAL_ADC_RegisterCallback() allows to register following callbacks:
(+) ConvCpltCallback : ADC conversion complete callback
(+) ConvHalfCpltCallback : ADC conversion DMA half-transfer callback
(+) LevelOutOfWindowCallback : ADC analog watchdog 1 callback
@@ -194,11 +194,11 @@
and a pointer to the user callback function.
[..]
- Use function @ref HAL_ADC_UnRegisterCallback to reset a callback to the default
+ Use function HAL_ADC_UnRegisterCallback to reset a callback to the default
weak function.
[..]
- @ref HAL_ADC_UnRegisterCallback takes as parameters the HAL peripheral handle,
+ HAL_ADC_UnRegisterCallback takes as parameters the HAL peripheral handle,
and the Callback ID.
This function allows to reset following callbacks:
(+) ConvCpltCallback : ADC conversion complete callback
@@ -214,27 +214,27 @@
(+) MspDeInitCallback : ADC Msp DeInit callback
[..]
- By default, after the @ref HAL_ADC_Init() and when the state is @ref HAL_ADC_STATE_RESET
+ By default, after the HAL_ADC_Init() and when the state is HAL_ADC_STATE_RESET
all callbacks are set to the corresponding weak functions:
- examples @ref HAL_ADC_ConvCpltCallback(), @ref HAL_ADC_ErrorCallback().
+ examples HAL_ADC_ConvCpltCallback(), HAL_ADC_ErrorCallback().
Exception done for MspInit and MspDeInit functions that are
- reset to the legacy weak functions in the @ref HAL_ADC_Init()/ @ref HAL_ADC_DeInit() only when
+ reset to the legacy weak functions in the HAL_ADC_Init()/ HAL_ADC_DeInit() only when
these callbacks are null (not registered beforehand).
[..]
- If MspInit or MspDeInit are not null, the @ref HAL_ADC_Init()/ @ref HAL_ADC_DeInit()
+ If MspInit or MspDeInit are not null, the HAL_ADC_Init()/ HAL_ADC_DeInit()
keep and use the user MspInit/MspDeInit callbacks (registered beforehand) whatever the state.
[..]
- Callbacks can be registered/unregistered in @ref HAL_ADC_STATE_READY state only.
+ Callbacks can be registered/unregistered in HAL_ADC_STATE_READY state only.
Exception done MspInit/MspDeInit functions that can be registered/unregistered
- in @ref HAL_ADC_STATE_READY or @ref HAL_ADC_STATE_RESET state,
+ in HAL_ADC_STATE_READY or HAL_ADC_STATE_RESET state,
thus registered (user) MspInit/DeInit callbacks can be used during the Init/DeInit.
[..]
Then, the user first registers the MspInit/MspDeInit user callbacks
- using @ref HAL_ADC_RegisterCallback() before calling @ref HAL_ADC_DeInit()
- or @ref HAL_ADC_Init() function.
+ using HAL_ADC_RegisterCallback() before calling HAL_ADC_DeInit()
+ or HAL_ADC_Init() function.
[..]
When the compilation flag USE_HAL_ADC_REGISTER_CALLBACKS is set to 0 or
@@ -2022,3 +2022,4 @@
/**
* @}
*/
+
diff --git a/Src/stm32f2xx_hal_adc_ex.c b/Src/stm32f2xx_hal_adc_ex.c
index 0824a3f..7e30179 100644
--- a/Src/stm32f2xx_hal_adc_ex.c
+++ b/Src/stm32f2xx_hal_adc_ex.c
@@ -79,6 +79,7 @@
of data to be transferred at each end of conversion
(+) Read the ADCs converted values using the HAL_ADCEx_MultiModeGetValue() function.
+
@endverbatim
******************************************************************************
*/
@@ -1064,4 +1065,5 @@
/**
* @}
- */
+ */
+
diff --git a/Src/stm32f2xx_hal_can.c b/Src/stm32f2xx_hal_can.c
index 63a87f0..c43c873 100644
--- a/Src/stm32f2xx_hal_can.c
+++ b/Src/stm32f2xx_hal_can.c
@@ -142,9 +142,9 @@
The compilation define USE_HAL_CAN_REGISTER_CALLBACKS when set to 1
allows the user to configure dynamically the driver callbacks.
- Use Function @ref HAL_CAN_RegisterCallback() to register an interrupt callback.
+ Use Function HAL_CAN_RegisterCallback() to register an interrupt callback.
- Function @ref HAL_CAN_RegisterCallback() allows to register following callbacks:
+ Function HAL_CAN_RegisterCallback() allows to register following callbacks:
(+) TxMailbox0CompleteCallback : Tx Mailbox 0 Complete Callback.
(+) TxMailbox1CompleteCallback : Tx Mailbox 1 Complete Callback.
(+) TxMailbox2CompleteCallback : Tx Mailbox 2 Complete Callback.
@@ -163,9 +163,9 @@
This function takes as parameters the HAL peripheral handle, the Callback ID
and a pointer to the user callback function.
- Use function @ref HAL_CAN_UnRegisterCallback() to reset a callback to the default
+ Use function HAL_CAN_UnRegisterCallback() to reset a callback to the default
weak function.
- @ref HAL_CAN_UnRegisterCallback takes as parameters the HAL peripheral handle,
+ HAL_CAN_UnRegisterCallback takes as parameters the HAL peripheral handle,
and the Callback ID.
This function allows to reset following callbacks:
(+) TxMailbox0CompleteCallback : Tx Mailbox 0 Complete Callback.
@@ -184,13 +184,13 @@
(+) MspInitCallback : CAN MspInit.
(+) MspDeInitCallback : CAN MspDeInit.
- By default, after the @ref HAL_CAN_Init() and when the state is HAL_CAN_STATE_RESET,
+ By default, after the HAL_CAN_Init() and when the state is HAL_CAN_STATE_RESET,
all callbacks are set to the corresponding weak functions:
- example @ref HAL_CAN_ErrorCallback().
+ example HAL_CAN_ErrorCallback().
Exception done for MspInit and MspDeInit functions that are
- reset to the legacy weak function in the @ref HAL_CAN_Init()/ @ref HAL_CAN_DeInit() only when
+ reset to the legacy weak function in the HAL_CAN_Init()/ HAL_CAN_DeInit() only when
these callbacks are null (not registered beforehand).
- if not, MspInit or MspDeInit are not null, the @ref HAL_CAN_Init()/ @ref HAL_CAN_DeInit()
+ if not, MspInit or MspDeInit are not null, the HAL_CAN_Init()/ HAL_CAN_DeInit()
keep and use the user MspInit/MspDeInit callbacks (registered beforehand)
Callbacks can be registered/unregistered in HAL_CAN_STATE_READY state only.
@@ -198,8 +198,8 @@
in HAL_CAN_STATE_READY or HAL_CAN_STATE_RESET state,
thus registered (user) MspInit/DeInit callbacks can be used during the Init/DeInit.
In that case first register the MspInit/MspDeInit user callbacks
- using @ref HAL_CAN_RegisterCallback() before calling @ref HAL_CAN_DeInit()
- or @ref HAL_CAN_Init() function.
+ using HAL_CAN_RegisterCallback() before calling HAL_CAN_DeInit()
+ or HAL_CAN_Init() function.
When The compilation define USE_HAL_CAN_REGISTER_CALLBACKS is set to 0 or
not defined, the callback registration feature is not available and all callbacks
@@ -676,7 +676,7 @@
/**
* @brief Unregister a CAN CallBack.
- * CAN callabck is redirected to the weak predefined callback
+ * CAN callback is redirected to the weak predefined callback
* @param hcan pointer to a CAN_HandleTypeDef structure that contains
* the configuration information for CAN module
* @param CallbackID ID of the callback to be unregistered
@@ -1252,15 +1252,6 @@
/* Select an empty transmit mailbox */
transmitmailbox = (tsr & CAN_TSR_CODE) >> CAN_TSR_CODE_Pos;
- /* Check transmit mailbox value */
- if (transmitmailbox > 2U)
- {
- /* Update error code */
- hcan->ErrorCode |= HAL_CAN_ERROR_INTERNAL;
-
- return HAL_ERROR;
- }
-
/* Store the Tx mailbox */
*pTxMailbox = (uint32_t)1 << transmitmailbox;
@@ -1533,7 +1524,15 @@
hcan->Instance->sFIFOMailBox[RxFifo].RIR) >> CAN_RI0R_EXID_Pos;
}
pHeader->RTR = (CAN_RI0R_RTR & hcan->Instance->sFIFOMailBox[RxFifo].RIR);
- pHeader->DLC = (CAN_RDT0R_DLC & hcan->Instance->sFIFOMailBox[RxFifo].RDTR) >> CAN_RDT0R_DLC_Pos;
+ if (((CAN_RDT0R_DLC & hcan->Instance->sFIFOMailBox[RxFifo].RDTR) >> CAN_RDT0R_DLC_Pos) >= 8U)
+ {
+ /* Truncate DLC to 8 if received field is over range */
+ pHeader->DLC = 8U;
+ }
+ else
+ {
+ pHeader->DLC = (CAN_RDT0R_DLC & hcan->Instance->sFIFOMailBox[RxFifo].RDTR) >> CAN_RDT0R_DLC_Pos;
+ }
pHeader->FilterMatchIndex = (CAN_RDT0R_FMI & hcan->Instance->sFIFOMailBox[RxFifo].RDTR) >> CAN_RDT0R_FMI_Pos;
pHeader->Timestamp = (CAN_RDT0R_TIME & hcan->Instance->sFIFOMailBox[RxFifo].RDTR) >> CAN_RDT0R_TIME_Pos;
diff --git a/Src/stm32f2xx_hal_cortex.c b/Src/stm32f2xx_hal_cortex.c
index ea0305a..95398b6 100644
--- a/Src/stm32f2xx_hal_cortex.c
+++ b/Src/stm32f2xx_hal_cortex.c
@@ -501,3 +501,4 @@
/**
* @}
*/
+
diff --git a/Src/stm32f2xx_hal_crc.c b/Src/stm32f2xx_hal_crc.c
index cde91cd..af94e33 100644
--- a/Src/stm32f2xx_hal_crc.c
+++ b/Src/stm32f2xx_hal_crc.c
@@ -147,7 +147,7 @@
__HAL_CRC_DR_RESET(hcrc);
/* Reset IDR register content */
- CLEAR_BIT(hcrc->Instance->IDR, CRC_IDR_IDR);
+ __HAL_CRC_SET_IDR(hcrc, 0);
/* DeInit the low level hardware */
HAL_CRC_MspDeInit(hcrc);
@@ -303,7 +303,7 @@
* @param hcrc CRC handle
* @retval HAL state
*/
-HAL_CRC_StateTypeDef HAL_CRC_GetState(CRC_HandleTypeDef *hcrc)
+HAL_CRC_StateTypeDef HAL_CRC_GetState(const CRC_HandleTypeDef *hcrc)
{
/* Return CRC handle state */
return hcrc->State;
diff --git a/Src/stm32f2xx_hal_cryp.c b/Src/stm32f2xx_hal_cryp.c
index 7ce1d85..750eec6 100644
--- a/Src/stm32f2xx_hal_cryp.c
+++ b/Src/stm32f2xx_hal_cryp.c
@@ -70,7 +70,7 @@
the CRYP peripheral is configured and processes the buffer in input.
At second call, no need to Initialize the CRYP, user have to get current configuration via
HAL_CRYP_GetConfig() API, then only HAL_CRYP_SetConfig() is requested to set
- new parametres, finally user can start encryption/decryption.
+ new parameters, finally user can start encryption/decryption.
(#)Call HAL_CRYP_DeInit() to deinitialize the CRYP peripheral.
@@ -201,7 +201,7 @@
static void CRYP_DMAError(DMA_HandleTypeDef *hdma);
static void CRYP_SetKey( CRYP_HandleTypeDef *hcryp, uint32_t KeySize);
static void CRYP_AES_IT(CRYP_HandleTypeDef *hcryp);
-static void CRYP_AES_ProcessData(CRYP_HandleTypeDef *hcrypt, uint32_t Timeout);
+static void CRYP_AES_ProcessData(CRYP_HandleTypeDef *hcryp, uint32_t Timeout);
static HAL_StatusTypeDef CRYP_AES_Encrypt(CRYP_HandleTypeDef *hcryp, uint32_t Timeout);
static HAL_StatusTypeDef CRYP_AES_Decrypt(CRYP_HandleTypeDef *hcryp, uint32_t Timeout);
static HAL_StatusTypeDef CRYP_AES_Decrypt_IT(CRYP_HandleTypeDef *hcryp);
@@ -605,7 +605,7 @@
/**
* @brief Unregister an CRYP Callback
- * CRYP callabck is redirected to the weak predefined callback
+ * CRYP callback is redirected to the weak predefined callback
* @param hcryp cryp handle
* @param CallbackID ID of the callback to be unregistered
* This parameter can be one of the following values:
@@ -798,7 +798,7 @@
/* Set the phase */
hcryp->Phase = CRYP_PHASE_PROCESS;
- /* Statrt DES/TDES encryption process */
+ /* Start DES/TDES encryption process */
status = CRYP_TDES_Process(hcryp,Timeout);
break;
diff --git a/Src/stm32f2xx_hal_dac.c b/Src/stm32f2xx_hal_dac.c
index 4a453fd..a27cc29 100644
--- a/Src/stm32f2xx_hal_dac.c
+++ b/Src/stm32f2xx_hal_dac.c
@@ -10,6 +10,7 @@
* + Peripheral Control functions
* + Peripheral State and Errors functions
*
+ *
******************************************************************************
* @attention
*
@@ -111,9 +112,9 @@
A DMA request can be generated when an external trigger (but not a software trigger)
occurs if DMA1 requests are enabled using HAL_DAC_Start_DMA().
DMA1 requests are mapped as following:
- (#) DAC channel1 mapped on DMA1 Stream5 channel7 which must be
+ (#) DAC channel1 mapped on DMA1 Stream5 channel7 which must be
already configured
- (#) DAC channel2 mapped on DMA1 Stream6 channel7 which must be
+ (#) DAC channel2 mapped on DMA1 Stream6 channel7 which must be
already configured
[..]
@@ -164,7 +165,7 @@
The compilation define USE_HAL_DAC_REGISTER_CALLBACKS when set to 1
allows the user to configure dynamically the driver callbacks.
- Use Functions @ref HAL_DAC_RegisterCallback() to register a user callback,
+ Use Functions HAL_DAC_RegisterCallback() to register a user callback,
it allows to register following callbacks:
(+) ConvCpltCallbackCh1 : callback when a half transfer is completed on Ch1.
(+) ConvHalfCpltCallbackCh1 : callback when a transfer is completed on Ch1.
@@ -179,8 +180,8 @@
This function takes as parameters the HAL peripheral handle, the Callback ID
and a pointer to the user callback function.
- Use function @ref HAL_DAC_UnRegisterCallback() to reset a callback to the default
- weak (surcharged) function. It allows to reset following callbacks:
+ Use function HAL_DAC_UnRegisterCallback() to reset a callback to the default
+ weak (overridden) function. It allows to reset following callbacks:
(+) ConvCpltCallbackCh1 : callback when a half transfer is completed on Ch1.
(+) ConvHalfCpltCallbackCh1 : callback when a transfer is completed on Ch1.
(+) ErrorCallbackCh1 : callback when an error occurs on Ch1.
@@ -194,12 +195,12 @@
(+) All Callbacks
This function) takes as parameters the HAL peripheral handle and the Callback ID.
- By default, after the @ref HAL_DAC_Init and if the state is HAL_DAC_STATE_RESET
- all callbacks are reset to the corresponding legacy weak (surcharged) functions.
+ By default, after the HAL_DAC_Init and if the state is HAL_DAC_STATE_RESET
+ all callbacks are reset to the corresponding legacy weak (overridden) functions.
Exception done for MspInit and MspDeInit callbacks that are respectively
- reset to the legacy weak (surcharged) functions in the @ref HAL_DAC_Init
- and @ref HAL_DAC_DeInit only when these callbacks are null (not registered beforehand).
- If not, MspInit or MspDeInit are not null, the @ref HAL_DAC_Init and @ref HAL_DAC_DeInit
+ reset to the legacy weak (overridden) functions in the HAL_DAC_Init
+ and HAL_DAC_DeInit only when these callbacks are null (not registered beforehand).
+ If not, MspInit or MspDeInit are not null, the HAL_DAC_Init and HAL_DAC_DeInit
keep and use the user MspInit/MspDeInit callbacks (registered beforehand)
Callbacks can be registered/unregistered in READY state only.
@@ -207,12 +208,12 @@
in READY or RESET state, thus registered (user) MspInit/DeInit callbacks can be used
during the Init/DeInit.
In that case first register the MspInit/MspDeInit user callbacks
- using @ref HAL_DAC_RegisterCallback before calling @ref HAL_DAC_DeInit
- or @ref HAL_DAC_Init function.
+ using HAL_DAC_RegisterCallback before calling HAL_DAC_DeInit
+ or HAL_DAC_Init function.
When The compilation define USE_HAL_DAC_REGISTER_CALLBACKS is set to 0 or
not defined, the callback registering feature is not available
- and weak (surcharged) callbacks are used.
+ and weak (overridden) callbacks are used.
*** DAC HAL driver macros list ***
=============================================
@@ -227,7 +228,7 @@
[..]
(@) You can refer to the DAC HAL driver header file for more useful macros
- @endverbatim
+@endverbatim
******************************************************************************
*/
@@ -282,7 +283,7 @@
*/
HAL_StatusTypeDef HAL_DAC_Init(DAC_HandleTypeDef *hdac)
{
- /* Check DAC handle */
+ /* Check the DAC peripheral handle */
if (hdac == NULL)
{
return HAL_ERROR;
@@ -343,7 +344,7 @@
*/
HAL_StatusTypeDef HAL_DAC_DeInit(DAC_HandleTypeDef *hdac)
{
- /* Check DAC handle */
+ /* Check the DAC peripheral handle */
if (hdac == NULL)
{
return HAL_ERROR;
@@ -446,6 +447,12 @@
*/
HAL_StatusTypeDef HAL_DAC_Start(DAC_HandleTypeDef *hdac, uint32_t Channel)
{
+ /* Check the DAC peripheral handle */
+ if (hdac == NULL)
+ {
+ return HAL_ERROR;
+ }
+
/* Check the parameters */
assert_param(IS_DAC_CHANNEL(Channel));
@@ -501,6 +508,12 @@
*/
HAL_StatusTypeDef HAL_DAC_Stop(DAC_HandleTypeDef *hdac, uint32_t Channel)
{
+ /* Check the DAC peripheral handle */
+ if (hdac == NULL)
+ {
+ return HAL_ERROR;
+ }
+
/* Check the parameters */
assert_param(IS_DAC_CHANNEL(Channel));
@@ -531,11 +544,17 @@
* @arg DAC_ALIGN_12B_R: 12bit right data alignment selected
* @retval HAL status
*/
-HAL_StatusTypeDef HAL_DAC_Start_DMA(DAC_HandleTypeDef *hdac, uint32_t Channel, uint32_t *pData, uint32_t Length,
+HAL_StatusTypeDef HAL_DAC_Start_DMA(DAC_HandleTypeDef *hdac, uint32_t Channel, const uint32_t *pData, uint32_t Length,
uint32_t Alignment)
{
HAL_StatusTypeDef status;
- uint32_t tmpreg = 0U;
+ uint32_t tmpreg;
+
+ /* Check the DAC peripheral handle */
+ if (hdac == NULL)
+ {
+ return HAL_ERROR;
+ }
/* Check the parameters */
assert_param(IS_DAC_CHANNEL(Channel));
@@ -572,12 +591,10 @@
/* Get DHR12L1 address */
tmpreg = (uint32_t)&hdac->Instance->DHR12L1;
break;
- case DAC_ALIGN_8B_R:
+ default: /* case DAC_ALIGN_8B_R */
/* Get DHR8R1 address */
tmpreg = (uint32_t)&hdac->Instance->DHR8R1;
break;
- default:
- break;
}
}
@@ -606,17 +623,13 @@
/* Get DHR12L2 address */
tmpreg = (uint32_t)&hdac->Instance->DHR12L2;
break;
- case DAC_ALIGN_8B_R:
+ default: /* case DAC_ALIGN_8B_R */
/* Get DHR8R2 address */
tmpreg = (uint32_t)&hdac->Instance->DHR8R2;
break;
- default:
- break;
}
}
-
- /* Enable the DMA Stream */
if (Channel == DAC_CHANNEL_1)
{
/* Enable the DAC DMA underrun interrupt */
@@ -665,6 +678,12 @@
*/
HAL_StatusTypeDef HAL_DAC_Stop_DMA(DAC_HandleTypeDef *hdac, uint32_t Channel)
{
+ /* Check the DAC peripheral handle */
+ if (hdac == NULL)
+ {
+ return HAL_ERROR;
+ }
+
/* Check the parameters */
assert_param(IS_DAC_CHANNEL(Channel));
@@ -713,10 +732,13 @@
*/
void HAL_DAC_IRQHandler(DAC_HandleTypeDef *hdac)
{
- if (__HAL_DAC_GET_IT_SOURCE(hdac, DAC_IT_DMAUDR1))
+ uint32_t itsource = hdac->Instance->CR;
+ uint32_t itflag = hdac->Instance->SR;
+
+ if ((itsource & DAC_IT_DMAUDR1) == DAC_IT_DMAUDR1)
{
/* Check underrun flag of DAC channel 1 */
- if (__HAL_DAC_GET_FLAG(hdac, DAC_FLAG_DMAUDR1))
+ if ((itflag & DAC_FLAG_DMAUDR1) == DAC_FLAG_DMAUDR1)
{
/* Change DAC state to error state */
hdac->State = HAL_DAC_STATE_ERROR;
@@ -728,7 +750,7 @@
__HAL_DAC_CLEAR_FLAG(hdac, DAC_FLAG_DMAUDR1);
/* Disable the selected DAC channel1 DMA request */
- CLEAR_BIT(hdac->Instance->CR, DAC_CR_DMAEN1);
+ __HAL_DAC_DISABLE_IT(hdac, DAC_CR_DMAEN1);
/* Error callback */
#if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
@@ -740,10 +762,10 @@
}
- if (__HAL_DAC_GET_IT_SOURCE(hdac, DAC_IT_DMAUDR2))
+ if ((itsource & DAC_IT_DMAUDR2) == DAC_IT_DMAUDR2)
{
/* Check underrun flag of DAC channel 2 */
- if (__HAL_DAC_GET_FLAG(hdac, DAC_FLAG_DMAUDR2))
+ if ((itflag & DAC_FLAG_DMAUDR2) == DAC_FLAG_DMAUDR2)
{
/* Change DAC state to error state */
hdac->State = HAL_DAC_STATE_ERROR;
@@ -755,7 +777,7 @@
__HAL_DAC_CLEAR_FLAG(hdac, DAC_FLAG_DMAUDR2);
/* Disable the selected DAC channel2 DMA request */
- CLEAR_BIT(hdac->Instance->CR, DAC_CR_DMAEN2);
+ __HAL_DAC_DISABLE_IT(hdac, DAC_CR_DMAEN2);
/* Error callback */
#if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
@@ -788,6 +810,12 @@
{
__IO uint32_t tmp = 0UL;
+ /* Check the DAC peripheral handle */
+ if (hdac == NULL)
+ {
+ return HAL_ERROR;
+ }
+
/* Check the parameters */
assert_param(IS_DAC_CHANNEL(Channel));
assert_param(IS_DAC_ALIGN(Alignment));
@@ -905,10 +933,16 @@
* @arg DAC_CHANNEL_2: DAC Channel2 selected
* @retval The selected DAC channel data output value.
*/
-uint32_t HAL_DAC_GetValue(DAC_HandleTypeDef *hdac, uint32_t Channel)
+uint32_t HAL_DAC_GetValue(const DAC_HandleTypeDef *hdac, uint32_t Channel)
{
uint32_t result;
+ /* Check the DAC peripheral handle */
+ if (hdac == NULL)
+ {
+ return HAL_ERROR;
+ }
+
/* Check the parameters */
assert_param(IS_DAC_CHANNEL(Channel));
@@ -937,11 +971,19 @@
* @arg DAC_CHANNEL_2: DAC Channel2 selected
* @retval HAL status
*/
-HAL_StatusTypeDef HAL_DAC_ConfigChannel(DAC_HandleTypeDef *hdac, DAC_ChannelConfTypeDef *sConfig, uint32_t Channel)
+HAL_StatusTypeDef HAL_DAC_ConfigChannel(DAC_HandleTypeDef *hdac,
+ const DAC_ChannelConfTypeDef *sConfig, uint32_t Channel)
{
+ HAL_StatusTypeDef status = HAL_OK;
uint32_t tmpreg1;
uint32_t tmpreg2;
+ /* Check the DAC peripheral handle and channel configuration struct */
+ if ((hdac == NULL) || (sConfig == NULL))
+ {
+ return HAL_ERROR;
+ }
+
/* Check the DAC parameters */
assert_param(IS_DAC_TRIGGER(sConfig->DAC_Trigger));
assert_param(IS_DAC_OUTPUT_BUFFER_STATE(sConfig->DAC_OutputBuffer));
@@ -956,7 +998,8 @@
/* Get the DAC CR value */
tmpreg1 = hdac->Instance->CR;
/* Clear BOFFx, TENx, TSELx, WAVEx and MAMPx bits */
- tmpreg1 &= ~(((uint32_t)(DAC_CR_MAMP1 | DAC_CR_WAVE1 | DAC_CR_TSEL1 | DAC_CR_TEN1 | DAC_CR_BOFF1)) << (Channel & 0x10UL));
+ tmpreg1 &= ~(((uint32_t)(DAC_CR_MAMP1 | DAC_CR_WAVE1 | DAC_CR_TSEL1 | DAC_CR_TEN1 | DAC_CR_BOFF1))
+ << (Channel & 0x10UL));
/* Configure for the selected DAC channel: buffer output, trigger */
/* Set TSELx and TENx bits according to DAC_Trigger value */
/* Set BOFFx bit according to DAC_OutputBuffer value */
@@ -975,7 +1018,7 @@
__HAL_UNLOCK(hdac);
/* Return function status */
- return HAL_OK;
+ return status;
}
/**
@@ -1004,7 +1047,7 @@
* the configuration information for the specified DAC.
* @retval HAL state
*/
-HAL_DAC_StateTypeDef HAL_DAC_GetState(DAC_HandleTypeDef *hdac)
+HAL_DAC_StateTypeDef HAL_DAC_GetState(const DAC_HandleTypeDef *hdac)
{
/* Return DAC handle state */
return hdac->State;
@@ -1017,7 +1060,7 @@
* the configuration information for the specified DAC.
* @retval DAC Error Code
*/
-uint32_t HAL_DAC_GetError(DAC_HandleTypeDef *hdac)
+uint32_t HAL_DAC_GetError(const DAC_HandleTypeDef *hdac)
{
return hdac->ErrorCode;
}
@@ -1040,7 +1083,9 @@
#if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
/**
* @brief Register a User DAC Callback
- * To be used instead of the weak (surcharged) predefined callback
+ * To be used instead of the weak (overridden) predefined callback
+ * @note The HAL_DAC_RegisterCallback() may be called before HAL_DAC_Init() in HAL_DAC_STATE_RESET to register
+ * callbacks for HAL_DAC_MSPINIT_CB_ID and HAL_DAC_MSPDEINIT_CB_ID
* @param hdac DAC handle
* @param CallbackID ID of the callback to be registered
* This parameter can be one of the following values:
@@ -1064,6 +1109,12 @@
{
HAL_StatusTypeDef status = HAL_OK;
+ /* Check the DAC peripheral handle */
+ if (hdac == NULL)
+ {
+ return HAL_ERROR;
+ }
+
if (pCallback == NULL)
{
/* Update the error code */
@@ -1071,9 +1122,6 @@
return HAL_ERROR;
}
- /* Process locked */
- __HAL_LOCK(hdac);
-
if (hdac->State == HAL_DAC_STATE_READY)
{
switch (CallbackID)
@@ -1144,14 +1192,14 @@
status = HAL_ERROR;
}
- /* Release Lock */
- __HAL_UNLOCK(hdac);
return status;
}
/**
* @brief Unregister a User DAC Callback
- * DAC Callback is redirected to the weak (surcharged) predefined callback
+ * DAC Callback is redirected to the weak (overridden) predefined callback
+ * @note The HAL_DAC_UnRegisterCallback() may be called before HAL_DAC_Init() in HAL_DAC_STATE_RESET to un-register
+ * callbacks for HAL_DAC_MSPINIT_CB_ID and HAL_DAC_MSPDEINIT_CB_ID
* @param hdac DAC handle
* @param CallbackID ID of the callback to be unregistered
* This parameter can be one of the following values:
@@ -1172,8 +1220,11 @@
{
HAL_StatusTypeDef status = HAL_OK;
- /* Process locked */
- __HAL_LOCK(hdac);
+ /* Check the DAC peripheral handle */
+ if (hdac == NULL)
+ {
+ return HAL_ERROR;
+ }
if (hdac->State == HAL_DAC_STATE_READY)
{
@@ -1259,8 +1310,6 @@
status = HAL_ERROR;
}
- /* Release Lock */
- __HAL_UNLOCK(hdac);
return status;
}
#endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
@@ -1346,7 +1395,6 @@
#endif /* DAC */
#endif /* HAL_DAC_MODULE_ENABLED */
-
/**
* @}
*/
diff --git a/Src/stm32f2xx_hal_dac_ex.c b/Src/stm32f2xx_hal_dac_ex.c
index a433bfa..bc2c874 100644
--- a/Src/stm32f2xx_hal_dac_ex.c
+++ b/Src/stm32f2xx_hal_dac_ex.c
@@ -6,6 +6,7 @@
* This file provides firmware functions to manage the extended
* functionalities of the DAC peripheral.
*
+ *
******************************************************************************
* @attention
*
@@ -22,22 +23,13 @@
##### How to use this driver #####
==============================================================================
[..]
-
- *** Dual mode IO operation ***
- ==============================
- [..]
- (+) When Dual mode is enabled (i.e. DAC Channel1 and Channel2 are used simultaneously) :
- Use HAL_DACEx_DualGetValue() to get digital data to be converted and use
- HAL_DACEx_DualSetValue() to set digital value to converted simultaneously in
- Channel 1 and Channel 2.
-
*** Signal generation operation ***
===================================
[..]
(+) Use HAL_DACEx_TriangleWaveGenerate() to generate Triangle signal.
(+) Use HAL_DACEx_NoiseWaveGenerate() to generate Noise signal.
- @endverbatim
+ @endverbatim
******************************************************************************
*/
@@ -60,6 +52,7 @@
/* Private typedef -----------------------------------------------------------*/
/* Private define ------------------------------------------------------------*/
+
/* Private macro -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
/* Private function prototypes -----------------------------------------------*/
@@ -99,6 +92,12 @@
{
uint32_t tmp_swtrig = 0UL;
+ /* Check the DAC peripheral handle */
+ if (hdac == NULL)
+ {
+ return HAL_ERROR;
+ }
+
/* Process locked */
__HAL_LOCK(hdac);
@@ -140,6 +139,12 @@
*/
HAL_StatusTypeDef HAL_DACEx_DualStop(DAC_HandleTypeDef *hdac)
{
+ /* Check the DAC peripheral handle */
+ if (hdac == NULL)
+ {
+ return HAL_ERROR;
+ }
+
/* Disable the Peripheral */
__HAL_DAC_DISABLE(hdac, DAC_CHANNEL_1);
@@ -179,6 +184,12 @@
*/
HAL_StatusTypeDef HAL_DACEx_TriangleWaveGenerate(DAC_HandleTypeDef *hdac, uint32_t Channel, uint32_t Amplitude)
{
+ /* Check the DAC peripheral handle */
+ if (hdac == NULL)
+ {
+ return HAL_ERROR;
+ }
+
/* Check the parameters */
assert_param(IS_DAC_CHANNEL(Channel));
assert_param(IS_DAC_LFSR_UNMASK_TRIANGLE_AMPLITUDE(Amplitude));
@@ -229,6 +240,12 @@
*/
HAL_StatusTypeDef HAL_DACEx_NoiseWaveGenerate(DAC_HandleTypeDef *hdac, uint32_t Channel, uint32_t Amplitude)
{
+ /* Check the DAC peripheral handle */
+ if (hdac == NULL)
+ {
+ return HAL_ERROR;
+ }
+
/* Check the parameters */
assert_param(IS_DAC_CHANNEL(Channel));
assert_param(IS_DAC_LFSR_UNMASK_TRIANGLE_AMPLITUDE(Amplitude));
@@ -274,6 +291,12 @@
uint32_t data;
uint32_t tmp;
+ /* Check the DAC peripheral handle */
+ if (hdac == NULL)
+ {
+ return HAL_ERROR;
+ }
+
/* Check the parameters */
assert_param(IS_DAC_ALIGN(Alignment));
assert_param(IS_DAC_DATA(Data1));
@@ -390,7 +413,7 @@
* the configuration information for the specified DAC.
* @retval The selected DAC channel data output value.
*/
-uint32_t HAL_DACEx_DualGetValue(DAC_HandleTypeDef *hdac)
+uint32_t HAL_DACEx_DualGetValue(const DAC_HandleTypeDef *hdac)
{
uint32_t tmp = 0UL;
diff --git a/Src/stm32f2xx_hal_dcmi.c b/Src/stm32f2xx_hal_dcmi.c
index cb664c0..98c70f4 100644
--- a/Src/stm32f2xx_hal_dcmi.c
+++ b/Src/stm32f2xx_hal_dcmi.c
@@ -10,17 +10,6 @@
* + Peripheral Control functions
* + Peripheral State and Error functions
*
- ******************************************************************************
- * @attention
- *
- * Copyright (c) 2016 STMicroelectronics.
- * All rights reserved.
- *
- * This software is licensed under terms that can be found in the LICENSE file
- * in the root directory of this software component.
- * If no LICENSE file comes with this software, it is provided AS-IS.
- *
- ******************************************************************************
@verbatim
==============================================================================
##### How to use this driver #####
@@ -73,9 +62,9 @@
The compilation define USE_HAL_DCMI_REGISTER_CALLBACKS when set to 1
allows the user to configure dynamically the driver callbacks.
- Use functions @ref HAL_DCMI_RegisterCallback() to register a user callback.
+ Use functions HAL_DCMI_RegisterCallback() to register a user callback.
- Function @ref HAL_DCMI_RegisterCallback() allows to register following callbacks:
+ Function HAL_DCMI_RegisterCallback() allows to register following callbacks:
(+) FrameEventCallback : DCMI Frame Event.
(+) VsyncEventCallback : DCMI Vsync Event.
(+) LineEventCallback : DCMI Line Event.
@@ -85,9 +74,9 @@
This function takes as parameters the HAL peripheral handle, the callback ID
and a pointer to the user callback function.
- Use function @ref HAL_DCMI_UnRegisterCallback() to reset a callback to the default
+ Use function HAL_DCMI_UnRegisterCallback() to reset a callback to the default
weak (surcharged) function.
- @ref HAL_DCMI_UnRegisterCallback() takes as parameters the HAL peripheral handle,
+ HAL_DCMI_UnRegisterCallback() takes as parameters the HAL peripheral handle,
and the callback ID.
This function allows to reset following callbacks:
(+) FrameEventCallback : DCMI Frame Event.
@@ -97,13 +86,13 @@
(+) MspInitCallback : DCMI MspInit.
(+) MspDeInitCallback : DCMI MspDeInit.
- By default, after the @ref HAL_DCMI_Init and if the state is HAL_DCMI_STATE_RESET
+ By default, after the HAL_DCMI_Init and if the state is HAL_DCMI_STATE_RESET
all callbacks are reset to the corresponding legacy weak (surcharged) functions:
- examples @ref FrameEventCallback(), @ref HAL_DCMI_ErrorCallback().
+ examples FrameEventCallback(), HAL_DCMI_ErrorCallback().
Exception done for MspInit and MspDeInit callbacks that are respectively
- reset to the legacy weak (surcharged) functions in the @ref HAL_DCMI_Init
- and @ref HAL_DCMI_DeInit only when these callbacks are null (not registered beforehand).
- If not, MspInit or MspDeInit are not null, the @ref HAL_DCMI_Init and @ref HAL_DCMI_DeInit
+ reset to the legacy weak (surcharged) functions in the HAL_DCMI_Init
+ and HAL_DCMI_DeInit only when these callbacks are null (not registered beforehand).
+ If not, MspInit or MspDeInit are not null, the HAL_DCMI_Init and HAL_DCMI_DeInit
keep and use the user MspInit/MspDeInit callbacks (registered beforehand).
Callbacks can be registered/unregistered in READY state only.
@@ -111,8 +100,8 @@
in READY or RESET state, thus registered (user) MspInit/DeInit callbacks can be used
during the Init/DeInit.
In that case first register the MspInit/MspDeInit user callbacks
- using @ref HAL_DCMI_RegisterCallback before calling @ref HAL_DCMI_DeInit
- or @ref HAL_DCMI_Init function.
+ using HAL_DCMI_RegisterCallback before calling HAL_DCMI_DeInit
+ or HAL_DCMI_Init function.
When the compilation define USE_HAL_DCMI_REGISTER_CALLBACKS is set to 0 or
not defined, the callback registering feature is not available
@@ -120,6 +109,16 @@
@endverbatim
******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2016 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
@@ -1174,3 +1173,5 @@
/**
* @}
*/
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Src/stm32f2xx_hal_dcmi_ex.c b/Src/stm32f2xx_hal_dcmi_ex.c
index 9b6ce45..aa737d2 100644
--- a/Src/stm32f2xx_hal_dcmi_ex.c
+++ b/Src/stm32f2xx_hal_dcmi_ex.c
@@ -28,3 +28,6 @@
/* Private variables ---------------------------------------------------------*/
/* Private function prototypes -----------------------------------------------*/
/* Exported functions --------------------------------------------------------*/
+
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Src/stm32f2xx_hal_dma.c b/Src/stm32f2xx_hal_dma.c
index 6f086e3..7a8f941 100644
--- a/Src/stm32f2xx_hal_dma.c
+++ b/Src/stm32f2xx_hal_dma.c
@@ -16,8 +16,8 @@
* Copyright (c) 2016 STMicroelectronics.
* All rights reserved.
*
- * This software is licensed under terms that can be found in the LICENSE file
- * in the root directory of this software component.
+ * This software is licensed under terms that can be found in the LICENSE file in
+ * the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
@@ -964,7 +964,7 @@
* the configuration information for the specified DMA Stream.
* @param CallbackID User Callback identifier
* a DMA_HandleTypeDef structure as parameter.
- * @param pCallback pointer to private callbacsk function which has pointer to
+ * @param pCallback pointer to private callback function which has pointer to
* a DMA_HandleTypeDef structure as parameter.
* @retval HAL status
*/
@@ -1306,3 +1306,4 @@
/**
* @}
*/
+
diff --git a/Src/stm32f2xx_hal_dma_ex.c b/Src/stm32f2xx_hal_dma_ex.c
index fa5773e..7be32ea 100644
--- a/Src/stm32f2xx_hal_dma_ex.c
+++ b/Src/stm32f2xx_hal_dma_ex.c
@@ -13,8 +13,8 @@
* Copyright (c) 2016 STMicroelectronics.
* All rights reserved.
*
- * This software is licensed under terms that can be found in the LICENSE file
- * in the root directory of this software component.
+ * This software is licensed under terms that can be found in the LICENSE file in
+ * the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
@@ -311,3 +311,4 @@
/**
* @}
*/
+
diff --git a/Src/stm32f2xx_hal_eth.c b/Src/stm32f2xx_hal_eth.c
index e09d2fd..cda03f6 100644
--- a/Src/stm32f2xx_hal_eth.c
+++ b/Src/stm32f2xx_hal_eth.c
@@ -770,7 +770,7 @@
/**
* @brief Unregister an ETH Callback
- * ETH callabck is redirected to the weak predefined callback
+ * ETH callback is redirected to the weak predefined callback
* @param heth eth handle
* @param CallbackID ID of the callback to be unregistered
* This parameter can be one of the following values:
diff --git a/Src/stm32f2xx_hal_exti.c b/Src/stm32f2xx_hal_exti.c
index f7ebea9..87a2694 100644
--- a/Src/stm32f2xx_hal_exti.c
+++ b/Src/stm32f2xx_hal_exti.c
@@ -64,7 +64,7 @@
(++) Provide exiting handle as parameter.
(++) Provide pointer on EXTI_ConfigTypeDef structure as second parameter.
- (#) Clear Exti configuration of a dedicated line using HAL_EXTI_GetConfigLine().
+ (#) Clear Exti configuration of a dedicated line using HAL_EXTI_ClearConfigLine().
(++) Provide exiting handle as parameter.
(#) Register callback to treat Exti interrupts using HAL_EXTI_RegisterCallback().
@@ -75,7 +75,7 @@
(#) Get interrupt pending bit using HAL_EXTI_GetPending().
- (#) Clear interrupt pending bit using HAL_EXTI_GetPending().
+ (#) Clear interrupt pending bit using HAL_EXTI_ClearPending().
(#) Generate software interrupt using HAL_EXTI_GenerateSWI().
@@ -545,3 +545,4 @@
/**
* @}
*/
+
diff --git a/Src/stm32f2xx_hal_flash.c b/Src/stm32f2xx_hal_flash.c
index 2b96eb4..5f145a6 100644
--- a/Src/stm32f2xx_hal_flash.c
+++ b/Src/stm32f2xx_hal_flash.c
@@ -15,8 +15,8 @@
* Copyright (c) 2017 STMicroelectronics.
* All rights reserved.
*
- * This software is licensed under terms that can be found in the LICENSE file
- * in the root directory of this software component.
+ * This software is licensed under terms that can be found in the LICENSE file in
+ * the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
@@ -757,3 +757,4 @@
/**
* @}
*/
+
diff --git a/Src/stm32f2xx_hal_flash_ex.c b/Src/stm32f2xx_hal_flash_ex.c
index d080a92..3f0a8a7 100644
--- a/Src/stm32f2xx_hal_flash_ex.c
+++ b/Src/stm32f2xx_hal_flash_ex.c
@@ -13,8 +13,8 @@
* Copyright (c) 2017 STMicroelectronics.
* All rights reserved.
*
- * This software is licensed under terms that can be found in the LICENSE file
- * in the root directory of this software component.
+ * This software is licensed under terms that can be found in the LICENSE file in
+ * the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
@@ -693,3 +693,4 @@
/**
* @}
*/
+
diff --git a/Src/stm32f2xx_hal_gpio.c b/Src/stm32f2xx_hal_gpio.c
index 892206e..17d0d02 100644
--- a/Src/stm32f2xx_hal_gpio.c
+++ b/Src/stm32f2xx_hal_gpio.c
@@ -247,23 +247,6 @@
temp |= (GPIO_GET_INDEX(GPIOx) << (4u * (position & 0x03u)));
SYSCFG->EXTICR[position >> 2u] = temp;
- /* Clear EXTI line configuration */
- temp = EXTI->IMR;
- temp &= ~(iocurrent);
- if((GPIO_Init->Mode & EXTI_IT) != 0x00u)
- {
- temp |= iocurrent;
- }
- EXTI->IMR = temp;
-
- temp = EXTI->EMR;
- temp &= ~(iocurrent);
- if((GPIO_Init->Mode & EXTI_EVT) != 0x00u)
- {
- temp |= iocurrent;
- }
- EXTI->EMR = temp;
-
/* Clear Rising Falling edge configuration */
temp = EXTI->RTSR;
temp &= ~(iocurrent);
@@ -280,6 +263,23 @@
temp |= iocurrent;
}
EXTI->FTSR = temp;
+
+ temp = EXTI->EMR;
+ temp &= ~(iocurrent);
+ if((GPIO_Init->Mode & EXTI_EVT) != 0x00u)
+ {
+ temp |= iocurrent;
+ }
+ EXTI->EMR = temp;
+
+ /* Clear EXTI line configuration */
+ temp = EXTI->IMR;
+ temp &= ~(iocurrent);
+ if((GPIO_Init->Mode & EXTI_IT) != 0x00u)
+ {
+ temp |= iocurrent;
+ }
+ EXTI->IMR = temp;
}
}
@@ -324,8 +324,8 @@
EXTI->EMR &= ~((uint32_t)iocurrent);
/* Clear Rising Falling edge configuration */
- EXTI->RTSR &= ~((uint32_t)iocurrent);
EXTI->FTSR &= ~((uint32_t)iocurrent);
+ EXTI->RTSR &= ~((uint32_t)iocurrent);
/* Configure the External Interrupt or event for the current IO */
tmp = 0x0FuL << (4u * (position & 0x03u));
@@ -531,3 +531,4 @@
/**
* @}
*/
+
diff --git a/Src/stm32f2xx_hal_hash.c b/Src/stm32f2xx_hal_hash.c
index 1409b66..6a72b3d 100644
--- a/Src/stm32f2xx_hal_hash.c
+++ b/Src/stm32f2xx_hal_hash.c
@@ -15,7 +15,7 @@
******************************************************************************
* @attention
*
- * Copyright (c) 2017 STMicroelectronics.
+ * Copyright (c) 2016 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
@@ -154,9 +154,9 @@
[..]
(#) The compilation define USE_HAL_HASH_REGISTER_CALLBACKS when set to 1
allows the user to configure dynamically the driver callbacks.
- Use function @ref HAL_HASH_RegisterCallback() to register a user callback.
+ Use function HAL_HASH_RegisterCallback() to register a user callback.
- (#) Function @ref HAL_HASH_RegisterCallback() allows to register following callbacks:
+ (#) Function HAL_HASH_RegisterCallback() allows to register following callbacks:
(+) InCpltCallback : callback for input completion.
(+) DgstCpltCallback : callback for digest computation completion.
(+) ErrorCallback : callback for error.
@@ -165,9 +165,9 @@
This function takes as parameters the HAL peripheral handle, the Callback ID
and a pointer to the user callback function.
- (#) Use function @ref HAL_HASH_UnRegisterCallback() to reset a callback to the default
+ (#) Use function HAL_HASH_UnRegisterCallback() to reset a callback to the default
weak (surcharged) function.
- @ref HAL_HASH_UnRegisterCallback() takes as parameters the HAL peripheral handle,
+ HAL_HASH_UnRegisterCallback() takes as parameters the HAL peripheral handle,
and the Callback ID.
This function allows to reset following callbacks:
(+) InCpltCallback : callback for input completion.
@@ -176,13 +176,13 @@
(+) MspInitCallback : HASH MspInit.
(+) MspDeInitCallback : HASH MspDeInit.
- (#) By default, after the @ref HAL_HASH_Init and if the state is HAL_HASH_STATE_RESET
+ (#) By default, after the HAL_HASH_Init and if the state is HAL_HASH_STATE_RESET
all callbacks are reset to the corresponding legacy weak (surcharged) functions:
- examples @ref HAL_HASH_InCpltCallback(), @ref HAL_HASH_DgstCpltCallback()
+ examples HAL_HASH_InCpltCallback(), HAL_HASH_DgstCpltCallback()
Exception done for MspInit and MspDeInit callbacks that are respectively
- reset to the legacy weak (surcharged) functions in the @ref HAL_HASH_Init
- and @ref HAL_HASH_DeInit only when these callbacks are null (not registered beforehand)
- If not, MspInit or MspDeInit are not null, the @ref HAL_HASH_Init and @ref HAL_HASH_DeInit
+ reset to the legacy weak (surcharged) functions in the HAL_HASH_Init
+ and HAL_HASH_DeInit only when these callbacks are null (not registered beforehand)
+ If not, MspInit or MspDeInit are not null, the HAL_HASH_Init and HAL_HASH_DeInit
keep and use the user MspInit/MspDeInit callbacks (registered beforehand).
Callbacks can be registered/unregistered in READY state only.
@@ -190,8 +190,8 @@
in READY or RESET state, thus registered (user) MspInit/DeInit callbacks can be used
during the Init/DeInit.
In that case first register the MspInit/MspDeInit user callbacks
- using @ref HAL_HASH_RegisterCallback before calling @ref HAL_HASH_DeInit
- or @ref HAL_HASH_Init function.
+ using HAL_HASH_RegisterCallback before calling HAL_HASH_DeInit
+ or HAL_HASH_Init function.
When The compilation define USE_HAL_HASH_REGISTER_CALLBACKS is set to 0 or
not defined, the callback registering feature is not available
@@ -1621,7 +1621,7 @@
HASH_HandleTypeDef *hhash = (HASH_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
uint32_t inputaddr;
uint32_t buffersize;
- HAL_StatusTypeDef status = HAL_OK;
+ HAL_StatusTypeDef status;
if (hhash->State != HAL_HASH_STATE_SUSPENDED)
{
@@ -1724,8 +1724,6 @@
(((buffersize % 4U) != 0U) ? ((buffersize + (4U - (buffersize % 4U))) / 4U) : \
(buffersize / 4U)));
-
-
/* Enable DMA requests */
SET_BIT(HASH->CR, HASH_CR_DMAE);
@@ -2828,8 +2826,8 @@
Update HashInCount and pHashInBuffPtr accordingly. */
hhash->HashInCount = SizeVar;
hhash->pHashInBuffPtr = (uint8_t *)inputaddr;
- __HAL_HASH_SET_NBVALIDBITS(
- SizeVar); /* Update the configuration of the number of valid bits in last word of the message */
+ /* Update the configuration of the number of valid bits in last word of the message */
+ __HAL_HASH_SET_NBVALIDBITS(SizeVar);
hhash->pHashOutBuffPtr = pOutBuffer; /* Points at the computed digest */
if (initialization_skipped == 1U)
{
@@ -3365,6 +3363,7 @@
status = HAL_DMA_Start_IT(hhash->hdmain, inputaddr, (uint32_t)&HASH->DIN, \
(((inputSize % 4U) != 0U) ? ((inputSize + (4U - (inputSize % 4U))) / 4U) \
: (inputSize / 4U)));
+
/* Enable DMA requests */
SET_BIT(HASH->CR, HASH_CR_DMAE);
@@ -3399,3 +3398,4 @@
/**
* @}
*/
+
diff --git a/Src/stm32f2xx_hal_hcd.c b/Src/stm32f2xx_hal_hcd.c
index e4190c2..4760363 100644
--- a/Src/stm32f2xx_hal_hcd.c
+++ b/Src/stm32f2xx_hal_hcd.c
@@ -197,24 +197,22 @@
* This parameter can be a value from 0 to32K
* @retval HAL status
*/
-HAL_StatusTypeDef HAL_HCD_HC_Init(HCD_HandleTypeDef *hhcd,
- uint8_t ch_num,
- uint8_t epnum,
- uint8_t dev_address,
- uint8_t speed,
- uint8_t ep_type,
- uint16_t mps)
+HAL_StatusTypeDef HAL_HCD_HC_Init(HCD_HandleTypeDef *hhcd, uint8_t ch_num, uint8_t epnum,
+ uint8_t dev_address, uint8_t speed, uint8_t ep_type, uint16_t mps)
{
HAL_StatusTypeDef status;
+ uint32_t HostCoreSpeed;
+ uint32_t HCcharMps = mps;
__HAL_LOCK(hhcd);
hhcd->hc[ch_num].do_ping = 0U;
hhcd->hc[ch_num].dev_addr = dev_address;
- hhcd->hc[ch_num].max_packet = mps;
hhcd->hc[ch_num].ch_num = ch_num;
hhcd->hc[ch_num].ep_type = ep_type;
hhcd->hc[ch_num].ep_num = epnum & 0x7FU;
+ (void)HAL_HCD_HC_ClearHubInfo(hhcd, ch_num);
+
if ((epnum & 0x80U) == 0x80U)
{
hhcd->hc[ch_num].ep_is_in = 1U;
@@ -224,15 +222,27 @@
hhcd->hc[ch_num].ep_is_in = 0U;
}
- hhcd->hc[ch_num].speed = speed;
+ HostCoreSpeed = USB_GetHostSpeed(hhcd->Instance);
- status = USB_HC_Init(hhcd->Instance,
- ch_num,
- epnum,
- dev_address,
- speed,
- ep_type,
- mps);
+ if (ep_type == EP_TYPE_ISOC)
+ {
+ /* FS device plugged to HS HUB */
+ if ((speed == HCD_DEVICE_SPEED_FULL) && (HostCoreSpeed == HPRT0_PRTSPD_HIGH_SPEED))
+ {
+ if (HCcharMps > ISO_SPLT_MPS)
+ {
+ /* ISO Max Packet Size for Split mode */
+ HCcharMps = ISO_SPLT_MPS;
+ }
+ }
+ }
+
+ hhcd->hc[ch_num].speed = speed;
+ hhcd->hc[ch_num].max_packet = (uint16_t)HCcharMps;
+
+ status = USB_HC_Init(hhcd->Instance, ch_num, epnum,
+ dev_address, speed, ep_type, (uint16_t)HCcharMps);
+
__HAL_UNLOCK(hhcd);
return status;
@@ -250,7 +260,7 @@
HAL_StatusTypeDef status = HAL_OK;
__HAL_LOCK(hhcd);
- (void)USB_HC_Halt(hhcd->Instance, (uint8_t)ch_num);
+ (void)USB_HC_Halt(hhcd->Instance, ch_num);
__HAL_UNLOCK(hhcd);
return status;
@@ -389,24 +399,41 @@
switch (ep_type)
{
case EP_TYPE_CTRL:
- if ((token == 1U) && (direction == 0U)) /*send data */
+ if (token == 1U) /* send data */
{
- if (length == 0U)
+ if (direction == 0U)
{
- /* For Status OUT stage, Length==0, Status Out PID = 1 */
- hhcd->hc[ch_num].toggle_out = 1U;
- }
+ if (length == 0U)
+ {
+ /* For Status OUT stage, Length == 0U, Status Out PID = 1 */
+ hhcd->hc[ch_num].toggle_out = 1U;
+ }
- /* Set the Data Toggle bit as per the Flag */
- if (hhcd->hc[ch_num].toggle_out == 0U)
- {
- /* Put the PID 0 */
- hhcd->hc[ch_num].data_pid = HC_PID_DATA0;
+ /* Set the Data Toggle bit as per the Flag */
+ if (hhcd->hc[ch_num].toggle_out == 0U)
+ {
+ /* Put the PID 0 */
+ hhcd->hc[ch_num].data_pid = HC_PID_DATA0;
+ }
+ else
+ {
+ /* Put the PID 1 */
+ hhcd->hc[ch_num].data_pid = HC_PID_DATA1;
+ }
}
else
{
- /* Put the PID 1 */
- hhcd->hc[ch_num].data_pid = HC_PID_DATA1;
+ if (hhcd->hc[ch_num].do_ssplit == 1U)
+ {
+ if (hhcd->hc[ch_num].toggle_in == 0U)
+ {
+ hhcd->hc[ch_num].data_pid = HC_PID_DATA0;
+ }
+ else
+ {
+ hhcd->hc[ch_num].data_pid = HC_PID_DATA1;
+ }
+ }
}
}
break;
@@ -537,14 +564,22 @@
if ((USBx_HPRT0 & USB_OTG_HPRT_PCSTS) == 0U)
{
+ /* Flush USB Fifo */
+ (void)USB_FlushTxFifo(USBx, 0x10U);
+ (void)USB_FlushRxFifo(USBx);
+
+ if (hhcd->Init.phy_itface == USB_OTG_EMBEDDED_PHY)
+ {
+ /* Restore FS Clock */
+ (void)USB_InitFSLSPClkSel(hhcd->Instance, HCFG_48_MHZ);
+ }
+
/* Handle Host Port Disconnect Interrupt */
#if (USE_HAL_HCD_REGISTER_CALLBACKS == 1U)
hhcd->DisconnectCallback(hhcd);
#else
HAL_HCD_Disconnect_Callback(hhcd);
#endif /* USE_HAL_HCD_REGISTER_CALLBACKS */
-
- (void)USB_InitFSLSPClkSel(hhcd->Instance, HCFG_48_MHZ);
}
}
@@ -566,16 +601,6 @@
__HAL_HCD_CLEAR_FLAG(hhcd, USB_OTG_GINTSTS_SOF);
}
- /* Handle Rx Queue Level Interrupts */
- if ((__HAL_HCD_GET_FLAG(hhcd, USB_OTG_GINTSTS_RXFLVL)) != 0U)
- {
- USB_MASK_INTERRUPT(hhcd->Instance, USB_OTG_GINTSTS_RXFLVL);
-
- HCD_RXQLVL_IRQHandler(hhcd);
-
- USB_UNMASK_INTERRUPT(hhcd->Instance, USB_OTG_GINTSTS_RXFLVL);
- }
-
/* Handle Host channel Interrupt */
if (__HAL_HCD_GET_FLAG(hhcd, USB_OTG_GINTSTS_HCINT))
{
@@ -596,6 +621,16 @@
}
__HAL_HCD_CLEAR_FLAG(hhcd, USB_OTG_GINTSTS_HCINT);
}
+
+ /* Handle Rx Queue Level Interrupts */
+ if ((__HAL_HCD_GET_FLAG(hhcd, USB_OTG_GINTSTS_RXFLVL)) != 0U)
+ {
+ USB_MASK_INTERRUPT(hhcd->Instance, USB_OTG_GINTSTS_RXFLVL);
+
+ HCD_RXQLVL_IRQHandler(hhcd);
+
+ USB_UNMASK_INTERRUPT(hhcd->Instance, USB_OTG_GINTSTS_RXFLVL);
+ }
}
}
@@ -1079,7 +1114,7 @@
* @param hhcd HCD handle
* @retval HAL state
*/
-HCD_StateTypeDef HAL_HCD_GetState(HCD_HandleTypeDef *hhcd)
+HCD_StateTypeDef HAL_HCD_GetState(HCD_HandleTypeDef const *hhcd)
{
return hhcd->State;
}
@@ -1098,7 +1133,7 @@
* URB_ERROR/
* URB_STALL
*/
-HCD_URBStateTypeDef HAL_HCD_HC_GetURBState(HCD_HandleTypeDef *hhcd, uint8_t chnum)
+HCD_URBStateTypeDef HAL_HCD_HC_GetURBState(HCD_HandleTypeDef const *hhcd, uint8_t chnum)
{
return hhcd->hc[chnum].urb_state;
}
@@ -1111,7 +1146,7 @@
* This parameter can be a value from 1 to 15
* @retval last transfer size in byte
*/
-uint32_t HAL_HCD_HC_GetXferCount(HCD_HandleTypeDef *hhcd, uint8_t chnum)
+uint32_t HAL_HCD_HC_GetXferCount(HCD_HandleTypeDef const *hhcd, uint8_t chnum)
{
return hhcd->hc[chnum].xfer_count;
}
@@ -1133,7 +1168,7 @@
* HC_BBLERR/
* HC_DATATGLERR
*/
-HCD_HCStateTypeDef HAL_HCD_HC_GetState(HCD_HandleTypeDef *hhcd, uint8_t chnum)
+HCD_HCStateTypeDef HAL_HCD_HC_GetState(HCD_HandleTypeDef const *hhcd, uint8_t chnum)
{
return hhcd->hc[chnum].state;
}
@@ -1159,6 +1194,54 @@
}
/**
+ * @brief Set host channel Hub information.
+ * @param hhcd HCD handle
+ * @param ch_num Channel number.
+ * This parameter can be a value from 1 to 15
+ * @param addr Hub address
+ * @param PortNbr Hub port number
+ * @retval HAL status
+ */
+HAL_StatusTypeDef HAL_HCD_HC_SetHubInfo(HCD_HandleTypeDef *hhcd, uint8_t ch_num,
+ uint8_t addr, uint8_t PortNbr)
+{
+ uint32_t HostCoreSpeed = USB_GetHostSpeed(hhcd->Instance);
+
+ /* LS/FS device plugged to HS HUB */
+ if ((hhcd->hc[ch_num].speed != HCD_DEVICE_SPEED_HIGH) && (HostCoreSpeed == HPRT0_PRTSPD_HIGH_SPEED))
+ {
+ hhcd->hc[ch_num].do_ssplit = 1U;
+
+ if ((hhcd->hc[ch_num].ep_type == EP_TYPE_CTRL) && (hhcd->hc[ch_num].ep_is_in != 0U))
+ {
+ hhcd->hc[ch_num].toggle_in = 1U;
+ }
+ }
+
+ hhcd->hc[ch_num].hub_addr = addr;
+ hhcd->hc[ch_num].hub_port_nbr = PortNbr;
+
+ return HAL_OK;
+}
+
+
+/**
+ * @brief Clear host channel hub information.
+ * @param hhcd HCD handle
+ * @param ch_num Channel number.
+ * This parameter can be a value from 1 to 15
+ * @retval HAL status
+ */
+HAL_StatusTypeDef HAL_HCD_HC_ClearHubInfo(HCD_HandleTypeDef *hhcd, uint8_t ch_num)
+{
+ hhcd->hc[ch_num].do_ssplit = 0U;
+ hhcd->hc[ch_num].do_csplit = 0U;
+ hhcd->hc[ch_num].hub_addr = 0U;
+ hhcd->hc[ch_num].hub_port_nbr = 0U;
+
+ return HAL_OK;
+}
+/**
* @}
*/
@@ -1180,89 +1263,84 @@
{
USB_OTG_GlobalTypeDef *USBx = hhcd->Instance;
uint32_t USBx_BASE = (uint32_t)USBx;
- uint32_t ch_num = (uint32_t)chnum;
-
uint32_t tmpreg;
- if ((USBx_HC(ch_num)->HCINT & USB_OTG_HCINT_AHBERR) == USB_OTG_HCINT_AHBERR)
+ if (__HAL_HCD_GET_CH_FLAG(hhcd, chnum, USB_OTG_HCINT_AHBERR))
{
- __HAL_HCD_CLEAR_HC_INT(ch_num, USB_OTG_HCINT_AHBERR);
- __HAL_HCD_UNMASK_HALT_HC_INT(ch_num);
+ __HAL_HCD_CLEAR_HC_INT(chnum, USB_OTG_HCINT_AHBERR);
+ hhcd->hc[chnum].state = HC_XACTERR;
+ (void)USB_HC_Halt(hhcd->Instance, chnum);
}
- else if ((USBx_HC(ch_num)->HCINT & USB_OTG_HCINT_BBERR) == USB_OTG_HCINT_BBERR)
+ else if (__HAL_HCD_GET_CH_FLAG(hhcd, chnum, USB_OTG_HCINT_BBERR))
{
- __HAL_HCD_CLEAR_HC_INT(ch_num, USB_OTG_HCINT_BBERR);
- hhcd->hc[ch_num].state = HC_BBLERR;
- __HAL_HCD_UNMASK_HALT_HC_INT(ch_num);
- (void)USB_HC_Halt(hhcd->Instance, (uint8_t)ch_num);
+ __HAL_HCD_CLEAR_HC_INT(chnum, USB_OTG_HCINT_BBERR);
+ hhcd->hc[chnum].state = HC_BBLERR;
+ (void)USB_HC_Halt(hhcd->Instance, chnum);
}
- else if ((USBx_HC(ch_num)->HCINT & USB_OTG_HCINT_ACK) == USB_OTG_HCINT_ACK)
+ else if (__HAL_HCD_GET_CH_FLAG(hhcd, chnum, USB_OTG_HCINT_STALL))
{
- __HAL_HCD_CLEAR_HC_INT(ch_num, USB_OTG_HCINT_ACK);
+ __HAL_HCD_CLEAR_HC_INT(chnum, USB_OTG_HCINT_STALL);
+ hhcd->hc[chnum].state = HC_STALL;
+ (void)USB_HC_Halt(hhcd->Instance, chnum);
}
- else if ((USBx_HC(ch_num)->HCINT & USB_OTG_HCINT_STALL) == USB_OTG_HCINT_STALL)
+ else if (__HAL_HCD_GET_CH_FLAG(hhcd, chnum, USB_OTG_HCINT_DTERR))
{
- __HAL_HCD_UNMASK_HALT_HC_INT(ch_num);
- hhcd->hc[ch_num].state = HC_STALL;
- __HAL_HCD_CLEAR_HC_INT(ch_num, USB_OTG_HCINT_NAK);
- __HAL_HCD_CLEAR_HC_INT(ch_num, USB_OTG_HCINT_STALL);
- (void)USB_HC_Halt(hhcd->Instance, (uint8_t)ch_num);
+ __HAL_HCD_CLEAR_HC_INT(chnum, USB_OTG_HCINT_DTERR);
+ hhcd->hc[chnum].state = HC_DATATGLERR;
+ (void)USB_HC_Halt(hhcd->Instance, chnum);
}
- else if ((USBx_HC(ch_num)->HCINT & USB_OTG_HCINT_DTERR) == USB_OTG_HCINT_DTERR)
+ else if (__HAL_HCD_GET_CH_FLAG(hhcd, chnum, USB_OTG_HCINT_TXERR))
{
- __HAL_HCD_UNMASK_HALT_HC_INT(ch_num);
- hhcd->hc[ch_num].state = HC_DATATGLERR;
- __HAL_HCD_CLEAR_HC_INT(ch_num, USB_OTG_HCINT_NAK);
- __HAL_HCD_CLEAR_HC_INT(ch_num, USB_OTG_HCINT_DTERR);
- (void)USB_HC_Halt(hhcd->Instance, (uint8_t)ch_num);
- }
- else if ((USBx_HC(ch_num)->HCINT & USB_OTG_HCINT_TXERR) == USB_OTG_HCINT_TXERR)
- {
- __HAL_HCD_UNMASK_HALT_HC_INT(ch_num);
- hhcd->hc[ch_num].state = HC_XACTERR;
- (void)USB_HC_Halt(hhcd->Instance, (uint8_t)ch_num);
- __HAL_HCD_CLEAR_HC_INT(ch_num, USB_OTG_HCINT_TXERR);
+ __HAL_HCD_CLEAR_HC_INT(chnum, USB_OTG_HCINT_TXERR);
+ hhcd->hc[chnum].state = HC_XACTERR;
+ (void)USB_HC_Halt(hhcd->Instance, chnum);
}
else
{
/* ... */
}
- if ((USBx_HC(ch_num)->HCINT & USB_OTG_HCINT_FRMOR) == USB_OTG_HCINT_FRMOR)
+ if (__HAL_HCD_GET_CH_FLAG(hhcd, chnum, USB_OTG_HCINT_FRMOR))
{
- __HAL_HCD_UNMASK_HALT_HC_INT(ch_num);
- (void)USB_HC_Halt(hhcd->Instance, (uint8_t)ch_num);
- __HAL_HCD_CLEAR_HC_INT(ch_num, USB_OTG_HCINT_FRMOR);
+ (void)USB_HC_Halt(hhcd->Instance, chnum);
+ __HAL_HCD_CLEAR_HC_INT(chnum, USB_OTG_HCINT_FRMOR);
}
- else if ((USBx_HC(ch_num)->HCINT & USB_OTG_HCINT_XFRC) == USB_OTG_HCINT_XFRC)
+ else if (__HAL_HCD_GET_CH_FLAG(hhcd, chnum, USB_OTG_HCINT_XFRC))
{
+ /* Clear any pending ACK IT */
+ __HAL_HCD_CLEAR_HC_INT(chnum, USB_OTG_HCINT_ACK);
+
+ if (hhcd->hc[chnum].do_csplit == 1U)
+ {
+ hhcd->hc[chnum].do_csplit = 0U;
+ __HAL_HCD_CLEAR_HC_CSPLT(chnum);
+ }
+
if (hhcd->Init.dma_enable != 0U)
{
- hhcd->hc[ch_num].xfer_count = hhcd->hc[ch_num].XferSize - \
- (USBx_HC(ch_num)->HCTSIZ & USB_OTG_HCTSIZ_XFRSIZ);
+ hhcd->hc[chnum].xfer_count = hhcd->hc[chnum].XferSize - (USBx_HC(chnum)->HCTSIZ & USB_OTG_HCTSIZ_XFRSIZ);
}
- hhcd->hc[ch_num].state = HC_XFRC;
- hhcd->hc[ch_num].ErrCnt = 0U;
- __HAL_HCD_CLEAR_HC_INT(ch_num, USB_OTG_HCINT_XFRC);
+ hhcd->hc[chnum].state = HC_XFRC;
+ hhcd->hc[chnum].ErrCnt = 0U;
+ __HAL_HCD_CLEAR_HC_INT(chnum, USB_OTG_HCINT_XFRC);
- if ((hhcd->hc[ch_num].ep_type == EP_TYPE_CTRL) ||
- (hhcd->hc[ch_num].ep_type == EP_TYPE_BULK))
+ if ((hhcd->hc[chnum].ep_type == EP_TYPE_CTRL) ||
+ (hhcd->hc[chnum].ep_type == EP_TYPE_BULK))
{
- __HAL_HCD_UNMASK_HALT_HC_INT(ch_num);
- (void)USB_HC_Halt(hhcd->Instance, (uint8_t)ch_num);
- __HAL_HCD_CLEAR_HC_INT(ch_num, USB_OTG_HCINT_NAK);
+ (void)USB_HC_Halt(hhcd->Instance, chnum);
+ __HAL_HCD_CLEAR_HC_INT(chnum, USB_OTG_HCINT_NAK);
}
- else if ((hhcd->hc[ch_num].ep_type == EP_TYPE_INTR) ||
- (hhcd->hc[ch_num].ep_type == EP_TYPE_ISOC))
+ else if ((hhcd->hc[chnum].ep_type == EP_TYPE_INTR) ||
+ (hhcd->hc[chnum].ep_type == EP_TYPE_ISOC))
{
- USBx_HC(ch_num)->HCCHAR |= USB_OTG_HCCHAR_ODDFRM;
- hhcd->hc[ch_num].urb_state = URB_DONE;
+ USBx_HC(chnum)->HCCHAR |= USB_OTG_HCCHAR_ODDFRM;
+ hhcd->hc[chnum].urb_state = URB_DONE;
#if (USE_HAL_HCD_REGISTER_CALLBACKS == 1U)
- hhcd->HC_NotifyURBChangeCallback(hhcd, (uint8_t)ch_num, hhcd->hc[ch_num].urb_state);
+ hhcd->HC_NotifyURBChangeCallback(hhcd, chnum, hhcd->hc[chnum].urb_state);
#else
- HAL_HCD_HC_NotifyURBChange_Callback(hhcd, (uint8_t)ch_num, hhcd->hc[ch_num].urb_state);
+ HAL_HCD_HC_NotifyURBChange_Callback(hhcd, chnum, hhcd->hc[chnum].urb_state);
#endif /* USE_HAL_HCD_REGISTER_CALLBACKS */
}
else
@@ -1272,95 +1350,220 @@
if (hhcd->Init.dma_enable == 1U)
{
- if (((hhcd->hc[ch_num].XferSize / hhcd->hc[ch_num].max_packet) & 1U) != 0U)
+ if ((((hhcd->hc[chnum].xfer_count + hhcd->hc[chnum].max_packet - 1U) / hhcd->hc[chnum].max_packet) & 1U) != 0U)
{
- hhcd->hc[ch_num].toggle_in ^= 1U;
+ hhcd->hc[chnum].toggle_in ^= 1U;
}
}
else
{
- hhcd->hc[ch_num].toggle_in ^= 1U;
+ hhcd->hc[chnum].toggle_in ^= 1U;
}
}
- else if ((USBx_HC(ch_num)->HCINT & USB_OTG_HCINT_CHH) == USB_OTG_HCINT_CHH)
+ else if (__HAL_HCD_GET_CH_FLAG(hhcd, chnum, USB_OTG_HCINT_ACK))
{
- __HAL_HCD_MASK_HALT_HC_INT(ch_num);
+ __HAL_HCD_CLEAR_HC_INT(chnum, USB_OTG_HCINT_ACK);
- if (hhcd->hc[ch_num].state == HC_XFRC)
+ if (hhcd->hc[chnum].do_ssplit == 1U)
{
- hhcd->hc[ch_num].urb_state = URB_DONE;
+ hhcd->hc[chnum].do_csplit = 1U;
+ hhcd->hc[chnum].state = HC_ACK;
+
+ (void)USB_HC_Halt(hhcd->Instance, chnum);
}
- else if (hhcd->hc[ch_num].state == HC_STALL)
+ }
+ else if (__HAL_HCD_GET_CH_FLAG(hhcd, chnum, USB_OTG_HCINT_CHH))
+ {
+ __HAL_HCD_CLEAR_HC_INT(chnum, USB_OTG_HCINT_CHH);
+
+ if (hhcd->hc[chnum].state == HC_XFRC)
{
- hhcd->hc[ch_num].urb_state = URB_STALL;
+ hhcd->hc[chnum].state = HC_HALTED;
+ hhcd->hc[chnum].urb_state = URB_DONE;
}
- else if ((hhcd->hc[ch_num].state == HC_XACTERR) ||
- (hhcd->hc[ch_num].state == HC_DATATGLERR))
+ else if (hhcd->hc[chnum].state == HC_STALL)
{
- hhcd->hc[ch_num].ErrCnt++;
- if (hhcd->hc[ch_num].ErrCnt > 2U)
+ hhcd->hc[chnum].state = HC_HALTED;
+ hhcd->hc[chnum].urb_state = URB_STALL;
+ }
+ else if ((hhcd->hc[chnum].state == HC_XACTERR) ||
+ (hhcd->hc[chnum].state == HC_DATATGLERR))
+ {
+ hhcd->hc[chnum].state = HC_HALTED;
+ hhcd->hc[chnum].ErrCnt++;
+ if (hhcd->hc[chnum].ErrCnt > 2U)
{
- hhcd->hc[ch_num].ErrCnt = 0U;
- hhcd->hc[ch_num].urb_state = URB_ERROR;
+ hhcd->hc[chnum].ErrCnt = 0U;
+
+ if (hhcd->hc[chnum].do_ssplit == 1U)
+ {
+ hhcd->hc[chnum].do_csplit = 0U;
+ hhcd->hc[chnum].ep_ss_schedule = 0U;
+ __HAL_HCD_CLEAR_HC_CSPLT(chnum);
+ }
+
+ hhcd->hc[chnum].urb_state = URB_ERROR;
}
else
{
- hhcd->hc[ch_num].urb_state = URB_NOTREADY;
+ hhcd->hc[chnum].urb_state = URB_NOTREADY;
+ if ((hhcd->hc[chnum].ep_type == EP_TYPE_CTRL) ||
+ (hhcd->hc[chnum].ep_type == EP_TYPE_BULK))
+ {
+ /* re-activate the channel */
+ tmpreg = USBx_HC(chnum)->HCCHAR;
+ tmpreg &= ~USB_OTG_HCCHAR_CHDIS;
+ tmpreg |= USB_OTG_HCCHAR_CHENA;
+ USBx_HC(chnum)->HCCHAR = tmpreg;
+ }
+ }
+ }
+ else if (hhcd->hc[chnum].state == HC_NYET)
+ {
+ hhcd->hc[chnum].state = HC_HALTED;
+
+ if (hhcd->hc[chnum].do_csplit == 1U)
+ {
+ if (hhcd->hc[chnum].ep_type == EP_TYPE_INTR)
+ {
+ hhcd->hc[chnum].NyetErrCnt++;
+ if (hhcd->hc[chnum].NyetErrCnt > 2U)
+ {
+ hhcd->hc[chnum].NyetErrCnt = 0U;
+ hhcd->hc[chnum].do_csplit = 0U;
+
+ if (hhcd->hc[chnum].ErrCnt < 3U)
+ {
+ hhcd->hc[chnum].ep_ss_schedule = 1U;
+ }
+ __HAL_HCD_CLEAR_HC_CSPLT(chnum);
+ hhcd->hc[chnum].urb_state = URB_ERROR;
+ }
+ else
+ {
+ hhcd->hc[chnum].urb_state = URB_NOTREADY;
+ }
+ }
+ else
+ {
+ hhcd->hc[chnum].urb_state = URB_NOTREADY;
+ }
+
+ if ((hhcd->hc[chnum].ep_type == EP_TYPE_CTRL) ||
+ (hhcd->hc[chnum].ep_type == EP_TYPE_BULK))
+ {
+ /* re-activate the channel */
+ tmpreg = USBx_HC(chnum)->HCCHAR;
+ tmpreg &= ~USB_OTG_HCCHAR_CHDIS;
+ tmpreg |= USB_OTG_HCCHAR_CHENA;
+ USBx_HC(chnum)->HCCHAR = tmpreg;
+ }
+ }
+ }
+ else if (hhcd->hc[chnum].state == HC_ACK)
+ {
+ hhcd->hc[chnum].state = HC_HALTED;
+
+ if (hhcd->hc[chnum].do_csplit == 1U)
+ {
+ hhcd->hc[chnum].urb_state = URB_NOTREADY;
+
+ /* Set Complete split and re-activate the channel */
+ USBx_HC(chnum)->HCSPLT |= USB_OTG_HCSPLT_COMPLSPLT;
+ USBx_HC(chnum)->HCINTMSK |= USB_OTG_HCINTMSK_NYET;
+ USBx_HC(chnum)->HCINTMSK &= ~USB_OTG_HCINT_ACK;
+
+ if ((hhcd->hc[chnum].ep_type == EP_TYPE_CTRL) ||
+ (hhcd->hc[chnum].ep_type == EP_TYPE_BULK))
+ {
+ /* re-activate the channel */
+ tmpreg = USBx_HC(chnum)->HCCHAR;
+ tmpreg &= ~USB_OTG_HCCHAR_CHDIS;
+ tmpreg |= USB_OTG_HCCHAR_CHENA;
+ USBx_HC(chnum)->HCCHAR = tmpreg;
+ }
+ }
+ }
+ else if (hhcd->hc[chnum].state == HC_NAK)
+ {
+ hhcd->hc[chnum].state = HC_HALTED;
+ hhcd->hc[chnum].urb_state = URB_NOTREADY;
+
+ if ((hhcd->hc[chnum].ep_type == EP_TYPE_CTRL) ||
+ (hhcd->hc[chnum].ep_type == EP_TYPE_BULK))
+ {
/* re-activate the channel */
- tmpreg = USBx_HC(ch_num)->HCCHAR;
+ tmpreg = USBx_HC(chnum)->HCCHAR;
tmpreg &= ~USB_OTG_HCCHAR_CHDIS;
tmpreg |= USB_OTG_HCCHAR_CHENA;
- USBx_HC(ch_num)->HCCHAR = tmpreg;
+ USBx_HC(chnum)->HCCHAR = tmpreg;
}
}
- else if (hhcd->hc[ch_num].state == HC_NAK)
+ else if (hhcd->hc[chnum].state == HC_BBLERR)
{
- hhcd->hc[ch_num].urb_state = URB_NOTREADY;
-
- /* re-activate the channel */
- tmpreg = USBx_HC(ch_num)->HCCHAR;
- tmpreg &= ~USB_OTG_HCCHAR_CHDIS;
- tmpreg |= USB_OTG_HCCHAR_CHENA;
- USBx_HC(ch_num)->HCCHAR = tmpreg;
- }
- else if (hhcd->hc[ch_num].state == HC_BBLERR)
- {
- hhcd->hc[ch_num].ErrCnt++;
- hhcd->hc[ch_num].urb_state = URB_ERROR;
+ hhcd->hc[chnum].state = HC_HALTED;
+ hhcd->hc[chnum].ErrCnt++;
+ hhcd->hc[chnum].urb_state = URB_ERROR;
}
else
{
- /* ... */
- }
- __HAL_HCD_CLEAR_HC_INT(ch_num, USB_OTG_HCINT_CHH);
- HAL_HCD_HC_NotifyURBChange_Callback(hhcd, (uint8_t)ch_num, hhcd->hc[ch_num].urb_state);
- }
- else if ((USBx_HC(ch_num)->HCINT & USB_OTG_HCINT_NAK) == USB_OTG_HCINT_NAK)
- {
- if (hhcd->hc[ch_num].ep_type == EP_TYPE_INTR)
- {
- hhcd->hc[ch_num].ErrCnt = 0U;
- __HAL_HCD_UNMASK_HALT_HC_INT(ch_num);
- (void)USB_HC_Halt(hhcd->Instance, (uint8_t)ch_num);
- }
- else if ((hhcd->hc[ch_num].ep_type == EP_TYPE_CTRL) ||
- (hhcd->hc[ch_num].ep_type == EP_TYPE_BULK))
- {
- hhcd->hc[ch_num].ErrCnt = 0U;
-
- if (hhcd->Init.dma_enable == 0U)
+ if (hhcd->hc[chnum].state == HC_HALTED)
{
- hhcd->hc[ch_num].state = HC_NAK;
- __HAL_HCD_UNMASK_HALT_HC_INT(ch_num);
- (void)USB_HC_Halt(hhcd->Instance, (uint8_t)ch_num);
+ return;
+ }
+ }
+
+#if (USE_HAL_HCD_REGISTER_CALLBACKS == 1U)
+ hhcd->HC_NotifyURBChangeCallback(hhcd, chnum, hhcd->hc[chnum].urb_state);
+#else
+ HAL_HCD_HC_NotifyURBChange_Callback(hhcd, chnum, hhcd->hc[chnum].urb_state);
+#endif /* USE_HAL_HCD_REGISTER_CALLBACKS */
+ }
+ else if (__HAL_HCD_GET_CH_FLAG(hhcd, chnum, USB_OTG_HCINT_NYET))
+ {
+ __HAL_HCD_CLEAR_HC_INT(chnum, USB_OTG_HCINT_NYET);
+ hhcd->hc[chnum].state = HC_NYET;
+
+ if (hhcd->hc[chnum].do_ssplit == 0U)
+ {
+ hhcd->hc[chnum].ErrCnt = 0U;
+ }
+
+ (void)USB_HC_Halt(hhcd->Instance, chnum);
+ }
+ else if (__HAL_HCD_GET_CH_FLAG(hhcd, chnum, USB_OTG_HCINT_NAK))
+ {
+ if (hhcd->hc[chnum].ep_type == EP_TYPE_INTR)
+ {
+ hhcd->hc[chnum].ErrCnt = 0U;
+ hhcd->hc[chnum].state = HC_NAK;
+ (void)USB_HC_Halt(hhcd->Instance, chnum);
+ }
+ else if ((hhcd->hc[chnum].ep_type == EP_TYPE_CTRL) ||
+ (hhcd->hc[chnum].ep_type == EP_TYPE_BULK))
+ {
+ hhcd->hc[chnum].ErrCnt = 0U;
+
+ if ((hhcd->Init.dma_enable == 0U) || (hhcd->hc[chnum].do_csplit == 1U))
+ {
+ hhcd->hc[chnum].state = HC_NAK;
+ (void)USB_HC_Halt(hhcd->Instance, chnum);
}
}
else
{
/* ... */
}
- __HAL_HCD_CLEAR_HC_INT(ch_num, USB_OTG_HCINT_NAK);
+
+ if (hhcd->hc[chnum].do_csplit == 1U)
+ {
+ hhcd->hc[chnum].do_csplit = 0U;
+ __HAL_HCD_CLEAR_HC_CSPLT(chnum);
+ __HAL_HCD_UNMASK_ACK_HC_INT(chnum);
+ }
+
+ __HAL_HCD_CLEAR_HC_INT(chnum, USB_OTG_HCINT_NAK);
}
else
{
@@ -1379,183 +1582,229 @@
{
USB_OTG_GlobalTypeDef *USBx = hhcd->Instance;
uint32_t USBx_BASE = (uint32_t)USBx;
- uint32_t ch_num = (uint32_t)chnum;
uint32_t tmpreg;
uint32_t num_packets;
- if ((USBx_HC(ch_num)->HCINT & USB_OTG_HCINT_AHBERR) == USB_OTG_HCINT_AHBERR)
+ if (__HAL_HCD_GET_CH_FLAG(hhcd, chnum, USB_OTG_HCINT_AHBERR))
{
- __HAL_HCD_CLEAR_HC_INT(ch_num, USB_OTG_HCINT_AHBERR);
- __HAL_HCD_UNMASK_HALT_HC_INT(ch_num);
+ __HAL_HCD_CLEAR_HC_INT(chnum, USB_OTG_HCINT_AHBERR);
+ hhcd->hc[chnum].state = HC_XACTERR;
+ (void)USB_HC_Halt(hhcd->Instance, chnum);
}
- else if ((USBx_HC(ch_num)->HCINT & USB_OTG_HCINT_ACK) == USB_OTG_HCINT_ACK)
+ else if (__HAL_HCD_GET_CH_FLAG(hhcd, chnum, USB_OTG_HCINT_ACK))
{
- __HAL_HCD_CLEAR_HC_INT(ch_num, USB_OTG_HCINT_ACK);
+ __HAL_HCD_CLEAR_HC_INT(chnum, USB_OTG_HCINT_ACK);
- if (hhcd->hc[ch_num].do_ping == 1U)
+ if (hhcd->hc[chnum].do_ping == 1U)
{
- hhcd->hc[ch_num].do_ping = 0U;
- hhcd->hc[ch_num].urb_state = URB_NOTREADY;
- __HAL_HCD_UNMASK_HALT_HC_INT(ch_num);
- (void)USB_HC_Halt(hhcd->Instance, (uint8_t)ch_num);
+ hhcd->hc[chnum].do_ping = 0U;
+ hhcd->hc[chnum].urb_state = URB_NOTREADY;
+ hhcd->hc[chnum].state = HC_ACK;
+ (void)USB_HC_Halt(hhcd->Instance, chnum);
+ }
+
+ if ((hhcd->hc[chnum].do_ssplit == 1U) && (hhcd->hc[chnum].do_csplit == 0U))
+ {
+ if (hhcd->hc[chnum].ep_type != EP_TYPE_ISOC)
+ {
+ hhcd->hc[chnum].do_csplit = 1U;
+ }
+
+ hhcd->hc[chnum].state = HC_ACK;
+ (void)USB_HC_Halt(hhcd->Instance, chnum);
+
+ /* reset error_count */
+ hhcd->hc[chnum].ErrCnt = 0U;
}
}
- else if ((USBx_HC(ch_num)->HCINT & USB_OTG_HCINT_FRMOR) == USB_OTG_HCINT_FRMOR)
+ else if (__HAL_HCD_GET_CH_FLAG(hhcd, chnum, USB_OTG_HCINT_FRMOR))
{
- __HAL_HCD_UNMASK_HALT_HC_INT(ch_num);
- (void)USB_HC_Halt(hhcd->Instance, (uint8_t)ch_num);
- __HAL_HCD_CLEAR_HC_INT(ch_num, USB_OTG_HCINT_FRMOR);
+ __HAL_HCD_CLEAR_HC_INT(chnum, USB_OTG_HCINT_FRMOR);
+ (void)USB_HC_Halt(hhcd->Instance, chnum);
}
- else if ((USBx_HC(ch_num)->HCINT & USB_OTG_HCINT_XFRC) == USB_OTG_HCINT_XFRC)
+ else if (__HAL_HCD_GET_CH_FLAG(hhcd, chnum, USB_OTG_HCINT_XFRC))
{
- hhcd->hc[ch_num].ErrCnt = 0U;
+ hhcd->hc[chnum].ErrCnt = 0U;
/* transaction completed with NYET state, update do ping state */
- if ((USBx_HC(ch_num)->HCINT & USB_OTG_HCINT_NYET) == USB_OTG_HCINT_NYET)
+ if (__HAL_HCD_GET_CH_FLAG(hhcd, chnum, USB_OTG_HCINT_NYET))
{
- hhcd->hc[ch_num].do_ping = 1U;
- __HAL_HCD_CLEAR_HC_INT(ch_num, USB_OTG_HCINT_NYET);
+ hhcd->hc[chnum].do_ping = 1U;
+ __HAL_HCD_CLEAR_HC_INT(chnum, USB_OTG_HCINT_NYET);
}
- __HAL_HCD_UNMASK_HALT_HC_INT(ch_num);
- (void)USB_HC_Halt(hhcd->Instance, (uint8_t)ch_num);
- __HAL_HCD_CLEAR_HC_INT(ch_num, USB_OTG_HCINT_XFRC);
- hhcd->hc[ch_num].state = HC_XFRC;
- }
- else if ((USBx_HC(ch_num)->HCINT & USB_OTG_HCINT_NYET) == USB_OTG_HCINT_NYET)
- {
- hhcd->hc[ch_num].state = HC_NYET;
- hhcd->hc[ch_num].do_ping = 1U;
- hhcd->hc[ch_num].ErrCnt = 0U;
- __HAL_HCD_UNMASK_HALT_HC_INT(ch_num);
- (void)USB_HC_Halt(hhcd->Instance, (uint8_t)ch_num);
- __HAL_HCD_CLEAR_HC_INT(ch_num, USB_OTG_HCINT_NYET);
- }
- else if ((USBx_HC(ch_num)->HCINT & USB_OTG_HCINT_STALL) == USB_OTG_HCINT_STALL)
- {
- __HAL_HCD_CLEAR_HC_INT(ch_num, USB_OTG_HCINT_STALL);
- __HAL_HCD_UNMASK_HALT_HC_INT(ch_num);
- (void)USB_HC_Halt(hhcd->Instance, (uint8_t)ch_num);
- hhcd->hc[ch_num].state = HC_STALL;
- }
- else if ((USBx_HC(ch_num)->HCINT & USB_OTG_HCINT_NAK) == USB_OTG_HCINT_NAK)
- {
- hhcd->hc[ch_num].ErrCnt = 0U;
- hhcd->hc[ch_num].state = HC_NAK;
- if (hhcd->hc[ch_num].do_ping == 0U)
+ if (hhcd->hc[chnum].do_csplit != 0U)
{
- if (hhcd->hc[ch_num].speed == HCD_DEVICE_SPEED_HIGH)
+ hhcd->hc[chnum].do_csplit = 0U;
+ __HAL_HCD_CLEAR_HC_CSPLT(chnum);
+ }
+
+ __HAL_HCD_CLEAR_HC_INT(chnum, USB_OTG_HCINT_XFRC);
+ hhcd->hc[chnum].state = HC_XFRC;
+ (void)USB_HC_Halt(hhcd->Instance, chnum);
+ }
+ else if (__HAL_HCD_GET_CH_FLAG(hhcd, chnum, USB_OTG_HCINT_NYET))
+ {
+ hhcd->hc[chnum].state = HC_NYET;
+
+ if (hhcd->hc[chnum].do_ssplit == 0U)
+ {
+ hhcd->hc[chnum].do_ping = 1U;
+ }
+
+ hhcd->hc[chnum].ErrCnt = 0U;
+ (void)USB_HC_Halt(hhcd->Instance, chnum);
+ __HAL_HCD_CLEAR_HC_INT(chnum, USB_OTG_HCINT_NYET);
+ }
+ else if (__HAL_HCD_GET_CH_FLAG(hhcd, chnum, USB_OTG_HCINT_STALL))
+ {
+ __HAL_HCD_CLEAR_HC_INT(chnum, USB_OTG_HCINT_STALL);
+ hhcd->hc[chnum].state = HC_STALL;
+ (void)USB_HC_Halt(hhcd->Instance, chnum);
+ }
+ else if (__HAL_HCD_GET_CH_FLAG(hhcd, chnum, USB_OTG_HCINT_NAK))
+ {
+ hhcd->hc[chnum].ErrCnt = 0U;
+ hhcd->hc[chnum].state = HC_NAK;
+
+ if (hhcd->hc[chnum].do_ping == 0U)
+ {
+ if (hhcd->hc[chnum].speed == HCD_DEVICE_SPEED_HIGH)
{
- hhcd->hc[ch_num].do_ping = 1U;
+ hhcd->hc[chnum].do_ping = 1U;
}
}
- __HAL_HCD_UNMASK_HALT_HC_INT(ch_num);
- (void)USB_HC_Halt(hhcd->Instance, (uint8_t)ch_num);
- __HAL_HCD_CLEAR_HC_INT(ch_num, USB_OTG_HCINT_NAK);
+ (void)USB_HC_Halt(hhcd->Instance, chnum);
+ __HAL_HCD_CLEAR_HC_INT(chnum, USB_OTG_HCINT_NAK);
}
- else if ((USBx_HC(ch_num)->HCINT & USB_OTG_HCINT_TXERR) == USB_OTG_HCINT_TXERR)
+ else if (__HAL_HCD_GET_CH_FLAG(hhcd, chnum, USB_OTG_HCINT_TXERR))
{
if (hhcd->Init.dma_enable == 0U)
{
- hhcd->hc[ch_num].state = HC_XACTERR;
- __HAL_HCD_UNMASK_HALT_HC_INT(ch_num);
- (void)USB_HC_Halt(hhcd->Instance, (uint8_t)ch_num);
+ hhcd->hc[chnum].state = HC_XACTERR;
+ (void)USB_HC_Halt(hhcd->Instance, chnum);
}
else
{
- hhcd->hc[ch_num].ErrCnt++;
- if (hhcd->hc[ch_num].ErrCnt > 2U)
+ hhcd->hc[chnum].ErrCnt++;
+ if (hhcd->hc[chnum].ErrCnt > 2U)
{
- hhcd->hc[ch_num].ErrCnt = 0U;
- hhcd->hc[ch_num].urb_state = URB_ERROR;
- HAL_HCD_HC_NotifyURBChange_Callback(hhcd, (uint8_t)ch_num,
- hhcd->hc[ch_num].urb_state);
+ hhcd->hc[chnum].ErrCnt = 0U;
+ hhcd->hc[chnum].urb_state = URB_ERROR;
+
+#if (USE_HAL_HCD_REGISTER_CALLBACKS == 1U)
+ hhcd->HC_NotifyURBChangeCallback(hhcd, chnum, hhcd->hc[chnum].urb_state);
+#else
+ HAL_HCD_HC_NotifyURBChange_Callback(hhcd, chnum, hhcd->hc[chnum].urb_state);
+#endif /* USE_HAL_HCD_REGISTER_CALLBACKS */
}
else
{
- hhcd->hc[ch_num].urb_state = URB_NOTREADY;
+ hhcd->hc[chnum].urb_state = URB_NOTREADY;
}
}
- __HAL_HCD_CLEAR_HC_INT(ch_num, USB_OTG_HCINT_TXERR);
+ __HAL_HCD_CLEAR_HC_INT(chnum, USB_OTG_HCINT_TXERR);
}
- else if ((USBx_HC(ch_num)->HCINT & USB_OTG_HCINT_DTERR) == USB_OTG_HCINT_DTERR)
+ else if (__HAL_HCD_GET_CH_FLAG(hhcd, chnum, USB_OTG_HCINT_DTERR))
{
- __HAL_HCD_UNMASK_HALT_HC_INT(ch_num);
- (void)USB_HC_Halt(hhcd->Instance, (uint8_t)ch_num);
- __HAL_HCD_CLEAR_HC_INT(ch_num, USB_OTG_HCINT_NAK);
- __HAL_HCD_CLEAR_HC_INT(ch_num, USB_OTG_HCINT_DTERR);
- hhcd->hc[ch_num].state = HC_DATATGLERR;
+ hhcd->hc[chnum].state = HC_DATATGLERR;
+ (void)USB_HC_Halt(hhcd->Instance, chnum);
+ __HAL_HCD_CLEAR_HC_INT(chnum, USB_OTG_HCINT_DTERR);
}
- else if ((USBx_HC(ch_num)->HCINT & USB_OTG_HCINT_CHH) == USB_OTG_HCINT_CHH)
+ else if (__HAL_HCD_GET_CH_FLAG(hhcd, chnum, USB_OTG_HCINT_CHH))
{
- __HAL_HCD_MASK_HALT_HC_INT(ch_num);
+ __HAL_HCD_CLEAR_HC_INT(chnum, USB_OTG_HCINT_CHH);
- if (hhcd->hc[ch_num].state == HC_XFRC)
+ if (hhcd->hc[chnum].state == HC_XFRC)
{
- hhcd->hc[ch_num].urb_state = URB_DONE;
- if ((hhcd->hc[ch_num].ep_type == EP_TYPE_BULK) ||
- (hhcd->hc[ch_num].ep_type == EP_TYPE_INTR))
+ hhcd->hc[chnum].state = HC_HALTED;
+ hhcd->hc[chnum].urb_state = URB_DONE;
+
+ if ((hhcd->hc[chnum].ep_type == EP_TYPE_BULK) ||
+ (hhcd->hc[chnum].ep_type == EP_TYPE_INTR))
{
if (hhcd->Init.dma_enable == 0U)
{
- hhcd->hc[ch_num].toggle_out ^= 1U;
+ hhcd->hc[chnum].toggle_out ^= 1U;
}
- if ((hhcd->Init.dma_enable == 1U) && (hhcd->hc[ch_num].xfer_len > 0U))
+ if ((hhcd->Init.dma_enable == 1U) && (hhcd->hc[chnum].xfer_len > 0U))
{
- num_packets = (hhcd->hc[ch_num].xfer_len + hhcd->hc[ch_num].max_packet - 1U) / hhcd->hc[ch_num].max_packet;
+ num_packets = (hhcd->hc[chnum].xfer_len + hhcd->hc[chnum].max_packet - 1U) / hhcd->hc[chnum].max_packet;
if ((num_packets & 1U) != 0U)
{
- hhcd->hc[ch_num].toggle_out ^= 1U;
+ hhcd->hc[chnum].toggle_out ^= 1U;
}
}
}
}
- else if (hhcd->hc[ch_num].state == HC_NAK)
+ else if (hhcd->hc[chnum].state == HC_ACK)
{
- hhcd->hc[ch_num].urb_state = URB_NOTREADY;
- }
- else if (hhcd->hc[ch_num].state == HC_NYET)
- {
- hhcd->hc[ch_num].urb_state = URB_NOTREADY;
- }
- else if (hhcd->hc[ch_num].state == HC_STALL)
- {
- hhcd->hc[ch_num].urb_state = URB_STALL;
- }
- else if ((hhcd->hc[ch_num].state == HC_XACTERR) ||
- (hhcd->hc[ch_num].state == HC_DATATGLERR))
- {
- hhcd->hc[ch_num].ErrCnt++;
- if (hhcd->hc[ch_num].ErrCnt > 2U)
+ hhcd->hc[chnum].state = HC_HALTED;
+
+ if (hhcd->hc[chnum].do_csplit == 1U)
{
- hhcd->hc[ch_num].ErrCnt = 0U;
- hhcd->hc[ch_num].urb_state = URB_ERROR;
+ hhcd->hc[chnum].urb_state = URB_NOTREADY;
+ }
+ }
+ else if (hhcd->hc[chnum].state == HC_NAK)
+ {
+ hhcd->hc[chnum].state = HC_HALTED;
+ hhcd->hc[chnum].urb_state = URB_NOTREADY;
+
+ if (hhcd->hc[chnum].do_csplit == 1U)
+ {
+ hhcd->hc[chnum].do_csplit = 0U;
+ __HAL_HCD_CLEAR_HC_CSPLT(chnum);
+ }
+ }
+ else if (hhcd->hc[chnum].state == HC_NYET)
+ {
+ hhcd->hc[chnum].state = HC_HALTED;
+ hhcd->hc[chnum].urb_state = URB_NOTREADY;
+ }
+ else if (hhcd->hc[chnum].state == HC_STALL)
+ {
+ hhcd->hc[chnum].state = HC_HALTED;
+ hhcd->hc[chnum].urb_state = URB_STALL;
+ }
+ else if ((hhcd->hc[chnum].state == HC_XACTERR) ||
+ (hhcd->hc[chnum].state == HC_DATATGLERR))
+ {
+ hhcd->hc[chnum].state = HC_HALTED;
+ hhcd->hc[chnum].ErrCnt++;
+ if (hhcd->hc[chnum].ErrCnt > 2U)
+ {
+ hhcd->hc[chnum].ErrCnt = 0U;
+ hhcd->hc[chnum].urb_state = URB_ERROR;
}
else
{
- hhcd->hc[ch_num].urb_state = URB_NOTREADY;
+ hhcd->hc[chnum].urb_state = URB_NOTREADY;
/* re-activate the channel */
- tmpreg = USBx_HC(ch_num)->HCCHAR;
+ tmpreg = USBx_HC(chnum)->HCCHAR;
tmpreg &= ~USB_OTG_HCCHAR_CHDIS;
tmpreg |= USB_OTG_HCCHAR_CHENA;
- USBx_HC(ch_num)->HCCHAR = tmpreg;
+ USBx_HC(chnum)->HCCHAR = tmpreg;
}
}
else
{
- /* ... */
+ return;
}
- __HAL_HCD_CLEAR_HC_INT(ch_num, USB_OTG_HCINT_CHH);
- HAL_HCD_HC_NotifyURBChange_Callback(hhcd, (uint8_t)ch_num, hhcd->hc[ch_num].urb_state);
+#if (USE_HAL_HCD_REGISTER_CALLBACKS == 1U)
+ hhcd->HC_NotifyURBChangeCallback(hhcd, chnum, hhcd->hc[chnum].urb_state);
+#else
+ HAL_HCD_HC_NotifyURBChange_Callback(hhcd, chnum, hhcd->hc[chnum].urb_state);
+#endif /* USE_HAL_HCD_REGISTER_CALLBACKS */
}
else
{
- /* ... */
+ return;
}
}
@@ -1573,10 +1822,10 @@
uint32_t GrxstspReg;
uint32_t xferSizePktCnt;
uint32_t tmpreg;
- uint32_t ch_num;
+ uint32_t chnum;
GrxstspReg = hhcd->Instance->GRXSTSP;
- ch_num = GrxstspReg & USB_OTG_GRXSTSP_EPNUM;
+ chnum = GrxstspReg & USB_OTG_GRXSTSP_EPNUM;
pktsts = (GrxstspReg & USB_OTG_GRXSTSP_PKTSTS) >> 17;
pktcnt = (GrxstspReg & USB_OTG_GRXSTSP_BCNT) >> 4;
@@ -1584,33 +1833,33 @@
{
case GRXSTS_PKTSTS_IN:
/* Read the data into the host buffer. */
- if ((pktcnt > 0U) && (hhcd->hc[ch_num].xfer_buff != (void *)0))
+ if ((pktcnt > 0U) && (hhcd->hc[chnum].xfer_buff != (void *)0))
{
- if ((hhcd->hc[ch_num].xfer_count + pktcnt) <= hhcd->hc[ch_num].xfer_len)
+ if ((hhcd->hc[chnum].xfer_count + pktcnt) <= hhcd->hc[chnum].xfer_len)
{
(void)USB_ReadPacket(hhcd->Instance,
- hhcd->hc[ch_num].xfer_buff, (uint16_t)pktcnt);
+ hhcd->hc[chnum].xfer_buff, (uint16_t)pktcnt);
/* manage multiple Xfer */
- hhcd->hc[ch_num].xfer_buff += pktcnt;
- hhcd->hc[ch_num].xfer_count += pktcnt;
+ hhcd->hc[chnum].xfer_buff += pktcnt;
+ hhcd->hc[chnum].xfer_count += pktcnt;
/* get transfer size packet count */
- xferSizePktCnt = (USBx_HC(ch_num)->HCTSIZ & USB_OTG_HCTSIZ_PKTCNT) >> 19;
+ xferSizePktCnt = (USBx_HC(chnum)->HCTSIZ & USB_OTG_HCTSIZ_PKTCNT) >> 19;
- if ((hhcd->hc[ch_num].max_packet == pktcnt) && (xferSizePktCnt > 0U))
+ if ((hhcd->hc[chnum].max_packet == pktcnt) && (xferSizePktCnt > 0U))
{
/* re-activate the channel when more packets are expected */
- tmpreg = USBx_HC(ch_num)->HCCHAR;
+ tmpreg = USBx_HC(chnum)->HCCHAR;
tmpreg &= ~USB_OTG_HCCHAR_CHDIS;
tmpreg |= USB_OTG_HCCHAR_CHENA;
- USBx_HC(ch_num)->HCCHAR = tmpreg;
- hhcd->hc[ch_num].toggle_in ^= 1U;
+ USBx_HC(chnum)->HCCHAR = tmpreg;
+ hhcd->hc[chnum].toggle_in ^= 1U;
}
}
else
{
- hhcd->hc[ch_num].urb_state = URB_ERROR;
+ hhcd->hc[chnum].urb_state = URB_ERROR;
}
}
break;
@@ -1665,7 +1914,7 @@
if ((hprt0 & USB_OTG_HPRT_PENA) == USB_OTG_HPRT_PENA)
{
- if (hhcd->Init.phy_itface == USB_OTG_EMBEDDED_PHY)
+ if (hhcd->Init.phy_itface == USB_OTG_EMBEDDED_PHY)
{
if ((hprt0 & USB_OTG_HPRT_PSPD) == (HPRT0_PRTSPD_LOW_SPEED << 17))
{
@@ -1680,7 +1929,7 @@
{
if (hhcd->Init.speed == HCD_SPEED_FULL)
{
- USBx_HOST->HFIR = 60000U;
+ USBx_HOST->HFIR = HFIR_60_MHZ;
}
}
#if (USE_HAL_HCD_REGISTER_CALLBACKS == 1U)
diff --git a/Src/stm32f2xx_hal_i2c.c b/Src/stm32f2xx_hal_i2c.c
index 567faae..48eef2f 100644
--- a/Src/stm32f2xx_hal_i2c.c
+++ b/Src/stm32f2xx_hal_i2c.c
@@ -30,7 +30,7 @@
(#) Declare a I2C_HandleTypeDef handle structure, for example:
I2C_HandleTypeDef hi2c;
- (#)Initialize the I2C low level resources by implementing the @ref HAL_I2C_MspInit() API:
+ (#)Initialize the I2C low level resources by implementing the HAL_I2C_MspInit() API:
(##) Enable the I2Cx interface clock
(##) I2C pins configuration
(+++) Enable the clock for the I2C GPIOs
@@ -50,48 +50,48 @@
(#) Configure the Communication Speed, Duty cycle, Addressing mode, Own Address1,
Dual Addressing mode, Own Address2, General call and Nostretch mode in the hi2c Init structure.
- (#) Initialize the I2C registers by calling the @ref HAL_I2C_Init(), configures also the low level Hardware
- (GPIO, CLOCK, NVIC...etc) by calling the customized @ref HAL_I2C_MspInit() API.
+ (#) Initialize the I2C registers by calling the HAL_I2C_Init(), configures also the low level Hardware
+ (GPIO, CLOCK, NVIC...etc) by calling the customized HAL_I2C_MspInit() API.
- (#) To check if target device is ready for communication, use the function @ref HAL_I2C_IsDeviceReady()
+ (#) To check if target device is ready for communication, use the function HAL_I2C_IsDeviceReady()
(#) For I2C IO and IO MEM operations, three operation modes are available within this driver :
*** Polling mode IO operation ***
=================================
[..]
- (+) Transmit in master mode an amount of data in blocking mode using @ref HAL_I2C_Master_Transmit()
- (+) Receive in master mode an amount of data in blocking mode using @ref HAL_I2C_Master_Receive()
- (+) Transmit in slave mode an amount of data in blocking mode using @ref HAL_I2C_Slave_Transmit()
- (+) Receive in slave mode an amount of data in blocking mode using @ref HAL_I2C_Slave_Receive()
+ (+) Transmit in master mode an amount of data in blocking mode using HAL_I2C_Master_Transmit()
+ (+) Receive in master mode an amount of data in blocking mode using HAL_I2C_Master_Receive()
+ (+) Transmit in slave mode an amount of data in blocking mode using HAL_I2C_Slave_Transmit()
+ (+) Receive in slave mode an amount of data in blocking mode using HAL_I2C_Slave_Receive()
*** Polling mode IO MEM operation ***
=====================================
[..]
- (+) Write an amount of data in blocking mode to a specific memory address using @ref HAL_I2C_Mem_Write()
- (+) Read an amount of data in blocking mode from a specific memory address using @ref HAL_I2C_Mem_Read()
+ (+) Write an amount of data in blocking mode to a specific memory address using HAL_I2C_Mem_Write()
+ (+) Read an amount of data in blocking mode from a specific memory address using HAL_I2C_Mem_Read()
*** Interrupt mode IO operation ***
===================================
[..]
- (+) Transmit in master mode an amount of data in non-blocking mode using @ref HAL_I2C_Master_Transmit_IT()
- (+) At transmission end of transfer, @ref HAL_I2C_MasterTxCpltCallback() is executed and user can
- add his own code by customization of function pointer @ref HAL_I2C_MasterTxCpltCallback()
- (+) Receive in master mode an amount of data in non-blocking mode using @ref HAL_I2C_Master_Receive_IT()
- (+) At reception end of transfer, @ref HAL_I2C_MasterRxCpltCallback() is executed and user can
- add his own code by customization of function pointer @ref HAL_I2C_MasterRxCpltCallback()
- (+) Transmit in slave mode an amount of data in non-blocking mode using @ref HAL_I2C_Slave_Transmit_IT()
- (+) At transmission end of transfer, @ref HAL_I2C_SlaveTxCpltCallback() is executed and user can
- add his own code by customization of function pointer @ref HAL_I2C_SlaveTxCpltCallback()
- (+) Receive in slave mode an amount of data in non-blocking mode using @ref HAL_I2C_Slave_Receive_IT()
- (+) At reception end of transfer, @ref HAL_I2C_SlaveRxCpltCallback() is executed and user can
- add his own code by customization of function pointer @ref HAL_I2C_SlaveRxCpltCallback()
- (+) In case of transfer Error, @ref HAL_I2C_ErrorCallback() function is executed and user can
- add his own code by customization of function pointer @ref HAL_I2C_ErrorCallback()
- (+) Abort a master I2C process communication with Interrupt using @ref HAL_I2C_Master_Abort_IT()
- (+) End of abort process, @ref HAL_I2C_AbortCpltCallback() is executed and user can
- add his own code by customization of function pointer @ref HAL_I2C_AbortCpltCallback()
+ (+) Transmit in master mode an amount of data in non-blocking mode using HAL_I2C_Master_Transmit_IT()
+ (+) At transmission end of transfer, HAL_I2C_MasterTxCpltCallback() is executed and user can
+ add his own code by customization of function pointer HAL_I2C_MasterTxCpltCallback()
+ (+) Receive in master mode an amount of data in non-blocking mode using HAL_I2C_Master_Receive_IT()
+ (+) At reception end of transfer, HAL_I2C_MasterRxCpltCallback() is executed and user can
+ add his own code by customization of function pointer HAL_I2C_MasterRxCpltCallback()
+ (+) Transmit in slave mode an amount of data in non-blocking mode using HAL_I2C_Slave_Transmit_IT()
+ (+) At transmission end of transfer, HAL_I2C_SlaveTxCpltCallback() is executed and user can
+ add his own code by customization of function pointer HAL_I2C_SlaveTxCpltCallback()
+ (+) Receive in slave mode an amount of data in non-blocking mode using HAL_I2C_Slave_Receive_IT()
+ (+) At reception end of transfer, HAL_I2C_SlaveRxCpltCallback() is executed and user can
+ add his own code by customization of function pointer HAL_I2C_SlaveRxCpltCallback()
+ (+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can
+ add his own code by customization of function pointer HAL_I2C_ErrorCallback()
+ (+) Abort a master I2C process communication with Interrupt using HAL_I2C_Master_Abort_IT()
+ (+) End of abort process, HAL_I2C_AbortCpltCallback() is executed and user can
+ add his own code by customization of function pointer HAL_I2C_AbortCpltCallback()
*** Interrupt mode or DMA mode IO sequential operation ***
==========================================================
@@ -100,14 +100,14 @@
when a direction change during transfer
[..]
(+) A specific option field manage the different steps of a sequential transfer
- (+) Option field values are defined through @ref I2C_XferOptions_definition and are listed below:
+ (+) Option field values are defined through I2C_XferOptions_definition and are listed below:
(++) I2C_FIRST_AND_LAST_FRAME: No sequential usage, functional is same as associated interfaces in no sequential mode
(++) I2C_FIRST_FRAME: Sequential usage, this option allow to manage a sequence with start condition, address
and data to transfer without a final stop condition
(++) I2C_FIRST_AND_NEXT_FRAME: Sequential usage (Master only), this option allow to manage a sequence with start condition, address
and data to transfer without a final stop condition, an then permit a call the same master sequential interface
- several times (like @ref HAL_I2C_Master_Seq_Transmit_IT() then @ref HAL_I2C_Master_Seq_Transmit_IT()
- or @ref HAL_I2C_Master_Seq_Transmit_DMA() then @ref HAL_I2C_Master_Seq_Transmit_DMA())
+ several times (like HAL_I2C_Master_Seq_Transmit_IT() then HAL_I2C_Master_Seq_Transmit_IT()
+ or HAL_I2C_Master_Seq_Transmit_DMA() then HAL_I2C_Master_Seq_Transmit_DMA())
(++) I2C_NEXT_FRAME: Sequential usage, this option allow to manage a sequence with a restart condition, address
and with new data to transfer if the direction change or manage only the new data to transfer
if no direction change and without a final stop condition in both cases
@@ -131,85 +131,85 @@
Then usage of this option I2C_OTHER_AND_LAST_FRAME at the last frame to help automatic generation of STOP condition.
(+) Different sequential I2C interfaces are listed below:
- (++) Sequential transmit in master I2C mode an amount of data in non-blocking mode using @ref HAL_I2C_Master_Seq_Transmit_IT()
- or using @ref HAL_I2C_Master_Seq_Transmit_DMA()
- (+++) At transmission end of current frame transfer, @ref HAL_I2C_MasterTxCpltCallback() is executed and user can
- add his own code by customization of function pointer @ref HAL_I2C_MasterTxCpltCallback()
- (++) Sequential receive in master I2C mode an amount of data in non-blocking mode using @ref HAL_I2C_Master_Seq_Receive_IT()
- or using @ref HAL_I2C_Master_Seq_Receive_DMA()
- (+++) At reception end of current frame transfer, @ref HAL_I2C_MasterRxCpltCallback() is executed and user can
- add his own code by customization of function pointer @ref HAL_I2C_MasterRxCpltCallback()
- (++) Abort a master IT or DMA I2C process communication with Interrupt using @ref HAL_I2C_Master_Abort_IT()
- (+++) End of abort process, @ref HAL_I2C_AbortCpltCallback() is executed and user can
- add his own code by customization of function pointer @ref HAL_I2C_AbortCpltCallback()
- (++) Enable/disable the Address listen mode in slave I2C mode using @ref HAL_I2C_EnableListen_IT() @ref HAL_I2C_DisableListen_IT()
- (+++) When address slave I2C match, @ref HAL_I2C_AddrCallback() is executed and user can
+ (++) Sequential transmit in master I2C mode an amount of data in non-blocking mode using HAL_I2C_Master_Seq_Transmit_IT()
+ or using HAL_I2C_Master_Seq_Transmit_DMA()
+ (+++) At transmission end of current frame transfer, HAL_I2C_MasterTxCpltCallback() is executed and user can
+ add his own code by customization of function pointer HAL_I2C_MasterTxCpltCallback()
+ (++) Sequential receive in master I2C mode an amount of data in non-blocking mode using HAL_I2C_Master_Seq_Receive_IT()
+ or using HAL_I2C_Master_Seq_Receive_DMA()
+ (+++) At reception end of current frame transfer, HAL_I2C_MasterRxCpltCallback() is executed and user can
+ add his own code by customization of function pointer HAL_I2C_MasterRxCpltCallback()
+ (++) Abort a master IT or DMA I2C process communication with Interrupt using HAL_I2C_Master_Abort_IT()
+ (+++) End of abort process, HAL_I2C_AbortCpltCallback() is executed and user can
+ add his own code by customization of function pointer HAL_I2C_AbortCpltCallback()
+ (++) Enable/disable the Address listen mode in slave I2C mode using HAL_I2C_EnableListen_IT() HAL_I2C_DisableListen_IT()
+ (+++) When address slave I2C match, HAL_I2C_AddrCallback() is executed and user can
add his own code to check the Address Match Code and the transmission direction request by master (Write/Read).
- (+++) At Listen mode end @ref HAL_I2C_ListenCpltCallback() is executed and user can
- add his own code by customization of function pointer @ref HAL_I2C_ListenCpltCallback()
- (++) Sequential transmit in slave I2C mode an amount of data in non-blocking mode using @ref HAL_I2C_Slave_Seq_Transmit_IT()
- or using @ref HAL_I2C_Slave_Seq_Transmit_DMA()
- (+++) At transmission end of current frame transfer, @ref HAL_I2C_SlaveTxCpltCallback() is executed and user can
- add his own code by customization of function pointer @ref HAL_I2C_SlaveTxCpltCallback()
- (++) Sequential receive in slave I2C mode an amount of data in non-blocking mode using @ref HAL_I2C_Slave_Seq_Receive_IT()
- or using @ref HAL_I2C_Slave_Seq_Receive_DMA()
- (+++) At reception end of current frame transfer, @ref HAL_I2C_SlaveRxCpltCallback() is executed and user can
- add his own code by customization of function pointer @ref HAL_I2C_SlaveRxCpltCallback()
- (++) In case of transfer Error, @ref HAL_I2C_ErrorCallback() function is executed and user can
- add his own code by customization of function pointer @ref HAL_I2C_ErrorCallback()
+ (+++) At Listen mode end HAL_I2C_ListenCpltCallback() is executed and user can
+ add his own code by customization of function pointer HAL_I2C_ListenCpltCallback()
+ (++) Sequential transmit in slave I2C mode an amount of data in non-blocking mode using HAL_I2C_Slave_Seq_Transmit_IT()
+ or using HAL_I2C_Slave_Seq_Transmit_DMA()
+ (+++) At transmission end of current frame transfer, HAL_I2C_SlaveTxCpltCallback() is executed and user can
+ add his own code by customization of function pointer HAL_I2C_SlaveTxCpltCallback()
+ (++) Sequential receive in slave I2C mode an amount of data in non-blocking mode using HAL_I2C_Slave_Seq_Receive_IT()
+ or using HAL_I2C_Slave_Seq_Receive_DMA()
+ (+++) At reception end of current frame transfer, HAL_I2C_SlaveRxCpltCallback() is executed and user can
+ add his own code by customization of function pointer HAL_I2C_SlaveRxCpltCallback()
+ (++) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can
+ add his own code by customization of function pointer HAL_I2C_ErrorCallback()
*** Interrupt mode IO MEM operation ***
=======================================
[..]
(+) Write an amount of data in non-blocking mode with Interrupt to a specific memory address using
- @ref HAL_I2C_Mem_Write_IT()
- (+) At Memory end of write transfer, @ref HAL_I2C_MemTxCpltCallback() is executed and user can
- add his own code by customization of function pointer @ref HAL_I2C_MemTxCpltCallback()
+ HAL_I2C_Mem_Write_IT()
+ (+) At Memory end of write transfer, HAL_I2C_MemTxCpltCallback() is executed and user can
+ add his own code by customization of function pointer HAL_I2C_MemTxCpltCallback()
(+) Read an amount of data in non-blocking mode with Interrupt from a specific memory address using
- @ref HAL_I2C_Mem_Read_IT()
- (+) At Memory end of read transfer, @ref HAL_I2C_MemRxCpltCallback() is executed and user can
- add his own code by customization of function pointer @ref HAL_I2C_MemRxCpltCallback()
- (+) In case of transfer Error, @ref HAL_I2C_ErrorCallback() function is executed and user can
- add his own code by customization of function pointer @ref HAL_I2C_ErrorCallback()
+ HAL_I2C_Mem_Read_IT()
+ (+) At Memory end of read transfer, HAL_I2C_MemRxCpltCallback() is executed and user can
+ add his own code by customization of function pointer HAL_I2C_MemRxCpltCallback()
+ (+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can
+ add his own code by customization of function pointer HAL_I2C_ErrorCallback()
*** DMA mode IO operation ***
==============================
[..]
(+) Transmit in master mode an amount of data in non-blocking mode (DMA) using
- @ref HAL_I2C_Master_Transmit_DMA()
- (+) At transmission end of transfer, @ref HAL_I2C_MasterTxCpltCallback() is executed and user can
- add his own code by customization of function pointer @ref HAL_I2C_MasterTxCpltCallback()
+ HAL_I2C_Master_Transmit_DMA()
+ (+) At transmission end of transfer, HAL_I2C_MasterTxCpltCallback() is executed and user can
+ add his own code by customization of function pointer HAL_I2C_MasterTxCpltCallback()
(+) Receive in master mode an amount of data in non-blocking mode (DMA) using
- @ref HAL_I2C_Master_Receive_DMA()
- (+) At reception end of transfer, @ref HAL_I2C_MasterRxCpltCallback() is executed and user can
- add his own code by customization of function pointer @ref HAL_I2C_MasterRxCpltCallback()
+ HAL_I2C_Master_Receive_DMA()
+ (+) At reception end of transfer, HAL_I2C_MasterRxCpltCallback() is executed and user can
+ add his own code by customization of function pointer HAL_I2C_MasterRxCpltCallback()
(+) Transmit in slave mode an amount of data in non-blocking mode (DMA) using
- @ref HAL_I2C_Slave_Transmit_DMA()
- (+) At transmission end of transfer, @ref HAL_I2C_SlaveTxCpltCallback() is executed and user can
- add his own code by customization of function pointer @ref HAL_I2C_SlaveTxCpltCallback()
+ HAL_I2C_Slave_Transmit_DMA()
+ (+) At transmission end of transfer, HAL_I2C_SlaveTxCpltCallback() is executed and user can
+ add his own code by customization of function pointer HAL_I2C_SlaveTxCpltCallback()
(+) Receive in slave mode an amount of data in non-blocking mode (DMA) using
- @ref HAL_I2C_Slave_Receive_DMA()
- (+) At reception end of transfer, @ref HAL_I2C_SlaveRxCpltCallback() is executed and user can
- add his own code by customization of function pointer @ref HAL_I2C_SlaveRxCpltCallback()
- (+) In case of transfer Error, @ref HAL_I2C_ErrorCallback() function is executed and user can
- add his own code by customization of function pointer @ref HAL_I2C_ErrorCallback()
- (+) Abort a master I2C process communication with Interrupt using @ref HAL_I2C_Master_Abort_IT()
- (+) End of abort process, @ref HAL_I2C_AbortCpltCallback() is executed and user can
- add his own code by customization of function pointer @ref HAL_I2C_AbortCpltCallback()
+ HAL_I2C_Slave_Receive_DMA()
+ (+) At reception end of transfer, HAL_I2C_SlaveRxCpltCallback() is executed and user can
+ add his own code by customization of function pointer HAL_I2C_SlaveRxCpltCallback()
+ (+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can
+ add his own code by customization of function pointer HAL_I2C_ErrorCallback()
+ (+) Abort a master I2C process communication with Interrupt using HAL_I2C_Master_Abort_IT()
+ (+) End of abort process, HAL_I2C_AbortCpltCallback() is executed and user can
+ add his own code by customization of function pointer HAL_I2C_AbortCpltCallback()
*** DMA mode IO MEM operation ***
=================================
[..]
(+) Write an amount of data in non-blocking mode with DMA to a specific memory address using
- @ref HAL_I2C_Mem_Write_DMA()
- (+) At Memory end of write transfer, @ref HAL_I2C_MemTxCpltCallback() is executed and user can
- add his own code by customization of function pointer @ref HAL_I2C_MemTxCpltCallback()
+ HAL_I2C_Mem_Write_DMA()
+ (+) At Memory end of write transfer, HAL_I2C_MemTxCpltCallback() is executed and user can
+ add his own code by customization of function pointer HAL_I2C_MemTxCpltCallback()
(+) Read an amount of data in non-blocking mode with DMA from a specific memory address using
- @ref HAL_I2C_Mem_Read_DMA()
- (+) At Memory end of read transfer, @ref HAL_I2C_MemRxCpltCallback() is executed and user can
- add his own code by customization of function pointer @ref HAL_I2C_MemRxCpltCallback()
- (+) In case of transfer Error, @ref HAL_I2C_ErrorCallback() function is executed and user can
- add his own code by customization of function pointer @ref HAL_I2C_ErrorCallback()
+ HAL_I2C_Mem_Read_DMA()
+ (+) At Memory end of read transfer, HAL_I2C_MemRxCpltCallback() is executed and user can
+ add his own code by customization of function pointer HAL_I2C_MemRxCpltCallback()
+ (+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can
+ add his own code by customization of function pointer HAL_I2C_ErrorCallback()
*** I2C HAL driver macros list ***
@@ -217,22 +217,22 @@
[..]
Below the list of most used macros in I2C HAL driver.
- (+) @ref __HAL_I2C_ENABLE: Enable the I2C peripheral
- (+) @ref __HAL_I2C_DISABLE: Disable the I2C peripheral
- (+) @ref __HAL_I2C_GET_FLAG: Checks whether the specified I2C flag is set or not
- (+) @ref __HAL_I2C_CLEAR_FLAG: Clear the specified I2C pending flag
- (+) @ref __HAL_I2C_ENABLE_IT: Enable the specified I2C interrupt
- (+) @ref __HAL_I2C_DISABLE_IT: Disable the specified I2C interrupt
+ (+) __HAL_I2C_ENABLE: Enable the I2C peripheral
+ (+) __HAL_I2C_DISABLE: Disable the I2C peripheral
+ (+) __HAL_I2C_GET_FLAG: Checks whether the specified I2C flag is set or not
+ (+) __HAL_I2C_CLEAR_FLAG: Clear the specified I2C pending flag
+ (+) __HAL_I2C_ENABLE_IT: Enable the specified I2C interrupt
+ (+) __HAL_I2C_DISABLE_IT: Disable the specified I2C interrupt
*** Callback registration ***
=============================================
[..]
The compilation flag USE_HAL_I2C_REGISTER_CALLBACKS when set to 1
allows the user to configure dynamically the driver callbacks.
- Use Functions @ref HAL_I2C_RegisterCallback() or @ref HAL_I2C_RegisterAddrCallback()
+ Use Functions HAL_I2C_RegisterCallback() or HAL_I2C_RegisterAddrCallback()
to register an interrupt callback.
[..]
- Function @ref HAL_I2C_RegisterCallback() allows to register following callbacks:
+ Function HAL_I2C_RegisterCallback() allows to register following callbacks:
(+) MasterTxCpltCallback : callback for Master transmission end of transfer.
(+) MasterRxCpltCallback : callback for Master reception end of transfer.
(+) SlaveTxCpltCallback : callback for Slave transmission end of transfer.
@@ -247,11 +247,11 @@
This function takes as parameters the HAL peripheral handle, the Callback ID
and a pointer to the user callback function.
[..]
- For specific callback AddrCallback use dedicated register callbacks : @ref HAL_I2C_RegisterAddrCallback().
+ For specific callback AddrCallback use dedicated register callbacks : HAL_I2C_RegisterAddrCallback().
[..]
- Use function @ref HAL_I2C_UnRegisterCallback to reset a callback to the default
+ Use function HAL_I2C_UnRegisterCallback to reset a callback to the default
weak function.
- @ref HAL_I2C_UnRegisterCallback takes as parameters the HAL peripheral handle,
+ HAL_I2C_UnRegisterCallback takes as parameters the HAL peripheral handle,
and the Callback ID.
This function allows to reset following callbacks:
(+) MasterTxCpltCallback : callback for Master transmission end of transfer.
@@ -266,24 +266,24 @@
(+) MspInitCallback : callback for Msp Init.
(+) MspDeInitCallback : callback for Msp DeInit.
[..]
- For callback AddrCallback use dedicated register callbacks : @ref HAL_I2C_UnRegisterAddrCallback().
+ For callback AddrCallback use dedicated register callbacks : HAL_I2C_UnRegisterAddrCallback().
[..]
- By default, after the @ref HAL_I2C_Init() and when the state is @ref HAL_I2C_STATE_RESET
+ By default, after the HAL_I2C_Init() and when the state is HAL_I2C_STATE_RESET
all callbacks are set to the corresponding weak functions:
- examples @ref HAL_I2C_MasterTxCpltCallback(), @ref HAL_I2C_MasterRxCpltCallback().
+ examples HAL_I2C_MasterTxCpltCallback(), HAL_I2C_MasterRxCpltCallback().
Exception done for MspInit and MspDeInit functions that are
- reset to the legacy weak functions in the @ref HAL_I2C_Init()/ @ref HAL_I2C_DeInit() only when
+ reset to the legacy weak functions in the HAL_I2C_Init()/ HAL_I2C_DeInit() only when
these callbacks are null (not registered beforehand).
- If MspInit or MspDeInit are not null, the @ref HAL_I2C_Init()/ @ref HAL_I2C_DeInit()
+ If MspInit or MspDeInit are not null, the HAL_I2C_Init()/ HAL_I2C_DeInit()
keep and use the user MspInit/MspDeInit callbacks (registered beforehand) whatever the state.
[..]
- Callbacks can be registered/unregistered in @ref HAL_I2C_STATE_READY state only.
+ Callbacks can be registered/unregistered in HAL_I2C_STATE_READY state only.
Exception done MspInit/MspDeInit functions that can be registered/unregistered
- in @ref HAL_I2C_STATE_READY or @ref HAL_I2C_STATE_RESET state,
+ in HAL_I2C_STATE_READY or HAL_I2C_STATE_RESET state,
thus registered (user) MspInit/DeInit callbacks can be used during the Init/DeInit.
Then, the user first registers the MspInit/MspDeInit user callbacks
- using @ref HAL_I2C_RegisterCallback() before calling @ref HAL_I2C_DeInit()
- or @ref HAL_I2C_Init() function.
+ using HAL_I2C_RegisterCallback() before calling HAL_I2C_DeInit()
+ or HAL_I2C_Init() function.
[..]
When the compilation flag USE_HAL_I2C_REGISTER_CALLBACKS is set to 0 or
not defined, the callback registration feature is not available and all callbacks
@@ -295,7 +295,6 @@
(@) You can refer to the I2C HAL driver header file for more useful macros
@endverbatim
- ******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
@@ -314,7 +313,7 @@
/* Private typedef -----------------------------------------------------------*/
/* Private define ------------------------------------------------------------*/
-/** @addtogroup I2C_Private_Define
+/** @defgroup I2C_Private_Define I2C Private Define
* @{
*/
#define I2C_TIMEOUT_FLAG 35U /*!< Timeout 35 ms */
@@ -335,6 +334,14 @@
*/
/* Private macro -------------------------------------------------------------*/
+/** @addtogroup I2C_Private_Macros
+ * @{
+ */
+/* Macro to get remaining data to transfer on DMA side */
+#define I2C_GET_DMA_REMAIN_DATA(__HANDLE__) __HAL_DMA_GET_COUNTER(__HANDLE__)
+/**
+ * @}
+ */
/* Private variables ---------------------------------------------------------*/
/* Private function prototypes -----------------------------------------------*/
@@ -384,6 +391,9 @@
/* Private function to Convert Specific options */
static void I2C_ConvertOtherXferOptions(I2C_HandleTypeDef *hi2c);
+
+/* Private function to flush DR register */
+static void I2C_Flush_DR(I2C_HandleTypeDef *hi2c);
/**
* @}
*/
@@ -942,6 +952,20 @@
#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
/**
+ * @brief I2C data register flush process.
+ * @param hi2c I2C handle.
+ * @retval None
+ */
+static void I2C_Flush_DR(I2C_HandleTypeDef *hi2c)
+{
+ /* Write a dummy data in DR to clear TXE flag */
+ if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXE) != RESET)
+ {
+ hi2c->Instance->DR = 0x00U;
+ }
+}
+
+/**
* @}
*/
@@ -1358,6 +1382,13 @@
if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET)
{
+
+ if (hi2c->XferSize == 3U)
+ {
+ /* Disable Acknowledge */
+ CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
+ }
+
/* Read data from DR */
*hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
@@ -3397,7 +3428,7 @@
{
/* Get tick */
uint32_t tickstart = HAL_GetTick();
- uint32_t I2C_Trials = 1U;
+ uint32_t I2C_Trials = 0U;
FlagStatus tmp1;
FlagStatus tmp2;
@@ -5469,7 +5500,8 @@
}
else
{
- /* Do nothing */
+ /* Clear TXE and BTF flags */
+ I2C_Flush_DR(hi2c);
}
}
@@ -6135,7 +6167,7 @@
{
if ((CurrentState == HAL_I2C_STATE_BUSY_RX) || (CurrentState == HAL_I2C_STATE_BUSY_RX_LISTEN))
{
- hi2c->XferCount = (uint16_t)(__HAL_DMA_GET_COUNTER(hi2c->hdmarx));
+ hi2c->XferCount = (uint16_t)(I2C_GET_DMA_REMAIN_DATA(hi2c->hdmarx));
if (hi2c->XferCount != 0U)
{
@@ -6163,7 +6195,7 @@
}
else
{
- hi2c->XferCount = (uint16_t)(__HAL_DMA_GET_COUNTER(hi2c->hdmatx));
+ hi2c->XferCount = (uint16_t)(I2C_GET_DMA_REMAIN_DATA(hi2c->hdmatx));
if (hi2c->XferCount != 0U)
{
@@ -6332,6 +6364,9 @@
/* Disable Acknowledge */
CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
+ /* Clear TXE flag */
+ I2C_Flush_DR(hi2c);
+
#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
hi2c->SlaveTxCpltCallback(hi2c);
#else
@@ -7504,3 +7539,4 @@
/**
* @}
*/
+
diff --git a/Src/stm32f2xx_hal_i2s.c b/Src/stm32f2xx_hal_i2s.c
index ab18c20..3f891a6 100644
--- a/Src/stm32f2xx_hal_i2s.c
+++ b/Src/stm32f2xx_hal_i2s.c
@@ -8,7 +8,6 @@
* + Initialization and de-initialization functions
* + IO operation functions
* + Peripheral State and Errors functions
- *
******************************************************************************
* @attention
*
@@ -179,7 +178,7 @@
and weak (surcharged) callbacks are used.
@endverbatim
- ******************************************************************************
+
*/
/* Includes ------------------------------------------------------------------*/
@@ -1894,3 +1893,4 @@
*/
#endif /* HAL_I2S_MODULE_ENABLED */
+
diff --git a/Src/stm32f2xx_hal_irda.c b/Src/stm32f2xx_hal_irda.c
index cd4fc7c..706cbd9 100644
--- a/Src/stm32f2xx_hal_irda.c
+++ b/Src/stm32f2xx_hal_irda.c
@@ -123,8 +123,8 @@
allows the user to configure dynamically the driver callbacks.
[..]
- Use Function @ref HAL_IRDA_RegisterCallback() to register a user callback.
- Function @ref HAL_IRDA_RegisterCallback() allows to register following callbacks:
+ Use Function HAL_IRDA_RegisterCallback() to register a user callback.
+ Function HAL_IRDA_RegisterCallback() allows to register following callbacks:
(+) TxHalfCpltCallback : Tx Half Complete Callback.
(+) TxCpltCallback : Tx Complete Callback.
(+) RxHalfCpltCallback : Rx Half Complete Callback.
@@ -139,9 +139,9 @@
and a pointer to the user callback function.
[..]
- Use function @ref HAL_IRDA_UnRegisterCallback() to reset a callback to the default
+ Use function HAL_IRDA_UnRegisterCallback() to reset a callback to the default
weak (surcharged) function.
- @ref HAL_IRDA_UnRegisterCallback() takes as parameters the HAL peripheral handle,
+ HAL_IRDA_UnRegisterCallback() takes as parameters the HAL peripheral handle,
and the Callback ID.
This function allows to reset following callbacks:
(+) TxHalfCpltCallback : Tx Half Complete Callback.
@@ -156,13 +156,13 @@
(+) MspDeInitCallback : IRDA MspDeInit.
[..]
- By default, after the @ref HAL_IRDA_Init() and when the state is HAL_IRDA_STATE_RESET
+ By default, after the HAL_IRDA_Init() and when the state is HAL_IRDA_STATE_RESET
all callbacks are set to the corresponding weak (surcharged) functions:
- examples @ref HAL_IRDA_TxCpltCallback(), @ref HAL_IRDA_RxHalfCpltCallback().
+ examples HAL_IRDA_TxCpltCallback(), HAL_IRDA_RxHalfCpltCallback().
Exception done for MspInit and MspDeInit functions that are respectively
- reset to the legacy weak (surcharged) functions in the @ref HAL_IRDA_Init()
- and @ref HAL_IRDA_DeInit() only when these callbacks are null (not registered beforehand).
- If not, MspInit or MspDeInit are not null, the @ref HAL_IRDA_Init() and @ref HAL_IRDA_DeInit()
+ reset to the legacy weak (surcharged) functions in the HAL_IRDA_Init()
+ and HAL_IRDA_DeInit() only when these callbacks are null (not registered beforehand).
+ If not, MspInit or MspDeInit are not null, the HAL_IRDA_Init() and HAL_IRDA_DeInit()
keep and use the user MspInit/MspDeInit callbacks (registered beforehand).
[..]
@@ -171,8 +171,8 @@
in HAL_IRDA_STATE_READY or HAL_IRDA_STATE_RESET state, thus registered (user)
MspInit/DeInit callbacks can be used during the Init/DeInit.
In that case first register the MspInit/MspDeInit user callbacks
- using @ref HAL_IRDA_RegisterCallback() before calling @ref HAL_IRDA_DeInit()
- or @ref HAL_IRDA_Init() function.
+ using HAL_IRDA_RegisterCallback() before calling HAL_IRDA_DeInit()
+ or HAL_IRDA_Init() function.
[..]
When The compilation define USE_HAL_IRDA_REGISTER_CALLBACKS is set to 0 or
@@ -196,7 +196,6 @@
|---------|-----------|---------------------------------------|
| 1 | 1 | | SB | 8 bit data | PB | 1 STB | |
+-------------------------------------------------------------+
-
******************************************************************************
*/
@@ -440,6 +439,8 @@
/**
* @brief Register a User IRDA Callback
* To be used instead of the weak predefined callback
+ * @note The HAL_IRDA_RegisterCallback() may be called before HAL_IRDA_Init() in HAL_IRDA_STATE_RESET
+ * to register callbacks for HAL_IRDA_MSPINIT_CB_ID and HAL_IRDA_MSPDEINIT_CB_ID
* @param hirda irda handle
* @param CallbackID ID of the callback to be registered
* This parameter can be one of the following values:
@@ -467,8 +468,6 @@
return HAL_ERROR;
}
- /* Process locked */
- __HAL_LOCK(hirda);
if (hirda->gState == HAL_IRDA_STATE_READY)
{
@@ -553,15 +552,14 @@
status = HAL_ERROR;
}
- /* Release Lock */
- __HAL_UNLOCK(hirda);
-
return status;
}
/**
* @brief Unregister an IRDA callback
* IRDA callback is redirected to the weak predefined callback
+ * @note The HAL_IRDA_UnRegisterCallback() may be called before HAL_IRDA_Init() in HAL_IRDA_STATE_RESET
+ * to un-register callbacks for HAL_IRDA_MSPINIT_CB_ID and HAL_IRDA_MSPDEINIT_CB_ID
* @param hirda irda handle
* @param CallbackID ID of the callback to be unregistered
* This parameter can be one of the following values:
@@ -581,9 +579,6 @@
{
HAL_StatusTypeDef status = HAL_OK;
- /* Process locked */
- __HAL_LOCK(hirda);
-
if (HAL_IRDA_STATE_READY == hirda->gState)
{
switch (CallbackID)
@@ -667,9 +662,6 @@
status = HAL_ERROR;
}
- /* Release Lock */
- __HAL_UNLOCK(hirda);
-
return status;
}
#endif /* USE_HAL_IRDA_REGISTER_CALLBACKS */
@@ -2671,3 +2663,4 @@
/**
* @}
*/
+
diff --git a/Src/stm32f2xx_hal_mmc.c b/Src/stm32f2xx_hal_mmc.c
index ac5acac..2f1a3d7 100644
--- a/Src/stm32f2xx_hal_mmc.c
+++ b/Src/stm32f2xx_hal_mmc.c
@@ -13,7 +13,7 @@
******************************************************************************
* @attention
*
- * Copyright (c) 2018 STMicroelectronics.
+ * Copyright (c) 2016 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
@@ -74,7 +74,7 @@
SDMMC Peripheral (STM32 side) and the MMC Card, and put it into StandBy State (Ready for data transfer).
This function provide the following operations:
- (#) Initialize the SDMMC peripheral interface with defaullt configuration.
+ (#) Initialize the SDMMC peripheral interface with default configuration.
The initialization process is done at 400KHz. You can change or adapt
this frequency by adjusting the "ClockDiv" field.
The MMC Card frequency (SDMMC_CK) is computed as follows:
@@ -206,7 +206,7 @@
The compilation define USE_HAL_MMC_REGISTER_CALLBACKS when set to 1
allows the user to configure dynamically the driver callbacks.
- Use Functions @ref HAL_MMC_RegisterCallback() to register a user callback,
+ Use Functions HAL_MMC_RegisterCallback() to register a user callback,
it allows to register following callbacks:
(+) TxCpltCallback : callback when a transmission transfer is completed.
(+) RxCpltCallback : callback when a reception transfer is completed.
@@ -217,7 +217,7 @@
This function takes as parameters the HAL peripheral handle, the Callback ID
and a pointer to the user callback function.
- Use function @ref HAL_MMC_UnRegisterCallback() to reset a callback to the default
+ Use function HAL_MMC_UnRegisterCallback() to reset a callback to the default
weak (surcharged) function. It allows to reset following callbacks:
(+) TxCpltCallback : callback when a transmission transfer is completed.
(+) RxCpltCallback : callback when a reception transfer is completed.
@@ -227,12 +227,12 @@
(+) MspDeInitCallback : MMC MspDeInit.
This function) takes as parameters the HAL peripheral handle and the Callback ID.
- By default, after the @ref HAL_MMC_Init and if the state is HAL_MMC_STATE_RESET
+ By default, after the HAL_MMC_Init and if the state is HAL_MMC_STATE_RESET
all callbacks are reset to the corresponding legacy weak (surcharged) functions.
Exception done for MspInit and MspDeInit callbacks that are respectively
- reset to the legacy weak (surcharged) functions in the @ref HAL_MMC_Init
- and @ref HAL_MMC_DeInit only when these callbacks are null (not registered beforehand).
- If not, MspInit or MspDeInit are not null, the @ref HAL_MMC_Init and @ref HAL_MMC_DeInit
+ reset to the legacy weak (surcharged) functions in the HAL_MMC_Init
+ and HAL_MMC_DeInit only when these callbacks are null (not registered beforehand).
+ If not, MspInit or MspDeInit are not null, the HAL_MMC_Init and HAL_MMC_DeInit
keep and use the user MspInit/MspDeInit callbacks (registered beforehand)
Callbacks can be registered/unregistered in READY state only.
@@ -240,8 +240,8 @@
in READY or RESET state, thus registered (user) MspInit/DeInit callbacks can be used
during the Init/DeInit.
In that case first register the MspInit/MspDeInit user callbacks
- using @ref HAL_MMC_RegisterCallback before calling @ref HAL_MMC_DeInit
- or @ref HAL_MMC_Init function.
+ using HAL_MMC_RegisterCallback before calling HAL_MMC_DeInit
+ or HAL_MMC_Init function.
When The compilation define USE_HAL_MMC_REGISTER_CALLBACKS is set to 0 or
not defined, the callback registering feature is not available
@@ -295,7 +295,7 @@
#endif
/* Frequencies used in the driver for clock divider calculation */
-#define MMC_INIT_FREQ 400000U /* Initalization phase : 400 kHz max */
+#define MMC_INIT_FREQ 400000U /* Initialization phase : 400 kHz max */
/**
* @}
*/
@@ -460,6 +460,9 @@
/* Enable MMC Clock */
__HAL_MMC_ENABLE(hmmc);
+ /* Required power up waiting time before starting the MMC initialization sequence */
+ HAL_Delay(2);
+
/* Identify card operating voltage */
errorstate = MMC_PowerON(hmmc);
if(errorstate != HAL_MMC_ERROR_NONE)
diff --git a/Src/stm32f2xx_hal_msp_template.c b/Src/stm32f2xx_hal_msp_template.c
index fb416c3..d27d2bd 100644
--- a/Src/stm32f2xx_hal_msp_template.c
+++ b/Src/stm32f2xx_hal_msp_template.c
@@ -5,7 +5,7 @@
* @brief HAL MSP module.
* This file template is located in the HAL folder and should be copied
* to the user folder.
- *
+ *
******************************************************************************
* @attention
*
@@ -92,3 +92,5 @@
/**
* @}
*/
+
+
diff --git a/Src/stm32f2xx_hal_nand.c b/Src/stm32f2xx_hal_nand.c
index 1a76ac8..0976a7a 100644
--- a/Src/stm32f2xx_hal_nand.c
+++ b/Src/stm32f2xx_hal_nand.c
@@ -69,25 +69,25 @@
The compilation define USE_HAL_NAND_REGISTER_CALLBACKS when set to 1
allows the user to configure dynamically the driver callbacks.
- Use Functions @ref HAL_NAND_RegisterCallback() to register a user callback,
+ Use Functions HAL_NAND_RegisterCallback() to register a user callback,
it allows to register following callbacks:
(+) MspInitCallback : NAND MspInit.
(+) MspDeInitCallback : NAND MspDeInit.
This function takes as parameters the HAL peripheral handle, the Callback ID
and a pointer to the user callback function.
- Use function @ref HAL_NAND_UnRegisterCallback() to reset a callback to the default
- weak (surcharged) function. It allows to reset following callbacks:
+ Use function HAL_NAND_UnRegisterCallback() to reset a callback to the default
+ weak (overridden) function. It allows to reset following callbacks:
(+) MspInitCallback : NAND MspInit.
(+) MspDeInitCallback : NAND MspDeInit.
This function) takes as parameters the HAL peripheral handle and the Callback ID.
- By default, after the @ref HAL_NAND_Init and if the state is HAL_NAND_STATE_RESET
- all callbacks are reset to the corresponding legacy weak (surcharged) functions.
+ By default, after the HAL_NAND_Init and if the state is HAL_NAND_STATE_RESET
+ all callbacks are reset to the corresponding legacy weak (overridden) functions.
Exception done for MspInit and MspDeInit callbacks that are respectively
- reset to the legacy weak (surcharged) functions in the @ref HAL_NAND_Init
- and @ref HAL_NAND_DeInit only when these callbacks are null (not registered beforehand).
- If not, MspInit or MspDeInit are not null, the @ref HAL_NAND_Init and @ref HAL_NAND_DeInit
+ reset to the legacy weak (overridden) functions in the HAL_NAND_Init
+ and HAL_NAND_DeInit only when these callbacks are null (not registered beforehand).
+ If not, MspInit or MspDeInit are not null, the HAL_NAND_Init and HAL_NAND_DeInit
keep and use the user MspInit/MspDeInit callbacks (registered beforehand)
Callbacks can be registered/unregistered in READY state only.
@@ -95,12 +95,12 @@
in READY or RESET state, thus registered (user) MspInit/DeInit callbacks can be used
during the Init/DeInit.
In that case first register the MspInit/MspDeInit user callbacks
- using @ref HAL_NAND_RegisterCallback before calling @ref HAL_NAND_DeInit
- or @ref HAL_NAND_Init function.
+ using HAL_NAND_RegisterCallback before calling HAL_NAND_DeInit
+ or HAL_NAND_Init function.
When The compilation define USE_HAL_NAND_REGISTER_CALLBACKS is set to 0 or
not defined, the callback registering feature is not available
- and weak (surcharged) callbacks are used.
+ and weak (overridden) callbacks are used.
@endverbatim
******************************************************************************
@@ -528,8 +528,8 @@
* @param NumPageToRead number of pages to read from block
* @retval HAL status
*/
-HAL_StatusTypeDef HAL_NAND_Read_Page_8b(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress, uint8_t *pBuffer,
- uint32_t NumPageToRead)
+HAL_StatusTypeDef HAL_NAND_Read_Page_8b(NAND_HandleTypeDef *hnand, const NAND_AddressTypeDef *pAddress,
+ uint8_t *pBuffer, uint32_t NumPageToRead)
{
uint32_t index;
uint32_t tickstart;
@@ -693,8 +693,8 @@
* @param NumPageToRead number of pages to read from block
* @retval HAL status
*/
-HAL_StatusTypeDef HAL_NAND_Read_Page_16b(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress, uint16_t *pBuffer,
- uint32_t NumPageToRead)
+HAL_StatusTypeDef HAL_NAND_Read_Page_16b(NAND_HandleTypeDef *hnand, const NAND_AddressTypeDef *pAddress,
+ uint16_t *pBuffer, uint32_t NumPageToRead)
{
uint32_t index;
uint32_t tickstart;
@@ -868,8 +868,8 @@
* @param NumPageToWrite number of pages to write to block
* @retval HAL status
*/
-HAL_StatusTypeDef HAL_NAND_Write_Page_8b(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress, uint8_t *pBuffer,
- uint32_t NumPageToWrite)
+HAL_StatusTypeDef HAL_NAND_Write_Page_8b(NAND_HandleTypeDef *hnand, const NAND_AddressTypeDef *pAddress,
+ const uint8_t *pBuffer, uint32_t NumPageToWrite)
{
uint32_t index;
uint32_t tickstart;
@@ -877,7 +877,7 @@
uint32_t numpageswritten = 0U;
uint32_t nandaddress;
uint32_t nbpages = NumPageToWrite;
- uint8_t *buff = pBuffer;
+ const uint8_t *buff = pBuffer;
/* Check the NAND controller state */
if (hnand->State == HAL_NAND_STATE_BUSY)
@@ -1028,8 +1028,8 @@
* @param NumPageToWrite number of pages to write to block
* @retval HAL status
*/
-HAL_StatusTypeDef HAL_NAND_Write_Page_16b(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress, uint16_t *pBuffer,
- uint32_t NumPageToWrite)
+HAL_StatusTypeDef HAL_NAND_Write_Page_16b(NAND_HandleTypeDef *hnand, const NAND_AddressTypeDef *pAddress,
+ const uint16_t *pBuffer, uint32_t NumPageToWrite)
{
uint32_t index;
uint32_t tickstart;
@@ -1037,7 +1037,7 @@
uint32_t numpageswritten = 0U;
uint32_t nandaddress;
uint32_t nbpages = NumPageToWrite;
- uint16_t *buff = pBuffer;
+ const uint16_t *buff = pBuffer;
/* Check the NAND controller state */
if (hnand->State == HAL_NAND_STATE_BUSY)
@@ -1199,8 +1199,8 @@
* @param NumSpareAreaToRead Number of spare area to read
* @retval HAL status
*/
-HAL_StatusTypeDef HAL_NAND_Read_SpareArea_8b(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress, uint8_t *pBuffer,
- uint32_t NumSpareAreaToRead)
+HAL_StatusTypeDef HAL_NAND_Read_SpareArea_8b(NAND_HandleTypeDef *hnand, const NAND_AddressTypeDef *pAddress,
+ uint8_t *pBuffer, uint32_t NumSpareAreaToRead)
{
uint32_t index;
uint32_t tickstart;
@@ -1371,7 +1371,7 @@
* @param NumSpareAreaToRead Number of spare area to read
* @retval HAL status
*/
-HAL_StatusTypeDef HAL_NAND_Read_SpareArea_16b(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress,
+HAL_StatusTypeDef HAL_NAND_Read_SpareArea_16b(NAND_HandleTypeDef *hnand, const NAND_AddressTypeDef *pAddress,
uint16_t *pBuffer, uint32_t NumSpareAreaToRead)
{
uint32_t index;
@@ -1543,8 +1543,8 @@
* @param NumSpareAreaTowrite number of spare areas to write to block
* @retval HAL status
*/
-HAL_StatusTypeDef HAL_NAND_Write_SpareArea_8b(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress,
- uint8_t *pBuffer, uint32_t NumSpareAreaTowrite)
+HAL_StatusTypeDef HAL_NAND_Write_SpareArea_8b(NAND_HandleTypeDef *hnand, const NAND_AddressTypeDef *pAddress,
+ const uint8_t *pBuffer, uint32_t NumSpareAreaTowrite)
{
uint32_t index;
uint32_t tickstart;
@@ -1553,7 +1553,7 @@
uint32_t nandaddress;
uint32_t columnaddress;
uint32_t nbspare = NumSpareAreaTowrite;
- uint8_t *buff = pBuffer;
+ const uint8_t *buff = pBuffer;
/* Check the NAND controller state */
if (hnand->State == HAL_NAND_STATE_BUSY)
@@ -1713,8 +1713,8 @@
* @param NumSpareAreaTowrite number of spare areas to write to block
* @retval HAL status
*/
-HAL_StatusTypeDef HAL_NAND_Write_SpareArea_16b(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress,
- uint16_t *pBuffer, uint32_t NumSpareAreaTowrite)
+HAL_StatusTypeDef HAL_NAND_Write_SpareArea_16b(NAND_HandleTypeDef *hnand, const NAND_AddressTypeDef *pAddress,
+ const uint16_t *pBuffer, uint32_t NumSpareAreaTowrite)
{
uint32_t index;
uint32_t tickstart;
@@ -1723,7 +1723,7 @@
uint32_t nandaddress;
uint32_t columnaddress;
uint32_t nbspare = NumSpareAreaTowrite;
- uint16_t *buff = pBuffer;
+ const uint16_t *buff = pBuffer;
/* Check the NAND controller state */
if (hnand->State == HAL_NAND_STATE_BUSY)
@@ -1881,7 +1881,7 @@
* @param pAddress pointer to NAND address structure
* @retval HAL status
*/
-HAL_StatusTypeDef HAL_NAND_Erase_Block(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress)
+HAL_StatusTypeDef HAL_NAND_Erase_Block(NAND_HandleTypeDef *hnand, const NAND_AddressTypeDef *pAddress)
{
uint32_t deviceaddress;
@@ -1944,7 +1944,7 @@
* - NAND_VALID_ADDRESS: When the new address is valid address
* - NAND_INVALID_ADDRESS: When the new address is invalid address
*/
-uint32_t HAL_NAND_Address_Inc(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress)
+uint32_t HAL_NAND_Address_Inc(const NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress)
{
uint32_t status = NAND_VALID_ADDRESS;
@@ -1975,7 +1975,7 @@
#if (USE_HAL_NAND_REGISTER_CALLBACKS == 1)
/**
* @brief Register a User NAND Callback
- * To be used instead of the weak (surcharged) predefined callback
+ * To be used to override the weak predefined callback
* @param hnand : NAND handle
* @param CallbackId : ID of the callback to be registered
* This parameter can be one of the following values:
@@ -1995,9 +1995,6 @@
return HAL_ERROR;
}
- /* Process locked */
- __HAL_LOCK(hnand);
-
if (hnand->State == HAL_NAND_STATE_READY)
{
switch (CallbackId)
@@ -2039,14 +2036,11 @@
status = HAL_ERROR;
}
- /* Release Lock */
- __HAL_UNLOCK(hnand);
- return status;
}
/**
* @brief Unregister a User NAND Callback
- * NAND Callback is redirected to the weak (surcharged) predefined callback
+ * NAND Callback is redirected to the weak predefined callback
* @param hnand : NAND handle
* @param CallbackId : ID of the callback to be unregistered
* This parameter can be one of the following values:
@@ -2059,9 +2053,6 @@
{
HAL_StatusTypeDef status = HAL_OK;
- /* Process locked */
- __HAL_LOCK(hnand);
-
if (hnand->State == HAL_NAND_STATE_READY)
{
switch (CallbackId)
@@ -2103,9 +2094,6 @@
status = HAL_ERROR;
}
- /* Release Lock */
- __HAL_UNLOCK(hnand);
- return status;
}
#endif /* USE_HAL_NAND_REGISTER_CALLBACKS */
@@ -2255,7 +2243,7 @@
* the configuration information for NAND module.
* @retval HAL state
*/
-HAL_NAND_StateTypeDef HAL_NAND_GetState(NAND_HandleTypeDef *hnand)
+HAL_NAND_StateTypeDef HAL_NAND_GetState(const NAND_HandleTypeDef *hnand)
{
return hnand->State;
}
@@ -2266,7 +2254,7 @@
* the configuration information for NAND module.
* @retval NAND status
*/
-uint32_t HAL_NAND_Read_Status(NAND_HandleTypeDef *hnand)
+uint32_t HAL_NAND_Read_Status(const NAND_HandleTypeDef *hnand)
{
uint32_t data;
uint32_t deviceaddress;
@@ -2320,3 +2308,4 @@
/**
* @}
*/
+
diff --git a/Src/stm32f2xx_hal_nor.c b/Src/stm32f2xx_hal_nor.c
index df60ecd..b85cd0e 100644
--- a/Src/stm32f2xx_hal_nor.c
+++ b/Src/stm32f2xx_hal_nor.c
@@ -66,25 +66,25 @@
The compilation define USE_HAL_NOR_REGISTER_CALLBACKS when set to 1
allows the user to configure dynamically the driver callbacks.
- Use Functions @ref HAL_NOR_RegisterCallback() to register a user callback,
+ Use Functions HAL_NOR_RegisterCallback() to register a user callback,
it allows to register following callbacks:
(+) MspInitCallback : NOR MspInit.
(+) MspDeInitCallback : NOR MspDeInit.
This function takes as parameters the HAL peripheral handle, the Callback ID
and a pointer to the user callback function.
- Use function @ref HAL_NOR_UnRegisterCallback() to reset a callback to the default
- weak (surcharged) function. It allows to reset following callbacks:
+ Use function HAL_NOR_UnRegisterCallback() to reset a callback to the default
+ weak (overridden) function. It allows to reset following callbacks:
(+) MspInitCallback : NOR MspInit.
(+) MspDeInitCallback : NOR MspDeInit.
This function) takes as parameters the HAL peripheral handle and the Callback ID.
- By default, after the @ref HAL_NOR_Init and if the state is HAL_NOR_STATE_RESET
- all callbacks are reset to the corresponding legacy weak (surcharged) functions.
+ By default, after the HAL_NOR_Init and if the state is HAL_NOR_STATE_RESET
+ all callbacks are reset to the corresponding legacy weak (overridden) functions.
Exception done for MspInit and MspDeInit callbacks that are respectively
- reset to the legacy weak (surcharged) functions in the @ref HAL_NOR_Init
- and @ref HAL_NOR_DeInit only when these callbacks are null (not registered beforehand).
- If not, MspInit or MspDeInit are not null, the @ref HAL_NOR_Init and @ref HAL_NOR_DeInit
+ reset to the legacy weak (overridden) functions in the HAL_NOR_Init
+ and HAL_NOR_DeInit only when these callbacks are null (not registered beforehand).
+ If not, MspInit or MspDeInit are not null, the HAL_NOR_Init and HAL_NOR_DeInit
keep and use the user MspInit/MspDeInit callbacks (registered beforehand)
Callbacks can be registered/unregistered in READY state only.
@@ -92,12 +92,12 @@
in READY or RESET state, thus registered (user) MspInit/DeInit callbacks can be used
during the Init/DeInit.
In that case first register the MspInit/MspDeInit user callbacks
- using @ref HAL_NOR_RegisterCallback before calling @ref HAL_NOR_DeInit
- or @ref HAL_NOR_Init function.
+ using HAL_NOR_RegisterCallback before calling HAL_NOR_DeInit
+ or HAL_NOR_Init function.
When The compilation define USE_HAL_NOR_REGISTER_CALLBACKS is set to 0 or
not defined, the callback registering feature is not available
- and weak (surcharged) callbacks are used.
+ and weak (overridden) callbacks are used.
@endverbatim
******************************************************************************
@@ -126,6 +126,11 @@
*/
/* Constants to define address to set to write a command */
+#define NOR_CMD_ADDRESS_FIRST_BYTE (uint16_t)0x0AAA
+#define NOR_CMD_ADDRESS_FIRST_CFI_BYTE (uint16_t)0x00AA
+#define NOR_CMD_ADDRESS_SECOND_BYTE (uint16_t)0x0555
+#define NOR_CMD_ADDRESS_THIRD_BYTE (uint16_t)0x0AAA
+
#define NOR_CMD_ADDRESS_FIRST (uint16_t)0x0555
#define NOR_CMD_ADDRESS_FIRST_CFI (uint16_t)0x0055
#define NOR_CMD_ADDRESS_SECOND (uint16_t)0x02AA
@@ -263,7 +268,8 @@
(void)FSMC_NORSRAM_Timing_Init(hnor->Instance, Timing, hnor->Init.NSBank);
/* Initialize NOR extended mode timing Interface */
- (void)FSMC_NORSRAM_Extended_Timing_Init(hnor->Extended, ExtTiming, hnor->Init.NSBank, hnor->Init.ExtendedMode);
+ (void)FSMC_NORSRAM_Extended_Timing_Init(hnor->Extended, ExtTiming,
+ hnor->Init.NSBank, hnor->Init.ExtendedMode);
/* Enable the NORSRAM device */
__FSMC_NORSRAM_ENABLE(hnor->Instance, hnor->Init.NSBank);
@@ -299,21 +305,30 @@
deviceaddress = NOR_MEMORY_ADRESS4;
}
- FSMC_NORSRAM_WriteOperation_Enable(hnor->Instance,hnor->Init.NSBank);
-
- /* Get the value of the command set */
- NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_FIRST_CFI), NOR_CMD_DATA_CFI);
- hnor->CommandSet = *(__IO uint16_t *) NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_ADDRESS_COMMAND_SET);
-
- status = HAL_NOR_ReturnToReadMode(hnor);
-
if (hnor->Init.WriteOperation == FSMC_WRITE_OPERATION_DISABLE)
{
- FSMC_NORSRAM_WriteOperation_Disable(hnor->Instance,hnor->Init.NSBank);
+ (void)FSMC_NORSRAM_WriteOperation_Disable(hnor->Instance, hnor->Init.NSBank);
/* Update the NOR controller state */
hnor->State = HAL_NOR_STATE_PROTECTED;
}
+ else
+ {
+ /* Get the value of the command set */
+ if (uwNORMemoryDataWidth == NOR_MEMORY_8B)
+ {
+ NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_FIRST_CFI_BYTE),
+ NOR_CMD_DATA_CFI);
+ }
+ else
+ {
+ NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_FIRST_CFI), NOR_CMD_DATA_CFI);
+ }
+
+ hnor->CommandSet = *(__IO uint16_t *) NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_ADDRESS_COMMAND_SET);
+
+ status = HAL_NOR_ReturnToReadMode(hnor);
+ }
return status;
}
@@ -438,7 +453,11 @@
{
return HAL_BUSY;
}
- else if ((state == HAL_NOR_STATE_READY) || (state == HAL_NOR_STATE_PROTECTED))
+ else if (state == HAL_NOR_STATE_PROTECTED)
+ {
+ return HAL_ERROR;
+ }
+ else if (state == HAL_NOR_STATE_READY)
{
/* Process Locked */
__HAL_LOCK(hnor);
@@ -467,9 +486,22 @@
/* Send read ID command */
if (hnor->CommandSet == NOR_AMD_FUJITSU_COMMAND_SET)
{
- NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_FIRST), NOR_CMD_DATA_FIRST);
- NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_SECOND), NOR_CMD_DATA_SECOND);
- NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_THIRD), NOR_CMD_DATA_AUTO_SELECT);
+ if (uwNORMemoryDataWidth == NOR_MEMORY_8B)
+ {
+ NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_FIRST_BYTE),
+ NOR_CMD_DATA_FIRST);
+ NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_SECOND_BYTE),
+ NOR_CMD_DATA_SECOND);
+ NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_THIRD_BYTE),
+ NOR_CMD_DATA_AUTO_SELECT);
+ }
+ else
+ {
+ NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_FIRST), NOR_CMD_DATA_FIRST);
+ NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_SECOND), NOR_CMD_DATA_SECOND);
+ NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_THIRD),
+ NOR_CMD_DATA_AUTO_SELECT);
+ }
}
else if (hnor->CommandSet == NOR_INTEL_SHARP_EXT_COMMAND_SET)
{
@@ -525,7 +557,11 @@
{
return HAL_BUSY;
}
- else if ((state == HAL_NOR_STATE_READY) || (state == HAL_NOR_STATE_PROTECTED))
+ else if (state == HAL_NOR_STATE_PROTECTED)
+ {
+ return HAL_ERROR;
+ }
+ else if (state == HAL_NOR_STATE_READY)
{
/* Process Locked */
__HAL_LOCK(hnor);
@@ -599,7 +635,11 @@
{
return HAL_BUSY;
}
- else if ((state == HAL_NOR_STATE_READY) || (state == HAL_NOR_STATE_PROTECTED))
+ else if (state == HAL_NOR_STATE_PROTECTED)
+ {
+ return HAL_ERROR;
+ }
+ else if (state == HAL_NOR_STATE_READY)
{
/* Process Locked */
__HAL_LOCK(hnor);
@@ -628,9 +668,22 @@
/* Send read data command */
if (hnor->CommandSet == NOR_AMD_FUJITSU_COMMAND_SET)
{
- NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_FIRST), NOR_CMD_DATA_FIRST);
- NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_SECOND), NOR_CMD_DATA_SECOND);
- NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_THIRD), NOR_CMD_DATA_READ_RESET);
+ if (uwNORMemoryDataWidth == NOR_MEMORY_8B)
+ {
+ NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_FIRST_BYTE),
+ NOR_CMD_DATA_FIRST);
+ NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_SECOND_BYTE),
+ NOR_CMD_DATA_SECOND);
+ NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_THIRD_BYTE),
+ NOR_CMD_DATA_READ_RESET);
+ }
+ else
+ {
+ NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_FIRST), NOR_CMD_DATA_FIRST);
+ NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_SECOND), NOR_CMD_DATA_SECOND);
+ NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_THIRD),
+ NOR_CMD_DATA_READ_RESET);
+ }
}
else if (hnor->CommandSet == NOR_INTEL_SHARP_EXT_COMMAND_SET)
{
@@ -709,9 +762,21 @@
/* Send program data command */
if (hnor->CommandSet == NOR_AMD_FUJITSU_COMMAND_SET)
{
- NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_FIRST), NOR_CMD_DATA_FIRST);
- NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_SECOND), NOR_CMD_DATA_SECOND);
- NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_THIRD), NOR_CMD_DATA_PROGRAM);
+ if (uwNORMemoryDataWidth == NOR_MEMORY_8B)
+ {
+ NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_FIRST_BYTE),
+ NOR_CMD_DATA_FIRST);
+ NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_SECOND_BYTE),
+ NOR_CMD_DATA_SECOND);
+ NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_THIRD_BYTE),
+ NOR_CMD_DATA_PROGRAM);
+ }
+ else
+ {
+ NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_FIRST), NOR_CMD_DATA_FIRST);
+ NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_SECOND), NOR_CMD_DATA_SECOND);
+ NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_THIRD), NOR_CMD_DATA_PROGRAM);
+ }
}
else if (hnor->CommandSet == NOR_INTEL_SHARP_EXT_COMMAND_SET)
{
@@ -768,7 +833,11 @@
{
return HAL_BUSY;
}
- else if ((state == HAL_NOR_STATE_READY) || (state == HAL_NOR_STATE_PROTECTED))
+ else if (state == HAL_NOR_STATE_PROTECTED)
+ {
+ return HAL_ERROR;
+ }
+ else if (state == HAL_NOR_STATE_READY)
{
/* Process Locked */
__HAL_LOCK(hnor);
@@ -797,9 +866,22 @@
/* Send read data command */
if (hnor->CommandSet == NOR_AMD_FUJITSU_COMMAND_SET)
{
- NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_FIRST), NOR_CMD_DATA_FIRST);
- NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_SECOND), NOR_CMD_DATA_SECOND);
- NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_THIRD), NOR_CMD_DATA_READ_RESET);
+ if (uwNORMemoryDataWidth == NOR_MEMORY_8B)
+ {
+ NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_FIRST_BYTE),
+ NOR_CMD_DATA_FIRST);
+ NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_SECOND_BYTE),
+ NOR_CMD_DATA_SECOND);
+ NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_THIRD_BYTE),
+ NOR_CMD_DATA_READ_RESET);
+ }
+ else
+ {
+ NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_FIRST), NOR_CMD_DATA_FIRST);
+ NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_SECOND), NOR_CMD_DATA_SECOND);
+ NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_THIRD),
+ NOR_CMD_DATA_READ_RESET);
+ }
}
else if (hnor->CommandSet == NOR_INTEL_SHARP_EXT_COMMAND_SET)
{
@@ -892,10 +974,20 @@
if (hnor->CommandSet == NOR_AMD_FUJITSU_COMMAND_SET)
{
- /* Issue unlock command sequence */
- NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_FIRST), NOR_CMD_DATA_FIRST);
- NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_SECOND), NOR_CMD_DATA_SECOND);
-
+ if (uwNORMemoryDataWidth == NOR_MEMORY_8B)
+ {
+ /* Issue unlock command sequence */
+ NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_FIRST_BYTE),
+ NOR_CMD_DATA_FIRST);
+ NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_SECOND_BYTE),
+ NOR_CMD_DATA_SECOND);
+ }
+ else
+ {
+ /* Issue unlock command sequence */
+ NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_FIRST), NOR_CMD_DATA_FIRST);
+ NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_SECOND), NOR_CMD_DATA_SECOND);
+ }
/* Write Buffer Load Command */
NOR_WRITE((deviceaddress + uwAddress), NOR_CMD_DATA_BUFFER_AND_PROG);
NOR_WRITE((deviceaddress + uwAddress), (uint16_t)(uwBufferSize - 1U));
@@ -995,14 +1087,26 @@
/* Send block erase command sequence */
if (hnor->CommandSet == NOR_AMD_FUJITSU_COMMAND_SET)
{
- NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_FIRST), NOR_CMD_DATA_FIRST);
- NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_SECOND), NOR_CMD_DATA_SECOND);
- NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_THIRD),
- NOR_CMD_DATA_CHIP_BLOCK_ERASE_THIRD);
- NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_FOURTH),
- NOR_CMD_DATA_CHIP_BLOCK_ERASE_FOURTH);
- NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_FIFTH),
- NOR_CMD_DATA_CHIP_BLOCK_ERASE_FIFTH);
+ if (uwNORMemoryDataWidth == NOR_MEMORY_8B)
+ {
+ NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_FIRST_BYTE),
+ NOR_CMD_DATA_FIRST);
+ NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_SECOND_BYTE),
+ NOR_CMD_DATA_SECOND);
+ NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_THIRD_BYTE),
+ NOR_CMD_DATA_CHIP_BLOCK_ERASE_THIRD);
+ }
+ else
+ {
+ NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_FIRST), NOR_CMD_DATA_FIRST);
+ NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_SECOND), NOR_CMD_DATA_SECOND);
+ NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_THIRD),
+ NOR_CMD_DATA_CHIP_BLOCK_ERASE_THIRD);
+ NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_FOURTH),
+ NOR_CMD_DATA_CHIP_BLOCK_ERASE_FOURTH);
+ NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_FIFTH),
+ NOR_CMD_DATA_CHIP_BLOCK_ERASE_FIFTH);
+ }
NOR_WRITE((uint32_t)(BlockAddress + Address), NOR_CMD_DATA_BLOCK_ERASE);
}
else if (hnor->CommandSet == NOR_INTEL_SHARP_EXT_COMMAND_SET)
@@ -1080,15 +1184,28 @@
/* Send NOR chip erase command sequence */
if (hnor->CommandSet == NOR_AMD_FUJITSU_COMMAND_SET)
{
- NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_FIRST), NOR_CMD_DATA_FIRST);
- NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_SECOND), NOR_CMD_DATA_SECOND);
- NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_THIRD),
- NOR_CMD_DATA_CHIP_BLOCK_ERASE_THIRD);
- NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_FOURTH),
- NOR_CMD_DATA_CHIP_BLOCK_ERASE_FOURTH);
- NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_FIFTH),
- NOR_CMD_DATA_CHIP_BLOCK_ERASE_FIFTH);
- NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_SIXTH), NOR_CMD_DATA_CHIP_ERASE);
+ if (uwNORMemoryDataWidth == NOR_MEMORY_8B)
+ {
+ NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_FIRST_BYTE),
+ NOR_CMD_DATA_FIRST);
+ NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_SECOND_BYTE),
+ NOR_CMD_DATA_SECOND);
+ NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_THIRD_BYTE),
+ NOR_CMD_DATA_CHIP_BLOCK_ERASE_THIRD);
+ }
+ else
+ {
+ NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_FIRST), NOR_CMD_DATA_FIRST);
+ NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_SECOND), NOR_CMD_DATA_SECOND);
+ NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_THIRD),
+ NOR_CMD_DATA_CHIP_BLOCK_ERASE_THIRD);
+ NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_FOURTH),
+ NOR_CMD_DATA_CHIP_BLOCK_ERASE_FOURTH);
+ NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_FIFTH),
+ NOR_CMD_DATA_CHIP_BLOCK_ERASE_FIFTH);
+ NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_SIXTH),
+ NOR_CMD_DATA_CHIP_ERASE);
+ }
}
else
{
@@ -1128,7 +1245,11 @@
{
return HAL_BUSY;
}
- else if ((state == HAL_NOR_STATE_READY) || (state == HAL_NOR_STATE_PROTECTED))
+ else if (state == HAL_NOR_STATE_PROTECTED)
+ {
+ return HAL_ERROR;
+ }
+ else if (state == HAL_NOR_STATE_READY)
{
/* Process Locked */
__HAL_LOCK(hnor);
@@ -1155,8 +1276,15 @@
}
/* Send read CFI query command */
- NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_FIRST_CFI), NOR_CMD_DATA_CFI);
-
+ if (uwNORMemoryDataWidth == NOR_MEMORY_8B)
+ {
+ NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_FIRST_CFI_BYTE),
+ NOR_CMD_DATA_CFI);
+ }
+ else
+ {
+ NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_FIRST_CFI), NOR_CMD_DATA_CFI);
+ }
/* read the NOR CFI information */
pNOR_CFI->CFI_1 = *(__IO uint16_t *) NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, CFI1_ADDRESS);
pNOR_CFI->CFI_2 = *(__IO uint16_t *) NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, CFI2_ADDRESS);
@@ -1180,7 +1308,7 @@
#if (USE_HAL_NOR_REGISTER_CALLBACKS == 1)
/**
* @brief Register a User NOR Callback
- * To be used instead of the weak (surcharged) predefined callback
+ * To be used to override the weak predefined callback
* @param hnor : NOR handle
* @param CallbackId : ID of the callback to be registered
* This parameter can be one of the following values:
@@ -1200,9 +1328,6 @@
return HAL_ERROR;
}
- /* Process locked */
- __HAL_LOCK(hnor);
-
state = hnor->State;
if ((state == HAL_NOR_STATE_READY) || (state == HAL_NOR_STATE_RESET) || (state == HAL_NOR_STATE_PROTECTED))
{
@@ -1226,14 +1351,12 @@
status = HAL_ERROR;
}
- /* Release Lock */
- __HAL_UNLOCK(hnor);
return status;
}
/**
* @brief Unregister a User NOR Callback
- * NOR Callback is redirected to the weak (surcharged) predefined callback
+ * NOR Callback is redirected to the weak predefined callback
* @param hnor : NOR handle
* @param CallbackId : ID of the callback to be unregistered
* This parameter can be one of the following values:
@@ -1246,9 +1369,6 @@
HAL_StatusTypeDef status = HAL_OK;
HAL_NOR_StateTypeDef state;
- /* Process locked */
- __HAL_LOCK(hnor);
-
state = hnor->State;
if ((state == HAL_NOR_STATE_READY) || (state == HAL_NOR_STATE_RESET) || (state == HAL_NOR_STATE_PROTECTED))
{
@@ -1272,8 +1392,6 @@
status = HAL_ERROR;
}
- /* Release Lock */
- __HAL_UNLOCK(hnor);
return status;
}
#endif /* (USE_HAL_NOR_REGISTER_CALLBACKS) */
@@ -1390,7 +1508,7 @@
* the configuration information for NOR module.
* @retval NOR controller state
*/
-HAL_NOR_StateTypeDef HAL_NOR_GetState(NOR_HandleTypeDef *hnor)
+HAL_NOR_StateTypeDef HAL_NOR_GetState(const NOR_HandleTypeDef *hnor)
{
return hnor->State;
}
@@ -1518,3 +1636,4 @@
/**
* @}
*/
+
diff --git a/Src/stm32f2xx_hal_pccard.c b/Src/stm32f2xx_hal_pccard.c
index 6ee3827..2361d7e 100644
--- a/Src/stm32f2xx_hal_pccard.c
+++ b/Src/stm32f2xx_hal_pccard.c
@@ -61,25 +61,25 @@
The compilation define USE_HAL_PCCARD_REGISTER_CALLBACKS when set to 1
allows the user to configure dynamically the driver callbacks.
- Use Functions @ref HAL_PCCARD_RegisterCallback() to register a user callback,
+ Use Functions HAL_PCCARD_RegisterCallback() to register a user callback,
it allows to register following callbacks:
(+) MspInitCallback : PCCARD MspInit.
(+) MspDeInitCallback : PCCARD MspDeInit.
This function takes as parameters the HAL peripheral handle, the Callback ID
and a pointer to the user callback function.
- Use function @ref HAL_PCCARD_UnRegisterCallback() to reset a callback to the default
+ Use function HAL_PCCARD_UnRegisterCallback() to reset a callback to the default
weak (surcharged) function. It allows to reset following callbacks:
(+) MspInitCallback : PCCARD MspInit.
(+) MspDeInitCallback : PCCARD MspDeInit.
This function) takes as parameters the HAL peripheral handle and the Callback ID.
- By default, after the @ref HAL_PCCARD_Init and if the state is HAL_PCCARD_STATE_RESET
+ By default, after the HAL_PCCARD_Init and if the state is HAL_PCCARD_STATE_RESET
all callbacks are reset to the corresponding legacy weak (surcharged) functions.
Exception done for MspInit and MspDeInit callbacks that are respectively
- reset to the legacy weak (surcharged) functions in the @ref HAL_PCCARD_Init
- and @ref HAL_PCCARD_DeInit only when these callbacks are null (not registered beforehand).
- If not, MspInit or MspDeInit are not null, the @ref HAL_PCCARD_Init and @ref HAL_PCCARD_DeInit
+ reset to the legacy weak (surcharged) functions in the HAL_PCCARD_Init
+ and HAL_PCCARD_DeInit only when these callbacks are null (not registered beforehand).
+ If not, MspInit or MspDeInit are not null, the HAL_PCCARD_Init and HAL_PCCARD_DeInit
keep and use the user MspInit/MspDeInit callbacks (registered beforehand)
Callbacks can be registered/unregistered in READY state only.
@@ -87,8 +87,8 @@
in READY or RESET state, thus registered (user) MspInit/DeInit callbacks can be used
during the Init/DeInit.
In that case first register the MspInit/MspDeInit user callbacks
- using @ref HAL_PCCARD_RegisterCallback before calling @ref HAL_PCCARD_DeInit
- or @ref HAL_PCCARD_Init function.
+ using HAL_PCCARD_RegisterCallback before calling HAL_PCCARD_DeInit
+ or HAL_PCCARD_Init function.
When The compilation define USE_HAL_PCCARD_REGISTER_CALLBACKS is set to 0 or
not defined, the callback registering feature is not available
@@ -941,3 +941,4 @@
/**
* @}
*/
+
diff --git a/Src/stm32f2xx_hal_pcd.c b/Src/stm32f2xx_hal_pcd.c
index ca2e1bf..9946ab0 100644
--- a/Src/stm32f2xx_hal_pcd.c
+++ b/Src/stm32f2xx_hal_pcd.c
@@ -309,7 +309,7 @@
* @arg @ref HAL_PCD_SUSPEND_CB_ID USB PCD Suspend callback ID
* @arg @ref HAL_PCD_RESUME_CB_ID USB PCD Resume callback ID
* @arg @ref HAL_PCD_CONNECT_CB_ID USB PCD Connect callback ID
- * @arg @ref HAL_PCD_DISCONNECT_CB_ID OTG PCD Disconnect callback ID
+ * @arg @ref HAL_PCD_DISCONNECT_CB_ID USB PCD Disconnect callback ID
* @arg @ref HAL_PCD_MSPINIT_CB_ID MspDeInit callback ID
* @arg @ref HAL_PCD_MSPDEINIT_CB_ID MspDeInit callback ID
* @param pCallback pointer to the Callback function
@@ -413,7 +413,7 @@
/**
* @brief Unregister an USB PCD Callback
- * USB PCD callabck is redirected to the weak predefined callback
+ * USB PCD callback is redirected to the weak predefined callback
* @param hpcd USB PCD handle
* @param CallbackID ID of the callback to be unregistered
* This parameter can be one of the following values:
@@ -423,7 +423,7 @@
* @arg @ref HAL_PCD_SUSPEND_CB_ID USB PCD Suspend callback ID
* @arg @ref HAL_PCD_RESUME_CB_ID USB PCD Resume callback ID
* @arg @ref HAL_PCD_CONNECT_CB_ID USB PCD Connect callback ID
- * @arg @ref HAL_PCD_DISCONNECT_CB_ID OTG PCD Disconnect callback ID
+ * @arg @ref HAL_PCD_DISCONNECT_CB_ID USB PCD Disconnect callback ID
* @arg @ref HAL_PCD_MSPINIT_CB_ID MspDeInit callback ID
* @arg @ref HAL_PCD_MSPDEINIT_CB_ID MspDeInit callback ID
* @retval HAL status
@@ -888,7 +888,7 @@
uint32_t epint;
uint32_t epnum;
uint32_t fifoemptymsk;
- uint32_t temp;
+ uint32_t RegVal;
/* ensure that we are in device mode */
if (USB_GetMode(hpcd->Instance) == USB_OTG_MODE_DEVICE)
@@ -899,6 +899,9 @@
return;
}
+ /* store current frame number */
+ hpcd->FrameNumber = (USBx_DEVICE->DSTS & USB_OTG_DSTS_FNSOF_Msk) >> USB_OTG_DSTS_FNSOF_Pos;
+
if (__HAL_PCD_GET_FLAG(hpcd, USB_OTG_GINTSTS_MMIS))
{
/* incorrect mode, acknowledge the interrupt */
@@ -910,30 +913,31 @@
{
USB_MASK_INTERRUPT(hpcd->Instance, USB_OTG_GINTSTS_RXFLVL);
- temp = USBx->GRXSTSP;
+ RegVal = USBx->GRXSTSP;
- ep = &hpcd->OUT_ep[temp & USB_OTG_GRXSTSP_EPNUM];
+ ep = &hpcd->OUT_ep[RegVal & USB_OTG_GRXSTSP_EPNUM];
- if (((temp & USB_OTG_GRXSTSP_PKTSTS) >> 17) == STS_DATA_UPDT)
+ if (((RegVal & USB_OTG_GRXSTSP_PKTSTS) >> 17) == STS_DATA_UPDT)
{
- if ((temp & USB_OTG_GRXSTSP_BCNT) != 0U)
+ if ((RegVal & USB_OTG_GRXSTSP_BCNT) != 0U)
{
(void)USB_ReadPacket(USBx, ep->xfer_buff,
- (uint16_t)((temp & USB_OTG_GRXSTSP_BCNT) >> 4));
+ (uint16_t)((RegVal & USB_OTG_GRXSTSP_BCNT) >> 4));
- ep->xfer_buff += (temp & USB_OTG_GRXSTSP_BCNT) >> 4;
- ep->xfer_count += (temp & USB_OTG_GRXSTSP_BCNT) >> 4;
+ ep->xfer_buff += (RegVal & USB_OTG_GRXSTSP_BCNT) >> 4;
+ ep->xfer_count += (RegVal & USB_OTG_GRXSTSP_BCNT) >> 4;
}
}
- else if (((temp & USB_OTG_GRXSTSP_PKTSTS) >> 17) == STS_SETUP_UPDT)
+ else if (((RegVal & USB_OTG_GRXSTSP_PKTSTS) >> 17) == STS_SETUP_UPDT)
{
(void)USB_ReadPacket(USBx, (uint8_t *)hpcd->Setup, 8U);
- ep->xfer_count += (temp & USB_OTG_GRXSTSP_BCNT) >> 4;
+ ep->xfer_count += (RegVal & USB_OTG_GRXSTSP_BCNT) >> 4;
}
else
{
/* ... */
}
+
USB_UNMASK_INTERRUPT(hpcd->Instance, USB_OTG_GINTSTS_RXFLVL);
}
@@ -968,6 +972,30 @@
CLEAR_OUT_EP_INTR(epnum, USB_OTG_DOEPINT_OTEPDIS);
}
+ /* Clear OUT Endpoint disable interrupt */
+ if ((epint & USB_OTG_DOEPINT_EPDISD) == USB_OTG_DOEPINT_EPDISD)
+ {
+ if ((USBx->GINTSTS & USB_OTG_GINTSTS_BOUTNAKEFF) == USB_OTG_GINTSTS_BOUTNAKEFF)
+ {
+ USBx_DEVICE->DCTL |= USB_OTG_DCTL_CGONAK;
+ }
+
+ ep = &hpcd->OUT_ep[epnum];
+
+ if (ep->is_iso_incomplete == 1U)
+ {
+ ep->is_iso_incomplete = 0U;
+
+#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
+ hpcd->ISOOUTIncompleteCallback(hpcd, (uint8_t)epnum);
+#else
+ HAL_PCD_ISOOUTIncompleteCallback(hpcd, (uint8_t)epnum);
+#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
+ }
+
+ CLEAR_OUT_EP_INTR(epnum, USB_OTG_DOEPINT_EPDISD);
+ }
+
/* Clear Status Phase Received interrupt */
if ((epint & USB_OTG_DOEPINT_OTEPSPR) == USB_OTG_DOEPINT_OTEPSPR)
{
@@ -1037,6 +1065,21 @@
}
if ((epint & USB_OTG_DIEPINT_EPDISD) == USB_OTG_DIEPINT_EPDISD)
{
+ (void)USB_FlushTxFifo(USBx, epnum);
+
+ ep = &hpcd->IN_ep[epnum];
+
+ if (ep->is_iso_incomplete == 1U)
+ {
+ ep->is_iso_incomplete = 0U;
+
+#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
+ hpcd->ISOINIncompleteCallback(hpcd, (uint8_t)epnum);
+#else
+ HAL_PCD_ISOINIncompleteCallback(hpcd, (uint8_t)epnum);
+#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
+ }
+
CLEAR_IN_EP_INTR(epnum, USB_OTG_DIEPINT_EPDISD);
}
if ((epint & USB_OTG_DIEPINT_TXFE) == USB_OTG_DIEPINT_TXFE)
@@ -1087,7 +1130,6 @@
{
USBx_INEP(i)->DIEPINT = 0xFB7FU;
USBx_INEP(i)->DIEPCTL &= ~USB_OTG_DIEPCTL_STALL;
- USBx_INEP(i)->DIEPCTL |= USB_OTG_DIEPCTL_SNAK;
USBx_OUTEP(i)->DOEPINT = 0xFB7FU;
USBx_OUTEP(i)->DOEPCTL &= ~USB_OTG_DOEPCTL_STALL;
USBx_OUTEP(i)->DOEPCTL |= USB_OTG_DOEPCTL_SNAK;
@@ -1159,18 +1201,37 @@
__HAL_PCD_CLEAR_FLAG(hpcd, USB_OTG_GINTSTS_SOF);
}
+ /* Handle Global OUT NAK effective Interrupt */
+ if (__HAL_PCD_GET_FLAG(hpcd, USB_OTG_GINTSTS_BOUTNAKEFF))
+ {
+ USBx->GINTMSK &= ~USB_OTG_GINTMSK_GONAKEFFM;
+
+ for (epnum = 1U; epnum < hpcd->Init.dev_endpoints; epnum++)
+ {
+ if (hpcd->OUT_ep[epnum].is_iso_incomplete == 1U)
+ {
+ /* Abort current transaction and disable the EP */
+ (void)HAL_PCD_EP_Abort(hpcd, (uint8_t)epnum);
+ }
+ }
+ }
+
/* Handle Incomplete ISO IN Interrupt */
if (__HAL_PCD_GET_FLAG(hpcd, USB_OTG_GINTSTS_IISOIXFR))
{
- /* Keep application checking the corresponding Iso IN endpoint
- causing the incomplete Interrupt */
- epnum = 0U;
+ for (epnum = 1U; epnum < hpcd->Init.dev_endpoints; epnum++)
+ {
+ RegVal = USBx_INEP(epnum)->DIEPCTL;
-#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
- hpcd->ISOINIncompleteCallback(hpcd, (uint8_t)epnum);
-#else
- HAL_PCD_ISOINIncompleteCallback(hpcd, (uint8_t)epnum);
-#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
+ if ((hpcd->IN_ep[epnum].type == EP_TYPE_ISOC) &&
+ ((RegVal & USB_OTG_DIEPCTL_EPENA) == USB_OTG_DIEPCTL_EPENA))
+ {
+ hpcd->IN_ep[epnum].is_iso_incomplete = 1U;
+
+ /* Abort current transaction and disable the EP */
+ (void)HAL_PCD_EP_Abort(hpcd, (uint8_t)(epnum | 0x80U));
+ }
+ }
__HAL_PCD_CLEAR_FLAG(hpcd, USB_OTG_GINTSTS_IISOIXFR);
}
@@ -1178,15 +1239,25 @@
/* Handle Incomplete ISO OUT Interrupt */
if (__HAL_PCD_GET_FLAG(hpcd, USB_OTG_GINTSTS_PXFR_INCOMPISOOUT))
{
- /* Keep application checking the corresponding Iso OUT endpoint
- causing the incomplete Interrupt */
- epnum = 0U;
+ for (epnum = 1U; epnum < hpcd->Init.dev_endpoints; epnum++)
+ {
+ RegVal = USBx_OUTEP(epnum)->DOEPCTL;
-#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
- hpcd->ISOOUTIncompleteCallback(hpcd, (uint8_t)epnum);
-#else
- HAL_PCD_ISOOUTIncompleteCallback(hpcd, (uint8_t)epnum);
-#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
+ if ((hpcd->OUT_ep[epnum].type == EP_TYPE_ISOC) &&
+ ((RegVal & USB_OTG_DOEPCTL_EPENA) == USB_OTG_DOEPCTL_EPENA) &&
+ ((RegVal & (0x1U << 16)) == (hpcd->FrameNumber & 0x1U)))
+ {
+ hpcd->OUT_ep[epnum].is_iso_incomplete = 1U;
+
+ USBx->GINTMSK |= USB_OTG_GINTMSK_GONAKEFFM;
+
+ if ((USBx->GINTSTS & USB_OTG_GINTSTS_BOUTNAKEFF) == 0U)
+ {
+ USBx_DEVICE->DCTL |= USB_OTG_DCTL_SGONAK;
+ break;
+ }
+ }
+ }
__HAL_PCD_CLEAR_FLAG(hpcd, USB_OTG_GINTSTS_PXFR_INCOMPISOOUT);
}
@@ -1206,9 +1277,9 @@
/* Handle Disconnection event Interrupt */
if (__HAL_PCD_GET_FLAG(hpcd, USB_OTG_GINTSTS_OTGINT))
{
- temp = hpcd->Instance->GOTGINT;
+ RegVal = hpcd->Instance->GOTGINT;
- if ((temp & USB_OTG_GOTGINT_SEDET) == USB_OTG_GOTGINT_SEDET)
+ if ((RegVal & USB_OTG_GOTGINT_SEDET) == USB_OTG_GOTGINT_SEDET)
{
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->DisconnectCallback(hpcd);
@@ -1216,7 +1287,7 @@
HAL_PCD_DisconnectCallback(hpcd);
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
}
- hpcd->Instance->GOTGINT |= temp;
+ hpcd->Instance->GOTGINT |= RegVal;
}
}
}
@@ -1515,6 +1586,7 @@
/* Assign a Tx FIFO */
ep->tx_fifo_num = ep->num;
}
+
/* Set initial data PID. */
if (ep_type == EP_TYPE_BULK)
{
@@ -1548,7 +1620,7 @@
ep = &hpcd->OUT_ep[ep_addr & EP_ADDR_MSK];
ep->is_in = 0U;
}
- ep->num = ep_addr & EP_ADDR_MSK;
+ ep->num = ep_addr & EP_ADDR_MSK;
__HAL_LOCK(hpcd);
(void)USB_DeactivateEndpoint(hpcd->Instance, ep);
@@ -1583,14 +1655,7 @@
ep->dma_addr = (uint32_t)pBuf;
}
- if ((ep_addr & EP_ADDR_MSK) == 0U)
- {
- (void)USB_EP0StartXfer(hpcd->Instance, ep, (uint8_t)hpcd->Init.dma_enable);
- }
- else
- {
- (void)USB_EPStartXfer(hpcd->Instance, ep, (uint8_t)hpcd->Init.dma_enable);
- }
+ (void)USB_EPStartXfer(hpcd->Instance, ep, (uint8_t)hpcd->Init.dma_enable);
return HAL_OK;
}
@@ -1601,7 +1666,7 @@
* @param ep_addr endpoint address
* @retval Data Size
*/
-uint32_t HAL_PCD_EP_GetRxCount(PCD_HandleTypeDef *hpcd, uint8_t ep_addr)
+uint32_t HAL_PCD_EP_GetRxCount(PCD_HandleTypeDef const *hpcd, uint8_t ep_addr)
{
return hpcd->OUT_ep[ep_addr & EP_ADDR_MSK].xfer_count;
}
@@ -1631,14 +1696,7 @@
ep->dma_addr = (uint32_t)pBuf;
}
- if ((ep_addr & EP_ADDR_MSK) == 0U)
- {
- (void)USB_EP0StartXfer(hpcd->Instance, ep, (uint8_t)hpcd->Init.dma_enable);
- }
- else
- {
- (void)USB_EPStartXfer(hpcd->Instance, ep, (uint8_t)hpcd->Init.dma_enable);
- }
+ (void)USB_EPStartXfer(hpcd->Instance, ep, (uint8_t)hpcd->Init.dma_enable);
return HAL_OK;
}
@@ -1723,6 +1781,32 @@
}
/**
+ * @brief Abort an USB EP transaction.
+ * @param hpcd PCD handle
+ * @param ep_addr endpoint address
+ * @retval HAL status
+ */
+HAL_StatusTypeDef HAL_PCD_EP_Abort(PCD_HandleTypeDef *hpcd, uint8_t ep_addr)
+{
+ HAL_StatusTypeDef ret;
+ PCD_EPTypeDef *ep;
+
+ if ((0x80U & ep_addr) == 0x80U)
+ {
+ ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK];
+ }
+ else
+ {
+ ep = &hpcd->OUT_ep[ep_addr & EP_ADDR_MSK];
+ }
+
+ /* Stop Xfer */
+ ret = USB_EPStopXfer(hpcd->Instance, ep);
+
+ return ret;
+}
+
+/**
* @brief Flush an endpoint
* @param hpcd PCD handle
* @param ep_addr endpoint address
@@ -1790,11 +1874,40 @@
* @param hpcd PCD handle
* @retval HAL state
*/
-PCD_StateTypeDef HAL_PCD_GetState(PCD_HandleTypeDef *hpcd)
+PCD_StateTypeDef HAL_PCD_GetState(PCD_HandleTypeDef const *hpcd)
{
return hpcd->State;
}
+#if defined (USB_OTG_FS) || defined (USB_OTG_HS)
+/**
+ * @brief Set the USB Device high speed test mode.
+ * @param hpcd PCD handle
+ * @param testmode USB Device high speed test mode
+ * @retval HAL status
+ */
+HAL_StatusTypeDef HAL_PCD_SetTestMode(PCD_HandleTypeDef *hpcd, uint8_t testmode)
+{
+ USB_OTG_GlobalTypeDef *USBx = hpcd->Instance;
+ uint32_t USBx_BASE = (uint32_t)USBx;
+
+ switch (testmode)
+ {
+ case TEST_J:
+ case TEST_K:
+ case TEST_SE0_NAK:
+ case TEST_PACKET:
+ case TEST_FORCE_EN:
+ USBx_DEVICE->DCTL |= (uint32_t)testmode << 4;
+ break;
+
+ default:
+ break;
+ }
+
+ return HAL_OK;
+}
+#endif /* defined (USB_OTG_FS) || defined (USB_OTG_HS) */
/**
* @}
*/
diff --git a/Src/stm32f2xx_hal_rcc.c b/Src/stm32f2xx_hal_rcc.c
index 2ef4eea..574d9de 100644
--- a/Src/stm32f2xx_hal_rcc.c
+++ b/Src/stm32f2xx_hal_rcc.c
@@ -14,8 +14,8 @@
* Copyright (c) 2017 STMicroelectronics.
* All rights reserved.
*
- * This software is licensed under terms that can be found in the LICENSE file
- * in the root directory of this software component.
+ * This software is licensed under terms that can be found in the LICENSE file in
+ * the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
@@ -1222,3 +1222,4 @@
/**
* @}
*/
+
diff --git a/Src/stm32f2xx_hal_rcc_ex.c b/Src/stm32f2xx_hal_rcc_ex.c
index 7d30182..5195c88 100644
--- a/Src/stm32f2xx_hal_rcc_ex.c
+++ b/Src/stm32f2xx_hal_rcc_ex.c
@@ -13,8 +13,8 @@
* Copyright (c) 2017 STMicroelectronics.
* All rights reserved.
*
- * This software is licensed under terms that can be found in the LICENSE file
- * in the root directory of this software component.
+ * This software is licensed under terms that can be found in the LICENSE file in
+ * the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
@@ -321,3 +321,4 @@
/**
* @}
*/
+
diff --git a/Src/stm32f2xx_hal_rng.c b/Src/stm32f2xx_hal_rng.c
index 9b3dc26..a49894b 100644
--- a/Src/stm32f2xx_hal_rng.c
+++ b/Src/stm32f2xx_hal_rng.c
@@ -42,8 +42,8 @@
allows the user to configure dynamically the driver callbacks.
[..]
- Use Function @ref HAL_RNG_RegisterCallback() to register a user callback.
- Function @ref HAL_RNG_RegisterCallback() allows to register following callbacks:
+ Use Function HAL_RNG_RegisterCallback() to register a user callback.
+ Function HAL_RNG_RegisterCallback() allows to register following callbacks:
(+) ErrorCallback : RNG Error Callback.
(+) MspInitCallback : RNG MspInit.
(+) MspDeInitCallback : RNG MspDeInit.
@@ -51,9 +51,9 @@
and a pointer to the user callback function.
[..]
- Use function @ref HAL_RNG_UnRegisterCallback() to reset a callback to the default
- weak (surcharged) function.
- @ref HAL_RNG_UnRegisterCallback() takes as parameters the HAL peripheral handle,
+ Use function HAL_RNG_UnRegisterCallback() to reset a callback to the default
+ weak (overridden) function.
+ HAL_RNG_UnRegisterCallback() takes as parameters the HAL peripheral handle,
and the Callback ID.
This function allows to reset following callbacks:
(+) ErrorCallback : RNG Error Callback.
@@ -62,16 +62,16 @@
[..]
For specific callback ReadyDataCallback, use dedicated register callbacks:
- respectively @ref HAL_RNG_RegisterReadyDataCallback() , @ref HAL_RNG_UnRegisterReadyDataCallback().
+ respectively HAL_RNG_RegisterReadyDataCallback() , HAL_RNG_UnRegisterReadyDataCallback().
[..]
- By default, after the @ref HAL_RNG_Init() and when the state is HAL_RNG_STATE_RESET
- all callbacks are set to the corresponding weak (surcharged) functions:
- example @ref HAL_RNG_ErrorCallback().
+ By default, after the HAL_RNG_Init() and when the state is HAL_RNG_STATE_RESET
+ all callbacks are set to the corresponding weak (overridden) functions:
+ example HAL_RNG_ErrorCallback().
Exception done for MspInit and MspDeInit functions that are respectively
- reset to the legacy weak (surcharged) functions in the @ref HAL_RNG_Init()
- and @ref HAL_RNG_DeInit() only when these callbacks are null (not registered beforehand).
- If not, MspInit or MspDeInit are not null, the @ref HAL_RNG_Init() and @ref HAL_RNG_DeInit()
+ reset to the legacy weak (overridden) functions in the HAL_RNG_Init()
+ and HAL_RNG_DeInit() only when these callbacks are null (not registered beforehand).
+ If not, MspInit or MspDeInit are not null, the HAL_RNG_Init() and HAL_RNG_DeInit()
keep and use the user MspInit/MspDeInit callbacks (registered beforehand).
[..]
@@ -80,13 +80,13 @@
in HAL_RNG_STATE_READY or HAL_RNG_STATE_RESET state, thus registered (user)
MspInit/DeInit callbacks can be used during the Init/DeInit.
In that case first register the MspInit/MspDeInit user callbacks
- using @ref HAL_RNG_RegisterCallback() before calling @ref HAL_RNG_DeInit()
- or @ref HAL_RNG_Init() function.
+ using HAL_RNG_RegisterCallback() before calling HAL_RNG_DeInit()
+ or HAL_RNG_Init() function.
[..]
When The compilation define USE_HAL_RNG_REGISTER_CALLBACKS is set to 0 or
not defined, the callback registration feature is not available
- and weak (surcharged) callbacks are used.
+ and weak (overridden) callbacks are used.
@endverbatim
******************************************************************************
@@ -307,8 +307,6 @@
hrng->ErrorCode = HAL_RNG_ERROR_INVALID_CALLBACK;
return HAL_ERROR;
}
- /* Process locked */
- __HAL_LOCK(hrng);
if (HAL_RNG_STATE_READY == hrng->State)
{
@@ -362,14 +360,12 @@
status = HAL_ERROR;
}
- /* Release Lock */
- __HAL_UNLOCK(hrng);
return status;
}
/**
* @brief Unregister an RNG Callback
- * RNG callabck is redirected to the weak predefined callback
+ * RNG callback is redirected to the weak predefined callback
* @param hrng RNG handle
* @param CallbackID ID of the callback to be unregistered
* This parameter can be one of the following values:
@@ -382,8 +378,6 @@
{
HAL_StatusTypeDef status = HAL_OK;
- /* Process locked */
- __HAL_LOCK(hrng);
if (HAL_RNG_STATE_READY == hrng->State)
{
@@ -437,8 +431,6 @@
status = HAL_ERROR;
}
- /* Release Lock */
- __HAL_UNLOCK(hrng);
return status;
}
@@ -768,7 +760,7 @@
* the configuration information for RNG.
* @retval random value
*/
-uint32_t HAL_RNG_ReadLastRandomNumber(RNG_HandleTypeDef *hrng)
+uint32_t HAL_RNG_ReadLastRandomNumber(const RNG_HandleTypeDef *hrng)
{
return (hrng->RandomNumber);
}
@@ -830,7 +822,7 @@
* the configuration information for RNG.
* @retval HAL state
*/
-HAL_RNG_StateTypeDef HAL_RNG_GetState(RNG_HandleTypeDef *hrng)
+HAL_RNG_StateTypeDef HAL_RNG_GetState(const RNG_HandleTypeDef *hrng)
{
return hrng->State;
}
@@ -840,7 +832,7 @@
* @param hrng: pointer to a RNG_HandleTypeDef structure.
* @retval RNG Error Code
*/
-uint32_t HAL_RNG_GetError(RNG_HandleTypeDef *hrng)
+uint32_t HAL_RNG_GetError(const RNG_HandleTypeDef *hrng)
{
/* Return RNG Error Code */
return hrng->ErrorCode;
@@ -864,3 +856,4 @@
/**
* @}
*/
+
diff --git a/Src/stm32f2xx_hal_rtc.c b/Src/stm32f2xx_hal_rtc.c
index ac975f0..30fe52c 100644
--- a/Src/stm32f2xx_hal_rtc.c
+++ b/Src/stm32f2xx_hal_rtc.c
@@ -4,10 +4,10 @@
* @author MCD Application Team
* @brief RTC HAL module driver.
* This file provides firmware functions to manage the following
- * functionalities of the Real Time Clock (RTC) peripheral:
+ * functionalities of the Real-Time Clock (RTC) peripheral:
* + Initialization and de-initialization functions
- * + RTC Time and Date functions
- * + RTC Alarm functions
+ * + RTC Calendar (Time and Date) configuration functions
+ * + RTC Alarms (Alarm A and Alarm B) configuration functions
* + Peripheral Control functions
* + Peripheral State functions
*
@@ -24,12 +24,12 @@
******************************************************************************
@verbatim
==============================================================================
- ##### Backup Domain Operating Condition #####
+ ##### RTC and Backup Domain Operating Condition #####
==============================================================================
[..] The real-time clock (RTC), the RTC backup registers, and the backup
SRAM (BKP SRAM) can be powered from the VBAT voltage when the main
VDD supply is powered off.
- To retain the content of the RTC backup registers, backup SRAM, and supply
+ To retain the content of the RTC backup registers, BKP SRAM, and supply
the RTC when VDD is turned off, VBAT pin can be connected to an optional
standby voltage supplied by a battery or by another source.
@@ -37,27 +37,25 @@
off, the VBAT pin powers the following blocks:
(#) The RTC
(#) The LSE oscillator
- (#) The backup SRAM when the low power backup regulator is enabled
- (#) PC13 to PC15 I/Os, plus PI8 I/O (when available)
+ (#) The BKP SRAM when the low power backup regulator is enabled
[..] When the backup domain is supplied by VDD (analog switch connected to VDD),
the following pins are available:
(#) PC14 and PC15 can be used as either GPIO or LSE pins
(#) PC13 can be used as a GPIO or as the RTC_AF1 pin
- (#) PI8 can be used as a GPIO or as the RTC_AF2 pin
[..] When the backup domain is supplied by VBAT (analog switch connected to VBAT
because VDD is not present), the following pins are available:
(#) PC14 and PC15 can be used as LSE pins only
(#) PC13 can be used as the RTC_AF1 pin
- (#) PI8 can be used as the RTC_AF2 pin
##### Backup Domain Reset #####
==================================================================
[..] The backup domain reset sets all RTC registers and the RCC_BDCR register
- to their reset values. The BKPSRAM is not affected by this reset. The only
- way to reset the BKPSRAM is through the Flash interface by requesting
- a protection level change from 1 to 0.
+ to their reset values.
+ The BKP SRAM is not affected by this reset. The only way to reset the BKP
+ SRAM is through the Flash interface by requesting a protection level
+ change from 1 to 0.
[..] A backup domain reset is generated when one of the following events occurs:
(#) Software reset, triggered by setting the BDRST bit in the
RCC Backup domain control register (RCC_BDCR).
@@ -65,19 +63,18 @@
##### Backup Domain Access #####
==================================================================
- [..] After reset, the backup domain (RTC registers, RTC backup data
- registers and backup SRAM) is protected against possible unwanted write
- accesses.
+ [..] After reset, the backup domain (RTC registers, RTC backup data registers
+ and BKP SRAM) is protected against possible unwanted write accesses.
[..] To enable access to the RTC Domain and RTC registers, proceed as follows:
(+) Enable the Power Controller (PWR) APB1 interface clock using the
- __HAL_RCC_PWR_CLK_ENABLE() function.
+ __HAL_RCC_PWR_CLK_ENABLE() macro.
(+) Enable access to RTC domain using the HAL_PWR_EnableBkUpAccess() function.
- (+) Select the RTC clock source using the __HAL_RCC_RTC_CONFIG() function.
- (+) Enable RTC Clock using the __HAL_RCC_RTC_ENABLE() function.
+ (+) Select the RTC clock source using the __HAL_RCC_RTC_CONFIG() macro.
+ (+) Enable RTC Clock using the __HAL_RCC_RTC_ENABLE() macro.
-
- ##### How to use this driver #####
- ==================================================================
+ ==============================================================================
+ ##### How to use this driver #####
+ ==============================================================================
[..]
(+) Enable the RTC domain access (see description in the section above).
(+) Configure the RTC Prescaler (Asynchronous and Synchronous) and RTC hour
@@ -88,13 +85,21 @@
[..]
(+) To configure the RTC Calendar (Time and Date) use the HAL_RTC_SetTime()
and HAL_RTC_SetDate() functions.
- (+) To read the RTC Calendar, use the HAL_RTC_GetTime() and HAL_RTC_GetDate() functions.
+ (+) To read the RTC Calendar, use the HAL_RTC_GetTime() and HAL_RTC_GetDate()
+ functions.
+ (+) To manage the RTC summer or winter time change, use the following
+ functions:
+ (++) HAL_RTC_DST_Add1Hour() or HAL_RTC_DST_Sub1Hour to add or subtract
+ 1 hour from the calendar time.
+ (++) HAL_RTC_DST_SetStoreOperation() or HAL_RTC_DST_ClearStoreOperation
+ to memorize whether the time change has been performed or not.
*** Alarm configuration ***
===========================
[..]
(+) To configure the RTC Alarm use the HAL_RTC_SetAlarm() function.
- You can also configure the RTC Alarm with interrupt mode using the HAL_RTC_SetAlarm_IT() function.
+ You can also configure the RTC Alarm with interrupt mode using the
+ HAL_RTC_SetAlarm_IT() function.
(+) To read the RTC Alarm, use the HAL_RTC_GetAlarm() function.
##### RTC and low power modes #####
@@ -102,69 +107,70 @@
[..] The MCU can be woken up from a low power mode by an RTC alternate
function.
[..] The RTC alternate functions are the RTC alarms (Alarm A and Alarm B),
- RTC wake-up, RTC tamper event detection and RTC time stamp event detection.
+ RTC wakeup, RTC tamper event detection and RTC timestamp event detection.
These RTC alternate functions can wake up the system from the Stop and
Standby low power modes.
[..] The system can also wake up from low power modes without depending
- on an external interrupt (Auto-wake-up mode), by using the RTC alarm
- or the RTC wake-up events.
+ on an external interrupt (Auto-wakeup mode), by using the RTC alarm
+ or the RTC wakeup events.
[..] The RTC provides a programmable time base for waking up from the
Stop or Standby mode at regular intervals.
- Wake-up from STOP and STANDBY modes is possible only when the RTC clock source
- is LSE or LSI.
+ Wakeup from STOP and STANDBY modes is possible only when the RTC clock
+ source is LSE or LSI.
*** Callback registration ***
=============================================
[..]
The compilation define USE_HAL_RTC_REGISTER_CALLBACKS when set to 1
allows the user to configure dynamically the driver callbacks.
- Use Function @ref HAL_RTC_RegisterCallback() to register an interrupt callback.
+ Use Function HAL_RTC_RegisterCallback() to register an interrupt callback.
[..]
- Function @ref HAL_RTC_RegisterCallback() allows to register following callbacks:
+ Function HAL_RTC_RegisterCallback() allows to register following callbacks:
(+) AlarmAEventCallback : RTC Alarm A Event callback.
(+) AlarmBEventCallback : RTC Alarm B Event callback.
- (+) TimeStampEventCallback : RTC TimeStamp Event callback.
+ (+) TimeStampEventCallback : RTC Timestamp Event callback.
(+) WakeUpTimerEventCallback : RTC WakeUpTimer Event callback.
(+) Tamper1EventCallback : RTC Tamper 1 Event callback.
(+) MspInitCallback : RTC MspInit callback.
(+) MspDeInitCallback : RTC MspDeInit callback.
- [..]
+ [..]
This function takes as parameters the HAL peripheral handle, the Callback ID
and a pointer to the user callback function.
[..]
- Use function @ref HAL_RTC_UnRegisterCallback() to reset a callback to the default
+ Use function HAL_RTC_UnRegisterCallback() to reset a callback to the default
weak function.
- @ref HAL_RTC_UnRegisterCallback() takes as parameters the HAL peripheral handle,
+ HAL_RTC_UnRegisterCallback() takes as parameters the HAL peripheral handle,
and the Callback ID.
This function allows to reset following callbacks:
(+) AlarmAEventCallback : RTC Alarm A Event callback.
(+) AlarmBEventCallback : RTC Alarm B Event callback.
- (+) TimeStampEventCallback : RTC TimeStamp Event callback.
+ (+) TimeStampEventCallback : RTC Timestamp Event callback.
(+) WakeUpTimerEventCallback : RTC WakeUpTimer Event callback.
(+) Tamper1EventCallback : RTC Tamper 1 Event callback.
(+) MspInitCallback : RTC MspInit callback.
(+) MspDeInitCallback : RTC MspDeInit callback.
[..]
- By default, after the @ref HAL_RTC_Init() and when the state is HAL_RTC_STATE_RESET,
- all callbacks are set to the corresponding weak functions :
- examples @ref AlarmAEventCallback(), @ref WakeUpTimerEventCallback().
- Exception done for MspInit and MspDeInit callbacks that are reset to the legacy weak function
- in the @ref HAL_RTC_Init()/@ref HAL_RTC_DeInit() only when these callbacks are null
- (not registered beforehand).
- If not, MspInit or MspDeInit are not null, @ref HAL_RTC_Init()/@ref HAL_RTC_DeInit()
- keep and use the user MspInit/MspDeInit callbacks (registered beforehand)
+ By default, after the HAL_RTC_Init() and when the state is HAL_RTC_STATE_RESET,
+ all callbacks are set to the corresponding weak functions:
+ examples AlarmAEventCallback(), WakeUpTimerEventCallback().
+ Exception done for MspInit() and MspDeInit() callbacks that are reset to the
+ legacy weak function in the HAL_RTC_Init()/HAL_RTC_DeInit() only
+ when these callbacks are null (not registered beforehand).
+ If not, MspInit() or MspDeInit() are not null, HAL_RTC_Init()/HAL_RTC_DeInit()
+ keep and use the user MspInit()/MspDeInit() callbacks (registered beforehand).
[..]
Callbacks can be registered/unregistered in HAL_RTC_STATE_READY state only.
- Exception done MspInit/MspDeInit that can be registered/unregistered
- in HAL_RTC_STATE_READY or HAL_RTC_STATE_RESET state,
- thus registered (user) MspInit/DeInit callbacks can be used during the Init/DeInit.
- In that case first register the MspInit/MspDeInit user callbacks
- using @ref HAL_RTC_RegisterCallback() before calling @ref HAL_RTC_DeInit()
- or @ref HAL_RTC_Init() function.
+ Exception done MspInit()/MspDeInit() that can be registered/unregistered
+ in HAL_RTC_STATE_READY or HAL_RTC_STATE_RESET state.
+ Thus registered (user) MspInit()/MspDeInit() callbacks can be used during the
+ Init/DeInit.
+ In that case first register the MspInit()/MspDeInit() user callbacks
+ using HAL_RTC_RegisterCallback() before calling HAL_RTC_DeInit()
+ or HAL_RTC_Init() functions.
[..]
When The compilation define USE_HAL_RTC_REGISTER_CALLBACKS is set to 0 or
- not defined, the callback registration feature is not available and all callbacks
- are set to the corresponding weak functions.
+ not defined, the callback registration feature is not available and all
+ callbacks are set to the corresponding weak functions.
@endverbatim
******************************************************************************
@@ -178,7 +184,7 @@
*/
/** @defgroup RTC RTC
- * @brief RTC HAL module driver
+ * @brief RTC HAL module driver
* @{
*/
@@ -189,14 +195,14 @@
/* Private macro -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
/* Private function prototypes -----------------------------------------------*/
-/* Private functions ---------------------------------------------------------*/
+/* Exported functions --------------------------------------------------------*/
/** @defgroup RTC_Exported_Functions RTC Exported Functions
* @{
*/
/** @defgroup RTC_Exported_Functions_Group1 Initialization and de-initialization functions
- * @brief Initialization and Configuration functions
+ * @brief Initialization and Configuration functions
*
@verbatim
===============================================================================
@@ -218,11 +224,11 @@
and its value can be updated. When the initialization sequence is
complete, the calendar restarts counting after 4 RTCCLK cycles.
(#) To read the calendar through the shadow registers after Calendar
- initialization, calendar update or after wake-up from low power modes
+ initialization, calendar update or after wakeup from low power modes
the software must first clear the RSF flag. The software must then
wait until it is set again before reading the calendar, which means
that the calendar registers have been correctly copied into the
- RTC_TR and RTC_DR shadow registers.The HAL_RTC_WaitForSynchro() function
+ RTC_TR and RTC_DR shadow registers. The HAL_RTC_WaitForSynchro() function
implements the above software sequence (RSF clear and RSF check).
@endverbatim
@@ -237,13 +243,16 @@
*/
HAL_StatusTypeDef HAL_RTC_Init(RTC_HandleTypeDef *hrtc)
{
- /* Check the RTC peripheral state */
+ HAL_StatusTypeDef status = HAL_ERROR;
+
+ /* Check RTC handler validity */
if (hrtc == NULL)
{
return HAL_ERROR;
}
/* Check the parameters */
+ assert_param(IS_RTC_ALL_INSTANCE(hrtc->Instance));
assert_param(IS_RTC_HOUR_FORMAT(hrtc->Init.HourFormat));
assert_param(IS_RTC_ASYNCH_PREDIV(hrtc->Init.AsynchPrediv));
assert_param(IS_RTC_SYNCH_PREDIV(hrtc->Init.SynchPrediv));
@@ -275,7 +284,7 @@
hrtc->MspDeInitCallback = HAL_RTC_MspDeInit;
}
}
-#else
+#else /* USE_HAL_RTC_REGISTER_CALLBACKS */
if (hrtc->State == HAL_RTC_STATE_RESET)
{
/* Allocate lock resource and initialize it */
@@ -284,71 +293,71 @@
/* Initialize RTC MSP */
HAL_RTC_MspInit(hrtc);
}
-#endif /* (USE_HAL_RTC_REGISTER_CALLBACKS) */
+#endif /* USE_HAL_RTC_REGISTER_CALLBACKS */
/* Set RTC state */
hrtc->State = HAL_RTC_STATE_BUSY;
- /* Disable the write protection for RTC registers */
- __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
-
- /* Set Initialization mode */
- if (RTC_EnterInitMode(hrtc) != HAL_OK)
+ /* Check whether the calendar needs to be initialized */
+ if (__HAL_RTC_IS_CALENDAR_INITIALIZED(hrtc) == 0U)
{
+ /* Disable the write protection for RTC registers */
+ __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
+
+ /* Enter Initialization mode */
+ status = RTC_EnterInitMode(hrtc);
+
+ if (status == HAL_OK)
+ {
+ /* Clear RTC_CR FMT, OSEL and POL Bits */
+ hrtc->Instance->CR &= ((uint32_t)~(RTC_CR_FMT | RTC_CR_OSEL | RTC_CR_POL));
+ /* Set RTC_CR register */
+ hrtc->Instance->CR |= (uint32_t)(hrtc->Init.HourFormat | hrtc->Init.OutPut | hrtc->Init.OutPutPolarity);
+
+ /* Configure the RTC PRER */
+ hrtc->Instance->PRER = (uint32_t)(hrtc->Init.SynchPrediv);
+ hrtc->Instance->PRER |= (uint32_t)(hrtc->Init.AsynchPrediv << RTC_PRER_PREDIV_A_Pos);
+
+ /* Exit Initialization mode */
+ status = RTC_ExitInitMode(hrtc);
+ }
+
+ if (status == HAL_OK)
+ {
+ hrtc->Instance->TAFCR &= (uint32_t)~RTC_OUTPUT_TYPE_PUSHPULL;
+ hrtc->Instance->TAFCR |= (uint32_t)(hrtc->Init.OutPutType);
+ }
+
/* Enable the write protection for RTC registers */
__HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
-
- /* Set RTC state */
- hrtc->State = HAL_RTC_STATE_ERROR;
-
- return HAL_ERROR;
}
else
{
- /* Clear RTC_CR FMT, OSEL and POL Bits */
- hrtc->Instance->CR &= ((uint32_t)~(RTC_CR_FMT | RTC_CR_OSEL | RTC_CR_POL));
- /* Set RTC_CR register */
- hrtc->Instance->CR |= (uint32_t)(hrtc->Init.HourFormat | hrtc->Init.OutPut | hrtc->Init.OutPutPolarity);
-
- /* Configure the RTC PRER */
- hrtc->Instance->PRER = (uint32_t)(hrtc->Init.SynchPrediv);
- hrtc->Instance->PRER |= (uint32_t)(hrtc->Init.AsynchPrediv << 16U);
-
- /* Exit Initialization mode */
- hrtc->Instance->ISR &= (uint32_t)~RTC_ISR_INIT;
-
- if (HAL_RTC_WaitForSynchro(hrtc) != HAL_OK)
- {
- /* Enable the write protection for RTC registers */
- __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
-
- hrtc->State = HAL_RTC_STATE_ERROR;
-
- return HAL_ERROR;
- }
- hrtc->Instance->TAFCR &= (uint32_t)~RTC_TAFCR_ALARMOUTTYPE;
- hrtc->Instance->TAFCR |= (uint32_t)(hrtc->Init.OutPutType);
-
- /* Enable the write protection for RTC registers */
- __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
-
- /* Set RTC state */
- hrtc->State = HAL_RTC_STATE_READY;
-
- return HAL_OK;
+ /* The calendar is already initialized */
+ status = HAL_OK;
}
+
+ if (status == HAL_OK)
+ {
+ hrtc->State = HAL_RTC_STATE_READY;
+ }
+
+ return status;
}
/**
* @brief DeInitializes the RTC peripheral
* @param hrtc pointer to a RTC_HandleTypeDef structure that contains
* the configuration information for RTC.
- * @note This function doesn't reset the RTC Backup Data registers.
+ * @note This function does not reset the RTC Backup Data registers.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_RTC_DeInit(RTC_HandleTypeDef *hrtc)
{
- uint32_t tickstart = 0U;
+ HAL_StatusTypeDef status = HAL_ERROR;
+
+ /* Check the parameters */
+ assert_param(IS_RTC_ALL_INSTANCE(hrtc->Instance));
/* Set RTC state */
hrtc->State = HAL_RTC_STATE_BUSY;
@@ -356,104 +365,67 @@
/* Disable the write protection for RTC registers */
__HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
- /* Set Initialization mode */
- if (RTC_EnterInitMode(hrtc) != HAL_OK)
- {
- /* Enable the write protection for RTC registers */
- __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
+ /* Enter Initialization mode */
+ status = RTC_EnterInitMode(hrtc);
- /* Set RTC state */
- hrtc->State = HAL_RTC_STATE_ERROR;
-
- return HAL_ERROR;
- }
- else
+ if (status == HAL_OK)
{
- /* Reset TR, DR and CR registers */
+ /* Reset RTC registers */
hrtc->Instance->TR = 0x00000000U;
- hrtc->Instance->DR = 0x00002101U;
- /* Reset All CR bits except CR[2:0] */
- hrtc->Instance->CR &= 0x00000007U;
-
- /* Get tick */
- tickstart = HAL_GetTick();
-
- /* Wait till WUTWF flag is set and if Time out is reached exit */
- while (((hrtc->Instance->ISR) & RTC_ISR_WUTWF) == (uint32_t)RESET)
- {
- if ((HAL_GetTick() - tickstart) > RTC_TIMEOUT_VALUE)
- {
- /* Enable the write protection for RTC registers */
- __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
-
- /* Set RTC state */
- hrtc->State = HAL_RTC_STATE_TIMEOUT;
-
- return HAL_TIMEOUT;
- }
- }
-
- /* Reset all RTC CR register bits */
- hrtc->Instance->CR &= 0x00000000U;
- hrtc->Instance->WUTR = 0x0000FFFFU;
- hrtc->Instance->PRER = 0x007F00FFU;
+ hrtc->Instance->DR = (RTC_DR_WDU_0 | RTC_DR_MU_0 | RTC_DR_DU_0);
+ hrtc->Instance->CR &= 0x00000000U;
+ hrtc->Instance->WUTR = RTC_WUTR_WUT;
+ hrtc->Instance->PRER = (uint32_t)(RTC_PRER_PREDIV_A | 0x000000FFU);
hrtc->Instance->CALIBR = 0x00000000U;
- hrtc->Instance->ALRMAR = 0x00000000U;
- hrtc->Instance->ALRMBR = 0x00000000U;
+ hrtc->Instance->ALRMAR = 0x00000000U;
+ hrtc->Instance->ALRMBR = 0x00000000U;
- /* Reset ISR register and exit initialization mode */
- hrtc->Instance->ISR = 0x00000000U;
-
- /* Reset Tamper and alternate functions configuration register */
- hrtc->Instance->TAFCR = 0x00000000U;
-
- if (HAL_RTC_WaitForSynchro(hrtc) != HAL_OK)
- {
- /* Enable the write protection for RTC registers */
- __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
-
- hrtc->State = HAL_RTC_STATE_ERROR;
-
- return HAL_ERROR;
- }
+ /* Exit Initialization mode */
+ status = RTC_ExitInitMode(hrtc);
}
/* Enable the write protection for RTC registers */
__HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
-#if (USE_HAL_RTC_REGISTER_CALLBACKS == 1)
- if (hrtc->MspDeInitCallback == NULL)
+ if (status == HAL_OK)
{
- hrtc->MspDeInitCallback = HAL_RTC_MspDeInit;
+ /* Reset Tamper and alternate functions configuration register */
+ hrtc->Instance->TAFCR = 0x00000000U;
+
+#if (USE_HAL_RTC_REGISTER_CALLBACKS == 1)
+ if (hrtc->MspDeInitCallback == NULL)
+ {
+ hrtc->MspDeInitCallback = HAL_RTC_MspDeInit;
+ }
+
+ /* DeInit the low level hardware: CLOCK, NVIC.*/
+ hrtc->MspDeInitCallback(hrtc);
+#else /* USE_HAL_RTC_REGISTER_CALLBACKS */
+ /* De-Initialize RTC MSP */
+ HAL_RTC_MspDeInit(hrtc);
+#endif /* USE_HAL_RTC_REGISTER_CALLBACKS */
+
+ hrtc->State = HAL_RTC_STATE_RESET;
}
- /* DeInit the low level hardware: CLOCK, NVIC.*/
- hrtc->MspDeInitCallback(hrtc);
-
-#else
- /* De-Initialize RTC MSP */
- HAL_RTC_MspDeInit(hrtc);
-#endif /* (USE_HAL_RTC_REGISTER_CALLBACKS) */
-
- hrtc->State = HAL_RTC_STATE_RESET;
-
/* Release Lock */
__HAL_UNLOCK(hrtc);
- return HAL_OK;
+ return status;
}
#if (USE_HAL_RTC_REGISTER_CALLBACKS == 1)
/**
- * @brief Register a User RTC Callback
+ * @brief Registers a User RTC Callback
* To be used instead of the weak predefined callback
- * @param hrtc RTC handle
+ * @param hrtc pointer to a RTC_HandleTypeDef structure that contains
+ * the configuration information for RTC.
* @param CallbackID ID of the callback to be registered
* This parameter can be one of the following values:
* @arg @ref HAL_RTC_ALARM_A_EVENT_CB_ID Alarm A Event Callback ID
* @arg @ref HAL_RTC_ALARM_B_EVENT_CB_ID Alarm B Event Callback ID
- * @arg @ref HAL_RTC_TIMESTAMP_EVENT_CB_ID TimeStamp Event Callback ID
- * @arg @ref HAL_RTC_WAKEUPTIMER_EVENT_CB_ID Wake-Up Timer Event Callback ID
+ * @arg @ref HAL_RTC_TIMESTAMP_EVENT_CB_ID Timestamp Event Callback ID
+ * @arg @ref HAL_RTC_WAKEUPTIMER_EVENT_CB_ID Wakeup Timer Event Callback ID
* @arg @ref HAL_RTC_TAMPER1_EVENT_CB_ID Tamper 1 Callback ID
* @arg @ref HAL_RTC_MSPINIT_CB_ID Msp Init callback ID
* @arg @ref HAL_RTC_MSPDEINIT_CB_ID Msp DeInit callback ID
@@ -541,15 +513,16 @@
}
/**
- * @brief Unregister an RTC Callback
- * RTC callabck is redirected to the weak predefined callback
- * @param hrtc RTC handle
+ * @brief Unregisters an RTC Callback
+ * RTC callback is redirected to the weak predefined callback
+ * @param hrtc pointer to a RTC_HandleTypeDef structure that contains
+ * the configuration information for RTC.
* @param CallbackID ID of the callback to be unregistered
* This parameter can be one of the following values:
* @arg @ref HAL_RTC_ALARM_A_EVENT_CB_ID Alarm A Event Callback ID
* @arg @ref HAL_RTC_ALARM_B_EVENT_CB_ID Alarm B Event Callback ID
- * @arg @ref HAL_RTC_TIMESTAMP_EVENT_CB_ID TimeStamp Event Callback ID
- * @arg @ref HAL_RTC_WAKEUPTIMER_EVENT_CB_ID Wake-Up Timer Event Callback ID
+ * @arg @ref HAL_RTC_TIMESTAMP_EVENT_CB_ID Timestamp Event Callback ID
+ * @arg @ref HAL_RTC_WAKEUPTIMER_EVENT_CB_ID Wakeup Timer Event Callback ID
* @arg @ref HAL_RTC_TAMPER1_EVENT_CB_ID Tamper 1 Callback ID
* @arg @ref HAL_RTC_MSPINIT_CB_ID Msp Init callback ID
* @arg @ref HAL_RTC_MSPDEINIT_CB_ID Msp DeInit callback ID
@@ -567,15 +540,15 @@
switch (CallbackID)
{
case HAL_RTC_ALARM_A_EVENT_CB_ID :
- hrtc->AlarmAEventCallback = HAL_RTC_AlarmAEventCallback; /* Legacy weak AlarmAEventCallback */
+ hrtc->AlarmAEventCallback = HAL_RTC_AlarmAEventCallback; /* Legacy weak AlarmAEventCallback */
break;
case HAL_RTC_ALARM_B_EVENT_CB_ID :
- hrtc->AlarmBEventCallback = HAL_RTCEx_AlarmBEventCallback; /* Legacy weak AlarmBEventCallback */
+ hrtc->AlarmBEventCallback = HAL_RTCEx_AlarmBEventCallback; /* Legacy weak AlarmBEventCallback */
break;
case HAL_RTC_TIMESTAMP_EVENT_CB_ID :
- hrtc->TimeStampEventCallback = HAL_RTCEx_TimeStampEventCallback; /* Legacy weak TimeStampEventCallback */
+ hrtc->TimeStampEventCallback = HAL_RTCEx_TimeStampEventCallback; /* Legacy weak TimeStampEventCallback */
break;
case HAL_RTC_WAKEUPTIMER_EVENT_CB_ID :
@@ -641,8 +614,9 @@
{
/* Prevent unused argument(s) compilation warning */
UNUSED(hrtc);
- /* NOTE : This function Should not be modified, when the callback is needed,
- the HAL_RTC_MspInit could be implemented in the user file
+
+ /* NOTE: This function should not be modified, when the callback is needed,
+ the HAL_RTC_MspInit could be implemented in the user file
*/
}
@@ -656,8 +630,9 @@
{
/* Prevent unused argument(s) compilation warning */
UNUSED(hrtc);
- /* NOTE : This function Should not be modified, when the callback is needed,
- the HAL_RTC_MspDeInit could be implemented in the user file
+
+ /* NOTE: This function should not be modified, when the callback is needed,
+ the HAL_RTC_MspDeInit could be implemented in the user file
*/
}
@@ -666,8 +641,8 @@
*/
/** @defgroup RTC_Exported_Functions_Group2 RTC Time and Date functions
- * @brief RTC Time and Date functions
- *
+ * @brief RTC Time and Date functions
+ *
@verbatim
===============================================================================
##### RTC Time and Date functions #####
@@ -684,6 +659,8 @@
* @param hrtc pointer to a RTC_HandleTypeDef structure that contains
* the configuration information for RTC.
* @param sTime Pointer to Time structure
+ * @note DayLightSaving and StoreOperation interfaces are deprecated.
+ * To manage Daylight Saving Time, please use HAL_RTC_DST_xxx functions.
* @param Format Specifies the format of the entered parameters.
* This parameter can be one of the following values:
* @arg RTC_FORMAT_BIN: Binary data format
@@ -693,6 +670,7 @@
HAL_StatusTypeDef HAL_RTC_SetTime(RTC_HandleTypeDef *hrtc, RTC_TimeTypeDef *sTime, uint32_t Format)
{
uint32_t tmpreg = 0U;
+ HAL_StatusTypeDef status;
/* Check the parameters */
assert_param(IS_RTC_FORMAT(Format));
@@ -706,7 +684,7 @@
if (Format == RTC_FORMAT_BIN)
{
- if ((hrtc->Instance->CR & RTC_CR_FMT) != (uint32_t)RESET)
+ if ((hrtc->Instance->CR & RTC_CR_FMT) != 0U)
{
assert_param(IS_RTC_HOUR12(sTime->Hours));
assert_param(IS_RTC_HOURFORMAT12(sTime->TimeFormat));
@@ -719,14 +697,14 @@
assert_param(IS_RTC_MINUTES(sTime->Minutes));
assert_param(IS_RTC_SECONDS(sTime->Seconds));
- tmpreg = (uint32_t)(((uint32_t)RTC_ByteToBcd2(sTime->Hours) << 16U) | \
- ((uint32_t)RTC_ByteToBcd2(sTime->Minutes) << 8U) | \
- ((uint32_t)RTC_ByteToBcd2(sTime->Seconds)) | \
- (((uint32_t)sTime->TimeFormat) << 16U));
+ tmpreg = (uint32_t)(( (uint32_t)RTC_ByteToBcd2(sTime->Hours) << RTC_TR_HU_Pos) | \
+ ( (uint32_t)RTC_ByteToBcd2(sTime->Minutes) << RTC_TR_MNU_Pos) | \
+ ( (uint32_t)RTC_ByteToBcd2(sTime->Seconds)) | \
+ (((uint32_t)sTime->TimeFormat) << RTC_TR_PM_Pos));
}
else
{
- if ((hrtc->Instance->CR & RTC_CR_FMT) != (uint32_t)RESET)
+ if ((hrtc->Instance->CR & RTC_CR_FMT) != 0U)
{
assert_param(IS_RTC_HOUR12(RTC_Bcd2ToByte(sTime->Hours)));
assert_param(IS_RTC_HOURFORMAT12(sTime->TimeFormat));
@@ -738,65 +716,45 @@
}
assert_param(IS_RTC_MINUTES(RTC_Bcd2ToByte(sTime->Minutes)));
assert_param(IS_RTC_SECONDS(RTC_Bcd2ToByte(sTime->Seconds)));
- tmpreg = (((uint32_t)(sTime->Hours) << 16U) | \
- ((uint32_t)(sTime->Minutes) << 8U) | \
- ((uint32_t)sTime->Seconds) | \
- ((uint32_t)(sTime->TimeFormat) << 16U));
+ tmpreg = (((uint32_t)(sTime->Hours) << RTC_TR_HU_Pos) | \
+ ((uint32_t)(sTime->Minutes) << RTC_TR_MNU_Pos) | \
+ ((uint32_t) sTime->Seconds) | \
+ ((uint32_t)(sTime->TimeFormat) << RTC_TR_PM_Pos));
}
/* Disable the write protection for RTC registers */
__HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
- /* Set Initialization mode */
- if (RTC_EnterInitMode(hrtc) != HAL_OK)
- {
- /* Enable the write protection for RTC registers */
- __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
+ /* Enter Initialization mode */
+ status = RTC_EnterInitMode(hrtc);
- /* Set RTC state */
- hrtc->State = HAL_RTC_STATE_ERROR;
-
- /* Process Unlocked */
- __HAL_UNLOCK(hrtc);
-
- return HAL_ERROR;
- }
- else
+ if (status == HAL_OK)
{
/* Set the RTC_TR register */
hrtc->Instance->TR = (uint32_t)(tmpreg & RTC_TR_RESERVED_MASK);
- /* This interface is deprecated. To manage Daylight Saving Time, please use HAL_RTC_DST_xxx functions */
- hrtc->Instance->CR &= (uint32_t)~RTC_CR_BCK;
+ /* Clear the bits to be configured (Deprecated. Use HAL_RTC_DST_xxx functions instead) */
+ hrtc->Instance->CR &= (uint32_t)~RTC_CR_BKP;
- /* This interface is deprecated. To manage Daylight Saving Time, please use HAL_RTC_DST_xxx functions */
+ /* Configure the RTC_CR register (Deprecated. Use HAL_RTC_DST_xxx functions instead) */
hrtc->Instance->CR |= (uint32_t)(sTime->DayLightSaving | sTime->StoreOperation);
/* Exit Initialization mode */
- hrtc->Instance->ISR &= (uint32_t)~RTC_ISR_INIT;
-
- if (HAL_RTC_WaitForSynchro(hrtc) != HAL_OK)
- {
- /* Enable the write protection for RTC registers */
- __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
-
- hrtc->State = HAL_RTC_STATE_ERROR;
-
- /* Process Unlocked */
- __HAL_UNLOCK(hrtc);
-
- return HAL_ERROR;
- }
-
- /* Enable the write protection for RTC registers */
- __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
-
- hrtc->State = HAL_RTC_STATE_READY;
-
- __HAL_UNLOCK(hrtc);
-
- return HAL_OK;
+ status = RTC_ExitInitMode(hrtc);
}
+
+ if (status == HAL_OK)
+ {
+ hrtc->State = HAL_RTC_STATE_READY;
+ }
+
+ /* Enable the write protection for RTC registers */
+ __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
+
+ /* Process Unlocked */
+ __HAL_UNLOCK(hrtc);
+
+ return status;
}
/**
@@ -808,9 +766,12 @@
* This parameter can be one of the following values:
* @arg RTC_FORMAT_BIN: Binary data format
* @arg RTC_FORMAT_BCD: BCD data format
- * @note You must call HAL_RTC_GetDate() after HAL_RTC_GetTime() to unlock the values
- * in the higher-order calendar shadow registers to ensure consistency between the time and date values.
- * Reading RTC current time locks the values in calendar shadow registers until Current date is read.
+ * @note You must call HAL_RTC_GetDate() after HAL_RTC_GetTime() to unlock the
+ * values in the higher-order calendar shadow registers to ensure
+ * consistency between the time and date values.
+ * Reading RTC current time locks the values in calendar shadow registers
+ * until current date is read to ensure consistency between the time and
+ * date values.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_RTC_GetTime(RTC_HandleTypeDef *hrtc, RTC_TimeTypeDef *sTime, uint32_t Format)
@@ -824,10 +785,10 @@
tmpreg = (uint32_t)(hrtc->Instance->TR & RTC_TR_RESERVED_MASK);
/* Fill the structure fields with the read parameters */
- sTime->Hours = (uint8_t)((tmpreg & (RTC_TR_HT | RTC_TR_HU)) >> 16U);
- sTime->Minutes = (uint8_t)((tmpreg & (RTC_TR_MNT | RTC_TR_MNU)) >> 8U);
- sTime->Seconds = (uint8_t)(tmpreg & (RTC_TR_ST | RTC_TR_SU));
- sTime->TimeFormat = (uint8_t)((tmpreg & (RTC_TR_PM)) >> 16U);
+ sTime->Hours = (uint8_t)((tmpreg & (RTC_TR_HT | RTC_TR_HU)) >> RTC_TR_HU_Pos);
+ sTime->Minutes = (uint8_t)((tmpreg & (RTC_TR_MNT | RTC_TR_MNU)) >> RTC_TR_MNU_Pos);
+ sTime->Seconds = (uint8_t)( tmpreg & (RTC_TR_ST | RTC_TR_SU));
+ sTime->TimeFormat = (uint8_t)((tmpreg & (RTC_TR_PM)) >> RTC_TR_PM_Pos);
/* Check the input parameters format */
if (Format == RTC_FORMAT_BIN)
@@ -855,6 +816,7 @@
HAL_StatusTypeDef HAL_RTC_SetDate(RTC_HandleTypeDef *hrtc, RTC_DateTypeDef *sDate, uint32_t Format)
{
uint32_t datetmpreg = 0U;
+ HAL_StatusTypeDef status;
/* Check the parameters */
assert_param(IS_RTC_FORMAT(Format));
@@ -864,9 +826,9 @@
hrtc->State = HAL_RTC_STATE_BUSY;
- if ((Format == RTC_FORMAT_BIN) && ((sDate->Month & 0x10) == 0x10))
+ if ((Format == RTC_FORMAT_BIN) && ((sDate->Month & 0x10U) == 0x10U))
{
- sDate->Month = (uint8_t)((sDate->Month & (uint8_t)~0x10) + (uint8_t)0x0A);
+ sDate->Month = (uint8_t)((sDate->Month & (uint8_t)~(0x10U)) + (uint8_t)0x0AU);
}
assert_param(IS_RTC_WEEKDAY(sDate->WeekDay));
@@ -877,10 +839,10 @@
assert_param(IS_RTC_MONTH(sDate->Month));
assert_param(IS_RTC_DATE(sDate->Date));
- datetmpreg = (((uint32_t)RTC_ByteToBcd2(sDate->Year) << 16U) | \
- ((uint32_t)RTC_ByteToBcd2(sDate->Month) << 8U) | \
- ((uint32_t)RTC_ByteToBcd2(sDate->Date)) | \
- ((uint32_t)sDate->WeekDay << 13U));
+ datetmpreg = (((uint32_t)RTC_ByteToBcd2(sDate->Year) << RTC_DR_YU_Pos) | \
+ ((uint32_t)RTC_ByteToBcd2(sDate->Month) << RTC_DR_MU_Pos) | \
+ ((uint32_t)RTC_ByteToBcd2(sDate->Date)) | \
+ ((uint32_t)sDate->WeekDay << RTC_DR_WDU_Pos));
}
else
{
@@ -888,60 +850,39 @@
assert_param(IS_RTC_MONTH(RTC_Bcd2ToByte(sDate->Month)));
assert_param(IS_RTC_DATE(RTC_Bcd2ToByte(sDate->Date)));
- datetmpreg = ((((uint32_t)sDate->Year) << 16U) | \
- (((uint32_t)sDate->Month) << 8U) | \
- ((uint32_t)sDate->Date) | \
- (((uint32_t)sDate->WeekDay) << 13U));
+ datetmpreg = ((((uint32_t)sDate->Year) << RTC_DR_YU_Pos) | \
+ (((uint32_t)sDate->Month) << RTC_DR_MU_Pos) | \
+ ((uint32_t) sDate->Date) | \
+ (((uint32_t)sDate->WeekDay) << RTC_DR_WDU_Pos));
}
/* Disable the write protection for RTC registers */
__HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
- /* Set Initialization mode */
- if (RTC_EnterInitMode(hrtc) != HAL_OK)
- {
- /* Enable the write protection for RTC registers */
- __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
+ /* Enter Initialization mode */
+ status = RTC_EnterInitMode(hrtc);
- /* Set RTC state*/
- hrtc->State = HAL_RTC_STATE_ERROR;
-
- /* Process Unlocked */
- __HAL_UNLOCK(hrtc);
-
- return HAL_ERROR;
- }
- else
+ if (status == HAL_OK)
{
/* Set the RTC_DR register */
hrtc->Instance->DR = (uint32_t)(datetmpreg & RTC_DR_RESERVED_MASK);
/* Exit Initialization mode */
- hrtc->Instance->ISR &= (uint32_t)~RTC_ISR_INIT;
-
- if (HAL_RTC_WaitForSynchro(hrtc) != HAL_OK)
- {
- /* Enable the write protection for RTC registers */
- __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
-
- hrtc->State = HAL_RTC_STATE_ERROR;
-
- /* Process Unlocked */
- __HAL_UNLOCK(hrtc);
-
- return HAL_ERROR;
- }
-
- /* Enable the write protection for RTC registers */
- __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
-
- hrtc->State = HAL_RTC_STATE_READY ;
-
- /* Process Unlocked */
- __HAL_UNLOCK(hrtc);
-
- return HAL_OK;
+ status = RTC_ExitInitMode(hrtc);
}
+
+ if (status == HAL_OK)
+ {
+ hrtc->State = HAL_RTC_STATE_READY;
+ }
+
+ /* Enable the write protection for RTC registers */
+ __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
+
+ /* Process Unlocked */
+ __HAL_UNLOCK(hrtc);
+
+ return status;
}
/**
@@ -953,9 +894,12 @@
* This parameter can be one of the following values:
* @arg RTC_FORMAT_BIN: Binary data format
* @arg RTC_FORMAT_BCD: BCD data format
- * @note You must call HAL_RTC_GetDate() after HAL_RTC_GetTime() to unlock the values
- * in the higher-order calendar shadow registers to ensure consistency between the time and date values.
- * Reading RTC current time locks the values in calendar shadow registers until Current date is read.
+ * @note You must call HAL_RTC_GetDate() after HAL_RTC_GetTime() to unlock the
+ * values in the higher-order calendar shadow registers to ensure
+ * consistency between the time and date values.
+ * Reading RTC current time locks the values in calendar shadow registers
+ * until current date is read to ensure consistency between the time and
+ * date values.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_RTC_GetDate(RTC_HandleTypeDef *hrtc, RTC_DateTypeDef *sDate, uint32_t Format)
@@ -969,90 +913,29 @@
datetmpreg = (uint32_t)(hrtc->Instance->DR & RTC_DR_RESERVED_MASK);
/* Fill the structure fields with the read parameters */
- sDate->Year = (uint8_t)((datetmpreg & (RTC_DR_YT | RTC_DR_YU)) >> 16U);
- sDate->Month = (uint8_t)((datetmpreg & (RTC_DR_MT | RTC_DR_MU)) >> 8U);
- sDate->Date = (uint8_t)(datetmpreg & (RTC_DR_DT | RTC_DR_DU));
- sDate->WeekDay = (uint8_t)((datetmpreg & (RTC_DR_WDU)) >> 13U);
+ sDate->Year = (uint8_t)((datetmpreg & (RTC_DR_YT | RTC_DR_YU)) >> RTC_DR_YU_Pos);
+ sDate->Month = (uint8_t)((datetmpreg & (RTC_DR_MT | RTC_DR_MU)) >> RTC_DR_MU_Pos);
+ sDate->Date = (uint8_t) (datetmpreg & (RTC_DR_DT | RTC_DR_DU));
+ sDate->WeekDay = (uint8_t)((datetmpreg & (RTC_DR_WDU)) >> RTC_DR_WDU_Pos);
/* Check the input parameters format */
if (Format == RTC_FORMAT_BIN)
{
/* Convert the date structure parameters to Binary format */
- sDate->Year = (uint8_t)RTC_Bcd2ToByte(sDate->Year);
+ sDate->Year = (uint8_t)RTC_Bcd2ToByte(sDate->Year);
sDate->Month = (uint8_t)RTC_Bcd2ToByte(sDate->Month);
- sDate->Date = (uint8_t)RTC_Bcd2ToByte(sDate->Date);
+ sDate->Date = (uint8_t)RTC_Bcd2ToByte(sDate->Date);
}
return HAL_OK;
}
/**
- * @brief Daylight Saving Time, Add one hour to the calendar in one single operation
- * without going through the initialization procedure.
- * @param hrtc RTC handle
- * @retval None
- */
-void HAL_RTC_DST_Add1Hour(RTC_HandleTypeDef *hrtc)
-{
- __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
- SET_BIT(hrtc->Instance->CR, RTC_CR_ADD1H);
- __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
-}
-
-/**
- * @brief Daylight Saving Time, Subtract one hour from the calendar in one
- * single operation without going through the initialization procedure.
- * @param hrtc RTC handle
- * @retval None
- */
-void HAL_RTC_DST_Sub1Hour(RTC_HandleTypeDef *hrtc)
-{
- __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
- SET_BIT(hrtc->Instance->CR, RTC_CR_SUB1H);
- __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
-}
-
-/**
- * @brief Daylight Saving Time, Set the store operation bit.
- * @note It can be used by the software in order to memorize the DST status.
- * @param hrtc RTC handle
- * @retval None
- */
-void HAL_RTC_DST_SetStoreOperation(RTC_HandleTypeDef *hrtc)
-{
- __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
- SET_BIT(hrtc->Instance->CR, RTC_CR_BKP);
- __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
-}
-
-/**
- * @brief Daylight Saving Time, Clear the store operation bit.
- * @param hrtc RTC handle
- * @retval None
- */
-void HAL_RTC_DST_ClearStoreOperation(RTC_HandleTypeDef *hrtc)
-{
- __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
- CLEAR_BIT(hrtc->Instance->CR, RTC_CR_BKP);
- __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
-}
-
-/**
- * @brief Daylight Saving Time, Read the store operation bit.
- * @param hrtc RTC handle
- * @retval operation see RTC_StoreOperation_Definitions
- */
-uint32_t HAL_RTC_DST_ReadStoreOperation(RTC_HandleTypeDef *hrtc)
-{
- return READ_BIT(hrtc->Instance->CR, RTC_CR_BKP);
-}
-
-/**
* @}
*/
/** @defgroup RTC_Exported_Functions_Group3 RTC Alarm functions
- * @brief RTC Alarm functions
- *
+ * @brief RTC Alarm functions
+ *
@verbatim
===============================================================================
##### RTC Alarm functions #####
@@ -1072,6 +955,9 @@
* This parameter can be one of the following values:
* @arg RTC_FORMAT_BIN: Binary data format
* @arg RTC_FORMAT_BCD: BCD data format
+ * @note The Alarm register can only be written when the corresponding Alarm
+ * is disabled (Use the HAL_RTC_DeactivateAlarm()).
+ * @note The HAL_RTC_SetTime() must be called before enabling the Alarm feature.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_RTC_SetAlarm(RTC_HandleTypeDef *hrtc, RTC_AlarmTypeDef *sAlarm, uint32_t Format)
@@ -1088,18 +974,21 @@
/* Process Locked */
__HAL_LOCK(hrtc);
+ /* Change RTC state to BUSY */
hrtc->State = HAL_RTC_STATE_BUSY;
+ /* Check the data format (binary or BCD) and store the Alarm time and date
+ configuration accordingly */
if (Format == RTC_FORMAT_BIN)
{
- if ((hrtc->Instance->CR & RTC_CR_FMT) != (uint32_t)RESET)
+ if ((hrtc->Instance->CR & RTC_CR_FMT) != 0U)
{
assert_param(IS_RTC_HOUR12(sAlarm->AlarmTime.Hours));
assert_param(IS_RTC_HOURFORMAT12(sAlarm->AlarmTime.TimeFormat));
}
else
{
- sAlarm->AlarmTime.TimeFormat = 0x00;
+ sAlarm->AlarmTime.TimeFormat = 0x00U;
assert_param(IS_RTC_HOUR24(sAlarm->AlarmTime.Hours));
}
assert_param(IS_RTC_MINUTES(sAlarm->AlarmTime.Minutes));
@@ -1114,24 +1003,24 @@
assert_param(IS_RTC_ALARM_DATE_WEEKDAY_WEEKDAY(sAlarm->AlarmDateWeekDay));
}
- tmpreg = (((uint32_t)RTC_ByteToBcd2(sAlarm->AlarmTime.Hours) << 16U) | \
- ((uint32_t)RTC_ByteToBcd2(sAlarm->AlarmTime.Minutes) << 8U) | \
- ((uint32_t)RTC_ByteToBcd2(sAlarm->AlarmTime.Seconds)) | \
- ((uint32_t)(sAlarm->AlarmTime.TimeFormat) << 16U) | \
- ((uint32_t)RTC_ByteToBcd2(sAlarm->AlarmDateWeekDay) << 24U) | \
- ((uint32_t)sAlarm->AlarmDateWeekDaySel) | \
+ tmpreg = (((uint32_t)RTC_ByteToBcd2(sAlarm->AlarmTime.Hours) << RTC_ALRMAR_HU_Pos) | \
+ ((uint32_t)RTC_ByteToBcd2(sAlarm->AlarmTime.Minutes) << RTC_ALRMAR_MNU_Pos) | \
+ ((uint32_t)RTC_ByteToBcd2(sAlarm->AlarmTime.Seconds)) | \
+ ((uint32_t)(sAlarm->AlarmTime.TimeFormat) << RTC_TR_PM_Pos) | \
+ ((uint32_t)RTC_ByteToBcd2(sAlarm->AlarmDateWeekDay) << RTC_ALRMAR_DU_Pos) | \
+ ((uint32_t)sAlarm->AlarmDateWeekDaySel) | \
((uint32_t)sAlarm->AlarmMask));
}
else
{
- if ((hrtc->Instance->CR & RTC_CR_FMT) != (uint32_t)RESET)
+ if ((hrtc->Instance->CR & RTC_CR_FMT) != 0U)
{
assert_param(IS_RTC_HOUR12(RTC_Bcd2ToByte(sAlarm->AlarmTime.Hours)));
assert_param(IS_RTC_HOURFORMAT12(sAlarm->AlarmTime.TimeFormat));
}
else
{
- sAlarm->AlarmTime.TimeFormat = 0x00;
+ sAlarm->AlarmTime.TimeFormat = 0x00U;
assert_param(IS_RTC_HOUR24(RTC_Bcd2ToByte(sAlarm->AlarmTime.Hours)));
}
@@ -1147,13 +1036,13 @@
assert_param(IS_RTC_ALARM_DATE_WEEKDAY_WEEKDAY(RTC_Bcd2ToByte(sAlarm->AlarmDateWeekDay)));
}
- tmpreg = (((uint32_t)(sAlarm->AlarmTime.Hours) << 16U) | \
- ((uint32_t)(sAlarm->AlarmTime.Minutes) << 8U) | \
- ((uint32_t) sAlarm->AlarmTime.Seconds) | \
- ((uint32_t)(sAlarm->AlarmTime.TimeFormat) << 16U) | \
- ((uint32_t)(sAlarm->AlarmDateWeekDay) << 24U) | \
- ((uint32_t)sAlarm->AlarmDateWeekDaySel) | \
- ((uint32_t)sAlarm->AlarmMask));
+ tmpreg = (((uint32_t)(sAlarm->AlarmTime.Hours) << RTC_ALRMAR_HU_Pos) | \
+ ((uint32_t)(sAlarm->AlarmTime.Minutes) << RTC_ALRMAR_MNU_Pos) | \
+ ((uint32_t) sAlarm->AlarmTime.Seconds) | \
+ ((uint32_t)(sAlarm->AlarmTime.TimeFormat) << RTC_TR_PM_Pos) | \
+ ((uint32_t)(sAlarm->AlarmDateWeekDay) << RTC_ALRMAR_DU_Pos) | \
+ ((uint32_t) sAlarm->AlarmDateWeekDaySel) | \
+ ((uint32_t) sAlarm->AlarmMask));
}
/* Disable the write protection for RTC registers */
@@ -1162,17 +1051,20 @@
/* Configure the Alarm register */
if (sAlarm->Alarm == RTC_ALARM_A)
{
- /* Disable the Alarm A interrupt */
+ /* Disable the Alarm A */
__HAL_RTC_ALARMA_DISABLE(hrtc);
- /* In case of interrupt mode is used, the interrupt source must disabled */
+ /* In case interrupt mode is used, the interrupt source must be disabled */
__HAL_RTC_ALARM_DISABLE_IT(hrtc, RTC_IT_ALRA);
+ /* Clear the Alarm flag */
+ __HAL_RTC_ALARM_CLEAR_FLAG(hrtc, RTC_FLAG_ALRAF);
+
/* Get tick */
tickstart = HAL_GetTick();
- /* Wait till RTC ALRAWF flag is set and if Time out is reached exit */
- while (__HAL_RTC_ALARM_GET_FLAG(hrtc, RTC_FLAG_ALRAWF) == RESET)
+ /* Wait till RTC ALRAWF flag is set and if timeout is reached exit */
+ while (__HAL_RTC_ALARM_GET_FLAG(hrtc, RTC_FLAG_ALRAWF) == 0U)
{
if ((HAL_GetTick() - tickstart) > RTC_TIMEOUT_VALUE)
{
@@ -1194,17 +1086,20 @@
}
else
{
- /* Disable the Alarm B interrupt */
+ /* Disable the Alarm B */
__HAL_RTC_ALARMB_DISABLE(hrtc);
- /* In case of interrupt mode is used, the interrupt source must disabled */
+ /* In case interrupt mode is used, the interrupt source must be disabled */
__HAL_RTC_ALARM_DISABLE_IT(hrtc, RTC_IT_ALRB);
+ /* Clear the Alarm flag */
+ __HAL_RTC_ALARM_CLEAR_FLAG(hrtc, RTC_FLAG_ALRBF);
+
/* Get tick */
tickstart = HAL_GetTick();
- /* Wait till RTC ALRBWF flag is set and if Time out is reached exit */
- while (__HAL_RTC_ALARM_GET_FLAG(hrtc, RTC_FLAG_ALRBWF) == RESET)
+ /* Wait till RTC ALRBWF flag is set and if timeout is reached exit */
+ while (__HAL_RTC_ALARM_GET_FLAG(hrtc, RTC_FLAG_ALRBWF) == 0U)
{
if ((HAL_GetTick() - tickstart) > RTC_TIMEOUT_VALUE)
{
@@ -1228,7 +1123,7 @@
/* Enable the write protection for RTC registers */
__HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
- /* Change RTC state */
+ /* Change RTC state back to READY */
hrtc->State = HAL_RTC_STATE_READY;
/* Process Unlocked */
@@ -1238,7 +1133,7 @@
}
/**
- * @brief Sets the specified RTC Alarm with Interrupt
+ * @brief Sets the specified RTC Alarm with Interrupt.
* @param hrtc pointer to a RTC_HandleTypeDef structure that contains
* the configuration information for RTC.
* @param sAlarm Pointer to Alarm structure
@@ -1246,12 +1141,15 @@
* This parameter can be one of the following values:
* @arg RTC_FORMAT_BIN: Binary data format
* @arg RTC_FORMAT_BCD: BCD data format
+ * @note The Alarm register can only be written when the corresponding Alarm
+ * is disabled (Use the HAL_RTC_DeactivateAlarm()).
+ * @note The HAL_RTC_SetTime() must be called before enabling the Alarm feature.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_RTC_SetAlarm_IT(RTC_HandleTypeDef *hrtc, RTC_AlarmTypeDef *sAlarm, uint32_t Format)
{
- uint32_t tmpreg = 0U;
- __IO uint32_t count = RTC_TIMEOUT_VALUE * (SystemCoreClock / 32U / 1000U);
+ __IO uint32_t count = RTC_TIMEOUT_VALUE * (SystemCoreClock / 32U / 1000U);
+ uint32_t tmpreg = 0U;
/* Check the parameters */
assert_param(IS_RTC_FORMAT(Format));
@@ -1262,18 +1160,21 @@
/* Process Locked */
__HAL_LOCK(hrtc);
+ /* Change RTC state to BUSY */
hrtc->State = HAL_RTC_STATE_BUSY;
+ /* Check the data format (binary or BCD) and store the Alarm time and date
+ configuration accordingly */
if (Format == RTC_FORMAT_BIN)
{
- if ((hrtc->Instance->CR & RTC_CR_FMT) != (uint32_t)RESET)
+ if ((hrtc->Instance->CR & RTC_CR_FMT) != 0U)
{
assert_param(IS_RTC_HOUR12(sAlarm->AlarmTime.Hours));
assert_param(IS_RTC_HOURFORMAT12(sAlarm->AlarmTime.TimeFormat));
}
else
{
- sAlarm->AlarmTime.TimeFormat = 0x00;
+ sAlarm->AlarmTime.TimeFormat = 0x00U;
assert_param(IS_RTC_HOUR24(sAlarm->AlarmTime.Hours));
}
assert_param(IS_RTC_MINUTES(sAlarm->AlarmTime.Minutes));
@@ -1287,24 +1188,25 @@
{
assert_param(IS_RTC_ALARM_DATE_WEEKDAY_WEEKDAY(sAlarm->AlarmDateWeekDay));
}
- tmpreg = (((uint32_t)RTC_ByteToBcd2(sAlarm->AlarmTime.Hours) << 16U) | \
- ((uint32_t)RTC_ByteToBcd2(sAlarm->AlarmTime.Minutes) << 8U) | \
- ((uint32_t)RTC_ByteToBcd2(sAlarm->AlarmTime.Seconds)) | \
- ((uint32_t)(sAlarm->AlarmTime.TimeFormat) << 16U) | \
- ((uint32_t)RTC_ByteToBcd2(sAlarm->AlarmDateWeekDay) << 24U) | \
- ((uint32_t)sAlarm->AlarmDateWeekDaySel) | \
+
+ tmpreg = (((uint32_t)RTC_ByteToBcd2(sAlarm->AlarmTime.Hours) << RTC_ALRMAR_HU_Pos) | \
+ ((uint32_t)RTC_ByteToBcd2(sAlarm->AlarmTime.Minutes) << RTC_ALRMAR_MNU_Pos) | \
+ ((uint32_t)RTC_ByteToBcd2(sAlarm->AlarmTime.Seconds)) | \
+ ((uint32_t)(sAlarm->AlarmTime.TimeFormat) << RTC_TR_PM_Pos) | \
+ ((uint32_t)RTC_ByteToBcd2(sAlarm->AlarmDateWeekDay) << RTC_ALRMAR_DU_Pos) | \
+ ((uint32_t)sAlarm->AlarmDateWeekDaySel) | \
((uint32_t)sAlarm->AlarmMask));
}
else
{
- if ((hrtc->Instance->CR & RTC_CR_FMT) != (uint32_t)RESET)
+ if ((hrtc->Instance->CR & RTC_CR_FMT) != 0U)
{
assert_param(IS_RTC_HOUR12(RTC_Bcd2ToByte(sAlarm->AlarmTime.Hours)));
assert_param(IS_RTC_HOURFORMAT12(sAlarm->AlarmTime.TimeFormat));
}
else
{
- sAlarm->AlarmTime.TimeFormat = 0x00;
+ sAlarm->AlarmTime.TimeFormat = 0x00U;
assert_param(IS_RTC_HOUR24(RTC_Bcd2ToByte(sAlarm->AlarmTime.Hours)));
}
@@ -1319,13 +1221,14 @@
{
assert_param(IS_RTC_ALARM_DATE_WEEKDAY_WEEKDAY(RTC_Bcd2ToByte(sAlarm->AlarmDateWeekDay)));
}
- tmpreg = (((uint32_t)(sAlarm->AlarmTime.Hours) << 16U) | \
- ((uint32_t)(sAlarm->AlarmTime.Minutes) << 8U) | \
- ((uint32_t) sAlarm->AlarmTime.Seconds) | \
- ((uint32_t)(sAlarm->AlarmTime.TimeFormat) << 16U) | \
- ((uint32_t)(sAlarm->AlarmDateWeekDay) << 24U) | \
- ((uint32_t)sAlarm->AlarmDateWeekDaySel) | \
- ((uint32_t)sAlarm->AlarmMask));
+
+ tmpreg = (((uint32_t)(sAlarm->AlarmTime.Hours) << RTC_ALRMAR_HU_Pos) | \
+ ((uint32_t)(sAlarm->AlarmTime.Minutes) << RTC_ALRMAR_MNU_Pos) | \
+ ((uint32_t) sAlarm->AlarmTime.Seconds) | \
+ ((uint32_t)(sAlarm->AlarmTime.TimeFormat) << RTC_TR_PM_Pos) | \
+ ((uint32_t)(sAlarm->AlarmDateWeekDay) << RTC_ALRMAR_DU_Pos) | \
+ ((uint32_t) sAlarm->AlarmDateWeekDaySel) | \
+ ((uint32_t) sAlarm->AlarmMask));
}
/* Disable the write protection for RTC registers */
@@ -1334,16 +1237,17 @@
/* Configure the Alarm register */
if (sAlarm->Alarm == RTC_ALARM_A)
{
- /* Disable the Alarm A interrupt */
+ /* Disable the Alarm A */
__HAL_RTC_ALARMA_DISABLE(hrtc);
- /* Clear flag alarm A */
+ /* Clear the Alarm flag */
__HAL_RTC_ALARM_CLEAR_FLAG(hrtc, RTC_FLAG_ALRAF);
- /* Wait till RTC ALRAWF flag is set and if Time out is reached exit */
+ /* Wait till RTC ALRAWF flag is set and if timeout is reached exit */
do
{
- if (count-- == 0U)
+ count = count - 1U;
+ if (count == 0U)
{
/* Enable the write protection for RTC registers */
__HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
@@ -1355,8 +1259,7 @@
return HAL_TIMEOUT;
}
- }
- while (__HAL_RTC_ALARM_GET_FLAG(hrtc, RTC_FLAG_ALRAWF) == RESET);
+ } while (__HAL_RTC_ALARM_GET_FLAG(hrtc, RTC_FLAG_ALRAWF) == 0U);
hrtc->Instance->ALRMAR = (uint32_t)tmpreg;
/* Configure the Alarm state: Enable Alarm */
@@ -1366,16 +1269,20 @@
}
else
{
- /* Disable the Alarm B interrupt */
+ /* Disable the Alarm B */
__HAL_RTC_ALARMB_DISABLE(hrtc);
- /* Clear flag alarm B */
+ /* Clear the Alarm flag */
__HAL_RTC_ALARM_CLEAR_FLAG(hrtc, RTC_FLAG_ALRBF);
- /* Wait till RTC ALRBWF flag is set and if Time out is reached exit */
+ /* Reload the counter */
+ count = RTC_TIMEOUT_VALUE * (SystemCoreClock / 32U / 1000U);
+
+ /* Wait till RTC ALRBWF flag is set and if timeout is reached exit */
do
{
- if (count-- == 0)
+ count = count - 1U;
+ if (count == 0U)
{
/* Enable the write protection for RTC registers */
__HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
@@ -1387,8 +1294,7 @@
return HAL_TIMEOUT;
}
- }
- while (__HAL_RTC_ALARM_GET_FLAG(hrtc, RTC_FLAG_ALRBWF) == RESET);
+ } while (__HAL_RTC_ALARM_GET_FLAG(hrtc, RTC_FLAG_ALRBWF) == 0U);
hrtc->Instance->ALRMBR = (uint32_t)tmpreg;
/* Configure the Alarm state: Enable Alarm */
@@ -1399,12 +1305,12 @@
/* RTC Alarm Interrupt Configuration: EXTI configuration */
__HAL_RTC_ALARM_EXTI_ENABLE_IT();
-
- EXTI->RTSR |= RTC_EXTI_LINE_ALARM_EVENT;
+ __HAL_RTC_ALARM_EXTI_ENABLE_RISING_EDGE();
/* Enable the write protection for RTC registers */
__HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
+ /* Change RTC state back to READY */
hrtc->State = HAL_RTC_STATE_READY;
/* Process Unlocked */
@@ -1414,13 +1320,13 @@
}
/**
- * @brief Deactivate the specified RTC Alarm
+ * @brief Deactivates the specified RTC Alarm.
* @param hrtc pointer to a RTC_HandleTypeDef structure that contains
* the configuration information for RTC.
* @param Alarm Specifies the Alarm.
* This parameter can be one of the following values:
- * @arg RTC_ALARM_A: AlarmA
- * @arg RTC_ALARM_B: AlarmB
+ * @arg RTC_ALARM_A: Alarm A
+ * @arg RTC_ALARM_B: Alarm B
* @retval HAL status
*/
HAL_StatusTypeDef HAL_RTC_DeactivateAlarm(RTC_HandleTypeDef *hrtc, uint32_t Alarm)
@@ -1440,17 +1346,17 @@
if (Alarm == RTC_ALARM_A)
{
- /* AlarmA */
+ /* Disable Alarm A */
__HAL_RTC_ALARMA_DISABLE(hrtc);
- /* In case of interrupt mode is used, the interrupt source must disabled */
+ /* In case interrupt mode is used, the interrupt source must be disabled */
__HAL_RTC_ALARM_DISABLE_IT(hrtc, RTC_IT_ALRA);
/* Get tick */
tickstart = HAL_GetTick();
- /* Wait till RTC ALRxWF flag is set and if Time out is reached exit */
- while (__HAL_RTC_ALARM_GET_FLAG(hrtc, RTC_FLAG_ALRAWF) == RESET)
+ /* Wait till RTC ALRxWF flag is set and if timeout is reached exit */
+ while (__HAL_RTC_ALARM_GET_FLAG(hrtc, RTC_FLAG_ALRAWF) == 0U)
{
if ((HAL_GetTick() - tickstart) > RTC_TIMEOUT_VALUE)
{
@@ -1468,17 +1374,17 @@
}
else
{
- /* AlarmB */
+ /* Disable Alarm B */
__HAL_RTC_ALARMB_DISABLE(hrtc);
- /* In case of interrupt mode is used, the interrupt source must disabled */
+ /* In case interrupt mode is used, the interrupt source must be disabled */
__HAL_RTC_ALARM_DISABLE_IT(hrtc, RTC_IT_ALRB);
/* Get tick */
tickstart = HAL_GetTick();
- /* Wait till RTC ALRxWF flag is set and if Time out is reached exit */
- while (__HAL_RTC_ALARM_GET_FLAG(hrtc, RTC_FLAG_ALRBWF) == RESET)
+ /* Wait till RTC ALRxWF flag is set and if timeout is reached exit */
+ while (__HAL_RTC_ALARM_GET_FLAG(hrtc, RTC_FLAG_ALRBWF) == 0U)
{
if ((HAL_GetTick() - tickstart) > RTC_TIMEOUT_VALUE)
{
@@ -1494,6 +1400,7 @@
}
}
}
+
/* Enable the write protection for RTC registers */
__HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
@@ -1512,8 +1419,8 @@
* @param sAlarm Pointer to Date structure
* @param Alarm Specifies the Alarm.
* This parameter can be one of the following values:
- * @arg RTC_ALARM_A: AlarmA
- * @arg RTC_ALARM_B: AlarmB
+ * @arg RTC_ALARM_A: Alarm A
+ * @arg RTC_ALARM_B: Alarm B
* @param Format Specifies the format of the entered parameters.
* This parameter can be one of the following values:
* @arg RTC_FORMAT_BIN: Binary data format
@@ -1530,7 +1437,6 @@
if (Alarm == RTC_ALARM_A)
{
- /* AlarmA */
sAlarm->Alarm = RTC_ALARM_A;
tmpreg = (uint32_t)(hrtc->Instance->ALRMAR);
@@ -1543,72 +1449,72 @@
}
/* Fill the structure with the read parameters */
- sAlarm->AlarmTime.Hours = (uint32_t)((tmpreg & (RTC_ALRMAR_HT | RTC_ALRMAR_HU)) >> 16U);
- sAlarm->AlarmTime.Minutes = (uint32_t)((tmpreg & (RTC_ALRMAR_MNT | RTC_ALRMAR_MNU)) >> 8U);
- sAlarm->AlarmTime.Seconds = (uint32_t)(tmpreg & (RTC_ALRMAR_ST | RTC_ALRMAR_SU));
- sAlarm->AlarmTime.TimeFormat = (uint32_t)((tmpreg & RTC_ALRMAR_PM) >> 16U);
- sAlarm->AlarmDateWeekDay = (uint32_t)((tmpreg & (RTC_ALRMAR_DT | RTC_ALRMAR_DU)) >> 24U);
- sAlarm->AlarmDateWeekDaySel = (uint32_t)(tmpreg & RTC_ALRMAR_WDSEL);
- sAlarm->AlarmMask = (uint32_t)(tmpreg & RTC_ALARMMASK_ALL);
+ sAlarm->AlarmTime.Hours = (uint8_t) ((tmpreg & (RTC_ALRMAR_HT | RTC_ALRMAR_HU)) >> RTC_ALRMAR_HU_Pos);
+ sAlarm->AlarmTime.Minutes = (uint8_t) ((tmpreg & (RTC_ALRMAR_MNT | RTC_ALRMAR_MNU)) >> RTC_ALRMAR_MNU_Pos);
+ sAlarm->AlarmTime.Seconds = (uint8_t) ( tmpreg & (RTC_ALRMAR_ST | RTC_ALRMAR_SU));
+ sAlarm->AlarmTime.TimeFormat = (uint8_t) ((tmpreg & RTC_ALRMAR_PM) >> RTC_TR_PM_Pos);
+ sAlarm->AlarmDateWeekDay = (uint8_t) ((tmpreg & (RTC_ALRMAR_DT | RTC_ALRMAR_DU)) >> RTC_ALRMAR_DU_Pos);
+ sAlarm->AlarmDateWeekDaySel = (uint32_t) (tmpreg & RTC_ALRMAR_WDSEL);
+ sAlarm->AlarmMask = (uint32_t) (tmpreg & RTC_ALARMMASK_ALL);
if (Format == RTC_FORMAT_BIN)
{
- sAlarm->AlarmTime.Hours = RTC_Bcd2ToByte(sAlarm->AlarmTime.Hours);
+ sAlarm->AlarmTime.Hours = RTC_Bcd2ToByte(sAlarm->AlarmTime.Hours);
sAlarm->AlarmTime.Minutes = RTC_Bcd2ToByte(sAlarm->AlarmTime.Minutes);
sAlarm->AlarmTime.Seconds = RTC_Bcd2ToByte(sAlarm->AlarmTime.Seconds);
- sAlarm->AlarmDateWeekDay = RTC_Bcd2ToByte(sAlarm->AlarmDateWeekDay);
+ sAlarm->AlarmDateWeekDay = RTC_Bcd2ToByte(sAlarm->AlarmDateWeekDay);
}
return HAL_OK;
}
/**
- * @brief This function handles Alarm interrupt request.
+ * @brief Handles Alarm interrupt request.
* @param hrtc pointer to a RTC_HandleTypeDef structure that contains
* the configuration information for RTC.
* @retval None
*/
void HAL_RTC_AlarmIRQHandler(RTC_HandleTypeDef *hrtc)
{
- /* Get the AlarmA interrupt source enable status */
+ /* Clear the EXTI's line Flag for RTC Alarm */
+ __HAL_RTC_ALARM_EXTI_CLEAR_FLAG();
+
+ /* Get the Alarm A interrupt source enable status */
if (__HAL_RTC_ALARM_GET_IT_SOURCE(hrtc, RTC_IT_ALRA) != 0U)
{
- /* Get the pending status of the AlarmA Interrupt */
+ /* Get the pending status of the Alarm A Interrupt */
if (__HAL_RTC_ALARM_GET_FLAG(hrtc, RTC_FLAG_ALRAF) != 0U)
{
- /* AlarmA callback */
+ /* Clear the Alarm A interrupt pending bit */
+ __HAL_RTC_ALARM_CLEAR_FLAG(hrtc, RTC_FLAG_ALRAF);
+
+ /* Alarm A callback */
#if (USE_HAL_RTC_REGISTER_CALLBACKS == 1)
hrtc->AlarmAEventCallback(hrtc);
#else
HAL_RTC_AlarmAEventCallback(hrtc);
#endif /* USE_HAL_RTC_REGISTER_CALLBACKS */
-
- /* Clear the Alarm interrupt pending bit */
- __HAL_RTC_ALARM_CLEAR_FLAG(hrtc, RTC_FLAG_ALRAF);
}
}
- /* Get the AlarmB interrupt source enable status */
+ /* Get the Alarm B interrupt source enable status */
if (__HAL_RTC_ALARM_GET_IT_SOURCE(hrtc, RTC_IT_ALRB) != 0U)
{
- /* Get the pending status of the AlarmB Interrupt */
+ /* Get the pending status of the Alarm B Interrupt */
if (__HAL_RTC_ALARM_GET_FLAG(hrtc, RTC_FLAG_ALRBF) != 0U)
{
- /* AlarmB callback */
+ /* Clear the Alarm B interrupt pending bit */
+ __HAL_RTC_ALARM_CLEAR_FLAG(hrtc, RTC_FLAG_ALRBF);
+
+ /* Alarm B callback */
#if (USE_HAL_RTC_REGISTER_CALLBACKS == 1)
hrtc->AlarmBEventCallback(hrtc);
#else
HAL_RTCEx_AlarmBEventCallback(hrtc);
#endif /* USE_HAL_RTC_REGISTER_CALLBACKS */
-
- /* Clear the Alarm interrupt pending bit */
- __HAL_RTC_ALARM_CLEAR_FLAG(hrtc, RTC_FLAG_ALRBF);
}
}
- /* Clear the EXTI's line Flag for RTC Alarm */
- __HAL_RTC_ALARM_EXTI_CLEAR_FLAG();
-
/* Change RTC state */
hrtc->State = HAL_RTC_STATE_READY;
}
@@ -1623,13 +1529,14 @@
{
/* Prevent unused argument(s) compilation warning */
UNUSED(hrtc);
- /* NOTE : This function Should not be modified, when the callback is needed,
- the HAL_RTC_AlarmAEventCallback could be implemented in the user file
+
+ /* NOTE: This function should not be modified, when the callback is needed,
+ the HAL_RTC_AlarmAEventCallback could be implemented in the user file
*/
}
/**
- * @brief This function handles AlarmA Polling request.
+ * @brief Handles Alarm A Polling request.
* @param hrtc pointer to a RTC_HandleTypeDef structure that contains
* the configuration information for RTC.
* @param Timeout Timeout duration
@@ -1642,7 +1549,8 @@
/* Get tick */
tickstart = HAL_GetTick();
- while (__HAL_RTC_ALARM_GET_FLAG(hrtc, RTC_FLAG_ALRAF) == RESET)
+ /* Wait till RTC ALRAF flag is set and if timeout is reached exit */
+ while (__HAL_RTC_ALARM_GET_FLAG(hrtc, RTC_FLAG_ALRAF) == 0U)
{
if (Timeout != HAL_MAX_DELAY)
{
@@ -1654,7 +1562,7 @@
}
}
- /* Clear the Alarm interrupt pending bit */
+ /* Clear the Alarm flag */
__HAL_RTC_ALARM_CLEAR_FLAG(hrtc, RTC_FLAG_ALRAF);
/* Change RTC state */
@@ -1668,8 +1576,8 @@
*/
/** @defgroup RTC_Exported_Functions_Group4 Peripheral Control functions
- * @brief Peripheral Control functions
- *
+ * @brief Peripheral Control functions
+ *
@verbatim
===============================================================================
##### Peripheral Control functions #####
@@ -1677,6 +1585,7 @@
[..]
This subsection provides functions allowing to
(+) Wait for RTC Time and Date Synchronization
+ (+) Manage RTC Summer or Winter time change
@endverbatim
* @{
@@ -1688,7 +1597,7 @@
* @note The RTC Resynchronization mode is write protected, use the
* __HAL_RTC_WRITEPROTECTION_DISABLE() before calling this function.
* @note To read the calendar through the shadow registers after Calendar
- * initialization, calendar update or after wake-up from low power modes
+ * initialization, calendar update or after wakeup from low power modes
* the software must first clear the RSF flag.
* The software must then wait until it is set again before reading
* the calendar, which means that the calendar registers have been
@@ -1701,14 +1610,14 @@
{
uint32_t tickstart = 0U;
- /* Clear RSF flag */
- hrtc->Instance->ISR &= (uint32_t)RTC_RSF_MASK;
+ /* Clear RSF flag, keep reserved bits at reset values (setting other flags has no effect) */
+ hrtc->Instance->ISR = ((uint32_t)(RTC_RSF_MASK & RTC_ISR_RESERVED_MASK));
/* Get tick */
tickstart = HAL_GetTick();
/* Wait the registers to be synchronised */
- while ((hrtc->Instance->ISR & RTC_ISR_RSF) == (uint32_t)RESET)
+ while ((hrtc->Instance->ISR & RTC_ISR_RSF) == 0U)
{
if ((HAL_GetTick() - tickstart) > RTC_TIMEOUT_VALUE)
{
@@ -1720,12 +1629,77 @@
}
/**
+ * @brief Daylight Saving Time, adds one hour to the calendar in one
+ * single operation without going through the initialization procedure.
+ * @param hrtc pointer to a RTC_HandleTypeDef structure that contains
+ * the configuration information for RTC.
+ * @retval None
+ */
+void HAL_RTC_DST_Add1Hour(RTC_HandleTypeDef *hrtc)
+{
+ __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
+ SET_BIT(hrtc->Instance->CR, RTC_CR_ADD1H);
+ __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
+}
+
+/**
+ * @brief Daylight Saving Time, subtracts one hour from the calendar in one
+ * single operation without going through the initialization procedure.
+ * @param hrtc pointer to a RTC_HandleTypeDef structure that contains
+ * the configuration information for RTC.
+ * @retval None
+ */
+void HAL_RTC_DST_Sub1Hour(RTC_HandleTypeDef *hrtc)
+{
+ __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
+ SET_BIT(hrtc->Instance->CR, RTC_CR_SUB1H);
+ __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
+}
+
+/**
+ * @brief Daylight Saving Time, sets the store operation bit.
+ * @note It can be used by the software in order to memorize the DST status.
+ * @param hrtc pointer to a RTC_HandleTypeDef structure that contains
+ * the configuration information for RTC.
+ * @retval None
+ */
+void HAL_RTC_DST_SetStoreOperation(RTC_HandleTypeDef *hrtc)
+{
+ __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
+ SET_BIT(hrtc->Instance->CR, RTC_CR_BKP);
+ __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
+}
+
+/**
+ * @brief Daylight Saving Time, clears the store operation bit.
+ * @param hrtc pointer to a RTC_HandleTypeDef structure that contains
+ * the configuration information for RTC.
+ * @retval None
+ */
+void HAL_RTC_DST_ClearStoreOperation(RTC_HandleTypeDef *hrtc)
+{
+ __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
+ CLEAR_BIT(hrtc->Instance->CR, RTC_CR_BKP);
+ __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
+}
+
+/**
+ * @brief Daylight Saving Time, reads the store operation bit.
+ * @param hrtc RTC handle
+ * @retval operation see RTC_StoreOperation_Definitions
+ */
+uint32_t HAL_RTC_DST_ReadStoreOperation(RTC_HandleTypeDef *hrtc)
+{
+ return READ_BIT(hrtc->Instance->CR, RTC_CR_BKP);
+}
+
+/**
* @}
*/
/** @defgroup RTC_Exported_Functions_Group5 Peripheral State functions
- * @brief Peripheral State functions
- *
+ * @brief Peripheral State functions
+ *
@verbatim
===============================================================================
##### Peripheral State functions #####
@@ -1752,6 +1726,15 @@
* @}
*/
+
+/**
+ * @}
+ */
+
+/** @addtogroup RTC_Private_Functions
+ * @{
+ */
+
/**
* @brief Enters the RTC Initialization mode.
* @note The RTC Initialization mode is write protected, use the
@@ -1763,58 +1746,83 @@
HAL_StatusTypeDef RTC_EnterInitMode(RTC_HandleTypeDef *hrtc)
{
uint32_t tickstart = 0U;
+ HAL_StatusTypeDef status = HAL_OK;
- /* Check if the Initialization mode is set */
- if ((hrtc->Instance->ISR & RTC_ISR_INITF) == (uint32_t)RESET)
+ /* Check that Initialization mode is not already set */
+ if (READ_BIT(hrtc->Instance->ISR, RTC_ISR_INITF) == 0U)
{
- /* Set the Initialization mode */
- hrtc->Instance->ISR = (uint32_t)RTC_INIT_MASK;
+ /* Set INIT bit to enter Initialization mode */
+ SET_BIT(hrtc->Instance->ISR, RTC_ISR_INIT);
/* Get tick */
tickstart = HAL_GetTick();
- /* Wait till RTC is in INIT state and if Time out is reached exit */
- while ((hrtc->Instance->ISR & RTC_ISR_INITF) == (uint32_t)RESET)
+ /* Wait till RTC is in INIT state and if timeout is reached exit */
+ while ((READ_BIT(hrtc->Instance->ISR, RTC_ISR_INITF) == 0U) && (status != HAL_ERROR))
{
if ((HAL_GetTick() - tickstart) > RTC_TIMEOUT_VALUE)
{
- return HAL_TIMEOUT;
+ /* Set RTC state */
+ hrtc->State = HAL_RTC_STATE_ERROR;
+ status = HAL_ERROR;
}
}
}
- return HAL_OK;
+ return status;
}
+/**
+ * @brief Exits the RTC Initialization mode.
+ * @param hrtc pointer to a RTC_HandleTypeDef structure that contains
+ * the configuration information for RTC.
+ * @retval HAL status
+ */
+HAL_StatusTypeDef RTC_ExitInitMode(RTC_HandleTypeDef *hrtc)
+{
+ HAL_StatusTypeDef status = HAL_OK;
+
+ /* Clear INIT bit to exit Initialization mode */
+ CLEAR_BIT(hrtc->Instance->ISR, RTC_ISR_INIT);
+
+ if (HAL_RTC_WaitForSynchro(hrtc) != HAL_OK)
+ {
+ /* Set RTC state */
+ hrtc->State = HAL_RTC_STATE_ERROR;
+ status = HAL_ERROR;
+ }
+
+ return status;
+}
/**
- * @brief Converts a 2 digit decimal to BCD format.
- * @param Value Byte to be converted
+ * @brief Converts a 2-digit number from decimal to BCD format.
+ * @param number decimal-formatted number (from 0 to 99) to be converted
* @retval Converted byte
*/
-uint8_t RTC_ByteToBcd2(uint8_t Value)
+uint8_t RTC_ByteToBcd2(uint8_t number)
{
uint32_t bcdhigh = 0U;
- while (Value >= 10)
+ while (number >= 10U)
{
bcdhigh++;
- Value -= 10;
+ number -= 10U;
}
- return ((uint8_t)(bcdhigh << 4U) | Value);
+ return ((uint8_t)(bcdhigh << 4U) | number);
}
/**
- * @brief Converts from 2 digit BCD to Binary.
- * @param Value BCD value to be converted
+ * @brief Converts a 2-digit number from BCD to decimal format.
+ * @param number BCD-formatted number (from 00 to 99) to be converted
* @retval Converted word
*/
-uint8_t RTC_Bcd2ToByte(uint8_t Value)
+uint8_t RTC_Bcd2ToByte(uint8_t number)
{
- uint32_t tmp = 0U;
- tmp = ((uint8_t)(Value & (uint8_t)0xF0) >> (uint8_t)0x4) * 10;
- return (tmp + (Value & (uint8_t)0x0F));
+ uint32_t tens = 0U;
+ tens = (((uint32_t)number & 0xF0U) >> 4U) * 10U;
+ return (uint8_t)(tens + ((uint32_t)number & 0x0FU));
}
/**
diff --git a/Src/stm32f2xx_hal_rtc_ex.c b/Src/stm32f2xx_hal_rtc_ex.c
index 8739f8a..bacc521 100644
--- a/Src/stm32f2xx_hal_rtc_ex.c
+++ b/Src/stm32f2xx_hal_rtc_ex.c
@@ -2,14 +2,14 @@
******************************************************************************
* @file stm32f2xx_hal_rtc_ex.c
* @author MCD Application Team
- * @brief RTC HAL module driver.
+ * @brief Extended RTC HAL module driver.
* This file provides firmware functions to manage the following
- * functionalities of the Real Time Clock (RTC) Extension peripheral:
- * + RTC Time Stamp functions
+ * functionalities of the Real-Time Clock (RTC) Extended peripheral:
+ * + RTC Timestamp functions
* + RTC Tamper functions
- * + RTC Wake-up functions
- * + Extension Control functions
- * + Extension RTC features functions
+ * + RTC Wakeup functions
+ * + Extended Control functions
+ * + Extended RTC features functions
*
******************************************************************************
* @attention
@@ -24,44 +24,51 @@
******************************************************************************
@verbatim
==============================================================================
- ##### How to use this driver #####
+ ##### How to use this driver #####
==============================================================================
[..]
(+) Enable the RTC domain access.
(+) Configure the RTC Prescaler (Asynchronous and Synchronous) and RTC hour
format using the HAL_RTC_Init() function.
- *** RTC Wake-up configuration ***
+ *** RTC Wakeup configuration ***
================================
[..]
- (+) To configure the RTC Wake-up Clock source and Counter use the HAL_RTCEx_SetWakeUpTimer()
- function. You can also configure the RTC Wake-up timer in interrupt mode
- using the HAL_RTCEx_SetWakeUpTimer_IT() function.
- (+) To read the RTC Wake-up Counter register, use the HAL_RTCEx_GetWakeUpTimer()
+ (+) To configure the RTC Wakeup Clock source and Counter use the
+ HAL_RTCEx_SetWakeUpTimer() function.
+ You can also configure the RTC Wakeup timer in interrupt mode using the
+ HAL_RTCEx_SetWakeUpTimer_IT() function.
+ (+) To read the RTC Wakeup Counter register, use the HAL_RTCEx_GetWakeUpTimer()
function.
- *** TimeStamp configuration ***
+ *** Timestamp configuration ***
===============================
[..]
- (+) Configure the RTC_AFx trigger and enable the RTC TimeStamp using the
- HAL_RTCEx_SetTimeStamp() function. You can also configure the RTC TimeStamp with
- interrupt mode using the HAL_RTCEx_SetTimeStamp_IT() function.
- (+) To read the RTC TimeStamp Time and Date register, use the HAL_RTCEx_GetTimeStamp()
- function.
- (+) The TIMESTAMP alternate function can be mapped either to RTC_AF1 (PC13)
- or RTC_AF2 (PI8) depending on the value of TSINSEL bit in
- RTC_TAFCR register. The corresponding pin is also selected by HAL_RTCEx_SetTimeStamp()
- or HAL_RTCEx_SetTimeStamp_IT() function.
+ (+) To configure the RTC Timestamp use the HAL_RTCEx_SetTimeStamp() function.
+ You can also configure the RTC Timestamp with interrupt mode using the
+ HAL_RTCEx_SetTimeStamp_IT() function.
+ (+) To read the RTC Timestamp Time and Date register, use the
+ HAL_RTCEx_GetTimeStamp() function.
+ (+) The Timestamp alternate function can be mapped either to RTC_AF1 (PC13)
+ or RTC_AF2 (PI8) depending on the value of TSINSEL bit in RTC_TAFCR
+ register.
+ The corresponding pin is also selected by HAL_RTCEx_SetTimeStamp()
+ or HAL_RTCEx_SetTimeStamp_IT() functions.
*** Tamper configuration ***
============================
[..]
- (+) Enable the RTC Tamper and configure the trigger using the HAL_RTCEx_SetTamper() function.
- You can configure RTC Tamper in interrupt mode using HAL_RTCEx_SetTamper_IT() function.
+ (+) To Enable the RTC Tamper and configure the Tamper filter count, trigger
+ Edge or Level according to the Tamper filter value (if equal to 0 Edge
+ else Level), sampling frequency, precharge or discharge and Pull-UP use
+ the HAL_RTCEx_SetTamper() function.
+ You can configure RTC Tamper in interrupt mode using HAL_RTCEx_SetTamper_IT()
+ function.
(+) The TAMPER1 alternate function can be mapped either to RTC_AF1 (PC13)
- or RTC_AF2 (PI8) depending on the value of TAMP1INSEL bit in
- RTC_TAFCR register. The corresponding pin is also selected by HAL_RTCEx_SetTamper()
- or HAL_RTCEx_SetTamper_IT() function.
+ or RTC_AF2 (PI8) depending on the value of TAMP1INSEL bit in RTC_TAFCR
+ register.
+ The corresponding pin is also selected by HAL_RTCEx_SetTamper()
+ or HAL_RTCEx_SetTamper_IT() functions.
*** Backup Data Registers configuration ***
===========================================
@@ -71,6 +78,27 @@
(+) To read the RTC Backup Data registers, use the HAL_RTCEx_BKUPRead()
function.
+ *** Coarse Digital Calibration configuration ***
+ ================================================
+ [..]
+ (+) The Coarse Digital Calibration can be used to compensate crystal inaccuracy
+ by setting the DCS bit in RTC_CALIBR register.
+ (+) When positive calibration is enabled (DCS = ‘0’), 2 asynchronous prescaler
+ clock cycles are added every minute during 2xDC minutes.
+ This causes the calendar to be updated sooner, thereby adjusting the
+ effective RTC frequency to be a bit higher.
+ (+) When negative calibration is enabled (DCS = ‘1’), 1 asynchronous prescaler
+ clock cycle is removed every minute during 2xDC minutes.
+ This causes the calendar to be updated later, thereby adjusting the
+ effective RTC frequency to be a bit lower.
+ (+) DC is configured through bits DC[4:0] of RTC_CALIBR register. This number
+ ranges from 0 to 31 corresponding to a time interval (2xDC) ranging from
+ 0 to 62.
+ (+) In order to measure the clock deviation, a 512 Hz clock is output for
+ calibration.
+ (+) The RTC Coarse Digital Calibration value and sign can be calibrated using
+ the HAL_RTCEx_SetCoarseCalib() function.
+
@endverbatim
******************************************************************************
*/
@@ -83,7 +111,7 @@
*/
/** @defgroup RTCEx RTCEx
- * @brief RTC HAL module driver
+ * @brief RTC Extended HAL module driver
* @{
*/
@@ -94,146 +122,86 @@
/* Private macro -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
/* Private function prototypes -----------------------------------------------*/
-/* Private functions ---------------------------------------------------------*/
+/* Exported functions --------------------------------------------------------*/
-/** @defgroup RTCEx_Exported_Functions RTC Exported Functions
+/** @defgroup RTCEx_Exported_Functions RTCEx Exported Functions
* @{
*/
-/** @defgroup RTCEx_Exported_Functions_Group1 RTC TimeStamp and Tamper functions
- * @brief RTC TimeStamp and Tamper functions
+/** @defgroup RTCEx_Exported_Functions_Group1 RTC Timestamp and Tamper functions
+ * @brief RTC Timestamp and Tamper functions
*
@verbatim
===============================================================================
- ##### RTC TimeStamp and Tamper functions #####
+ ##### RTC Timestamp and Tamper functions #####
===============================================================================
- [..] This section provides functions allowing to configure TimeStamp feature
+ [..] This section provides functions allowing to configure Timestamp feature
@endverbatim
* @{
*/
/**
- * @brief Sets TimeStamp.
- * @note This API must be called before enabling the TimeStamp feature.
+ * @brief Sets Timestamp.
+ * @note This API must be called before enabling the Timestamp feature.
* @param hrtc pointer to a RTC_HandleTypeDef structure that contains
* the configuration information for RTC.
- * @param TimeStampEdge Specifies the pin edge on which the TimeStamp is
+ * @param RTC_TimeStampEdge Specifies the pin edge on which the Timestamp is
* activated.
* This parameter can be one of the following values:
- * @arg RTC_TIMESTAMPEDGE_RISING: the Time stamp event occurs on the
- * rising edge of the related pin.
- * @arg RTC_TIMESTAMPEDGE_FALLING: the Time stamp event occurs on the
- * falling edge of the related pin.
- * @param RTC_TimeStampPin specifies the RTC TimeStamp Pin.
+ * @arg RTC_TIMESTAMPEDGE_RISING: the Timestamp event occurs on
+ * the rising edge of the related pin.
+ * @arg RTC_TIMESTAMPEDGE_FALLING: the Timestamp event occurs on
+ * the falling edge of the related pin.
+ * @param RTC_TimeStampPin Specifies the RTC Timestamp Pin.
* This parameter can be one of the following values:
- * @arg RTC_TIMESTAMPPIN_DEFAULT: PC13 is selected as RTC TimeStamp Pin.
- * @arg RTC_TIMESTAMPPIN_POS1: PI8 is selected as RTC TimeStamp Pin.
+ * @arg RTC_TIMESTAMPPIN_DEFAULT: PC13 is selected as RTC Timestamp Pin.
+ * @arg RTC_TIMESTAMPPIN_POS1: PI8 is selected as RTC Timestamp Pin.
* @retval HAL status
*/
-HAL_StatusTypeDef HAL_RTCEx_SetTimeStamp(RTC_HandleTypeDef *hrtc, uint32_t TimeStampEdge, uint32_t RTC_TimeStampPin)
+HAL_StatusTypeDef HAL_RTCEx_SetTimeStamp(RTC_HandleTypeDef *hrtc, uint32_t RTC_TimeStampEdge, uint32_t RTC_TimeStampPin)
{
uint32_t tmpreg = 0U;
/* Check the parameters */
- assert_param(IS_TIMESTAMP_EDGE(TimeStampEdge));
+ assert_param(IS_TIMESTAMP_EDGE(RTC_TimeStampEdge));
assert_param(IS_RTC_TIMESTAMP_PIN(RTC_TimeStampPin));
/* Process Locked */
__HAL_LOCK(hrtc);
+ /* Change RTC state to BUSY */
hrtc->State = HAL_RTC_STATE_BUSY;
- /* Get the RTC_CR register and clear the bits to be configured */
- tmpreg = (uint32_t)(hrtc->Instance->CR & (uint32_t)~(RTC_CR_TSEDGE | RTC_CR_TSE));
-
- tmpreg |= TimeStampEdge;
-
- /* Disable the write protection for RTC registers */
- __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
-
hrtc->Instance->TAFCR &= (uint32_t)~RTC_TAFCR_TSINSEL;
hrtc->Instance->TAFCR |= (uint32_t)(RTC_TimeStampPin);
- /* Configure the Time Stamp TSEDGE and Enable bits */
- hrtc->Instance->CR = (uint32_t)tmpreg;
-
- __HAL_RTC_TIMESTAMP_ENABLE(hrtc);
-
- /* Enable the write protection for RTC registers */
- __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
-
- /* Change RTC state */
- hrtc->State = HAL_RTC_STATE_READY;
-
- /* Process Unlocked */
- __HAL_UNLOCK(hrtc);
-
- return HAL_OK;
-}
-
-/**
- * @brief Sets TimeStamp with Interrupt.
- * @param hrtc pointer to a RTC_HandleTypeDef structure that contains
- * the configuration information for RTC.
- * @note This API must be called before enabling the TimeStamp feature.
- * @param TimeStampEdge Specifies the pin edge on which the TimeStamp is
- * activated.
- * This parameter can be one of the following values:
- * @arg RTC_TIMESTAMPEDGE_RISING: the Time stamp event occurs on the
- * rising edge of the related pin.
- * @arg RTC_TIMESTAMPEDGE_FALLING: the Time stamp event occurs on the
- * falling edge of the related pin.
- * @param RTC_TimeStampPin Specifies the RTC TimeStamp Pin.
- * This parameter can be one of the following values:
- * @arg RTC_TIMESTAMPPIN_DEFAULT: PC13 is selected as RTC TimeStamp Pin.
- * @arg RTC_TIMESTAMPPIN_POS1: PI8 is selected as RTC TimeStamp Pin.
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_RTCEx_SetTimeStamp_IT(RTC_HandleTypeDef *hrtc, uint32_t TimeStampEdge, uint32_t RTC_TimeStampPin)
-{
- uint32_t tmpreg = 0U;
-
- /* Check the parameters */
- assert_param(IS_TIMESTAMP_EDGE(TimeStampEdge));
- assert_param(IS_RTC_TIMESTAMP_PIN(RTC_TimeStampPin));
-
- /* Process Locked */
- __HAL_LOCK(hrtc);
-
- hrtc->State = HAL_RTC_STATE_BUSY;
-
/* Get the RTC_CR register and clear the bits to be configured */
tmpreg = (uint32_t)(hrtc->Instance->CR & (uint32_t)~(RTC_CR_TSEDGE | RTC_CR_TSE));
- tmpreg |= TimeStampEdge;
+ /* Configure the Timestamp TSEDGE bit */
+ tmpreg |= RTC_TimeStampEdge;
/* Disable the write protection for RTC registers */
__HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
- /* Configure the Time Stamp TSEDGE and Enable bits */
+ /* Copy the desired configuration into the CR register */
hrtc->Instance->CR = (uint32_t)tmpreg;
- hrtc->Instance->TAFCR &= (uint32_t)~RTC_TAFCR_TSINSEL;
- hrtc->Instance->TAFCR |= (uint32_t)(RTC_TimeStampPin);
-
/* Clear RTC Timestamp flag */
__HAL_RTC_TIMESTAMP_CLEAR_FLAG(hrtc, RTC_FLAG_TSF);
+ /* Clear RTC Timestamp overrun Flag */
+ __HAL_RTC_TIMESTAMP_CLEAR_FLAG(hrtc, RTC_FLAG_TSOVF);
+
+ /* Enable the Timestamp saving */
__HAL_RTC_TIMESTAMP_ENABLE(hrtc);
- /* Enable IT timestamp */
- __HAL_RTC_TIMESTAMP_ENABLE_IT(hrtc, RTC_IT_TS);
-
- /* RTC timestamp Interrupt Configuration: EXTI configuration */
- __HAL_RTC_TAMPER_TIMESTAMP_EXTI_ENABLE_IT();
-
- EXTI->RTSR |= RTC_EXTI_LINE_TAMPER_TIMESTAMP_EVENT;
-
/* Enable the write protection for RTC registers */
__HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
+ /* Change RTC state back to READY */
hrtc->State = HAL_RTC_STATE_READY;
/* Process Unlocked */
@@ -243,7 +211,82 @@
}
/**
- * @brief Deactivates TimeStamp.
+ * @brief Sets Timestamp with Interrupt.
+ * @param hrtc pointer to a RTC_HandleTypeDef structure that contains
+ * the configuration information for RTC.
+ * @note This API must be called before enabling the Timestamp feature.
+ * @param RTC_TimeStampEdge Specifies the pin edge on which the Timestamp is
+ * activated.
+ * This parameter can be one of the following values:
+ * @arg RTC_TIMESTAMPEDGE_RISING: the Timestamp event occurs on
+ * the rising edge of the related pin.
+ * @arg RTC_TIMESTAMPEDGE_FALLING: the Timestamp event occurs on
+ * the falling edge of the related pin.
+ * @param RTC_TimeStampPin Specifies the RTC Timestamp Pin.
+ * This parameter can be one of the following values:
+ * @arg RTC_TIMESTAMPPIN_DEFAULT: PC13 is selected as RTC Timestamp Pin.
+ * @arg RTC_TIMESTAMPPIN_POS1: PI8 is selected as RTC Timestamp Pin.
+ * @retval HAL status
+ */
+HAL_StatusTypeDef HAL_RTCEx_SetTimeStamp_IT(RTC_HandleTypeDef *hrtc, uint32_t RTC_TimeStampEdge, uint32_t RTC_TimeStampPin)
+{
+ uint32_t tmpreg = 0U;
+
+ /* Check the parameters */
+ assert_param(IS_TIMESTAMP_EDGE(RTC_TimeStampEdge));
+ assert_param(IS_RTC_TIMESTAMP_PIN(RTC_TimeStampPin));
+
+ /* Process Locked */
+ __HAL_LOCK(hrtc);
+
+ /* Change RTC state to BUSY */
+ hrtc->State = HAL_RTC_STATE_BUSY;
+
+ hrtc->Instance->TAFCR &= (uint32_t)~RTC_TAFCR_TSINSEL;
+ hrtc->Instance->TAFCR |= (uint32_t)(RTC_TimeStampPin);
+
+ /* Get the RTC_CR register and clear the bits to be configured */
+ tmpreg = (uint32_t)(hrtc->Instance->CR & (uint32_t)~(RTC_CR_TSEDGE | RTC_CR_TSE));
+
+ /* Configure the Timestamp TSEDGE bit */
+ tmpreg |= RTC_TimeStampEdge;
+
+ /* Disable the write protection for RTC registers */
+ __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
+
+ /* Copy the desired configuration into the CR register */
+ hrtc->Instance->CR = (uint32_t)tmpreg;
+
+ /* Clear RTC Timestamp flag */
+ __HAL_RTC_TIMESTAMP_CLEAR_FLAG(hrtc, RTC_FLAG_TSF);
+
+ /* Clear RTC Timestamp overrun Flag */
+ __HAL_RTC_TIMESTAMP_CLEAR_FLAG(hrtc, RTC_FLAG_TSOVF);
+
+ /* Enable the Timestamp saving */
+ __HAL_RTC_TIMESTAMP_ENABLE(hrtc);
+
+ /* Enable IT Timestamp */
+ __HAL_RTC_TIMESTAMP_ENABLE_IT(hrtc, RTC_IT_TS);
+
+ /* Enable the write protection for RTC registers */
+ __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
+
+ /* RTC Timestamp Interrupt Configuration: EXTI configuration */
+ __HAL_RTC_TAMPER_TIMESTAMP_EXTI_ENABLE_IT();
+ __HAL_RTC_TAMPER_TIMESTAMP_EXTI_ENABLE_RISING_EDGE();
+
+ /* Change RTC state back to READY */
+ hrtc->State = HAL_RTC_STATE_READY;
+
+ /* Process Unlocked */
+ __HAL_UNLOCK(hrtc);
+
+ return HAL_OK;
+}
+
+/**
+ * @brief Deactivates Timestamp.
* @param hrtc pointer to a RTC_HandleTypeDef structure that contains
* the configuration information for RTC.
* @retval HAL status
@@ -266,7 +309,7 @@
/* Get the RTC_CR register and clear the bits to be configured */
tmpreg = (uint32_t)(hrtc->Instance->CR & (uint32_t)~(RTC_CR_TSEDGE | RTC_CR_TSE));
- /* Configure the Time Stamp TSEDGE and Enable bits */
+ /* Configure the Timestamp TSEDGE and Enable bits */
hrtc->Instance->CR = (uint32_t)tmpreg;
/* Enable the write protection for RTC registers */
@@ -281,63 +324,64 @@
}
/**
- * @brief Gets the RTC TimeStamp value.
+ * @brief Gets the RTC Timestamp value.
* @param hrtc pointer to a RTC_HandleTypeDef structure that contains
* the configuration information for RTC.
* @param sTimeStamp Pointer to Time structure
* @param sTimeStampDate Pointer to Date structure
* @param Format specifies the format of the entered parameters.
* This parameter can be one of the following values:
- * RTC_FORMAT_BIN: Binary data format
- * RTC_FORMAT_BCD: BCD data format
+ * @arg RTC_FORMAT_BIN: Binary data format
+ * @arg RTC_FORMAT_BCD: BCD data format
* @retval HAL status
*/
HAL_StatusTypeDef HAL_RTCEx_GetTimeStamp(RTC_HandleTypeDef *hrtc, RTC_TimeTypeDef *sTimeStamp, RTC_DateTypeDef *sTimeStampDate, uint32_t Format)
{
- uint32_t tmptime = 0U, tmpdate = 0U;
+ uint32_t tmptime = 0U;
+ uint32_t tmpdate = 0U;
/* Check the parameters */
assert_param(IS_RTC_FORMAT(Format));
- /* Get the TimeStamp time and date registers values */
+ /* Get the Timestamp time and date registers values */
tmptime = (uint32_t)(hrtc->Instance->TSTR & RTC_TR_RESERVED_MASK);
tmpdate = (uint32_t)(hrtc->Instance->TSDR & RTC_DR_RESERVED_MASK);
/* Fill the Time structure fields with the read parameters */
- sTimeStamp->Hours = (uint8_t)((tmptime & (RTC_TR_HT | RTC_TR_HU)) >> 16U);
- sTimeStamp->Minutes = (uint8_t)((tmptime & (RTC_TR_MNT | RTC_TR_MNU)) >> 8U);
- sTimeStamp->Seconds = (uint8_t)(tmptime & (RTC_TR_ST | RTC_TR_SU));
- sTimeStamp->TimeFormat = (uint8_t)((tmptime & (RTC_TR_PM)) >> 16U);
+ sTimeStamp->Hours = (uint8_t)((tmptime & (RTC_TSTR_HT | RTC_TSTR_HU)) >> RTC_TSTR_HU_Pos);
+ sTimeStamp->Minutes = (uint8_t)((tmptime & (RTC_TSTR_MNT | RTC_TSTR_MNU)) >> RTC_TSTR_MNU_Pos);
+ sTimeStamp->Seconds = (uint8_t)((tmptime & (RTC_TSTR_ST | RTC_TSTR_SU)) >> RTC_TSTR_SU_Pos);
+ sTimeStamp->TimeFormat = (uint8_t)((tmptime & (RTC_TSTR_PM)) >> RTC_TSTR_PM_Pos);
/* Fill the Date structure fields with the read parameters */
- sTimeStampDate->Year = 0;
- sTimeStampDate->Month = (uint8_t)((tmpdate & (RTC_DR_MT | RTC_DR_MU)) >> 8U);
- sTimeStampDate->Date = (uint8_t)(tmpdate & (RTC_DR_DT | RTC_DR_DU));
- sTimeStampDate->WeekDay = (uint8_t)((tmpdate & (RTC_DR_WDU)) >> 13U);
+ sTimeStampDate->Year = 0U;
+ sTimeStampDate->Month = (uint8_t)((tmpdate & (RTC_TSDR_MT | RTC_TSDR_MU)) >> RTC_TSDR_MU_Pos);
+ sTimeStampDate->Date = (uint8_t)((tmpdate & (RTC_TSDR_DT | RTC_TSDR_DU)) >> RTC_TSDR_DU_Pos);
+ sTimeStampDate->WeekDay = (uint8_t)((tmpdate & (RTC_TSDR_WDU)) >> RTC_TSDR_WDU_Pos);
/* Check the input parameters format */
if (Format == RTC_FORMAT_BIN)
{
- /* Convert the TimeStamp structure parameters to Binary format */
- sTimeStamp->Hours = (uint8_t)RTC_Bcd2ToByte(sTimeStamp->Hours);
+ /* Convert the Timestamp structure parameters to Binary format */
+ sTimeStamp->Hours = (uint8_t)RTC_Bcd2ToByte(sTimeStamp->Hours);
sTimeStamp->Minutes = (uint8_t)RTC_Bcd2ToByte(sTimeStamp->Minutes);
sTimeStamp->Seconds = (uint8_t)RTC_Bcd2ToByte(sTimeStamp->Seconds);
/* Convert the DateTimeStamp structure parameters to Binary format */
- sTimeStampDate->Month = (uint8_t)RTC_Bcd2ToByte(sTimeStampDate->Month);
- sTimeStampDate->Date = (uint8_t)RTC_Bcd2ToByte(sTimeStampDate->Date);
+ sTimeStampDate->Month = (uint8_t)RTC_Bcd2ToByte(sTimeStampDate->Month);
+ sTimeStampDate->Date = (uint8_t)RTC_Bcd2ToByte(sTimeStampDate->Date);
sTimeStampDate->WeekDay = (uint8_t)RTC_Bcd2ToByte(sTimeStampDate->WeekDay);
}
- /* Clear the TIMESTAMP Flag */
+ /* Clear the Timestamp Flag */
__HAL_RTC_TIMESTAMP_CLEAR_FLAG(hrtc, RTC_FLAG_TSF);
return HAL_OK;
}
/**
- * @brief Sets Tamper
- * @note By calling this API we disable the tamper interrupt for all tampers.
+ * @brief Sets Tamper.
+ * @note By calling this API the tamper global interrupt will be disabled.
* @param hrtc pointer to a RTC_HandleTypeDef structure that contains
* the configuration information for RTC.
* @param sTamper Pointer to Tamper Structure.
@@ -357,11 +401,36 @@
hrtc->State = HAL_RTC_STATE_BUSY;
- tmpreg = ((uint32_t)sTamper->Tamper | (uint32_t)sTamper->PinSelection | (uint32_t)(sTamper->Trigger));
+ /* Copy control register into temporary variable */
+ tmpreg = hrtc->Instance->TAFCR;
- hrtc->Instance->TAFCR &= (uint32_t)~((uint32_t)RTC_TAFCR_TAMP1E | (uint32_t)RTC_TAFCR_TAMP1TRG | (uint32_t)RTC_TAFCR_TAMPINSEL);
+ /* Enable selected tamper */
+ tmpreg |= (sTamper->Tamper);
- hrtc->Instance->TAFCR |= tmpreg;
+ /* Configure the tamper trigger bit (this bit is just on the right of the
+ tamper enable bit, hence the one-time right shift before updating it) */
+ if (sTamper->Trigger == RTC_TAMPERTRIGGER_FALLINGEDGE)
+ {
+ /* Set the tamper trigger bit (case of falling edge or high level) */
+ tmpreg |= (uint32_t)(sTamper->Tamper << 1U);
+ }
+ else
+ {
+ /* Clear the tamper trigger bit (case of rising edge or low level) */
+ tmpreg &= (uint32_t)~(sTamper->Tamper << 1U);
+ }
+
+ /* Clear remaining field before setting it */
+ tmpreg &= ~RTC_TAFCR_TAMP1INSEL;
+
+ /* Set remaining parameter of desired configuration into temporary variable */
+ tmpreg |= (uint32_t)sTamper->PinSelection;
+
+ /* Disable tamper global interrupt in case it is enabled */
+ tmpreg &= (uint32_t)~RTC_TAFCR_TAMPIE;
+
+ /* Copy desired configuration into configuration register */
+ hrtc->Instance->TAFCR = tmpreg;
hrtc->State = HAL_RTC_STATE_READY;
@@ -373,7 +442,7 @@
/**
* @brief Sets Tamper with interrupt.
- * @note By calling this API we force the tamper interrupt for all tampers.
+ * @note By calling this API the tamper global interrupt will be enabled.
* @param hrtc pointer to a RTC_HandleTypeDef structure that contains
* the configuration information for RTC.
* @param sTamper Pointer to RTC Tamper.
@@ -393,22 +462,40 @@
hrtc->State = HAL_RTC_STATE_BUSY;
- tmpreg = ((uint32_t)sTamper->Tamper | (uint32_t)sTamper->PinSelection | (uint32_t)sTamper->Trigger);
+ /* Copy control register into temporary variable */
+ tmpreg = hrtc->Instance->TAFCR;
- hrtc->Instance->TAFCR &= (uint32_t)~((uint32_t)RTC_TAFCR_TAMP1E | (uint32_t)RTC_TAFCR_TAMP1TRG | (uint32_t)RTC_TAFCR_TAMPINSEL | (uint32_t)RTC_TAFCR_TAMPIE);
+ /* Enable selected tamper */
+ tmpreg |= (sTamper->Tamper);
- hrtc->Instance->TAFCR |= tmpreg;
+ /* Configure the tamper trigger bit (this bit is just on the right of the
+ tamper enable bit, hence the one-time right shift before updating it) */
+ if (sTamper->Trigger == RTC_TAMPERTRIGGER_FALLINGEDGE)
+ {
+ /* Set the tamper trigger bit (case of falling edge or high level) */
+ tmpreg |= (uint32_t)(sTamper->Tamper << 1U);
+ }
+ else
+ {
+ /* Clear the tamper trigger bit (case of rising edge or low level) */
+ tmpreg &= (uint32_t)~(sTamper->Tamper << 1U);
+ }
- /* Configure the Tamper Interrupt in the RTC_TAFCR */
- hrtc->Instance->TAFCR |= (uint32_t)RTC_TAFCR_TAMPIE;
+ /* Clear remaining field before setting it */
+ tmpreg &= ~RTC_TAFCR_TAMP1INSEL;
- /* Clear RTC Tamper 1 flag */
- __HAL_RTC_TAMPER_CLEAR_FLAG(hrtc, RTC_FLAG_TAMP1F);
+ /* Set remaining parameter of desired configuration into temporary variable */
+ tmpreg |= (uint32_t)sTamper->PinSelection;
+
+ /* Enable global tamper interrupt */
+ tmpreg |= (uint32_t)RTC_TAFCR_TAMPIE;
+
+ /* Copy desired configuration into configuration register */
+ hrtc->Instance->TAFCR = tmpreg;
/* RTC Tamper Interrupt Configuration: EXTI configuration */
__HAL_RTC_TAMPER_TIMESTAMP_EXTI_ENABLE_IT();
-
- EXTI->RTSR |= RTC_EXTI_LINE_TAMPER_TIMESTAMP_EVENT;
+ __HAL_RTC_TAMPER_TIMESTAMP_EXTI_ENABLE_RISING_EDGE();
hrtc->State = HAL_RTC_STATE_READY;
@@ -420,10 +507,12 @@
/**
* @brief Deactivates Tamper.
+ * @note The tamper global interrupt bit will remain unchanged.
* @param hrtc pointer to a RTC_HandleTypeDef structure that contains
* the configuration information for RTC.
* @param Tamper Selected tamper pin.
- * This parameter can be RTC_Tamper_1.
+ * This parameter can be:
+ * @arg RTC_TAMPER_1: Tamper 1
* @retval HAL status
*/
HAL_StatusTypeDef HAL_RTCEx_DeactivateTamper(RTC_HandleTypeDef *hrtc, uint32_t Tamper)
@@ -447,58 +536,59 @@
}
/**
- * @brief This function handles TimeStamp interrupt request.
+ * @brief Handles Timestamp and Tamper interrupt request.
* @param hrtc pointer to a RTC_HandleTypeDef structure that contains
* the configuration information for RTC.
* @retval None
*/
void HAL_RTCEx_TamperTimeStampIRQHandler(RTC_HandleTypeDef *hrtc)
{
- /* Get the TimeStamp interrupt source enable status */
+ /* Clear the EXTI's Flag for RTC Timestamp and Tamper */
+ __HAL_RTC_TAMPER_TIMESTAMP_EXTI_CLEAR_FLAG();
+
+ /* Get the Timestamp interrupt source enable status */
if (__HAL_RTC_TIMESTAMP_GET_IT_SOURCE(hrtc, RTC_IT_TS) != 0U)
{
- /* Get the pending status of the TIMESTAMP Interrupt */
+ /* Get the pending status of the Timestamp Interrupt */
if (__HAL_RTC_TIMESTAMP_GET_FLAG(hrtc, RTC_FLAG_TSF) != 0U)
{
- /* TIMESTAMP callback */
+ /* Timestamp callback */
#if (USE_HAL_RTC_REGISTER_CALLBACKS == 1)
hrtc->TimeStampEventCallback(hrtc);
#else
HAL_RTCEx_TimeStampEventCallback(hrtc);
#endif /* USE_HAL_RTC_REGISTER_CALLBACKS */
- /* Clear the TIMESTAMP interrupt pending bit */
+ /* Clear the Timestamp interrupt pending bit after returning from callback
+ as RTC_TSTR and RTC_TSDR registers are cleared when TSF bit is reset */
__HAL_RTC_TIMESTAMP_CLEAR_FLAG(hrtc, RTC_FLAG_TSF);
}
}
- /* Get the Tamper interrupts source enable status */
- if (__HAL_RTC_TAMPER_GET_IT_SOURCE(hrtc, RTC_IT_TAMP | RTC_IT_TAMP1) != 0U)
+ /* Get the Tamper 1 interrupt source enable status */
+ if (__HAL_RTC_TAMPER_GET_IT_SOURCE(hrtc, RTC_IT_TAMP) != 0U)
{
- /* Get the pending status of the Tamper Interrupt */
+ /* Get the pending status of the Tamper 1 Interrupt */
if (__HAL_RTC_TAMPER_GET_FLAG(hrtc, RTC_FLAG_TAMP1F) != 0U)
{
+ /* Clear the Tamper interrupt pending bit */
+ __HAL_RTC_TAMPER_CLEAR_FLAG(hrtc, RTC_FLAG_TAMP1F);
+
/* Tamper callback */
#if (USE_HAL_RTC_REGISTER_CALLBACKS == 1)
hrtc->Tamper1EventCallback(hrtc);
#else
HAL_RTCEx_Tamper1EventCallback(hrtc);
#endif /* USE_HAL_RTC_REGISTER_CALLBACKS */
-
- /* Clear the Tamper interrupt pending bit */
- __HAL_RTC_TAMPER_CLEAR_FLAG(hrtc, RTC_FLAG_TAMP1F);
}
}
- /* Clear the EXTI's Flag for RTC TimeStamp and Tamper */
- __HAL_RTC_TAMPER_TIMESTAMP_EXTI_CLEAR_FLAG();
-
/* Change RTC state */
hrtc->State = HAL_RTC_STATE_READY;
}
/**
- * @brief TimeStamp callback.
+ * @brief Timestamp callback.
* @param hrtc pointer to a RTC_HandleTypeDef structure that contains
* the configuration information for RTC.
* @retval None
@@ -507,8 +597,9 @@
{
/* Prevent unused argument(s) compilation warning */
UNUSED(hrtc);
- /* NOTE : This function Should not be modified, when the callback is needed,
- the HAL_RTC_TimeStampEventCallback could be implemented in the user file
+
+ /* NOTE: This function should not be modified, when the callback is needed,
+ the HAL_RTCEx_TimeStampEventCallback could be implemented in the user file
*/
}
@@ -522,13 +613,14 @@
{
/* Prevent unused argument(s) compilation warning */
UNUSED(hrtc);
- /* NOTE : This function Should not be modified, when the callback is needed,
- the HAL_RTC_Tamper1EventCallback could be implemented in the user file
+
+ /* NOTE: This function should not be modified, when the callback is needed,
+ the HAL_RTCEx_Tamper1EventCallback could be implemented in the user file
*/
}
/**
- * @brief This function handles TimeStamp polling request.
+ * @brief Handles Timestamp polling request.
* @param hrtc pointer to a RTC_HandleTypeDef structure that contains
* the configuration information for RTC.
* @param Timeout Timeout duration
@@ -541,19 +633,8 @@
/* Get tick */
tickstart = HAL_GetTick();
- while (__HAL_RTC_TIMESTAMP_GET_FLAG(hrtc, RTC_FLAG_TSF) == RESET)
+ while (__HAL_RTC_TIMESTAMP_GET_FLAG(hrtc, RTC_FLAG_TSF) == 0U)
{
- if (__HAL_RTC_TIMESTAMP_GET_FLAG(hrtc, RTC_FLAG_TSOVF) != RESET)
- {
- /* Clear the TIMESTAMP Overrun Flag */
- __HAL_RTC_TIMESTAMP_CLEAR_FLAG(hrtc, RTC_FLAG_TSOVF);
-
- /* Change TIMESTAMP state */
- hrtc->State = HAL_RTC_STATE_ERROR;
-
- return HAL_ERROR;
- }
-
if (Timeout != HAL_MAX_DELAY)
{
if ((Timeout == 0U) || ((HAL_GetTick() - tickstart) > Timeout))
@@ -562,6 +643,17 @@
return HAL_TIMEOUT;
}
}
+
+ if (__HAL_RTC_TIMESTAMP_GET_FLAG(hrtc, RTC_FLAG_TSOVF) != 0U)
+ {
+ /* Clear the Timestamp Overrun Flag */
+ __HAL_RTC_TIMESTAMP_CLEAR_FLAG(hrtc, RTC_FLAG_TSOVF);
+
+ /* Change Timestamp state */
+ hrtc->State = HAL_RTC_STATE_ERROR;
+
+ return HAL_ERROR;
+ }
}
/* Change RTC state */
@@ -571,7 +663,7 @@
}
/**
- * @brief This function handles Tamper1 Polling.
+ * @brief Handles Tamper 1 Polling.
* @param hrtc pointer to a RTC_HandleTypeDef structure that contains
* the configuration information for RTC.
* @param Timeout Timeout duration
@@ -585,7 +677,7 @@
tickstart = HAL_GetTick();
/* Get the status of the Interrupt */
- while (__HAL_RTC_TAMPER_GET_FLAG(hrtc, RTC_FLAG_TAMP1F) == RESET)
+ while (__HAL_RTC_TAMPER_GET_FLAG(hrtc, RTC_FLAG_TAMP1F) == 0U)
{
if (Timeout != HAL_MAX_DELAY)
{
@@ -610,26 +702,26 @@
* @}
*/
-/** @defgroup RTCEx_Exported_Functions_Group2 RTC Wake-up functions
- * @brief RTC Wake-up functions
+/** @defgroup RTCEx_Exported_Functions_Group2 RTC Wakeup functions
+ * @brief RTC Wakeup functions
*
@verbatim
===============================================================================
- ##### RTC Wake-up functions #####
+ ##### RTC Wakeup functions #####
===============================================================================
- [..] This section provides functions allowing to configure Wake-up feature
+ [..] This section provides functions allowing to configure Wakeup feature
@endverbatim
* @{
*/
/**
- * @brief Sets wake up timer.
+ * @brief Sets wakeup timer.
* @param hrtc pointer to a RTC_HandleTypeDef structure that contains
* the configuration information for RTC.
- * @param WakeUpCounter Wake up counter
- * @param WakeUpClock Wake up clock
+ * @param WakeUpCounter Wakeup counter
+ * @param WakeUpClock Wakeup clock
* @retval HAL status
*/
HAL_StatusTypeDef HAL_RTCEx_SetWakeUpTimer(RTC_HandleTypeDef *hrtc, uint32_t WakeUpCounter, uint32_t WakeUpClock)
@@ -648,13 +740,13 @@
/* Disable the write protection for RTC registers */
__HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
- /*Check RTC WUTWF flag is reset only when wake up timer enabled*/
- if ((hrtc->Instance->CR & RTC_CR_WUTE) != RESET)
+ /* Check RTC WUTWF flag is reset only when wakeup timer enabled*/
+ if ((hrtc->Instance->CR & RTC_CR_WUTE) != 0U)
{
tickstart = HAL_GetTick();
- /* Wait till RTC WUTWF flag is reset and if Time out is reached exit */
- while (__HAL_RTC_WAKEUPTIMER_GET_FLAG(hrtc, RTC_FLAG_WUTWF) == SET)
+ /* Wait till RTC WUTWF flag is reset and if timeout is reached exit */
+ while (__HAL_RTC_WAKEUPTIMER_GET_FLAG(hrtc, RTC_FLAG_WUTWF) != 0U)
{
if ((HAL_GetTick() - tickstart) > RTC_TIMEOUT_VALUE)
{
@@ -671,13 +763,17 @@
}
}
+ /* Disable the Wakeup timer */
__HAL_RTC_WAKEUPTIMER_DISABLE(hrtc);
+ /* Clear the Wakeup flag */
+ __HAL_RTC_WAKEUPTIMER_CLEAR_FLAG(hrtc, RTC_FLAG_WUTF);
+
/* Get tick */
tickstart = HAL_GetTick();
- /* Wait till RTC WUTWF flag is set and if Time out is reached exit */
- while (__HAL_RTC_WAKEUPTIMER_GET_FLAG(hrtc, RTC_FLAG_WUTWF) == RESET)
+ /* Wait till RTC WUTWF flag is set and if timeout is reached exit */
+ while (__HAL_RTC_WAKEUPTIMER_GET_FLAG(hrtc, RTC_FLAG_WUTWF) == 0U)
{
if ((HAL_GetTick() - tickstart) > RTC_TIMEOUT_VALUE)
{
@@ -693,16 +789,16 @@
}
}
- /* Clear the Wake-up Timer clock source bits in CR register */
+ /* Clear the Wakeup Timer clock source bits in CR register */
hrtc->Instance->CR &= (uint32_t)~RTC_CR_WUCKSEL;
/* Configure the clock source */
hrtc->Instance->CR |= (uint32_t)WakeUpClock;
- /* Configure the Wake-up Timer counter */
+ /* Configure the Wakeup Timer counter */
hrtc->Instance->WUTR = (uint32_t)WakeUpCounter;
- /* Enable the Wake-up Timer */
+ /* Enable the Wakeup Timer */
__HAL_RTC_WAKEUPTIMER_ENABLE(hrtc);
/* Enable the write protection for RTC registers */
@@ -717,16 +813,16 @@
}
/**
- * @brief Sets wake up timer with interrupt
+ * @brief Sets wakeup timer with interrupt.
* @param hrtc pointer to a RTC_HandleTypeDef structure that contains
* the configuration information for RTC.
- * @param WakeUpCounter Wake up counter
- * @param WakeUpClock Wake up clock
+ * @param WakeUpCounter Wakeup counter
+ * @param WakeUpClock Wakeup clock
* @retval HAL status
*/
HAL_StatusTypeDef HAL_RTCEx_SetWakeUpTimer_IT(RTC_HandleTypeDef *hrtc, uint32_t WakeUpCounter, uint32_t WakeUpClock)
{
- __IO uint32_t count;
+ __IO uint32_t count = RTC_TIMEOUT_VALUE * (SystemCoreClock / 32U / 1000U);
/* Check the parameters */
assert_param(IS_RTC_WAKEUP_CLOCK(WakeUpClock));
@@ -740,14 +836,14 @@
/* Disable the write protection for RTC registers */
__HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
- /*Check RTC WUTWF flag is reset only when wake up timer enabled*/
- if ((hrtc->Instance->CR & RTC_CR_WUTE) != RESET)
+ /* Check RTC WUTWF flag is reset only when wakeup timer enabled */
+ if ((hrtc->Instance->CR & RTC_CR_WUTE) != 0U)
{
- /* Wait till RTC WUTWF flag is reset and if Time out is reached exit */
- count = RTC_TIMEOUT_VALUE * (SystemCoreClock / 32U / 1000U);
+ /* Wait till RTC WUTWF flag is reset and if timeout is reached exit */
do
{
- if (count-- == 0U)
+ count = count - 1U;
+ if (count == 0U)
{
/* Enable the write protection for RTC registers */
__HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
@@ -759,17 +855,23 @@
return HAL_TIMEOUT;
}
- }
- while (__HAL_RTC_WAKEUPTIMER_GET_FLAG(hrtc, RTC_FLAG_WUTWF) == SET);
+ } while (__HAL_RTC_WAKEUPTIMER_GET_FLAG(hrtc, RTC_FLAG_WUTWF) != 0U);
}
+ /* Disable the Wakeup timer */
__HAL_RTC_WAKEUPTIMER_DISABLE(hrtc);
- /* Wait till RTC WUTWF flag is set and if Time out is reached exit */
- count = RTC_TIMEOUT_VALUE * (SystemCoreClock / 32U / 1000U);
+ /* Clear the Wakeup flag */
+ __HAL_RTC_WAKEUPTIMER_CLEAR_FLAG(hrtc, RTC_FLAG_WUTF);
+
+ /* Reload the counter */
+ count = RTC_TIMEOUT_VALUE * (SystemCoreClock / 32U / 1000U);
+
+ /* Wait till RTC WUTWF flag is set and if timeout is reached exit */
do
{
- if (count-- == 0U)
+ count = count - 1U;
+ if (count == 0U)
{
/* Enable the write protection for RTC registers */
__HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
@@ -781,30 +883,25 @@
return HAL_TIMEOUT;
}
- }
- while (__HAL_RTC_WAKEUPTIMER_GET_FLAG(hrtc, RTC_FLAG_WUTWF) == RESET);
+ } while (__HAL_RTC_WAKEUPTIMER_GET_FLAG(hrtc, RTC_FLAG_WUTWF) == 0U);
- /* Configure the Wake-up Timer counter */
- hrtc->Instance->WUTR = (uint32_t)WakeUpCounter;
-
- /* Clear the Wake-up Timer clock source bits in CR register */
+ /* Clear the Wakeup Timer clock source bits in CR register */
hrtc->Instance->CR &= (uint32_t)~RTC_CR_WUCKSEL;
/* Configure the clock source */
hrtc->Instance->CR |= (uint32_t)WakeUpClock;
- /* RTC WakeUpTimer Interrupt Configuration: EXTI configuration */
+ /* Configure the Wakeup Timer counter */
+ hrtc->Instance->WUTR = (uint32_t)WakeUpCounter;
+
+ /* RTC wakeup timer Interrupt Configuration: EXTI configuration */
__HAL_RTC_WAKEUPTIMER_EXTI_ENABLE_IT();
+ __HAL_RTC_WAKEUPTIMER_EXTI_ENABLE_RISING_EDGE();
- EXTI->RTSR |= RTC_EXTI_LINE_WAKEUPTIMER_EVENT;
-
- /* Clear RTC Wake Up timer Flag */
- __HAL_RTC_WAKEUPTIMER_CLEAR_FLAG(hrtc, RTC_FLAG_WUTF);
-
- /* Configure the Interrupt in the RTC_CR register */
+ /* Configure the interrupt in the RTC_CR register */
__HAL_RTC_WAKEUPTIMER_ENABLE_IT(hrtc, RTC_IT_WUT);
- /* Enable the Wake-up Timer */
+ /* Enable the Wakeup Timer */
__HAL_RTC_WAKEUPTIMER_ENABLE(hrtc);
/* Enable the write protection for RTC registers */
@@ -819,12 +916,12 @@
}
/**
- * @brief Deactivates wake up timer counter.
+ * @brief Deactivates wakeup timer counter.
* @param hrtc pointer to a RTC_HandleTypeDef structure that contains
* the configuration information for RTC.
* @retval HAL status
*/
-uint32_t HAL_RTCEx_DeactivateWakeUpTimer(RTC_HandleTypeDef *hrtc)
+HAL_StatusTypeDef HAL_RTCEx_DeactivateWakeUpTimer(RTC_HandleTypeDef *hrtc)
{
uint32_t tickstart = 0U;
@@ -836,7 +933,7 @@
/* Disable the write protection for RTC registers */
__HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
- /* Disable the Wake-up Timer */
+ /* Disable the Wakeup Timer */
__HAL_RTC_WAKEUPTIMER_DISABLE(hrtc);
/* In case of interrupt mode is used, the interrupt source must disabled */
@@ -845,8 +942,8 @@
/* Get tick */
tickstart = HAL_GetTick();
- /* Wait till RTC WUTWF flag is set and if Time out is reached exit */
- while (__HAL_RTC_WAKEUPTIMER_GET_FLAG(hrtc, RTC_FLAG_WUTWF) == RESET)
+ /* Wait till RTC WUTWF flag is set and if timeout is reached exit */
+ while (__HAL_RTC_WAKEUPTIMER_GET_FLAG(hrtc, RTC_FLAG_WUTWF) == 0U)
{
if ((HAL_GetTick() - tickstart) > RTC_TIMEOUT_VALUE)
{
@@ -874,7 +971,7 @@
}
/**
- * @brief Gets wake up timer counter.
+ * @brief Gets wakeup timer counter.
* @param hrtc pointer to a RTC_HandleTypeDef structure that contains
* the configuration information for RTC.
* @retval Counter value
@@ -886,40 +983,41 @@
}
/**
- * @brief This function handles Wake Up Timer interrupt request.
+ * @brief Handles Wakeup Timer interrupt request.
+ * @note Unlike alarm interrupt line (shared by Alarms A and B) or tamper
+ * interrupt line (shared by timestamp and tampers) wakeup timer
+ * interrupt line is exclusive to the wakeup timer.
+ * There is no need in this case to check on the interrupt enable
+ * status via __HAL_RTC_WAKEUPTIMER_GET_IT_SOURCE().
* @param hrtc pointer to a RTC_HandleTypeDef structure that contains
* the configuration information for RTC.
* @retval None
*/
void HAL_RTCEx_WakeUpTimerIRQHandler(RTC_HandleTypeDef *hrtc)
{
- /* Get the WAKEUPTIMER interrupt source enable status */
- if (__HAL_RTC_WAKEUPTIMER_GET_IT_SOURCE(hrtc, RTC_IT_WUT) != RESET)
- {
- /* Get the pending status of the WAKEUPTIMER Interrupt */
- if(__HAL_RTC_WAKEUPTIMER_GET_FLAG(hrtc, RTC_FLAG_WUTF) != RESET)
- {
- /* WAKEUPTIMER callback */
-#if (USE_HAL_RTC_REGISTER_CALLBACKS == 1)
- hrtc->WakeUpTimerEventCallback(hrtc);
-#else
- HAL_RTCEx_WakeUpTimerEventCallback(hrtc);
-#endif /* USE_HAL_RTC_REGISTER_CALLBACKS */
-
- /* Clear the WAKEUPTIMER interrupt pending bit */
- __HAL_RTC_WAKEUPTIMER_CLEAR_FLAG(hrtc, RTC_FLAG_WUTF);
- }
- }
-
/* Clear the EXTI's line Flag for RTC WakeUpTimer */
__HAL_RTC_WAKEUPTIMER_EXTI_CLEAR_FLAG();
+ /* Get the pending status of the Wakeup timer Interrupt */
+ if (__HAL_RTC_WAKEUPTIMER_GET_FLAG(hrtc, RTC_FLAG_WUTF) != 0U)
+ {
+ /* Clear the Wakeup timer interrupt pending bit */
+ __HAL_RTC_WAKEUPTIMER_CLEAR_FLAG(hrtc, RTC_FLAG_WUTF);
+
+ /* Wakeup timer callback */
+#if (USE_HAL_RTC_REGISTER_CALLBACKS == 1)
+ hrtc->WakeUpTimerEventCallback(hrtc);
+#else
+ HAL_RTCEx_WakeUpTimerEventCallback(hrtc);
+#endif /* USE_HAL_RTC_REGISTER_CALLBACKS */
+ }
+
/* Change RTC state */
hrtc->State = HAL_RTC_STATE_READY;
}
/**
- * @brief Wake Up Timer callback.
+ * @brief Wakeup Timer callback.
* @param hrtc pointer to a RTC_HandleTypeDef structure that contains
* the configuration information for RTC.
* @retval None
@@ -928,13 +1026,14 @@
{
/* Prevent unused argument(s) compilation warning */
UNUSED(hrtc);
- /* NOTE : This function Should not be modified, when the callback is needed,
- the HAL_RTC_WakeUpTimerEventCallback could be implemented in the user file
+
+ /* NOTE: This function should not be modified, when the callback is needed,
+ the HAL_RTCEx_WakeUpTimerEventCallback could be implemented in the user file
*/
}
/**
- * @brief This function handles Wake Up Timer Polling.
+ * @brief Handles Wakeup Timer Polling.
* @param hrtc pointer to a RTC_HandleTypeDef structure that contains
* the configuration information for RTC.
* @param Timeout Timeout duration
@@ -947,20 +1046,19 @@
/* Get tick */
tickstart = HAL_GetTick();
- while (__HAL_RTC_WAKEUPTIMER_GET_FLAG(hrtc, RTC_FLAG_WUTF) == RESET)
+ while (__HAL_RTC_WAKEUPTIMER_GET_FLAG(hrtc, RTC_FLAG_WUTF) == 0U)
{
if (Timeout != HAL_MAX_DELAY)
{
if ((Timeout == 0U) || ((HAL_GetTick() - tickstart) > Timeout))
{
hrtc->State = HAL_RTC_STATE_TIMEOUT;
-
return HAL_TIMEOUT;
}
}
}
- /* Clear the WAKEUPTIMER Flag */
+ /* Clear the Wakeup timer Flag */
__HAL_RTC_WAKEUPTIMER_CLEAR_FLAG(hrtc, RTC_FLAG_WUTF);
/* Change RTC state */
@@ -973,12 +1071,12 @@
* @}
*/
-/** @defgroup RTCEx_Exported_Functions_Group3 Extension Peripheral Control functions
- * @brief Extension Peripheral Control functions
+/** @defgroup RTCEx_Exported_Functions_Group3 Extended Peripheral Control functions
+ * @brief Extended Peripheral Control functions
*
@verbatim
===============================================================================
- ##### Extension Peripheral Control functions #####
+ ##### Extended Peripheral Control functions #####
===============================================================================
[..]
This subsection provides functions allowing to
@@ -1001,8 +1099,8 @@
* @param hrtc pointer to a RTC_HandleTypeDef structure that contains
* the configuration information for RTC.
* @param BackupRegister RTC Backup data Register number.
- * This parameter can be: RTC_BKP_DRx where x can be from 0 to 19 to
- * specify the register.
+ * This parameter can be: RTC_BKP_DRx (where x can be from 0 to 19)
+ * to specify the register.
* @param Data Data to be written in the specified RTC Backup data register.
* @retval None
*/
@@ -1025,8 +1123,8 @@
* @param hrtc pointer to a RTC_HandleTypeDef structure that contains
* the configuration information for RTC.
* @param BackupRegister RTC Backup data Register number.
- * This parameter can be: RTC_BKP_DRx where x can be from 0 to 19 to
- * specify the register.
+ * This parameter can be: RTC_BKP_DRx (where x can be from 0 to 19)
+ * to specify the register.
* @retval Read value
*/
uint32_t HAL_RTCEx_BKUPRead(RTC_HandleTypeDef *hrtc, uint32_t BackupRegister)
@@ -1048,7 +1146,7 @@
* @param hrtc pointer to a RTC_HandleTypeDef structure that contains
* the configuration information for RTC.
* @param CalibSign Specifies the sign of the coarse calibration value.
- * This parameter can be one of the following values :
+ * This parameter can be one of the following values:
* @arg RTC_CALIBSIGN_POSITIVE: The value sign is positive
* @arg RTC_CALIBSIGN_NEGATIVE: The value sign is negative
* @param Value value of coarse calibration expressed in ppm (coded on 5 bits).
@@ -1062,6 +1160,8 @@
*/
HAL_StatusTypeDef HAL_RTCEx_SetCoarseCalib(RTC_HandleTypeDef *hrtc, uint32_t CalibSign, uint32_t Value)
{
+ HAL_StatusTypeDef status;
+
/* Check the parameters */
assert_param(IS_RTC_CALIB_SIGN(CalibSign));
assert_param(IS_RTC_CALIB_VALUE(Value));
@@ -1074,21 +1174,10 @@
/* Disable the write protection for RTC registers */
__HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
- /* Set Initialization mode */
- if (RTC_EnterInitMode(hrtc) != HAL_OK)
- {
- /* Enable the write protection for RTC registers */
- __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
+ /* Enter Initialization mode */
+ status = RTC_EnterInitMode(hrtc);
- /* Set RTC state*/
- hrtc->State = HAL_RTC_STATE_ERROR;
-
- /* Process Unlocked */
- __HAL_UNLOCK(hrtc);
-
- return HAL_ERROR;
- }
- else
+ if (status == HAL_OK)
{
/* Enable the Coarse Calibration */
__HAL_RTC_COARSE_CALIB_ENABLE(hrtc);
@@ -1097,19 +1186,21 @@
hrtc->Instance->CALIBR = (uint32_t)(CalibSign | Value);
/* Exit Initialization mode */
- hrtc->Instance->ISR &= (uint32_t)~RTC_ISR_INIT;
+ status = RTC_ExitInitMode(hrtc);
+ }
+
+ if (status == HAL_OK)
+ {
+ hrtc->State = HAL_RTC_STATE_READY;
}
/* Enable the write protection for RTC registers */
__HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
- /* Change state */
- hrtc->State = HAL_RTC_STATE_READY;
-
/* Process Unlocked */
__HAL_UNLOCK(hrtc);
- return HAL_OK;
+ return status;
}
/**
@@ -1120,6 +1211,8 @@
*/
HAL_StatusTypeDef HAL_RTCEx_DeactivateCoarseCalib(RTC_HandleTypeDef *hrtc)
{
+ HAL_StatusTypeDef status;
+
/* Process Locked */
__HAL_LOCK(hrtc);
@@ -1128,44 +1221,36 @@
/* Disable the write protection for RTC registers */
__HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
- /* Set Initialization mode */
- if (RTC_EnterInitMode(hrtc) != HAL_OK)
+ /* Enter Initialization mode */
+ status = RTC_EnterInitMode(hrtc);
+
+ if (status == HAL_OK)
{
- /* Enable the write protection for RTC registers */
- __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
-
- /* Set RTC state*/
- hrtc->State = HAL_RTC_STATE_ERROR;
-
- /* Process Unlocked */
- __HAL_UNLOCK(hrtc);
-
- return HAL_ERROR;
- }
- else
- {
- /* Enable the Coarse Calibration */
+ /* Disable the Coarse Calibration */
__HAL_RTC_COARSE_CALIB_DISABLE(hrtc);
/* Exit Initialization mode */
- hrtc->Instance->ISR &= (uint32_t)~RTC_ISR_INIT;
+ status = RTC_ExitInitMode(hrtc);
+ }
+
+ if (status == HAL_OK)
+ {
+ hrtc->State = HAL_RTC_STATE_READY;
}
/* Enable the write protection for RTC registers */
__HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
- /* Change state */
- hrtc->State = HAL_RTC_STATE_READY;
-
/* Process Unlocked */
__HAL_UNLOCK(hrtc);
- return HAL_OK;
+ return status;
}
/**
- * @brief Configure the Calibration Pinout (RTC_CALIB).
- * @param hrtc RTC handle
+ * @brief Configures the Calibration Pinout (RTC_CALIB).
+ * @param hrtc pointer to a RTC_HandleTypeDef structure that contains
+ * the configuration information for RTC.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_RTCEx_SetCalibrationOutPut(RTC_HandleTypeDef *hrtc)
@@ -1230,6 +1315,8 @@
*/
HAL_StatusTypeDef HAL_RTCEx_SetRefClock(RTC_HandleTypeDef *hrtc)
{
+ HAL_StatusTypeDef status;
+
/* Process Locked */
__HAL_LOCK(hrtc);
@@ -1238,38 +1325,30 @@
/* Disable the write protection for RTC registers */
__HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
- /* Set Initialization mode */
- if (RTC_EnterInitMode(hrtc) != HAL_OK)
+ /* Enter Initialization mode */
+ status = RTC_EnterInitMode(hrtc);
+
+ if (status == HAL_OK)
{
- /* Enable the write protection for RTC registers */
- __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
-
- /* Set RTC state*/
- hrtc->State = HAL_RTC_STATE_ERROR;
-
- /* Process Unlocked */
- __HAL_UNLOCK(hrtc);
-
- return HAL_ERROR;
- }
- else
- {
+ /* Enable the reference clock detection */
__HAL_RTC_CLOCKREF_DETECTION_ENABLE(hrtc);
/* Exit Initialization mode */
- hrtc->Instance->ISR &= (uint32_t)~RTC_ISR_INIT;
+ status = RTC_ExitInitMode(hrtc);
+ }
+
+ if (status == HAL_OK)
+ {
+ hrtc->State = HAL_RTC_STATE_READY;
}
/* Enable the write protection for RTC registers */
__HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
- /* Change RTC state */
- hrtc->State = HAL_RTC_STATE_READY;
-
/* Process Unlocked */
__HAL_UNLOCK(hrtc);
- return HAL_OK;
+ return status;
}
/**
@@ -1280,6 +1359,8 @@
*/
HAL_StatusTypeDef HAL_RTCEx_DeactivateRefClock(RTC_HandleTypeDef *hrtc)
{
+ HAL_StatusTypeDef status;
+
/* Process Locked */
__HAL_LOCK(hrtc);
@@ -1288,38 +1369,30 @@
/* Disable the write protection for RTC registers */
__HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
- /* Set Initialization mode */
- if (RTC_EnterInitMode(hrtc) != HAL_OK)
+ /* Enter Initialization mode */
+ status = RTC_EnterInitMode(hrtc);
+
+ if (status == HAL_OK)
{
- /* Enable the write protection for RTC registers */
- __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
-
- /* Set RTC state*/
- hrtc->State = HAL_RTC_STATE_ERROR;
-
- /* Process Unlocked */
- __HAL_UNLOCK(hrtc);
-
- return HAL_ERROR;
- }
- else
- {
+ /* Disable the reference clock detection */
__HAL_RTC_CLOCKREF_DETECTION_DISABLE(hrtc);
/* Exit Initialization mode */
- hrtc->Instance->ISR &= (uint32_t)~RTC_ISR_INIT;
+ status = RTC_ExitInitMode(hrtc);
+ }
+
+ if (status == HAL_OK)
+ {
+ hrtc->State = HAL_RTC_STATE_READY;
}
/* Enable the write protection for RTC registers */
__HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
- /* Change RTC state */
- hrtc->State = HAL_RTC_STATE_READY;
-
/* Process Unlocked */
__HAL_UNLOCK(hrtc);
- return HAL_OK;
+ return status;
}
/**
@@ -1327,7 +1400,7 @@
*/
/** @defgroup RTCEx_Exported_Functions_Group4 Extended features functions
- * @brief Extended features functions
+ * @brief Extended features functions
*
@verbatim
===============================================================================
@@ -1351,13 +1424,14 @@
{
/* Prevent unused argument(s) compilation warning */
UNUSED(hrtc);
- /* NOTE : This function Should not be modified, when the callback is needed,
- the HAL_RTC_AlarmBEventCallback could be implemented in the user file
+
+ /* NOTE: This function should not be modified, when the callback is needed,
+ the HAL_RTCEx_AlarmBEventCallback could be implemented in the user file
*/
}
/**
- * @brief This function handles AlarmB Polling request.
+ * @brief Handles Alarm B Polling request.
* @param hrtc pointer to a RTC_HandleTypeDef structure that contains
* the configuration information for RTC.
* @param Timeout Timeout duration
@@ -1370,7 +1444,8 @@
/* Get tick */
tickstart = HAL_GetTick();
- while (__HAL_RTC_ALARM_GET_FLAG(hrtc, RTC_FLAG_ALRBF) == RESET)
+ /* Wait till RTC ALRBF flag is set and if timeout is reached exit */
+ while (__HAL_RTC_ALARM_GET_FLAG(hrtc, RTC_FLAG_ALRBF) == 0U)
{
if (Timeout != HAL_MAX_DELAY)
{
@@ -1382,7 +1457,7 @@
}
}
- /* Clear the Alarm Flag */
+ /* Clear the Alarm flag */
__HAL_RTC_ALARM_CLEAR_FLAG(hrtc, RTC_FLAG_ALRBF);
/* Change RTC state */
diff --git a/Src/stm32f2xx_hal_sd.c b/Src/stm32f2xx_hal_sd.c
index a9afec3..42fc04b 100644
--- a/Src/stm32f2xx_hal_sd.c
+++ b/Src/stm32f2xx_hal_sd.c
@@ -13,7 +13,7 @@
******************************************************************************
* @attention
*
- * Copyright (c) 2018 STMicroelectronics.
+ * Copyright (c) 2016 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
@@ -210,7 +210,7 @@
The compilation define USE_HAL_SD_REGISTER_CALLBACKS when set to 1
allows the user to configure dynamically the driver callbacks.
- Use Functions @ref HAL_SD_RegisterCallback() to register a user callback,
+ Use Functions HAL_SD_RegisterCallback() to register a user callback,
it allows to register following callbacks:
(+) TxCpltCallback : callback when a transmission transfer is completed.
(+) RxCpltCallback : callback when a reception transfer is completed.
@@ -221,7 +221,7 @@
This function takes as parameters the HAL peripheral handle, the Callback ID
and a pointer to the user callback function.
- Use function @ref HAL_SD_UnRegisterCallback() to reset a callback to the default
+ Use function HAL_SD_UnRegisterCallback() to reset a callback to the default
weak (surcharged) function. It allows to reset following callbacks:
(+) TxCpltCallback : callback when a transmission transfer is completed.
(+) RxCpltCallback : callback when a reception transfer is completed.
@@ -231,12 +231,12 @@
(+) MspDeInitCallback : SD MspDeInit.
This function) takes as parameters the HAL peripheral handle and the Callback ID.
- By default, after the @ref HAL_SD_Init and if the state is HAL_SD_STATE_RESET
+ By default, after the HAL_SD_Init and if the state is HAL_SD_STATE_RESET
all callbacks are reset to the corresponding legacy weak (surcharged) functions.
Exception done for MspInit and MspDeInit callbacks that are respectively
- reset to the legacy weak (surcharged) functions in the @ref HAL_SD_Init
- and @ref HAL_SD_DeInit only when these callbacks are null (not registered beforehand).
- If not, MspInit or MspDeInit are not null, the @ref HAL_SD_Init and @ref HAL_SD_DeInit
+ reset to the legacy weak (surcharged) functions in the HAL_SD_Init
+ and HAL_SD_DeInit only when these callbacks are null (not registered beforehand).
+ If not, MspInit or MspDeInit are not null, the HAL_SD_Init and HAL_SD_DeInit
keep and use the user MspInit/MspDeInit callbacks (registered beforehand)
Callbacks can be registered/unregistered in READY state only.
@@ -244,8 +244,8 @@
in READY or RESET state, thus registered (user) MspInit/DeInit callbacks can be used
during the Init/DeInit.
In that case first register the MspInit/MspDeInit user callbacks
- using @ref HAL_SD_RegisterCallback before calling @ref HAL_SD_DeInit
- or @ref HAL_SD_Init function.
+ using HAL_SD_RegisterCallback before calling HAL_SD_DeInit
+ or HAL_SD_Init function.
When The compilation define USE_HAL_SD_REGISTER_CALLBACKS is set to 0 or
not defined, the callback registering feature is not available
@@ -430,6 +430,9 @@
/* Enable SDIO Clock */
__HAL_SD_ENABLE(hsd);
+ /* Required power up waiting time before starting the SD initialization sequence */
+ HAL_Delay(2);
+
/* Identify card operating voltage */
errorstate = SD_PowerON(hsd);
if(errorstate != HAL_SD_ERROR_NONE)
diff --git a/Src/stm32f2xx_hal_smartcard.c b/Src/stm32f2xx_hal_smartcard.c
index e4e21ee..94e822a 100644
--- a/Src/stm32f2xx_hal_smartcard.c
+++ b/Src/stm32f2xx_hal_smartcard.c
@@ -116,8 +116,8 @@
allows the user to configure dynamically the driver callbacks.
[..]
- Use Function @ref HAL_SMARTCARD_RegisterCallback() to register a user callback.
- Function @ref HAL_SMARTCARD_RegisterCallback() allows to register following callbacks:
+ Use Function HAL_SMARTCARD_RegisterCallback() to register a user callback.
+ Function HAL_SMARTCARD_RegisterCallback() allows to register following callbacks:
(+) TxCpltCallback : Tx Complete Callback.
(+) RxCpltCallback : Rx Complete Callback.
(+) ErrorCallback : Error Callback.
@@ -130,9 +130,9 @@
and a pointer to the user callback function.
[..]
- Use function @ref HAL_SMARTCARD_UnRegisterCallback() to reset a callback to the default
+ Use function HAL_SMARTCARD_UnRegisterCallback() to reset a callback to the default
weak (surcharged) function.
- @ref HAL_SMARTCARD_UnRegisterCallback() takes as parameters the HAL peripheral handle,
+ HAL_SMARTCARD_UnRegisterCallback() takes as parameters the HAL peripheral handle,
and the Callback ID.
This function allows to reset following callbacks:
(+) TxCpltCallback : Tx Complete Callback.
@@ -145,13 +145,13 @@
(+) MspDeInitCallback : SMARTCARD MspDeInit.
[..]
- By default, after the @ref HAL_SMARTCARD_Init() and when the state is HAL_SMARTCARD_STATE_RESET
+ By default, after the HAL_SMARTCARD_Init() and when the state is HAL_SMARTCARD_STATE_RESET
all callbacks are set to the corresponding weak (surcharged) functions:
- examples @ref HAL_SMARTCARD_TxCpltCallback(), @ref HAL_SMARTCARD_RxCpltCallback().
+ examples HAL_SMARTCARD_TxCpltCallback(), HAL_SMARTCARD_RxCpltCallback().
Exception done for MspInit and MspDeInit functions that are respectively
- reset to the legacy weak (surcharged) functions in the @ref HAL_SMARTCARD_Init()
- and @ref HAL_SMARTCARD_DeInit() only when these callbacks are null (not registered beforehand).
- If not, MspInit or MspDeInit are not null, the @ref HAL_SMARTCARD_Init() and @ref HAL_SMARTCARD_DeInit()
+ reset to the legacy weak (surcharged) functions in the HAL_SMARTCARD_Init()
+ and HAL_SMARTCARD_DeInit() only when these callbacks are null (not registered beforehand).
+ If not, MspInit or MspDeInit are not null, the HAL_SMARTCARD_Init() and HAL_SMARTCARD_DeInit()
keep and use the user MspInit/MspDeInit callbacks (registered beforehand).
[..]
@@ -160,8 +160,8 @@
in HAL_SMARTCARD_STATE_READY or HAL_SMARTCARD_STATE_RESET state, thus registered (user)
MspInit/DeInit callbacks can be used during the Init/DeInit.
In that case first register the MspInit/MspDeInit user callbacks
- using @ref HAL_SMARTCARD_RegisterCallback() before calling @ref HAL_SMARTCARD_DeInit()
- or @ref HAL_SMARTCARD_Init() function.
+ using HAL_SMARTCARD_RegisterCallback() before calling HAL_SMARTCARD_DeInit()
+ or HAL_SMARTCARD_Init() function.
[..]
When The compilation define USE_HAL_SMARTCARD_REGISTER_CALLBACKS is set to 0 or
@@ -445,6 +445,9 @@
/**
* @brief Register a User SMARTCARD Callback
* To be used instead of the weak predefined callback
+ * @note The HAL_SMARTCARD_RegisterCallback() may be called before HAL_SMARTCARD_Init()
+ * in HAL_SMARTCARD_STATE_RESET to register callbacks for HAL_SMARTCARD_MSPINIT_CB_ID
+ * and HAL_SMARTCARD_MSPDEINIT_CB_ID
* @param hsc smartcard handle
* @param CallbackID ID of the callback to be registered
* This parameter can be one of the following values:
@@ -470,8 +473,6 @@
return HAL_ERROR;
}
- /* Process locked */
- __HAL_LOCK(hsc);
if (hsc->gState == HAL_SMARTCARD_STATE_READY)
{
@@ -550,15 +551,15 @@
status = HAL_ERROR;
}
- /* Release Lock */
- __HAL_UNLOCK(hsc);
-
return status;
}
/**
* @brief Unregister an SMARTCARD callback
* SMARTCARD callback is redirected to the weak predefined callback
+ * @note The HAL_SMARTCARD_UnRegisterCallback() may be called before HAL_SMARTCARD_Init()
+ * in HAL_SMARTCARD_STATE_RESET to un-register callbacks for HAL_SMARTCARD_MSPINIT_CB_ID
+ * and HAL_SMARTCARD_MSPDEINIT_CB_ID
* @param hsc smartcard handle
* @param CallbackID ID of the callback to be unregistered
* This parameter can be one of the following values:
@@ -576,9 +577,6 @@
{
HAL_StatusTypeDef status = HAL_OK;
- /* Process locked */
- __HAL_LOCK(hsc);
-
if (HAL_SMARTCARD_STATE_READY == hsc->gState)
{
switch (CallbackID)
@@ -655,9 +653,6 @@
status = HAL_ERROR;
}
- /* Release Lock */
- __HAL_UNLOCK(hsc);
-
return status;
}
#endif /* USE_HAL_SMARTCARD_REGISTER_CALLBACKS */
@@ -2348,3 +2343,5 @@
/**
* @}
*/
+
+
diff --git a/Src/stm32f2xx_hal_spi.c b/Src/stm32f2xx_hal_spi.c
index 5420103..7707644 100644
--- a/Src/stm32f2xx_hal_spi.c
+++ b/Src/stm32f2xx_hal_spi.c
@@ -9,7 +9,6 @@
* + IO operation functions
* + Peripheral Control functions
* + Peripheral State functions
- *
******************************************************************************
* @attention
*
@@ -195,7 +194,6 @@
(#) RX processes are HAL_SPI_Receive(), HAL_SPI_Receive_IT() and HAL_SPI_Receive_DMA()
(#) TX processes are HAL_SPI_Transmit(), HAL_SPI_Transmit_IT() and HAL_SPI_Transmit_DMA()
- ******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
@@ -3172,7 +3170,7 @@
*/
static void SPI_2linesRxISR_8BITCRC(struct __SPI_HandleTypeDef *hspi)
{
- __IO uint8_t * ptmpreg8;
+ __IO uint8_t *ptmpreg8;
__IO uint8_t tmpreg8 = 0;
/* Initialize the 8bit temporary pointer */
@@ -3275,7 +3273,7 @@
/* Read 16bit CRC to flush Data Register */
tmpreg = READ_REG(hspi->Instance->DR);
/* To avoid GCC warning */
- UNUSED(tmpreg);
+ UNUSED(tmpreg);
/* Disable RXNE interrupt */
__HAL_SPI_DISABLE_IT(hspi, SPI_IT_RXNE);
@@ -3330,7 +3328,7 @@
*/
static void SPI_RxISR_8BITCRC(struct __SPI_HandleTypeDef *hspi)
{
- __IO uint8_t * ptmpreg8;
+ __IO uint8_t *ptmpreg8;
__IO uint8_t tmpreg8 = 0;
/* Initialize the 8bit temporary pointer */
@@ -3542,7 +3540,7 @@
return HAL_TIMEOUT;
}
/* If Systick is disabled or not incremented, deactivate timeout to go in disable loop procedure */
- if(count == 0U)
+ if (count == 0U)
{
tmp_timeout = 0U;
}
@@ -3882,3 +3880,4 @@
/**
* @}
*/
+
diff --git a/Src/stm32f2xx_hal_sram.c b/Src/stm32f2xx_hal_sram.c
index 3bd67b1..2d907eb 100644
--- a/Src/stm32f2xx_hal_sram.c
+++ b/Src/stm32f2xx_hal_sram.c
@@ -75,25 +75,25 @@
The compilation define USE_HAL_SRAM_REGISTER_CALLBACKS when set to 1
allows the user to configure dynamically the driver callbacks.
- Use Functions @ref HAL_SRAM_RegisterCallback() to register a user callback,
+ Use Functions HAL_SRAM_RegisterCallback() to register a user callback,
it allows to register following callbacks:
(+) MspInitCallback : SRAM MspInit.
(+) MspDeInitCallback : SRAM MspDeInit.
This function takes as parameters the HAL peripheral handle, the Callback ID
and a pointer to the user callback function.
- Use function @ref HAL_SRAM_UnRegisterCallback() to reset a callback to the default
- weak (surcharged) function. It allows to reset following callbacks:
+ Use function HAL_SRAM_UnRegisterCallback() to reset a callback to the default
+ weak (overridden) function. It allows to reset following callbacks:
(+) MspInitCallback : SRAM MspInit.
(+) MspDeInitCallback : SRAM MspDeInit.
This function) takes as parameters the HAL peripheral handle and the Callback ID.
- By default, after the @ref HAL_SRAM_Init and if the state is HAL_SRAM_STATE_RESET
- all callbacks are reset to the corresponding legacy weak (surcharged) functions.
+ By default, after the HAL_SRAM_Init and if the state is HAL_SRAM_STATE_RESET
+ all callbacks are reset to the corresponding legacy weak (overridden) functions.
Exception done for MspInit and MspDeInit callbacks that are respectively
- reset to the legacy weak (surcharged) functions in the @ref HAL_SRAM_Init
- and @ref HAL_SRAM_DeInit only when these callbacks are null (not registered beforehand).
- If not, MspInit or MspDeInit are not null, the @ref HAL_SRAM_Init and @ref HAL_SRAM_DeInit
+ reset to the legacy weak (overridden) functions in the HAL_SRAM_Init
+ and HAL_SRAM_DeInit only when these callbacks are null (not registered beforehand).
+ If not, MspInit or MspDeInit are not null, the HAL_SRAM_Init and HAL_SRAM_DeInit
keep and use the user MspInit/MspDeInit callbacks (registered beforehand)
Callbacks can be registered/unregistered in READY state only.
@@ -101,12 +101,12 @@
in READY or RESET state, thus registered (user) MspInit/DeInit callbacks can be used
during the Init/DeInit.
In that case first register the MspInit/MspDeInit user callbacks
- using @ref HAL_SRAM_RegisterCallback before calling @ref HAL_SRAM_DeInit
- or @ref HAL_SRAM_Init function.
+ using HAL_SRAM_RegisterCallback before calling HAL_SRAM_DeInit
+ or HAL_SRAM_Init function.
When The compilation define USE_HAL_SRAM_REGISTER_CALLBACKS is set to 0 or
not defined, the callback registering feature is not available
- and weak (surcharged) callbacks are used.
+ and weak (overridden) callbacks are used.
@endverbatim
******************************************************************************
@@ -132,9 +132,15 @@
/* Private macro -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
/* Private function prototypes -----------------------------------------------*/
+/** @addtogroup SRAM_Private_Functions SRAM Private Functions
+ * @{
+ */
static void SRAM_DMACplt(DMA_HandleTypeDef *hdma);
static void SRAM_DMACpltProt(DMA_HandleTypeDef *hdma);
static void SRAM_DMAError(DMA_HandleTypeDef *hdma);
+/**
+ * @}
+ */
/* Exported functions --------------------------------------------------------*/
@@ -730,7 +736,7 @@
#if (USE_HAL_SRAM_REGISTER_CALLBACKS == 1)
/**
* @brief Register a User SRAM Callback
- * To be used instead of the weak (surcharged) predefined callback
+ * To be used to override the weak predefined callback
* @param hsram : SRAM handle
* @param CallbackId : ID of the callback to be registered
* This parameter can be one of the following values:
@@ -750,9 +756,6 @@
return HAL_ERROR;
}
- /* Process locked */
- __HAL_LOCK(hsram);
-
state = hsram->State;
if ((state == HAL_SRAM_STATE_READY) || (state == HAL_SRAM_STATE_RESET) || (state == HAL_SRAM_STATE_PROTECTED))
{
@@ -776,14 +779,12 @@
status = HAL_ERROR;
}
- /* Release Lock */
- __HAL_UNLOCK(hsram);
return status;
}
/**
* @brief Unregister a User SRAM Callback
- * SRAM Callback is redirected to the weak (surcharged) predefined callback
+ * SRAM Callback is redirected to the weak predefined callback
* @param hsram : SRAM handle
* @param CallbackId : ID of the callback to be unregistered
* This parameter can be one of the following values:
@@ -798,9 +799,6 @@
HAL_StatusTypeDef status = HAL_OK;
HAL_SRAM_StateTypeDef state;
- /* Process locked */
- __HAL_LOCK(hsram);
-
state = hsram->State;
if ((state == HAL_SRAM_STATE_READY) || (state == HAL_SRAM_STATE_PROTECTED))
{
@@ -846,14 +844,12 @@
status = HAL_ERROR;
}
- /* Release Lock */
- __HAL_UNLOCK(hsram);
return status;
}
/**
* @brief Register a User SRAM Callback for DMA transfers
- * To be used instead of the weak (surcharged) predefined callback
+ * To be used to override the weak predefined callback
* @param hsram : SRAM handle
* @param CallbackId : ID of the callback to be registered
* This parameter can be one of the following values:
@@ -1017,7 +1013,7 @@
* the configuration information for SRAM module.
* @retval HAL state
*/
-HAL_SRAM_StateTypeDef HAL_SRAM_GetState(SRAM_HandleTypeDef *hsram)
+HAL_SRAM_StateTypeDef HAL_SRAM_GetState(const SRAM_HandleTypeDef *hsram)
{
return hsram->State;
}
@@ -1030,6 +1026,10 @@
* @}
*/
+/** @addtogroup SRAM_Private_Functions SRAM Private Functions
+ * @{
+ */
+
/**
* @brief DMA SRAM process complete callback.
* @param hdma : DMA handle
@@ -1100,8 +1100,13 @@
* @}
*/
+/**
+ * @}
+ */
+
#endif /* HAL_SRAM_MODULE_ENABLED */
/**
* @}
*/
+
diff --git a/Src/stm32f2xx_hal_tim.c b/Src/stm32f2xx_hal_tim.c
index fe9f35a..80cc1e8 100644
--- a/Src/stm32f2xx_hal_tim.c
+++ b/Src/stm32f2xx_hal_tim.c
@@ -29,7 +29,6 @@
* + Commutation Event configuration with Interruption and DMA
* + TIM OCRef clear configuration
* + TIM External Clock configuration
- *
******************************************************************************
* @attention
*
@@ -115,14 +114,14 @@
allows the user to configure dynamically the driver callbacks.
[..]
- Use Function @ref HAL_TIM_RegisterCallback() to register a callback.
- @ref HAL_TIM_RegisterCallback() takes as parameters the HAL peripheral handle,
+ Use Function HAL_TIM_RegisterCallback() to register a callback.
+ HAL_TIM_RegisterCallback() takes as parameters the HAL peripheral handle,
the Callback ID and a pointer to the user callback function.
[..]
- Use function @ref HAL_TIM_UnRegisterCallback() to reset a callback to the default
+ Use function HAL_TIM_UnRegisterCallback() to reset a callback to the default
weak function.
- @ref HAL_TIM_UnRegisterCallback takes as parameters the HAL peripheral handle,
+ HAL_TIM_UnRegisterCallback takes as parameters the HAL peripheral handle,
and the Callback ID.
[..]
@@ -158,7 +157,7 @@
[..]
By default, after the Init and when the state is HAL_TIM_STATE_RESET
all interrupt callbacks are set to the corresponding weak functions:
- examples @ref HAL_TIM_TriggerCallback(), @ref HAL_TIM_ErrorCallback().
+ examples HAL_TIM_TriggerCallback(), HAL_TIM_ErrorCallback().
[..]
Exception done for MspInit and MspDeInit functions that are reset to the legacy weak
@@ -172,7 +171,7 @@
in HAL_TIM_STATE_READY or HAL_TIM_STATE_RESET state,
thus registered(user) MspInit / DeInit callbacks can be used during the Init / DeInit.
In that case first register the MspInit/MspDeInit user callbacks
- using @ref HAL_TIM_RegisterCallback() before calling DeInit or Init function.
+ using HAL_TIM_RegisterCallback() before calling DeInit or Init function.
[..]
When The compilation define USE_HAL_TIM_REGISTER_CALLBACKS is set to 0 or
@@ -276,6 +275,7 @@
assert_param(IS_TIM_INSTANCE(htim->Instance));
assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode));
assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision));
+ assert_param(IS_TIM_PERIOD(htim, htim->Init.Period));
assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload));
if (htim->State == HAL_TIM_STATE_RESET)
@@ -537,7 +537,7 @@
}
else if (htim->State == HAL_TIM_STATE_READY)
{
- if ((pData == NULL) && (Length > 0U))
+ if ((pData == NULL) || (Length == 0U))
{
return HAL_ERROR;
}
@@ -560,7 +560,7 @@
/* Enable the DMA stream */
if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_UPDATE], (uint32_t)pData, (uint32_t)&htim->Instance->ARR,
- Length) != HAL_OK)
+ Length) != HAL_OK)
{
/* Return error status */
return HAL_ERROR;
@@ -659,6 +659,7 @@
assert_param(IS_TIM_INSTANCE(htim->Instance));
assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode));
assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision));
+ assert_param(IS_TIM_PERIOD(htim, htim->Init.Period));
assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload));
if (htim->State == HAL_TIM_STATE_RESET)
@@ -876,6 +877,7 @@
*/
HAL_StatusTypeDef HAL_TIM_OC_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
{
+ HAL_StatusTypeDef status = HAL_OK;
uint32_t tmpsmcr;
/* Check the parameters */
@@ -921,34 +923,38 @@
}
default:
+ status = HAL_ERROR;
break;
}
- /* Enable the Output compare channel */
- TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE);
-
- if (IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET)
+ if (status == HAL_OK)
{
- /* Enable the main output */
- __HAL_TIM_MOE_ENABLE(htim);
- }
+ /* Enable the Output compare channel */
+ TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE);
- /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
- if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
- {
- tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
- if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
+ if (IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET)
+ {
+ /* Enable the main output */
+ __HAL_TIM_MOE_ENABLE(htim);
+ }
+
+ /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
+ if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
+ {
+ tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
+ if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
+ {
+ __HAL_TIM_ENABLE(htim);
+ }
+ }
+ else
{
__HAL_TIM_ENABLE(htim);
}
}
- else
- {
- __HAL_TIM_ENABLE(htim);
- }
/* Return function status */
- return HAL_OK;
+ return status;
}
/**
@@ -964,6 +970,8 @@
*/
HAL_StatusTypeDef HAL_TIM_OC_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
{
+ HAL_StatusTypeDef status = HAL_OK;
+
/* Check the parameters */
assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
@@ -998,26 +1006,30 @@
}
default:
+ status = HAL_ERROR;
break;
}
- /* Disable the Output compare channel */
- TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE);
-
- if (IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET)
+ if (status == HAL_OK)
{
- /* Disable the Main Output */
- __HAL_TIM_MOE_DISABLE(htim);
+ /* Disable the Output compare channel */
+ TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE);
+
+ if (IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET)
+ {
+ /* Disable the Main Output */
+ __HAL_TIM_MOE_DISABLE(htim);
+ }
+
+ /* Disable the Peripheral */
+ __HAL_TIM_DISABLE(htim);
+
+ /* Set the TIM channel state */
+ TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY);
}
- /* Disable the Peripheral */
- __HAL_TIM_DISABLE(htim);
-
- /* Set the TIM channel state */
- TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY);
-
/* Return function status */
- return HAL_OK;
+ return status;
}
/**
@@ -1036,6 +1048,7 @@
HAL_StatusTypeDef HAL_TIM_OC_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, const uint32_t *pData,
uint16_t Length)
{
+ HAL_StatusTypeDef status = HAL_OK;
uint32_t tmpsmcr;
/* Check the parameters */
@@ -1048,7 +1061,7 @@
}
else if (TIM_CHANNEL_STATE_GET(htim, Channel) == HAL_TIM_CHANNEL_STATE_READY)
{
- if ((pData == NULL) && (Length > 0U))
+ if ((pData == NULL) || (Length == 0U))
{
return HAL_ERROR;
}
@@ -1075,7 +1088,7 @@
/* Enable the DMA stream */
if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)pData, (uint32_t)&htim->Instance->CCR1,
- Length) != HAL_OK)
+ Length) != HAL_OK)
{
/* Return error status */
return HAL_ERROR;
@@ -1097,7 +1110,7 @@
/* Enable the DMA stream */
if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)pData, (uint32_t)&htim->Instance->CCR2,
- Length) != HAL_OK)
+ Length) != HAL_OK)
{
/* Return error status */
return HAL_ERROR;
@@ -1119,7 +1132,7 @@
/* Enable the DMA stream */
if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)pData, (uint32_t)&htim->Instance->CCR3,
- Length) != HAL_OK)
+ Length) != HAL_OK)
{
/* Return error status */
return HAL_ERROR;
@@ -1140,7 +1153,7 @@
/* Enable the DMA stream */
if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC4], (uint32_t)pData, (uint32_t)&htim->Instance->CCR4,
- Length) != HAL_OK)
+ Length) != HAL_OK)
{
/* Return error status */
return HAL_ERROR;
@@ -1151,34 +1164,38 @@
}
default:
+ status = HAL_ERROR;
break;
}
- /* Enable the Output compare channel */
- TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE);
-
- if (IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET)
+ if (status == HAL_OK)
{
- /* Enable the main output */
- __HAL_TIM_MOE_ENABLE(htim);
- }
+ /* Enable the Output compare channel */
+ TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE);
- /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
- if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
- {
- tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
- if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
+ if (IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET)
+ {
+ /* Enable the main output */
+ __HAL_TIM_MOE_ENABLE(htim);
+ }
+
+ /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
+ if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
+ {
+ tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
+ if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
+ {
+ __HAL_TIM_ENABLE(htim);
+ }
+ }
+ else
{
__HAL_TIM_ENABLE(htim);
}
}
- else
- {
- __HAL_TIM_ENABLE(htim);
- }
/* Return function status */
- return HAL_OK;
+ return status;
}
/**
@@ -1194,6 +1211,8 @@
*/
HAL_StatusTypeDef HAL_TIM_OC_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel)
{
+ HAL_StatusTypeDef status = HAL_OK;
+
/* Check the parameters */
assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
@@ -1232,26 +1251,30 @@
}
default:
+ status = HAL_ERROR;
break;
}
- /* Disable the Output compare channel */
- TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE);
-
- if (IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET)
+ if (status == HAL_OK)
{
- /* Disable the Main Output */
- __HAL_TIM_MOE_DISABLE(htim);
+ /* Disable the Output compare channel */
+ TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE);
+
+ if (IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET)
+ {
+ /* Disable the Main Output */
+ __HAL_TIM_MOE_DISABLE(htim);
+ }
+
+ /* Disable the Peripheral */
+ __HAL_TIM_DISABLE(htim);
+
+ /* Set the TIM channel state */
+ TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY);
}
- /* Disable the Peripheral */
- __HAL_TIM_DISABLE(htim);
-
- /* Set the TIM channel state */
- TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY);
-
/* Return function status */
- return HAL_OK;
+ return status;
}
/**
@@ -1301,6 +1324,7 @@
assert_param(IS_TIM_INSTANCE(htim->Instance));
assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode));
assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision));
+ assert_param(IS_TIM_PERIOD(htim, htim->Init.Period));
assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload));
if (htim->State == HAL_TIM_STATE_RESET)
@@ -1518,7 +1542,9 @@
*/
HAL_StatusTypeDef HAL_TIM_PWM_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
{
+ HAL_StatusTypeDef status = HAL_OK;
uint32_t tmpsmcr;
+
/* Check the parameters */
assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
@@ -1562,34 +1588,38 @@
}
default:
+ status = HAL_ERROR;
break;
}
- /* Enable the Capture compare channel */
- TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE);
-
- if (IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET)
+ if (status == HAL_OK)
{
- /* Enable the main output */
- __HAL_TIM_MOE_ENABLE(htim);
- }
+ /* Enable the Capture compare channel */
+ TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE);
- /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
- if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
- {
- tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
- if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
+ if (IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET)
+ {
+ /* Enable the main output */
+ __HAL_TIM_MOE_ENABLE(htim);
+ }
+
+ /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
+ if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
+ {
+ tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
+ if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
+ {
+ __HAL_TIM_ENABLE(htim);
+ }
+ }
+ else
{
__HAL_TIM_ENABLE(htim);
}
}
- else
- {
- __HAL_TIM_ENABLE(htim);
- }
/* Return function status */
- return HAL_OK;
+ return status;
}
/**
@@ -1605,6 +1635,8 @@
*/
HAL_StatusTypeDef HAL_TIM_PWM_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
{
+ HAL_StatusTypeDef status = HAL_OK;
+
/* Check the parameters */
assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
@@ -1639,26 +1671,30 @@
}
default:
+ status = HAL_ERROR;
break;
}
- /* Disable the Capture compare channel */
- TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE);
-
- if (IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET)
+ if (status == HAL_OK)
{
- /* Disable the Main Output */
- __HAL_TIM_MOE_DISABLE(htim);
+ /* Disable the Capture compare channel */
+ TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE);
+
+ if (IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET)
+ {
+ /* Disable the Main Output */
+ __HAL_TIM_MOE_DISABLE(htim);
+ }
+
+ /* Disable the Peripheral */
+ __HAL_TIM_DISABLE(htim);
+
+ /* Set the TIM channel state */
+ TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY);
}
- /* Disable the Peripheral */
- __HAL_TIM_DISABLE(htim);
-
- /* Set the TIM channel state */
- TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY);
-
/* Return function status */
- return HAL_OK;
+ return status;
}
/**
@@ -1677,6 +1713,7 @@
HAL_StatusTypeDef HAL_TIM_PWM_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, const uint32_t *pData,
uint16_t Length)
{
+ HAL_StatusTypeDef status = HAL_OK;
uint32_t tmpsmcr;
/* Check the parameters */
@@ -1689,7 +1726,7 @@
}
else if (TIM_CHANNEL_STATE_GET(htim, Channel) == HAL_TIM_CHANNEL_STATE_READY)
{
- if ((pData == NULL) && (Length > 0U))
+ if ((pData == NULL) || (Length == 0U))
{
return HAL_ERROR;
}
@@ -1716,7 +1753,7 @@
/* Enable the DMA stream */
if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)pData, (uint32_t)&htim->Instance->CCR1,
- Length) != HAL_OK)
+ Length) != HAL_OK)
{
/* Return error status */
return HAL_ERROR;
@@ -1738,7 +1775,7 @@
/* Enable the DMA stream */
if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)pData, (uint32_t)&htim->Instance->CCR2,
- Length) != HAL_OK)
+ Length) != HAL_OK)
{
/* Return error status */
return HAL_ERROR;
@@ -1759,7 +1796,7 @@
/* Enable the DMA stream */
if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)pData, (uint32_t)&htim->Instance->CCR3,
- Length) != HAL_OK)
+ Length) != HAL_OK)
{
/* Return error status */
return HAL_ERROR;
@@ -1780,7 +1817,7 @@
/* Enable the DMA stream */
if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC4], (uint32_t)pData, (uint32_t)&htim->Instance->CCR4,
- Length) != HAL_OK)
+ Length) != HAL_OK)
{
/* Return error status */
return HAL_ERROR;
@@ -1791,34 +1828,38 @@
}
default:
+ status = HAL_ERROR;
break;
}
- /* Enable the Capture compare channel */
- TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE);
-
- if (IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET)
+ if (status == HAL_OK)
{
- /* Enable the main output */
- __HAL_TIM_MOE_ENABLE(htim);
- }
+ /* Enable the Capture compare channel */
+ TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE);
- /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
- if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
- {
- tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
- if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
+ if (IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET)
+ {
+ /* Enable the main output */
+ __HAL_TIM_MOE_ENABLE(htim);
+ }
+
+ /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
+ if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
+ {
+ tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
+ if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
+ {
+ __HAL_TIM_ENABLE(htim);
+ }
+ }
+ else
{
__HAL_TIM_ENABLE(htim);
}
}
- else
- {
- __HAL_TIM_ENABLE(htim);
- }
/* Return function status */
- return HAL_OK;
+ return status;
}
/**
@@ -1834,6 +1875,8 @@
*/
HAL_StatusTypeDef HAL_TIM_PWM_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel)
{
+ HAL_StatusTypeDef status = HAL_OK;
+
/* Check the parameters */
assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
@@ -1872,26 +1915,30 @@
}
default:
+ status = HAL_ERROR;
break;
}
- /* Disable the Capture compare channel */
- TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE);
-
- if (IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET)
+ if (status == HAL_OK)
{
- /* Disable the Main Output */
- __HAL_TIM_MOE_DISABLE(htim);
+ /* Disable the Capture compare channel */
+ TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE);
+
+ if (IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET)
+ {
+ /* Disable the Main Output */
+ __HAL_TIM_MOE_DISABLE(htim);
+ }
+
+ /* Disable the Peripheral */
+ __HAL_TIM_DISABLE(htim);
+
+ /* Set the TIM channel state */
+ TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY);
}
- /* Disable the Peripheral */
- __HAL_TIM_DISABLE(htim);
-
- /* Set the TIM channel state */
- TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY);
-
/* Return function status */
- return HAL_OK;
+ return status;
}
/**
@@ -1941,6 +1988,7 @@
assert_param(IS_TIM_INSTANCE(htim->Instance));
assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode));
assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision));
+ assert_param(IS_TIM_PERIOD(htim, htim->Init.Period));
assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload));
if (htim->State == HAL_TIM_STATE_RESET)
@@ -2151,7 +2199,9 @@
*/
HAL_StatusTypeDef HAL_TIM_IC_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
{
+ HAL_StatusTypeDef status = HAL_OK;
uint32_t tmpsmcr;
+
HAL_TIM_ChannelStateTypeDef channel_state = TIM_CHANNEL_STATE_GET(htim, Channel);
HAL_TIM_ChannelStateTypeDef complementary_channel_state = TIM_CHANNEL_N_STATE_GET(htim, Channel);
@@ -2200,27 +2250,32 @@
}
default:
+ status = HAL_ERROR;
break;
}
- /* Enable the Input Capture channel */
- TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE);
- /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
- if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
+ if (status == HAL_OK)
{
- tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
- if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
+ /* Enable the Input Capture channel */
+ TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE);
+
+ /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
+ if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
+ {
+ tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
+ if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
+ {
+ __HAL_TIM_ENABLE(htim);
+ }
+ }
+ else
{
__HAL_TIM_ENABLE(htim);
}
}
- else
- {
- __HAL_TIM_ENABLE(htim);
- }
/* Return function status */
- return HAL_OK;
+ return status;
}
/**
@@ -2236,6 +2291,8 @@
*/
HAL_StatusTypeDef HAL_TIM_IC_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
{
+ HAL_StatusTypeDef status = HAL_OK;
+
/* Check the parameters */
assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
@@ -2270,21 +2327,25 @@
}
default:
+ status = HAL_ERROR;
break;
}
- /* Disable the Input Capture channel */
- TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE);
+ if (status == HAL_OK)
+ {
+ /* Disable the Input Capture channel */
+ TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE);
- /* Disable the Peripheral */
- __HAL_TIM_DISABLE(htim);
+ /* Disable the Peripheral */
+ __HAL_TIM_DISABLE(htim);
- /* Set the TIM channel state */
- TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY);
- TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY);
+ /* Set the TIM channel state */
+ TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY);
+ TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY);
+ }
/* Return function status */
- return HAL_OK;
+ return status;
}
/**
@@ -2302,7 +2363,9 @@
*/
HAL_StatusTypeDef HAL_TIM_IC_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length)
{
+ HAL_StatusTypeDef status = HAL_OK;
uint32_t tmpsmcr;
+
HAL_TIM_ChannelStateTypeDef channel_state = TIM_CHANNEL_STATE_GET(htim, Channel);
HAL_TIM_ChannelStateTypeDef complementary_channel_state = TIM_CHANNEL_N_STATE_GET(htim, Channel);
@@ -2319,7 +2382,7 @@
else if ((channel_state == HAL_TIM_CHANNEL_STATE_READY)
&& (complementary_channel_state == HAL_TIM_CHANNEL_STATE_READY))
{
- if ((pData == NULL) && (Length > 0U))
+ if ((pData == NULL) || (Length == 0U))
{
return HAL_ERROR;
}
@@ -2337,20 +2400,6 @@
/* Enable the Input Capture channel */
TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE);
- /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
- if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
- {
- tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
- if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
- {
- __HAL_TIM_ENABLE(htim);
- }
- }
- else
- {
- __HAL_TIM_ENABLE(htim);
- }
-
switch (Channel)
{
case TIM_CHANNEL_1:
@@ -2364,7 +2413,7 @@
/* Enable the DMA stream */
if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)&htim->Instance->CCR1, (uint32_t)pData,
- Length) != HAL_OK)
+ Length) != HAL_OK)
{
/* Return error status */
return HAL_ERROR;
@@ -2385,7 +2434,7 @@
/* Enable the DMA stream */
if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)&htim->Instance->CCR2, (uint32_t)pData,
- Length) != HAL_OK)
+ Length) != HAL_OK)
{
/* Return error status */
return HAL_ERROR;
@@ -2406,7 +2455,7 @@
/* Enable the DMA stream */
if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)&htim->Instance->CCR3, (uint32_t)pData,
- Length) != HAL_OK)
+ Length) != HAL_OK)
{
/* Return error status */
return HAL_ERROR;
@@ -2427,7 +2476,7 @@
/* Enable the DMA stream */
if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC4], (uint32_t)&htim->Instance->CCR4, (uint32_t)pData,
- Length) != HAL_OK)
+ Length) != HAL_OK)
{
/* Return error status */
return HAL_ERROR;
@@ -2438,11 +2487,26 @@
}
default:
+ status = HAL_ERROR;
break;
}
+ /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
+ if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
+ {
+ tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
+ if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
+ {
+ __HAL_TIM_ENABLE(htim);
+ }
+ }
+ else
+ {
+ __HAL_TIM_ENABLE(htim);
+ }
+
/* Return function status */
- return HAL_OK;
+ return status;
}
/**
@@ -2458,6 +2522,8 @@
*/
HAL_StatusTypeDef HAL_TIM_IC_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel)
{
+ HAL_StatusTypeDef status = HAL_OK;
+
/* Check the parameters */
assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
assert_param(IS_TIM_DMA_CC_INSTANCE(htim->Instance));
@@ -2500,18 +2566,22 @@
}
default:
+ status = HAL_ERROR;
break;
}
- /* Disable the Peripheral */
- __HAL_TIM_DISABLE(htim);
+ if (status == HAL_OK)
+ {
+ /* Disable the Peripheral */
+ __HAL_TIM_DISABLE(htim);
- /* Set the TIM channel state */
- TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY);
- TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY);
+ /* Set the TIM channel state */
+ TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY);
+ TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY);
+ }
/* Return function status */
- return HAL_OK;
+ return status;
}
/**
* @}
@@ -2568,6 +2638,7 @@
assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode));
assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision));
assert_param(IS_TIM_OPM_MODE(OnePulseMode));
+ assert_param(IS_TIM_PERIOD(htim, htim->Init.Period));
assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload));
if (htim->State == HAL_TIM_STATE_RESET)
@@ -2945,7 +3016,7 @@
* @param sConfig TIM Encoder Interface configuration structure
* @retval HAL status
*/
-HAL_StatusTypeDef HAL_TIM_Encoder_Init(TIM_HandleTypeDef *htim, TIM_Encoder_InitTypeDef *sConfig)
+HAL_StatusTypeDef HAL_TIM_Encoder_Init(TIM_HandleTypeDef *htim, const TIM_Encoder_InitTypeDef *sConfig)
{
uint32_t tmpsmcr;
uint32_t tmpccmr1;
@@ -2971,6 +3042,7 @@
assert_param(IS_TIM_IC_PRESCALER(sConfig->IC2Prescaler));
assert_param(IS_TIM_IC_FILTER(sConfig->IC1Filter));
assert_param(IS_TIM_IC_FILTER(sConfig->IC2Filter));
+ assert_param(IS_TIM_PERIOD(htim, htim->Init.Period));
if (htim->State == HAL_TIM_STATE_RESET)
{
@@ -3480,7 +3552,7 @@
else if ((channel_1_state == HAL_TIM_CHANNEL_STATE_READY)
&& (complementary_channel_1_state == HAL_TIM_CHANNEL_STATE_READY))
{
- if ((pData1 == NULL) && (Length > 0U))
+ if ((pData1 == NULL) || (Length == 0U))
{
return HAL_ERROR;
}
@@ -3505,7 +3577,7 @@
else if ((channel_2_state == HAL_TIM_CHANNEL_STATE_READY)
&& (complementary_channel_2_state == HAL_TIM_CHANNEL_STATE_READY))
{
- if ((pData2 == NULL) && (Length > 0U))
+ if ((pData2 == NULL) || (Length == 0U))
{
return HAL_ERROR;
}
@@ -3534,7 +3606,7 @@
&& (complementary_channel_1_state == HAL_TIM_CHANNEL_STATE_READY)
&& (complementary_channel_2_state == HAL_TIM_CHANNEL_STATE_READY))
{
- if ((((pData1 == NULL) || (pData2 == NULL))) && (Length > 0U))
+ if ((((pData1 == NULL) || (pData2 == NULL))) || (Length == 0U))
{
return HAL_ERROR;
}
@@ -3565,7 +3637,7 @@
/* Enable the DMA stream */
if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)&htim->Instance->CCR1, (uint32_t)pData1,
- Length) != HAL_OK)
+ Length) != HAL_OK)
{
/* Return error status */
return HAL_ERROR;
@@ -3573,11 +3645,12 @@
/* Enable the TIM Input Capture DMA request */
__HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1);
+ /* Enable the Capture compare channel */
+ TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE);
+
/* Enable the Peripheral */
__HAL_TIM_ENABLE(htim);
- /* Enable the Capture compare channel */
- TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE);
break;
}
@@ -3591,7 +3664,7 @@
htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = TIM_DMAError;
/* Enable the DMA stream */
if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)&htim->Instance->CCR2, (uint32_t)pData2,
- Length) != HAL_OK)
+ Length) != HAL_OK)
{
/* Return error status */
return HAL_ERROR;
@@ -3599,15 +3672,16 @@
/* Enable the TIM Input Capture DMA request */
__HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2);
+ /* Enable the Capture compare channel */
+ TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE);
+
/* Enable the Peripheral */
__HAL_TIM_ENABLE(htim);
- /* Enable the Capture compare channel */
- TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE);
break;
}
- case TIM_CHANNEL_ALL:
+ default:
{
/* Set the DMA capture callbacks */
htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMACaptureCplt;
@@ -3618,7 +3692,7 @@
/* Enable the DMA stream */
if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)&htim->Instance->CCR1, (uint32_t)pData1,
- Length) != HAL_OK)
+ Length) != HAL_OK)
{
/* Return error status */
return HAL_ERROR;
@@ -3633,27 +3707,26 @@
/* Enable the DMA stream */
if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)&htim->Instance->CCR2, (uint32_t)pData2,
- Length) != HAL_OK)
+ Length) != HAL_OK)
{
/* Return error status */
return HAL_ERROR;
}
- /* Enable the Peripheral */
- __HAL_TIM_ENABLE(htim);
-
- /* Enable the Capture compare channel */
- TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE);
- TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE);
/* Enable the TIM Input Capture DMA request */
__HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1);
/* Enable the TIM Input Capture DMA request */
__HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2);
+
+ /* Enable the Capture compare channel */
+ TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE);
+ TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE);
+
+ /* Enable the Peripheral */
+ __HAL_TIM_ENABLE(htim);
+
break;
}
-
- default:
- break;
}
/* Return function status */
@@ -3966,6 +4039,8 @@
const TIM_OC_InitTypeDef *sConfig,
uint32_t Channel)
{
+ HAL_StatusTypeDef status = HAL_OK;
+
/* Check the parameters */
assert_param(IS_TIM_CHANNELS(Channel));
assert_param(IS_TIM_OC_MODE(sConfig->OCMode));
@@ -4017,12 +4092,13 @@
}
default:
+ status = HAL_ERROR;
break;
}
__HAL_UNLOCK(htim);
- return HAL_OK;
+ return status;
}
/**
@@ -4040,6 +4116,8 @@
*/
HAL_StatusTypeDef HAL_TIM_IC_ConfigChannel(TIM_HandleTypeDef *htim, const TIM_IC_InitTypeDef *sConfig, uint32_t Channel)
{
+ HAL_StatusTypeDef status = HAL_OK;
+
/* Check the parameters */
assert_param(IS_TIM_CC1_INSTANCE(htim->Instance));
assert_param(IS_TIM_IC_POLARITY(sConfig->ICPolarity));
@@ -4096,7 +4174,7 @@
/* Set the IC3PSC value */
htim->Instance->CCMR2 |= sConfig->ICPrescaler;
}
- else
+ else if (Channel == TIM_CHANNEL_4)
{
/* TI4 Configuration */
assert_param(IS_TIM_CC4_INSTANCE(htim->Instance));
@@ -4112,10 +4190,14 @@
/* Set the IC4PSC value */
htim->Instance->CCMR2 |= (sConfig->ICPrescaler << 8U);
}
+ else
+ {
+ status = HAL_ERROR;
+ }
__HAL_UNLOCK(htim);
- return HAL_OK;
+ return status;
}
/**
@@ -4135,6 +4217,8 @@
const TIM_OC_InitTypeDef *sConfig,
uint32_t Channel)
{
+ HAL_StatusTypeDef status = HAL_OK;
+
/* Check the parameters */
assert_param(IS_TIM_CHANNELS(Channel));
assert_param(IS_TIM_PWM_MODE(sConfig->OCMode));
@@ -4215,12 +4299,13 @@
}
default:
+ status = HAL_ERROR;
break;
}
__HAL_UNLOCK(htim);
- return HAL_OK;
+ return status;
}
/**
@@ -4245,6 +4330,7 @@
HAL_StatusTypeDef HAL_TIM_OnePulse_ConfigChannel(TIM_HandleTypeDef *htim, TIM_OnePulse_InitTypeDef *sConfig,
uint32_t OutputChannel, uint32_t InputChannel)
{
+ HAL_StatusTypeDef status = HAL_OK;
TIM_OC_InitTypeDef temp1;
/* Check the parameters */
@@ -4275,6 +4361,7 @@
TIM_OC1_SetConfig(htim->Instance, &temp1);
break;
}
+
case TIM_CHANNEL_2:
{
assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
@@ -4282,60 +4369,67 @@
TIM_OC2_SetConfig(htim->Instance, &temp1);
break;
}
+
default:
+ status = HAL_ERROR;
break;
}
- switch (InputChannel)
+ if (status == HAL_OK)
{
- case TIM_CHANNEL_1:
+ switch (InputChannel)
{
- assert_param(IS_TIM_CC1_INSTANCE(htim->Instance));
+ case TIM_CHANNEL_1:
+ {
+ assert_param(IS_TIM_CC1_INSTANCE(htim->Instance));
- TIM_TI1_SetConfig(htim->Instance, sConfig->ICPolarity,
- sConfig->ICSelection, sConfig->ICFilter);
+ TIM_TI1_SetConfig(htim->Instance, sConfig->ICPolarity,
+ sConfig->ICSelection, sConfig->ICFilter);
- /* Reset the IC1PSC Bits */
- htim->Instance->CCMR1 &= ~TIM_CCMR1_IC1PSC;
+ /* Reset the IC1PSC Bits */
+ htim->Instance->CCMR1 &= ~TIM_CCMR1_IC1PSC;
- /* Select the Trigger source */
- htim->Instance->SMCR &= ~TIM_SMCR_TS;
- htim->Instance->SMCR |= TIM_TS_TI1FP1;
+ /* Select the Trigger source */
+ htim->Instance->SMCR &= ~TIM_SMCR_TS;
+ htim->Instance->SMCR |= TIM_TS_TI1FP1;
- /* Select the Slave Mode */
- htim->Instance->SMCR &= ~TIM_SMCR_SMS;
- htim->Instance->SMCR |= TIM_SLAVEMODE_TRIGGER;
- break;
+ /* Select the Slave Mode */
+ htim->Instance->SMCR &= ~TIM_SMCR_SMS;
+ htim->Instance->SMCR |= TIM_SLAVEMODE_TRIGGER;
+ break;
+ }
+
+ case TIM_CHANNEL_2:
+ {
+ assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
+
+ TIM_TI2_SetConfig(htim->Instance, sConfig->ICPolarity,
+ sConfig->ICSelection, sConfig->ICFilter);
+
+ /* Reset the IC2PSC Bits */
+ htim->Instance->CCMR1 &= ~TIM_CCMR1_IC2PSC;
+
+ /* Select the Trigger source */
+ htim->Instance->SMCR &= ~TIM_SMCR_TS;
+ htim->Instance->SMCR |= TIM_TS_TI2FP2;
+
+ /* Select the Slave Mode */
+ htim->Instance->SMCR &= ~TIM_SMCR_SMS;
+ htim->Instance->SMCR |= TIM_SLAVEMODE_TRIGGER;
+ break;
+ }
+
+ default:
+ status = HAL_ERROR;
+ break;
}
- case TIM_CHANNEL_2:
- {
- assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
-
- TIM_TI2_SetConfig(htim->Instance, sConfig->ICPolarity,
- sConfig->ICSelection, sConfig->ICFilter);
-
- /* Reset the IC2PSC Bits */
- htim->Instance->CCMR1 &= ~TIM_CCMR1_IC2PSC;
-
- /* Select the Trigger source */
- htim->Instance->SMCR &= ~TIM_SMCR_TS;
- htim->Instance->SMCR |= TIM_TS_TI2FP2;
-
- /* Select the Slave Mode */
- htim->Instance->SMCR &= ~TIM_SMCR_SMS;
- htim->Instance->SMCR |= TIM_SLAVEMODE_TRIGGER;
- break;
- }
-
- default:
- break;
}
htim->State = HAL_TIM_STATE_READY;
__HAL_UNLOCK(htim);
- return HAL_OK;
+ return status;
}
else
{
@@ -4384,8 +4478,14 @@
HAL_StatusTypeDef HAL_TIM_DMABurst_WriteStart(TIM_HandleTypeDef *htim, uint32_t BurstBaseAddress,
uint32_t BurstRequestSrc, const uint32_t *BurstBuffer, uint32_t BurstLength)
{
- return HAL_TIM_DMABurst_MultiWriteStart(htim, BurstBaseAddress, BurstRequestSrc, BurstBuffer, BurstLength,
- ((BurstLength) >> 8U) + 1U);
+ HAL_StatusTypeDef status;
+
+ status = HAL_TIM_DMABurst_MultiWriteStart(htim, BurstBaseAddress, BurstRequestSrc, BurstBuffer, BurstLength,
+ ((BurstLength) >> 8U) + 1U);
+
+
+
+ return status;
}
/**
@@ -4431,6 +4531,8 @@
uint32_t BurstRequestSrc, const uint32_t *BurstBuffer,
uint32_t BurstLength, uint32_t DataLength)
{
+ HAL_StatusTypeDef status = HAL_OK;
+
/* Check the parameters */
assert_param(IS_TIM_DMABURST_INSTANCE(htim->Instance));
assert_param(IS_TIM_DMA_BASE(BurstBaseAddress));
@@ -4457,6 +4559,7 @@
{
/* nothing to do */
}
+
switch (BurstRequestSrc)
{
case TIM_DMA_UPDATE:
@@ -4470,7 +4573,7 @@
/* Enable the DMA stream */
if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_UPDATE], (uint32_t)BurstBuffer,
- (uint32_t)&htim->Instance->DMAR, DataLength) != HAL_OK)
+ (uint32_t)&htim->Instance->DMAR, DataLength) != HAL_OK)
{
/* Return error status */
return HAL_ERROR;
@@ -4488,7 +4591,7 @@
/* Enable the DMA stream */
if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)BurstBuffer,
- (uint32_t)&htim->Instance->DMAR, DataLength) != HAL_OK)
+ (uint32_t)&htim->Instance->DMAR, DataLength) != HAL_OK)
{
/* Return error status */
return HAL_ERROR;
@@ -4506,7 +4609,7 @@
/* Enable the DMA stream */
if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)BurstBuffer,
- (uint32_t)&htim->Instance->DMAR, DataLength) != HAL_OK)
+ (uint32_t)&htim->Instance->DMAR, DataLength) != HAL_OK)
{
/* Return error status */
return HAL_ERROR;
@@ -4524,7 +4627,7 @@
/* Enable the DMA stream */
if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)BurstBuffer,
- (uint32_t)&htim->Instance->DMAR, DataLength) != HAL_OK)
+ (uint32_t)&htim->Instance->DMAR, DataLength) != HAL_OK)
{
/* Return error status */
return HAL_ERROR;
@@ -4542,7 +4645,7 @@
/* Enable the DMA stream */
if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC4], (uint32_t)BurstBuffer,
- (uint32_t)&htim->Instance->DMAR, DataLength) != HAL_OK)
+ (uint32_t)&htim->Instance->DMAR, DataLength) != HAL_OK)
{
/* Return error status */
return HAL_ERROR;
@@ -4560,7 +4663,7 @@
/* Enable the DMA stream */
if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_COMMUTATION], (uint32_t)BurstBuffer,
- (uint32_t)&htim->Instance->DMAR, DataLength) != HAL_OK)
+ (uint32_t)&htim->Instance->DMAR, DataLength) != HAL_OK)
{
/* Return error status */
return HAL_ERROR;
@@ -4578,7 +4681,7 @@
/* Enable the DMA stream */
if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_TRIGGER], (uint32_t)BurstBuffer,
- (uint32_t)&htim->Instance->DMAR, DataLength) != HAL_OK)
+ (uint32_t)&htim->Instance->DMAR, DataLength) != HAL_OK)
{
/* Return error status */
return HAL_ERROR;
@@ -4586,16 +4689,20 @@
break;
}
default:
+ status = HAL_ERROR;
break;
}
- /* Configure the DMA Burst Mode */
- htim->Instance->DCR = (BurstBaseAddress | BurstLength);
- /* Enable the TIM DMA Request */
- __HAL_TIM_ENABLE_DMA(htim, BurstRequestSrc);
+ if (status == HAL_OK)
+ {
+ /* Configure the DMA Burst Mode */
+ htim->Instance->DCR = (BurstBaseAddress | BurstLength);
+ /* Enable the TIM DMA Request */
+ __HAL_TIM_ENABLE_DMA(htim, BurstRequestSrc);
+ }
/* Return function status */
- return HAL_OK;
+ return status;
}
/**
@@ -4606,6 +4713,8 @@
*/
HAL_StatusTypeDef HAL_TIM_DMABurst_WriteStop(TIM_HandleTypeDef *htim, uint32_t BurstRequestSrc)
{
+ HAL_StatusTypeDef status = HAL_OK;
+
/* Check the parameters */
assert_param(IS_TIM_DMA_SOURCE(BurstRequestSrc));
@@ -4648,17 +4757,21 @@
break;
}
default:
+ status = HAL_ERROR;
break;
}
- /* Disable the TIM Update DMA request */
- __HAL_TIM_DISABLE_DMA(htim, BurstRequestSrc);
+ if (status == HAL_OK)
+ {
+ /* Disable the TIM Update DMA request */
+ __HAL_TIM_DISABLE_DMA(htim, BurstRequestSrc);
- /* Change the DMA burst operation state */
- htim->DMABurstState = HAL_DMA_BURST_STATE_READY;
+ /* Change the DMA burst operation state */
+ htim->DMABurstState = HAL_DMA_BURST_STATE_READY;
+ }
/* Return function status */
- return HAL_OK;
+ return status;
}
/**
@@ -4702,8 +4815,13 @@
HAL_StatusTypeDef HAL_TIM_DMABurst_ReadStart(TIM_HandleTypeDef *htim, uint32_t BurstBaseAddress,
uint32_t BurstRequestSrc, uint32_t *BurstBuffer, uint32_t BurstLength)
{
- return HAL_TIM_DMABurst_MultiReadStart(htim, BurstBaseAddress, BurstRequestSrc, BurstBuffer, BurstLength,
- ((BurstLength) >> 8U) + 1U);
+ HAL_StatusTypeDef status;
+
+ status = HAL_TIM_DMABurst_MultiReadStart(htim, BurstBaseAddress, BurstRequestSrc, BurstBuffer, BurstLength,
+ ((BurstLength) >> 8U) + 1U);
+
+
+ return status;
}
/**
@@ -4749,6 +4867,8 @@
uint32_t BurstRequestSrc, uint32_t *BurstBuffer,
uint32_t BurstLength, uint32_t DataLength)
{
+ HAL_StatusTypeDef status = HAL_OK;
+
/* Check the parameters */
assert_param(IS_TIM_DMABURST_INSTANCE(htim->Instance));
assert_param(IS_TIM_DMA_BASE(BurstBaseAddress));
@@ -4788,7 +4908,7 @@
/* Enable the DMA stream */
if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_UPDATE], (uint32_t)&htim->Instance->DMAR, (uint32_t)BurstBuffer,
- DataLength) != HAL_OK)
+ DataLength) != HAL_OK)
{
/* Return error status */
return HAL_ERROR;
@@ -4806,7 +4926,7 @@
/* Enable the DMA stream */
if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)&htim->Instance->DMAR, (uint32_t)BurstBuffer,
- DataLength) != HAL_OK)
+ DataLength) != HAL_OK)
{
/* Return error status */
return HAL_ERROR;
@@ -4824,7 +4944,7 @@
/* Enable the DMA stream */
if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)&htim->Instance->DMAR, (uint32_t)BurstBuffer,
- DataLength) != HAL_OK)
+ DataLength) != HAL_OK)
{
/* Return error status */
return HAL_ERROR;
@@ -4842,7 +4962,7 @@
/* Enable the DMA stream */
if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)&htim->Instance->DMAR, (uint32_t)BurstBuffer,
- DataLength) != HAL_OK)
+ DataLength) != HAL_OK)
{
/* Return error status */
return HAL_ERROR;
@@ -4860,7 +4980,7 @@
/* Enable the DMA stream */
if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC4], (uint32_t)&htim->Instance->DMAR, (uint32_t)BurstBuffer,
- DataLength) != HAL_OK)
+ DataLength) != HAL_OK)
{
/* Return error status */
return HAL_ERROR;
@@ -4878,7 +4998,7 @@
/* Enable the DMA stream */
if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_COMMUTATION], (uint32_t)&htim->Instance->DMAR, (uint32_t)BurstBuffer,
- DataLength) != HAL_OK)
+ DataLength) != HAL_OK)
{
/* Return error status */
return HAL_ERROR;
@@ -4896,7 +5016,7 @@
/* Enable the DMA stream */
if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_TRIGGER], (uint32_t)&htim->Instance->DMAR, (uint32_t)BurstBuffer,
- DataLength) != HAL_OK)
+ DataLength) != HAL_OK)
{
/* Return error status */
return HAL_ERROR;
@@ -4904,17 +5024,21 @@
break;
}
default:
+ status = HAL_ERROR;
break;
}
- /* Configure the DMA Burst Mode */
- htim->Instance->DCR = (BurstBaseAddress | BurstLength);
+ if (status == HAL_OK)
+ {
+ /* Configure the DMA Burst Mode */
+ htim->Instance->DCR = (BurstBaseAddress | BurstLength);
- /* Enable the TIM DMA Request */
- __HAL_TIM_ENABLE_DMA(htim, BurstRequestSrc);
+ /* Enable the TIM DMA Request */
+ __HAL_TIM_ENABLE_DMA(htim, BurstRequestSrc);
+ }
/* Return function status */
- return HAL_OK;
+ return status;
}
/**
@@ -4925,6 +5049,8 @@
*/
HAL_StatusTypeDef HAL_TIM_DMABurst_ReadStop(TIM_HandleTypeDef *htim, uint32_t BurstRequestSrc)
{
+ HAL_StatusTypeDef status = HAL_OK;
+
/* Check the parameters */
assert_param(IS_TIM_DMA_SOURCE(BurstRequestSrc));
@@ -4967,17 +5093,21 @@
break;
}
default:
+ status = HAL_ERROR;
break;
}
- /* Disable the TIM Update DMA request */
- __HAL_TIM_DISABLE_DMA(htim, BurstRequestSrc);
+ if (status == HAL_OK)
+ {
+ /* Disable the TIM Update DMA request */
+ __HAL_TIM_DISABLE_DMA(htim, BurstRequestSrc);
- /* Change the DMA burst operation state */
- htim->DMABurstState = HAL_DMA_BURST_STATE_READY;
+ /* Change the DMA burst operation state */
+ htim->DMABurstState = HAL_DMA_BURST_STATE_READY;
+ }
/* Return function status */
- return HAL_OK;
+ return status;
}
/**
@@ -5041,6 +5171,8 @@
const TIM_ClearInputConfigTypeDef *sClearInputConfig,
uint32_t Channel)
{
+ HAL_StatusTypeDef status = HAL_OK;
+
/* Check the parameters */
assert_param(IS_TIM_OCXREF_CLEAR_INSTANCE(htim->Instance));
assert_param(IS_TIM_CLEARINPUT_SOURCE(sClearInputConfig->ClearInputSource));
@@ -5082,76 +5214,80 @@
}
default:
+ status = HAL_ERROR;
break;
}
- switch (Channel)
+ if (status == HAL_OK)
{
- case TIM_CHANNEL_1:
+ switch (Channel)
{
- if (sClearInputConfig->ClearInputState != (uint32_t)DISABLE)
+ case TIM_CHANNEL_1:
{
- /* Enable the OCREF clear feature for Channel 1 */
- SET_BIT(htim->Instance->CCMR1, TIM_CCMR1_OC1CE);
+ if (sClearInputConfig->ClearInputState != (uint32_t)DISABLE)
+ {
+ /* Enable the OCREF clear feature for Channel 1 */
+ SET_BIT(htim->Instance->CCMR1, TIM_CCMR1_OC1CE);
+ }
+ else
+ {
+ /* Disable the OCREF clear feature for Channel 1 */
+ CLEAR_BIT(htim->Instance->CCMR1, TIM_CCMR1_OC1CE);
+ }
+ break;
}
- else
+ case TIM_CHANNEL_2:
{
- /* Disable the OCREF clear feature for Channel 1 */
- CLEAR_BIT(htim->Instance->CCMR1, TIM_CCMR1_OC1CE);
+ if (sClearInputConfig->ClearInputState != (uint32_t)DISABLE)
+ {
+ /* Enable the OCREF clear feature for Channel 2 */
+ SET_BIT(htim->Instance->CCMR1, TIM_CCMR1_OC2CE);
+ }
+ else
+ {
+ /* Disable the OCREF clear feature for Channel 2 */
+ CLEAR_BIT(htim->Instance->CCMR1, TIM_CCMR1_OC2CE);
+ }
+ break;
}
- break;
+ case TIM_CHANNEL_3:
+ {
+ if (sClearInputConfig->ClearInputState != (uint32_t)DISABLE)
+ {
+ /* Enable the OCREF clear feature for Channel 3 */
+ SET_BIT(htim->Instance->CCMR2, TIM_CCMR2_OC3CE);
+ }
+ else
+ {
+ /* Disable the OCREF clear feature for Channel 3 */
+ CLEAR_BIT(htim->Instance->CCMR2, TIM_CCMR2_OC3CE);
+ }
+ break;
+ }
+ case TIM_CHANNEL_4:
+ {
+ if (sClearInputConfig->ClearInputState != (uint32_t)DISABLE)
+ {
+ /* Enable the OCREF clear feature for Channel 4 */
+ SET_BIT(htim->Instance->CCMR2, TIM_CCMR2_OC4CE);
+ }
+ else
+ {
+ /* Disable the OCREF clear feature for Channel 4 */
+ CLEAR_BIT(htim->Instance->CCMR2, TIM_CCMR2_OC4CE);
+ }
+ break;
+ }
+ default:
+ break;
}
- case TIM_CHANNEL_2:
- {
- if (sClearInputConfig->ClearInputState != (uint32_t)DISABLE)
- {
- /* Enable the OCREF clear feature for Channel 2 */
- SET_BIT(htim->Instance->CCMR1, TIM_CCMR1_OC2CE);
- }
- else
- {
- /* Disable the OCREF clear feature for Channel 2 */
- CLEAR_BIT(htim->Instance->CCMR1, TIM_CCMR1_OC2CE);
- }
- break;
- }
- case TIM_CHANNEL_3:
- {
- if (sClearInputConfig->ClearInputState != (uint32_t)DISABLE)
- {
- /* Enable the OCREF clear feature for Channel 3 */
- SET_BIT(htim->Instance->CCMR2, TIM_CCMR2_OC3CE);
- }
- else
- {
- /* Disable the OCREF clear feature for Channel 3 */
- CLEAR_BIT(htim->Instance->CCMR2, TIM_CCMR2_OC3CE);
- }
- break;
- }
- case TIM_CHANNEL_4:
- {
- if (sClearInputConfig->ClearInputState != (uint32_t)DISABLE)
- {
- /* Enable the OCREF clear feature for Channel 4 */
- SET_BIT(htim->Instance->CCMR2, TIM_CCMR2_OC4CE);
- }
- else
- {
- /* Disable the OCREF clear feature for Channel 4 */
- CLEAR_BIT(htim->Instance->CCMR2, TIM_CCMR2_OC4CE);
- }
- break;
- }
- default:
- break;
}
htim->State = HAL_TIM_STATE_READY;
__HAL_UNLOCK(htim);
- return HAL_OK;
+ return status;
}
/**
@@ -5163,6 +5299,7 @@
*/
HAL_StatusTypeDef HAL_TIM_ConfigClockSource(TIM_HandleTypeDef *htim, const TIM_ClockConfigTypeDef *sClockSourceConfig)
{
+ HAL_StatusTypeDef status = HAL_OK;
uint32_t tmpsmcr;
/* Process Locked */
@@ -5283,22 +5420,23 @@
case TIM_CLOCKSOURCE_ITR1:
case TIM_CLOCKSOURCE_ITR2:
case TIM_CLOCKSOURCE_ITR3:
- {
- /* Check whether or not the timer instance supports internal trigger input */
- assert_param(IS_TIM_CLOCKSOURCE_ITRX_INSTANCE(htim->Instance));
+ {
+ /* Check whether or not the timer instance supports internal trigger input */
+ assert_param(IS_TIM_CLOCKSOURCE_ITRX_INSTANCE(htim->Instance));
- TIM_ITRx_SetConfig(htim->Instance, sClockSourceConfig->ClockSource);
- break;
- }
+ TIM_ITRx_SetConfig(htim->Instance, sClockSourceConfig->ClockSource);
+ break;
+ }
default:
+ status = HAL_ERROR;
break;
}
htim->State = HAL_TIM_STATE_READY;
__HAL_UNLOCK(htim);
- return HAL_OK;
+ return status;
}
/**
@@ -5702,8 +5840,6 @@
{
return HAL_ERROR;
}
- /* Process locked */
- __HAL_LOCK(htim);
if (htim->State == HAL_TIM_STATE_READY)
{
@@ -5819,7 +5955,7 @@
default :
/* Return error status */
- status = HAL_ERROR;
+ status = HAL_ERROR;
break;
}
}
@@ -5885,19 +6021,16 @@
default :
/* Return error status */
- status = HAL_ERROR;
+ status = HAL_ERROR;
break;
}
}
else
{
/* Return error status */
- status = HAL_ERROR;
+ status = HAL_ERROR;
}
- /* Release Lock */
- __HAL_UNLOCK(htim);
-
return status;
}
@@ -5940,9 +6073,6 @@
{
HAL_StatusTypeDef status = HAL_OK;
- /* Process locked */
- __HAL_LOCK(htim);
-
if (htim->State == HAL_TIM_STATE_READY)
{
switch (CallbackID)
@@ -6084,7 +6214,7 @@
default :
/* Return error status */
- status = HAL_ERROR;
+ status = HAL_ERROR;
break;
}
}
@@ -6164,19 +6294,16 @@
default :
/* Return error status */
- status = HAL_ERROR;
+ status = HAL_ERROR;
break;
}
}
else
{
/* Return error status */
- status = HAL_ERROR;
+ status = HAL_ERROR;
}
- /* Release Lock */
- __HAL_UNLOCK(htim);
-
return status;
}
#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
@@ -6697,11 +6824,12 @@
uint32_t tmpccer;
uint32_t tmpcr2;
+ /* Get the TIMx CCER register value */
+ tmpccer = TIMx->CCER;
+
/* Disable the Channel 1: Reset the CC1E Bit */
TIMx->CCER &= ~TIM_CCER_CC1E;
- /* Get the TIMx CCER register value */
- tmpccer = TIMx->CCER;
/* Get the TIMx CR2 register value */
tmpcr2 = TIMx->CR2;
@@ -6772,11 +6900,12 @@
uint32_t tmpccer;
uint32_t tmpcr2;
+ /* Get the TIMx CCER register value */
+ tmpccer = TIMx->CCER;
+
/* Disable the Channel 2: Reset the CC2E Bit */
TIMx->CCER &= ~TIM_CCER_CC2E;
- /* Get the TIMx CCER register value */
- tmpccer = TIMx->CCER;
/* Get the TIMx CR2 register value */
tmpcr2 = TIMx->CR2;
@@ -6848,11 +6977,12 @@
uint32_t tmpccer;
uint32_t tmpcr2;
+ /* Get the TIMx CCER register value */
+ tmpccer = TIMx->CCER;
+
/* Disable the Channel 3: Reset the CC2E Bit */
TIMx->CCER &= ~TIM_CCER_CC3E;
- /* Get the TIMx CCER register value */
- tmpccer = TIMx->CCER;
/* Get the TIMx CR2 register value */
tmpcr2 = TIMx->CR2;
@@ -6922,11 +7052,12 @@
uint32_t tmpccer;
uint32_t tmpcr2;
+ /* Get the TIMx CCER register value */
+ tmpccer = TIMx->CCER;
+
/* Disable the Channel 4: Reset the CC4E Bit */
TIMx->CCER &= ~TIM_CCER_CC4E;
- /* Get the TIMx CCER register value */
- tmpccer = TIMx->CCER;
/* Get the TIMx CR2 register value */
tmpcr2 = TIMx->CR2;
@@ -6979,6 +7110,7 @@
static HAL_StatusTypeDef TIM_SlaveTimer_SetConfig(TIM_HandleTypeDef *htim,
const TIM_SlaveConfigTypeDef *sSlaveConfig)
{
+ HAL_StatusTypeDef status = HAL_OK;
uint32_t tmpsmcr;
uint32_t tmpccmr1;
uint32_t tmpccer;
@@ -7075,16 +7207,18 @@
case TIM_TS_ITR1:
case TIM_TS_ITR2:
case TIM_TS_ITR3:
- {
- /* Check the parameter */
- assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
- break;
- }
+ {
+ /* Check the parameter */
+ assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
+ break;
+ }
default:
+ status = HAL_ERROR;
break;
}
- return HAL_OK;
+
+ return status;
}
/**
@@ -7114,9 +7248,9 @@
uint32_t tmpccer;
/* Disable the Channel 1: Reset the CC1E Bit */
+ tmpccer = TIMx->CCER;
TIMx->CCER &= ~TIM_CCER_CC1E;
tmpccmr1 = TIMx->CCMR1;
- tmpccer = TIMx->CCER;
/* Select the Input */
if (IS_TIM_CC2_INSTANCE(TIMx) != RESET)
@@ -7204,9 +7338,9 @@
uint32_t tmpccer;
/* Disable the Channel 2: Reset the CC2E Bit */
+ tmpccer = TIMx->CCER;
TIMx->CCER &= ~TIM_CCER_CC2E;
tmpccmr1 = TIMx->CCMR1;
- tmpccer = TIMx->CCER;
/* Select the Input */
tmpccmr1 &= ~TIM_CCMR1_CC2S;
@@ -7243,9 +7377,9 @@
uint32_t tmpccer;
/* Disable the Channel 2: Reset the CC2E Bit */
+ tmpccer = TIMx->CCER;
TIMx->CCER &= ~TIM_CCER_CC2E;
tmpccmr1 = TIMx->CCMR1;
- tmpccer = TIMx->CCER;
/* Set the filter */
tmpccmr1 &= ~TIM_CCMR1_IC2F;
@@ -7287,9 +7421,9 @@
uint32_t tmpccer;
/* Disable the Channel 3: Reset the CC3E Bit */
+ tmpccer = TIMx->CCER;
TIMx->CCER &= ~TIM_CCER_CC3E;
tmpccmr2 = TIMx->CCMR2;
- tmpccer = TIMx->CCER;
/* Select the Input */
tmpccmr2 &= ~TIM_CCMR2_CC3S;
@@ -7335,9 +7469,9 @@
uint32_t tmpccer;
/* Disable the Channel 4: Reset the CC4E Bit */
+ tmpccer = TIMx->CCER;
TIMx->CCER &= ~TIM_CCER_CC4E;
tmpccmr2 = TIMx->CCMR2;
- tmpccer = TIMx->CCER;
/* Select the Input */
tmpccmr2 &= ~TIM_CCMR2_CC4S;
diff --git a/Src/stm32f2xx_hal_tim_ex.c b/Src/stm32f2xx_hal_tim_ex.c
index d172d7a..85e84f5 100644
--- a/Src/stm32f2xx_hal_tim_ex.c
+++ b/Src/stm32f2xx_hal_tim_ex.c
@@ -10,7 +10,6 @@
* + Time Complementary signal break and dead time configuration
* + Time Master and Slave synchronization configuration
* + Timer remapping capabilities configuration
- *
******************************************************************************
* @attention
*
@@ -152,6 +151,7 @@
assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision));
assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload));
assert_param(IS_TIM_IC_POLARITY(sConfig->IC1Polarity));
+ assert_param(IS_TIM_PERIOD(htim, htim->Init.Period));
assert_param(IS_TIM_IC_PRESCALER(sConfig->IC1Prescaler));
assert_param(IS_TIM_IC_FILTER(sConfig->IC1Filter));
@@ -502,7 +502,7 @@
else if ((channel_1_state == HAL_TIM_CHANNEL_STATE_READY)
&& (complementary_channel_1_state == HAL_TIM_CHANNEL_STATE_READY))
{
- if ((pData == NULL) && (Length > 0U))
+ if ((pData == NULL) || (Length == 0U))
{
return HAL_ERROR;
}
@@ -707,6 +707,7 @@
*/
HAL_StatusTypeDef HAL_TIMEx_OCN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
{
+ HAL_StatusTypeDef status = HAL_OK;
uint32_t tmpsmcr;
/* Check the parameters */
@@ -746,34 +747,38 @@
default:
+ status = HAL_ERROR;
break;
}
- /* Enable the TIM Break interrupt */
- __HAL_TIM_ENABLE_IT(htim, TIM_IT_BREAK);
-
- /* Enable the Capture compare channel N */
- TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);
-
- /* Enable the Main Output */
- __HAL_TIM_MOE_ENABLE(htim);
-
- /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
- if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
+ if (status == HAL_OK)
{
- tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
- if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
+ /* Enable the TIM Break interrupt */
+ __HAL_TIM_ENABLE_IT(htim, TIM_IT_BREAK);
+
+ /* Enable the Capture compare channel N */
+ TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);
+
+ /* Enable the Main Output */
+ __HAL_TIM_MOE_ENABLE(htim);
+
+ /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
+ if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
+ {
+ tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
+ if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
+ {
+ __HAL_TIM_ENABLE(htim);
+ }
+ }
+ else
{
__HAL_TIM_ENABLE(htim);
}
}
- else
- {
- __HAL_TIM_ENABLE(htim);
- }
/* Return function status */
- return HAL_OK;
+ return status;
}
/**
@@ -789,7 +794,9 @@
*/
HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
{
+ HAL_StatusTypeDef status = HAL_OK;
uint32_t tmpccer;
+
/* Check the parameters */
assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
@@ -817,30 +824,34 @@
}
default:
+ status = HAL_ERROR;
break;
}
- /* Disable the Capture compare channel N */
- TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);
-
- /* Disable the TIM Break interrupt (only if no more channel is active) */
- tmpccer = htim->Instance->CCER;
- if ((tmpccer & (TIM_CCER_CC1NE | TIM_CCER_CC2NE | TIM_CCER_CC3NE)) == (uint32_t)RESET)
+ if (status == HAL_OK)
{
- __HAL_TIM_DISABLE_IT(htim, TIM_IT_BREAK);
+ /* Disable the Capture compare channel N */
+ TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);
+
+ /* Disable the TIM Break interrupt (only if no more channel is active) */
+ tmpccer = htim->Instance->CCER;
+ if ((tmpccer & (TIM_CCER_CC1NE | TIM_CCER_CC2NE | TIM_CCER_CC3NE)) == (uint32_t)RESET)
+ {
+ __HAL_TIM_DISABLE_IT(htim, TIM_IT_BREAK);
+ }
+
+ /* Disable the Main Output */
+ __HAL_TIM_MOE_DISABLE(htim);
+
+ /* Disable the Peripheral */
+ __HAL_TIM_DISABLE(htim);
+
+ /* Set the TIM complementary channel state */
+ TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY);
}
- /* Disable the Main Output */
- __HAL_TIM_MOE_DISABLE(htim);
-
- /* Disable the Peripheral */
- __HAL_TIM_DISABLE(htim);
-
- /* Set the TIM complementary channel state */
- TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY);
-
/* Return function status */
- return HAL_OK;
+ return status;
}
/**
@@ -859,6 +870,7 @@
HAL_StatusTypeDef HAL_TIMEx_OCN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, const uint32_t *pData,
uint16_t Length)
{
+ HAL_StatusTypeDef status = HAL_OK;
uint32_t tmpsmcr;
/* Check the parameters */
@@ -871,7 +883,7 @@
}
else if (TIM_CHANNEL_N_STATE_GET(htim, Channel) == HAL_TIM_CHANNEL_STATE_READY)
{
- if ((pData == NULL) && (Length > 0U))
+ if ((pData == NULL) || (Length == 0U))
{
return HAL_ERROR;
}
@@ -898,7 +910,7 @@
/* Enable the DMA stream */
if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)pData, (uint32_t)&htim->Instance->CCR1,
- Length) != HAL_OK)
+ Length) != HAL_OK)
{
/* Return error status */
return HAL_ERROR;
@@ -919,7 +931,7 @@
/* Enable the DMA stream */
if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)pData, (uint32_t)&htim->Instance->CCR2,
- Length) != HAL_OK)
+ Length) != HAL_OK)
{
/* Return error status */
return HAL_ERROR;
@@ -940,7 +952,7 @@
/* Enable the DMA stream */
if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)pData, (uint32_t)&htim->Instance->CCR3,
- Length) != HAL_OK)
+ Length) != HAL_OK)
{
/* Return error status */
return HAL_ERROR;
@@ -951,31 +963,35 @@
}
default:
+ status = HAL_ERROR;
break;
}
- /* Enable the Capture compare channel N */
- TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);
-
- /* Enable the Main Output */
- __HAL_TIM_MOE_ENABLE(htim);
-
- /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
- if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
+ if (status == HAL_OK)
{
- tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
- if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
+ /* Enable the Capture compare channel N */
+ TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);
+
+ /* Enable the Main Output */
+ __HAL_TIM_MOE_ENABLE(htim);
+
+ /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
+ if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
+ {
+ tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
+ if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
+ {
+ __HAL_TIM_ENABLE(htim);
+ }
+ }
+ else
{
__HAL_TIM_ENABLE(htim);
}
}
- else
- {
- __HAL_TIM_ENABLE(htim);
- }
/* Return function status */
- return HAL_OK;
+ return status;
}
/**
@@ -991,6 +1007,8 @@
*/
HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel)
{
+ HAL_StatusTypeDef status = HAL_OK;
+
/* Check the parameters */
assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
@@ -1021,23 +1039,27 @@
}
default:
+ status = HAL_ERROR;
break;
}
- /* Disable the Capture compare channel N */
- TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);
+ if (status == HAL_OK)
+ {
+ /* Disable the Capture compare channel N */
+ TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);
- /* Disable the Main Output */
- __HAL_TIM_MOE_DISABLE(htim);
+ /* Disable the Main Output */
+ __HAL_TIM_MOE_DISABLE(htim);
- /* Disable the Peripheral */
- __HAL_TIM_DISABLE(htim);
+ /* Disable the Peripheral */
+ __HAL_TIM_DISABLE(htim);
- /* Set the TIM complementary channel state */
- TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY);
+ /* Set the TIM complementary channel state */
+ TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY);
+ }
/* Return function status */
- return HAL_OK;
+ return status;
}
/**
@@ -1168,6 +1190,7 @@
*/
HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
{
+ HAL_StatusTypeDef status = HAL_OK;
uint32_t tmpsmcr;
/* Check the parameters */
@@ -1206,34 +1229,38 @@
}
default:
+ status = HAL_ERROR;
break;
}
- /* Enable the TIM Break interrupt */
- __HAL_TIM_ENABLE_IT(htim, TIM_IT_BREAK);
-
- /* Enable the complementary PWM output */
- TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);
-
- /* Enable the Main Output */
- __HAL_TIM_MOE_ENABLE(htim);
-
- /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
- if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
+ if (status == HAL_OK)
{
- tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
- if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
+ /* Enable the TIM Break interrupt */
+ __HAL_TIM_ENABLE_IT(htim, TIM_IT_BREAK);
+
+ /* Enable the complementary PWM output */
+ TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);
+
+ /* Enable the Main Output */
+ __HAL_TIM_MOE_ENABLE(htim);
+
+ /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
+ if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
+ {
+ tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
+ if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
+ {
+ __HAL_TIM_ENABLE(htim);
+ }
+ }
+ else
{
__HAL_TIM_ENABLE(htim);
}
}
- else
- {
- __HAL_TIM_ENABLE(htim);
- }
/* Return function status */
- return HAL_OK;
+ return status;
}
/**
@@ -1249,6 +1276,7 @@
*/
HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
{
+ HAL_StatusTypeDef status = HAL_OK;
uint32_t tmpccer;
/* Check the parameters */
@@ -1278,30 +1306,34 @@
}
default:
+ status = HAL_ERROR;
break;
}
- /* Disable the complementary PWM output */
- TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);
-
- /* Disable the TIM Break interrupt (only if no more channel is active) */
- tmpccer = htim->Instance->CCER;
- if ((tmpccer & (TIM_CCER_CC1NE | TIM_CCER_CC2NE | TIM_CCER_CC3NE)) == (uint32_t)RESET)
+ if (status == HAL_OK)
{
- __HAL_TIM_DISABLE_IT(htim, TIM_IT_BREAK);
+ /* Disable the complementary PWM output */
+ TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);
+
+ /* Disable the TIM Break interrupt (only if no more channel is active) */
+ tmpccer = htim->Instance->CCER;
+ if ((tmpccer & (TIM_CCER_CC1NE | TIM_CCER_CC2NE | TIM_CCER_CC3NE)) == (uint32_t)RESET)
+ {
+ __HAL_TIM_DISABLE_IT(htim, TIM_IT_BREAK);
+ }
+
+ /* Disable the Main Output */
+ __HAL_TIM_MOE_DISABLE(htim);
+
+ /* Disable the Peripheral */
+ __HAL_TIM_DISABLE(htim);
+
+ /* Set the TIM complementary channel state */
+ TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY);
}
- /* Disable the Main Output */
- __HAL_TIM_MOE_DISABLE(htim);
-
- /* Disable the Peripheral */
- __HAL_TIM_DISABLE(htim);
-
- /* Set the TIM complementary channel state */
- TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY);
-
/* Return function status */
- return HAL_OK;
+ return status;
}
/**
@@ -1320,6 +1352,7 @@
HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, const uint32_t *pData,
uint16_t Length)
{
+ HAL_StatusTypeDef status = HAL_OK;
uint32_t tmpsmcr;
/* Check the parameters */
@@ -1332,7 +1365,7 @@
}
else if (TIM_CHANNEL_N_STATE_GET(htim, Channel) == HAL_TIM_CHANNEL_STATE_READY)
{
- if ((pData == NULL) && (Length > 0U))
+ if ((pData == NULL) || (Length == 0U))
{
return HAL_ERROR;
}
@@ -1359,7 +1392,7 @@
/* Enable the DMA stream */
if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)pData, (uint32_t)&htim->Instance->CCR1,
- Length) != HAL_OK)
+ Length) != HAL_OK)
{
/* Return error status */
return HAL_ERROR;
@@ -1380,7 +1413,7 @@
/* Enable the DMA stream */
if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)pData, (uint32_t)&htim->Instance->CCR2,
- Length) != HAL_OK)
+ Length) != HAL_OK)
{
/* Return error status */
return HAL_ERROR;
@@ -1401,7 +1434,7 @@
/* Enable the DMA stream */
if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)pData, (uint32_t)&htim->Instance->CCR3,
- Length) != HAL_OK)
+ Length) != HAL_OK)
{
/* Return error status */
return HAL_ERROR;
@@ -1412,31 +1445,35 @@
}
default:
+ status = HAL_ERROR;
break;
}
- /* Enable the complementary PWM output */
- TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);
-
- /* Enable the Main Output */
- __HAL_TIM_MOE_ENABLE(htim);
-
- /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
- if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
+ if (status == HAL_OK)
{
- tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
- if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
+ /* Enable the complementary PWM output */
+ TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);
+
+ /* Enable the Main Output */
+ __HAL_TIM_MOE_ENABLE(htim);
+
+ /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
+ if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
+ {
+ tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
+ if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
+ {
+ __HAL_TIM_ENABLE(htim);
+ }
+ }
+ else
{
__HAL_TIM_ENABLE(htim);
}
}
- else
- {
- __HAL_TIM_ENABLE(htim);
- }
/* Return function status */
- return HAL_OK;
+ return status;
}
/**
@@ -1452,6 +1489,8 @@
*/
HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel)
{
+ HAL_StatusTypeDef status = HAL_OK;
+
/* Check the parameters */
assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
@@ -1482,23 +1521,27 @@
}
default:
+ status = HAL_ERROR;
break;
}
- /* Disable the complementary PWM output */
- TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);
+ if (status == HAL_OK)
+ {
+ /* Disable the complementary PWM output */
+ TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);
- /* Disable the Main Output */
- __HAL_TIM_MOE_DISABLE(htim);
+ /* Disable the Main Output */
+ __HAL_TIM_MOE_DISABLE(htim);
- /* Disable the Peripheral */
- __HAL_TIM_DISABLE(htim);
+ /* Disable the Peripheral */
+ __HAL_TIM_DISABLE(htim);
- /* Set the TIM complementary channel state */
- TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY);
+ /* Set the TIM complementary channel state */
+ TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY);
+ }
/* Return function status */
- return HAL_OK;
+ return status;
}
/**
@@ -2044,11 +2087,12 @@
*/
HAL_StatusTypeDef HAL_TIMEx_RemapConfig(TIM_HandleTypeDef *htim, uint32_t Remap)
{
- __HAL_LOCK(htim);
/* Check parameters */
assert_param(IS_TIM_REMAP(htim->Instance, Remap));
+ __HAL_LOCK(htim);
+
/* Set the Timer remapping configuration */
WRITE_REG(htim->Instance->OR, Remap);
@@ -2179,7 +2223,7 @@
*/
/* Private functions ---------------------------------------------------------*/
-/** @defgroup TIMEx_Private_Functions TIMEx Private Functions
+/** @defgroup TIMEx_Private_Functions TIM Extended Private Functions
* @{
*/
diff --git a/Src/stm32f2xx_hal_timebase_rtc_alarm_template.c b/Src/stm32f2xx_hal_timebase_rtc_alarm_template.c
index 41c58a6..8d30719 100644
--- a/Src/stm32f2xx_hal_timebase_rtc_alarm_template.c
+++ b/Src/stm32f2xx_hal_timebase_rtc_alarm_template.c
@@ -10,7 +10,7 @@
* RTC clock source (HSE, LSE or LSI)
* + The alarm is configured to assert an interrupt when the RTC reaches 1ms
* + HAL_IncTick is called at each Alarm event and the time is reset to 00:00:00
- * + HSE (default), LSE or LSI can be selected as RTC clock source
+ * + HSE (default), LSE or LSI can be selected as RTC clock source
*
******************************************************************************
* @attention
@@ -331,3 +331,5 @@
/**
* @}
*/
+
+
diff --git a/Src/stm32f2xx_hal_timebase_rtc_wakeup_template.c b/Src/stm32f2xx_hal_timebase_rtc_wakeup_template.c
index b7bfa1b..8ccc1b3 100644
--- a/Src/stm32f2xx_hal_timebase_rtc_wakeup_template.c
+++ b/Src/stm32f2xx_hal_timebase_rtc_wakeup_template.c
@@ -23,7 +23,7 @@
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
- @verbatim
+ @verbatim
==============================================================================
##### How to use this driver #####
==============================================================================
@@ -301,3 +301,5 @@
/**
* @}
*/
+
+
diff --git a/Src/stm32f2xx_hal_timebase_tim_template.c b/Src/stm32f2xx_hal_timebase_tim_template.c
index 86b3bb8..1394038 100644
--- a/Src/stm32f2xx_hal_timebase_tim_template.c
+++ b/Src/stm32f2xx_hal_timebase_tim_template.c
@@ -177,3 +177,5 @@
/**
* @}
*/
+
+
diff --git a/Src/stm32f2xx_hal_uart.c b/Src/stm32f2xx_hal_uart.c
index 53649fa..0e117a5 100644
--- a/Src/stm32f2xx_hal_uart.c
+++ b/Src/stm32f2xx_hal_uart.c
@@ -84,8 +84,8 @@
allows the user to configure dynamically the driver callbacks.
[..]
- Use Function @ref HAL_UART_RegisterCallback() to register a user callback.
- Function @ref HAL_UART_RegisterCallback() allows to register following callbacks:
+ Use Function HAL_UART_RegisterCallback() to register a user callback.
+ Function HAL_UART_RegisterCallback() allows to register following callbacks:
(+) TxHalfCpltCallback : Tx Half Complete Callback.
(+) TxCpltCallback : Tx Complete Callback.
(+) RxHalfCpltCallback : Rx Half Complete Callback.
@@ -100,9 +100,9 @@
and a pointer to the user callback function.
[..]
- Use function @ref HAL_UART_UnRegisterCallback() to reset a callback to the default
+ Use function HAL_UART_UnRegisterCallback() to reset a callback to the default
weak (surcharged) function.
- @ref HAL_UART_UnRegisterCallback() takes as parameters the HAL peripheral handle,
+ HAL_UART_UnRegisterCallback() takes as parameters the HAL peripheral handle,
and the Callback ID.
This function allows to reset following callbacks:
(+) TxHalfCpltCallback : Tx Half Complete Callback.
@@ -118,16 +118,16 @@
[..]
For specific callback RxEventCallback, use dedicated registration/reset functions:
- respectively @ref HAL_UART_RegisterRxEventCallback() , @ref HAL_UART_UnRegisterRxEventCallback().
+ respectively HAL_UART_RegisterRxEventCallback() , HAL_UART_UnRegisterRxEventCallback().
[..]
- By default, after the @ref HAL_UART_Init() and when the state is HAL_UART_STATE_RESET
+ By default, after the HAL_UART_Init() and when the state is HAL_UART_STATE_RESET
all callbacks are set to the corresponding weak (surcharged) functions:
- examples @ref HAL_UART_TxCpltCallback(), @ref HAL_UART_RxHalfCpltCallback().
+ examples HAL_UART_TxCpltCallback(), HAL_UART_RxHalfCpltCallback().
Exception done for MspInit and MspDeInit functions that are respectively
- reset to the legacy weak (surcharged) functions in the @ref HAL_UART_Init()
- and @ref HAL_UART_DeInit() only when these callbacks are null (not registered beforehand).
- If not, MspInit or MspDeInit are not null, the @ref HAL_UART_Init() and @ref HAL_UART_DeInit()
+ reset to the legacy weak (surcharged) functions in the HAL_UART_Init()
+ and HAL_UART_DeInit() only when these callbacks are null (not registered beforehand).
+ If not, MspInit or MspDeInit are not null, the HAL_UART_Init() and HAL_UART_DeInit()
keep and use the user MspInit/MspDeInit callbacks (registered beforehand).
[..]
@@ -136,8 +136,8 @@
in HAL_UART_STATE_READY or HAL_UART_STATE_RESET state, thus registered (user)
MspInit/DeInit callbacks can be used during the Init/DeInit.
In that case first register the MspInit/MspDeInit user callbacks
- using @ref HAL_UART_RegisterCallback() before calling @ref HAL_UART_DeInit()
- or @ref HAL_UART_Init() function.
+ using HAL_UART_RegisterCallback() before calling HAL_UART_DeInit()
+ or HAL_UART_Init() function.
[..]
When The compilation define USE_HAL_UART_REGISTER_CALLBACKS is set to 0 or
@@ -734,6 +734,8 @@
/**
* @brief Register a User UART Callback
* To be used instead of the weak predefined callback
+ * @note The HAL_UART_RegisterCallback() may be called before HAL_UART_Init(), HAL_HalfDuplex_Init(), HAL_LIN_Init(),
+ * HAL_MultiProcessor_Init() to register callbacks for HAL_UART_MSPINIT_CB_ID and HAL_UART_MSPDEINIT_CB_ID
* @param huart uart handle
* @param CallbackID ID of the callback to be registered
* This parameter can be one of the following values:
@@ -762,8 +764,6 @@
return HAL_ERROR;
}
- /* Process locked */
- __HAL_LOCK(huart);
if (huart->gState == HAL_UART_STATE_READY)
{
@@ -848,15 +848,15 @@
status = HAL_ERROR;
}
- /* Release Lock */
- __HAL_UNLOCK(huart);
-
return status;
}
/**
* @brief Unregister an UART Callback
* UART callaback is redirected to the weak predefined callback
+ * @note The HAL_UART_UnRegisterCallback() may be called before HAL_UART_Init(), HAL_HalfDuplex_Init(),
+ * HAL_LIN_Init(), HAL_MultiProcessor_Init() to un-register callbacks for HAL_UART_MSPINIT_CB_ID
+ * and HAL_UART_MSPDEINIT_CB_ID
* @param huart uart handle
* @param CallbackID ID of the callback to be unregistered
* This parameter can be one of the following values:
@@ -876,9 +876,6 @@
{
HAL_StatusTypeDef status = HAL_OK;
- /* Process locked */
- __HAL_LOCK(huart);
-
if (HAL_UART_STATE_READY == huart->gState)
{
switch (CallbackID)
@@ -962,9 +959,6 @@
status = HAL_ERROR;
}
- /* Release Lock */
- __HAL_UNLOCK(huart);
-
return status;
}
@@ -1309,7 +1303,7 @@
return HAL_ERROR;
}
- huart->pTxBuffPtr = (uint8_t *) pData;
+ huart->pTxBuffPtr = pData;
huart->TxXferSize = Size;
huart->TxXferCount = Size;
@@ -1372,7 +1366,7 @@
*/
HAL_StatusTypeDef HAL_UART_Transmit_DMA(UART_HandleTypeDef *huart, const uint8_t *pData, uint16_t Size)
{
- uint32_t *tmp;
+ const uint32_t *tmp;
/* Check that a Tx process is not already ongoing */
if (huart->gState == HAL_UART_STATE_READY)
@@ -1382,7 +1376,7 @@
return HAL_ERROR;
}
- huart->pTxBuffPtr = (uint8_t *) pData;
+ huart->pTxBuffPtr = pData;
huart->TxXferSize = Size;
huart->TxXferCount = Size;
@@ -1402,8 +1396,8 @@
huart->hdmatx->XferAbortCallback = NULL;
/* Enable the UART transmit DMA stream */
- tmp = (uint32_t *)&pData;
- HAL_DMA_Start_IT(huart->hdmatx, *(uint32_t *)tmp, (uint32_t)&huart->Instance->DR, Size);
+ tmp = (const uint32_t *)&pData;
+ HAL_DMA_Start_IT(huart->hdmatx, *(const uint32_t *)tmp, (uint32_t)&huart->Instance->DR, Size);
/* Clear the TC flag in the SR register by writing 0 to it */
__HAL_UART_CLEAR_FLAG(huart, UART_FLAG_TC);
@@ -3510,14 +3504,14 @@
*/
static HAL_StatusTypeDef UART_Transmit_IT(UART_HandleTypeDef *huart)
{
- uint16_t *tmp;
+ const uint16_t *tmp;
/* Check that a Tx process is ongoing */
if (huart->gState == HAL_UART_STATE_BUSY_TX)
{
if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE))
{
- tmp = (uint16_t *) huart->pTxBuffPtr;
+ tmp = (const uint16_t *) huart->pTxBuffPtr;
huart->Instance->DR = (uint16_t)(*tmp & (uint16_t)0x01FF);
huart->pTxBuffPtr += 2U;
}
@@ -3739,3 +3733,4 @@
/**
* @}
*/
+
diff --git a/Src/stm32f2xx_hal_usart.c b/Src/stm32f2xx_hal_usart.c
index 38dc5db..dcc8ea9 100644
--- a/Src/stm32f2xx_hal_usart.c
+++ b/Src/stm32f2xx_hal_usart.c
@@ -193,7 +193,6 @@
|---------|-----------|---------------------------------------|
| 1 | 1 | | SB | 8 bit data | PB | STB | |
+-------------------------------------------------------------+
-
******************************************************************************
*/
@@ -424,6 +423,8 @@
/**
* @brief Register a User USART Callback
* To be used instead of the weak predefined callback
+ * @note The HAL_USART_RegisterCallback() may be called before HAL_USART_Init() in HAL_USART_STATE_RESET
+ * to register callbacks for HAL_USART_MSPINIT_CB_ID and HAL_USART_MSPDEINIT_CB_ID
* @param husart usart handle
* @param CallbackID ID of the callback to be registered
* This parameter can be one of the following values:
@@ -451,8 +452,6 @@
return HAL_ERROR;
}
- /* Process locked */
- __HAL_LOCK(husart);
if (husart->State == HAL_USART_STATE_READY)
{
@@ -533,15 +532,14 @@
status = HAL_ERROR;
}
- /* Release Lock */
- __HAL_UNLOCK(husart);
-
return status;
}
/**
* @brief Unregister an USART Callback
* USART callaback is redirected to the weak predefined callback
+ * @note The HAL_USART_UnRegisterCallback() may be called before HAL_USART_Init() in HAL_USART_STATE_RESET
+ * to un-register callbacks for HAL_USART_MSPINIT_CB_ID and HAL_USART_MSPDEINIT_CB_ID
* @param husart usart handle
* @param CallbackID ID of the callback to be unregistered
* This parameter can be one of the following values:
@@ -560,9 +558,6 @@
{
HAL_StatusTypeDef status = HAL_OK;
- /* Process locked */
- __HAL_LOCK(husart);
-
if (husart->State == HAL_USART_STATE_READY)
{
switch (CallbackID)
@@ -642,9 +637,6 @@
status = HAL_ERROR;
}
- /* Release Lock */
- __HAL_UNLOCK(husart);
-
return status;
}
#endif /* USE_HAL_USART_REGISTER_CALLBACKS */
@@ -2818,3 +2810,4 @@
/**
* @}
*/
+
diff --git a/Src/stm32f2xx_hal_wwdg.c b/Src/stm32f2xx_hal_wwdg.c
index 99f25cf..9cc9b12 100644
--- a/Src/stm32f2xx_hal_wwdg.c
+++ b/Src/stm32f2xx_hal_wwdg.c
@@ -7,7 +7,6 @@
* functionalities of the Window Watchdog (WWDG) peripheral:
* + Initialization and Configuration functions
* + IO operation functions
- *
******************************************************************************
* @attention
*
@@ -52,7 +51,7 @@
(++) max time (mS) = 1000 * (Counter - 0x40) / WWDG clock
(+) Typical values:
(++) Counter min (T[5;0] = 0x00) at 30MHz (PCLK1) with zero prescaler:
- max timeout before reset: approximately 136.53µs
+ max timeout before reset: approximately 136.53us
(++) Counter max (T[5;0] = 0x3F) at 30MHz (PCLK1) with prescaler
dividing by 8:
max timeout before reset: approximately 69.91ms
@@ -67,7 +66,7 @@
(+) Enable WWDG APB1 clock using __HAL_RCC_WWDG_CLK_ENABLE().
(+) Configure the WWDG prescaler, refresh window value, counter value and early
interrupt status using HAL_WWDG_Init() function. This will automatically
- enable WWDG and start its downcounter. Time reference can be taken from
+ enable WWDG and start its downcounter. Time reference can be taken from
function exit. Care must be taken to provide a counter value
greater than 0x40 to prevent generation of immediate reset.
(+) If the Early Wakeup Interrupt (EWI) feature is enabled, an interrupt is
diff --git a/Src/stm32f2xx_ll_adc.c b/Src/stm32f2xx_ll_adc.c
index b933d6b..4d153fb 100644
--- a/Src/stm32f2xx_ll_adc.c
+++ b/Src/stm32f2xx_ll_adc.c
@@ -929,3 +929,4 @@
*/
#endif /* USE_FULL_LL_DRIVER */
+
diff --git a/Src/stm32f2xx_ll_crc.c b/Src/stm32f2xx_ll_crc.c
index e850de7..7089260 100644
--- a/Src/stm32f2xx_ll_crc.c
+++ b/Src/stm32f2xx_ll_crc.c
@@ -25,7 +25,7 @@
#include "stm32_assert.h"
#else
#define assert_param(expr) ((void)0U)
-#endif/* USE_FULL_ASSERT */
+#endif /* USE_FULL_ASSERT */
/** @addtogroup STM32F2xx_LL_Driver
* @{
@@ -59,7 +59,7 @@
* - SUCCESS: CRC registers are de-initialized
* - ERROR: CRC registers are not de-initialized
*/
-ErrorStatus LL_CRC_DeInit(CRC_TypeDef *CRCx)
+ErrorStatus LL_CRC_DeInit(const CRC_TypeDef *CRCx)
{
ErrorStatus status = SUCCESS;
diff --git a/Src/stm32f2xx_ll_dac.c b/Src/stm32f2xx_ll_dac.c
index dda19e9..f6eab4f 100644
--- a/Src/stm32f2xx_ll_dac.c
+++ b/Src/stm32f2xx_ll_dac.c
@@ -46,12 +46,12 @@
* @{
*/
#define IS_LL_DAC_CHANNEL(__DAC_CHANNEL__) \
- ( ((__DAC_CHANNEL__) == LL_DAC_CHANNEL_1) \
- || ((__DAC_CHANNEL__) == LL_DAC_CHANNEL_2) \
+ (((__DAC_CHANNEL__) == LL_DAC_CHANNEL_1) \
+ || ((__DAC_CHANNEL__) == LL_DAC_CHANNEL_2) \
)
#define IS_LL_DAC_TRIGGER_SOURCE(__TRIGGER_SOURCE__) \
- ( ((__TRIGGER_SOURCE__) == LL_DAC_TRIG_SOFTWARE) \
+ (((__TRIGGER_SOURCE__) == LL_DAC_TRIG_SOFTWARE) \
|| ((__TRIGGER_SOURCE__) == LL_DAC_TRIG_EXT_TIM2_TRGO) \
|| ((__TRIGGER_SOURCE__) == LL_DAC_TRIG_EXT_TIM4_TRGO) \
|| ((__TRIGGER_SOURCE__) == LL_DAC_TRIG_EXT_TIM5_TRGO) \
@@ -62,45 +62,45 @@
)
#define IS_LL_DAC_WAVE_AUTO_GENER_MODE(__WAVE_AUTO_GENERATION_MODE__) \
- ( ((__WAVE_AUTO_GENERATION_MODE__) == LL_DAC_WAVE_AUTO_GENERATION_NONE) \
- || ((__WAVE_AUTO_GENERATION_MODE__) == LL_DAC_WAVE_AUTO_GENERATION_NOISE) \
- || ((__WAVE_AUTO_GENERATION_MODE__) == LL_DAC_WAVE_AUTO_GENERATION_TRIANGLE) \
+ (((__WAVE_AUTO_GENERATION_MODE__) == LL_DAC_WAVE_AUTO_GENERATION_NONE) \
+ || ((__WAVE_AUTO_GENERATION_MODE__) == LL_DAC_WAVE_AUTO_GENERATION_NOISE) \
+ || ((__WAVE_AUTO_GENERATION_MODE__) == LL_DAC_WAVE_AUTO_GENERATION_TRIANGLE) \
)
#define IS_LL_DAC_WAVE_AUTO_GENER_CONFIG(__WAVE_AUTO_GENERATION_MODE__, __WAVE_AUTO_GENERATION_CONFIG__) \
( (((__WAVE_AUTO_GENERATION_MODE__) == LL_DAC_WAVE_AUTO_GENERATION_NOISE) \
- && ( ((__WAVE_AUTO_GENERATION_CONFIG__) == LL_DAC_NOISE_LFSR_UNMASK_BIT0) \
- || ((__WAVE_AUTO_GENERATION_CONFIG__) == LL_DAC_NOISE_LFSR_UNMASK_BITS1_0) \
- || ((__WAVE_AUTO_GENERATION_CONFIG__) == LL_DAC_NOISE_LFSR_UNMASK_BITS2_0) \
- || ((__WAVE_AUTO_GENERATION_CONFIG__) == LL_DAC_NOISE_LFSR_UNMASK_BITS3_0) \
- || ((__WAVE_AUTO_GENERATION_CONFIG__) == LL_DAC_NOISE_LFSR_UNMASK_BITS4_0) \
- || ((__WAVE_AUTO_GENERATION_CONFIG__) == LL_DAC_NOISE_LFSR_UNMASK_BITS5_0) \
- || ((__WAVE_AUTO_GENERATION_CONFIG__) == LL_DAC_NOISE_LFSR_UNMASK_BITS6_0) \
- || ((__WAVE_AUTO_GENERATION_CONFIG__) == LL_DAC_NOISE_LFSR_UNMASK_BITS7_0) \
- || ((__WAVE_AUTO_GENERATION_CONFIG__) == LL_DAC_NOISE_LFSR_UNMASK_BITS8_0) \
- || ((__WAVE_AUTO_GENERATION_CONFIG__) == LL_DAC_NOISE_LFSR_UNMASK_BITS9_0) \
- || ((__WAVE_AUTO_GENERATION_CONFIG__) == LL_DAC_NOISE_LFSR_UNMASK_BITS10_0) \
- || ((__WAVE_AUTO_GENERATION_CONFIG__) == LL_DAC_NOISE_LFSR_UNMASK_BITS11_0)) \
+ && (((__WAVE_AUTO_GENERATION_CONFIG__) == LL_DAC_NOISE_LFSR_UNMASK_BIT0) \
+ || ((__WAVE_AUTO_GENERATION_CONFIG__) == LL_DAC_NOISE_LFSR_UNMASK_BITS1_0) \
+ || ((__WAVE_AUTO_GENERATION_CONFIG__) == LL_DAC_NOISE_LFSR_UNMASK_BITS2_0) \
+ || ((__WAVE_AUTO_GENERATION_CONFIG__) == LL_DAC_NOISE_LFSR_UNMASK_BITS3_0) \
+ || ((__WAVE_AUTO_GENERATION_CONFIG__) == LL_DAC_NOISE_LFSR_UNMASK_BITS4_0) \
+ || ((__WAVE_AUTO_GENERATION_CONFIG__) == LL_DAC_NOISE_LFSR_UNMASK_BITS5_0) \
+ || ((__WAVE_AUTO_GENERATION_CONFIG__) == LL_DAC_NOISE_LFSR_UNMASK_BITS6_0) \
+ || ((__WAVE_AUTO_GENERATION_CONFIG__) == LL_DAC_NOISE_LFSR_UNMASK_BITS7_0) \
+ || ((__WAVE_AUTO_GENERATION_CONFIG__) == LL_DAC_NOISE_LFSR_UNMASK_BITS8_0) \
+ || ((__WAVE_AUTO_GENERATION_CONFIG__) == LL_DAC_NOISE_LFSR_UNMASK_BITS9_0) \
+ || ((__WAVE_AUTO_GENERATION_CONFIG__) == LL_DAC_NOISE_LFSR_UNMASK_BITS10_0) \
+ || ((__WAVE_AUTO_GENERATION_CONFIG__) == LL_DAC_NOISE_LFSR_UNMASK_BITS11_0)) \
) \
||(((__WAVE_AUTO_GENERATION_MODE__) == LL_DAC_WAVE_AUTO_GENERATION_TRIANGLE) \
- && ( ((__WAVE_AUTO_GENERATION_CONFIG__) == LL_DAC_TRIANGLE_AMPLITUDE_1) \
- || ((__WAVE_AUTO_GENERATION_CONFIG__) == LL_DAC_TRIANGLE_AMPLITUDE_3) \
- || ((__WAVE_AUTO_GENERATION_CONFIG__) == LL_DAC_TRIANGLE_AMPLITUDE_7) \
- || ((__WAVE_AUTO_GENERATION_CONFIG__) == LL_DAC_TRIANGLE_AMPLITUDE_15) \
- || ((__WAVE_AUTO_GENERATION_CONFIG__) == LL_DAC_TRIANGLE_AMPLITUDE_31) \
- || ((__WAVE_AUTO_GENERATION_CONFIG__) == LL_DAC_TRIANGLE_AMPLITUDE_63) \
- || ((__WAVE_AUTO_GENERATION_CONFIG__) == LL_DAC_TRIANGLE_AMPLITUDE_127) \
- || ((__WAVE_AUTO_GENERATION_CONFIG__) == LL_DAC_TRIANGLE_AMPLITUDE_255) \
- || ((__WAVE_AUTO_GENERATION_CONFIG__) == LL_DAC_TRIANGLE_AMPLITUDE_511) \
- || ((__WAVE_AUTO_GENERATION_CONFIG__) == LL_DAC_TRIANGLE_AMPLITUDE_1023) \
- || ((__WAVE_AUTO_GENERATION_CONFIG__) == LL_DAC_TRIANGLE_AMPLITUDE_2047) \
- || ((__WAVE_AUTO_GENERATION_CONFIG__) == LL_DAC_TRIANGLE_AMPLITUDE_4095)) \
+ && (((__WAVE_AUTO_GENERATION_CONFIG__) == LL_DAC_TRIANGLE_AMPLITUDE_1) \
+ || ((__WAVE_AUTO_GENERATION_CONFIG__) == LL_DAC_TRIANGLE_AMPLITUDE_3) \
+ || ((__WAVE_AUTO_GENERATION_CONFIG__) == LL_DAC_TRIANGLE_AMPLITUDE_7) \
+ || ((__WAVE_AUTO_GENERATION_CONFIG__) == LL_DAC_TRIANGLE_AMPLITUDE_15) \
+ || ((__WAVE_AUTO_GENERATION_CONFIG__) == LL_DAC_TRIANGLE_AMPLITUDE_31) \
+ || ((__WAVE_AUTO_GENERATION_CONFIG__) == LL_DAC_TRIANGLE_AMPLITUDE_63) \
+ || ((__WAVE_AUTO_GENERATION_CONFIG__) == LL_DAC_TRIANGLE_AMPLITUDE_127) \
+ || ((__WAVE_AUTO_GENERATION_CONFIG__) == LL_DAC_TRIANGLE_AMPLITUDE_255) \
+ || ((__WAVE_AUTO_GENERATION_CONFIG__) == LL_DAC_TRIANGLE_AMPLITUDE_511) \
+ || ((__WAVE_AUTO_GENERATION_CONFIG__) == LL_DAC_TRIANGLE_AMPLITUDE_1023) \
+ || ((__WAVE_AUTO_GENERATION_CONFIG__) == LL_DAC_TRIANGLE_AMPLITUDE_2047) \
+ || ((__WAVE_AUTO_GENERATION_CONFIG__) == LL_DAC_TRIANGLE_AMPLITUDE_4095)) \
) \
)
#define IS_LL_DAC_OUTPUT_BUFFER(__OUTPUT_BUFFER__) \
- ( ((__OUTPUT_BUFFER__) == LL_DAC_OUTPUT_BUFFER_ENABLE) \
- || ((__OUTPUT_BUFFER__) == LL_DAC_OUTPUT_BUFFER_DISABLE) \
+ (((__OUTPUT_BUFFER__) == LL_DAC_OUTPUT_BUFFER_ENABLE) \
+ || ((__OUTPUT_BUFFER__) == LL_DAC_OUTPUT_BUFFER_DISABLE) \
)
/**
@@ -127,7 +127,7 @@
* - SUCCESS: DAC registers are de-initialized
* - ERROR: not applicable
*/
-ErrorStatus LL_DAC_DeInit(DAC_TypeDef *DACx)
+ErrorStatus LL_DAC_DeInit(const DAC_TypeDef *DACx)
{
/* Check the parameters */
assert_param(IS_DAC_ALL_INSTANCE(DACx));
@@ -166,7 +166,7 @@
* - SUCCESS: DAC registers are initialized
* - ERROR: DAC registers are not initialized
*/
-ErrorStatus LL_DAC_Init(DAC_TypeDef *DACx, uint32_t DAC_Channel, LL_DAC_InitTypeDef *DAC_InitStruct)
+ErrorStatus LL_DAC_Init(DAC_TypeDef *DACx, uint32_t DAC_Channel, const LL_DAC_InitTypeDef *DAC_InitStruct)
{
ErrorStatus status = SUCCESS;
diff --git a/Src/stm32f2xx_ll_dma.c b/Src/stm32f2xx_ll_dma.c
index 34c7c77..e4431ee 100644
--- a/Src/stm32f2xx_ll_dma.c
+++ b/Src/stm32f2xx_ll_dma.c
@@ -9,8 +9,8 @@
* Copyright (c) 2016 STMicroelectronics.
* All rights reserved.
*
- * This software is licensed under terms that can be found in the LICENSE file
- * in the root directory of this software component.
+ * This software is licensed under terms that can be found in the LICENSE file in
+ * the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
@@ -422,3 +422,4 @@
*/
#endif /* USE_FULL_LL_DRIVER */
+
diff --git a/Src/stm32f2xx_ll_exti.c b/Src/stm32f2xx_ll_exti.c
index af9bf30..1aacd4a 100644
--- a/Src/stm32f2xx_ll_exti.c
+++ b/Src/stm32f2xx_ll_exti.c
@@ -210,3 +210,4 @@
*/
#endif /* USE_FULL_LL_DRIVER */
+
diff --git a/Src/stm32f2xx_ll_fsmc.c b/Src/stm32f2xx_ll_fsmc.c
index 2c49272..d4f52dc 100644
--- a/Src/stm32f2xx_ll_fsmc.c
+++ b/Src/stm32f2xx_ll_fsmc.c
@@ -10,6 +10,17 @@
* + Peripheral Control functions
* + Peripheral State functions
*
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2016 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
@verbatim
==============================================================================
##### FSMC peripheral features #####
@@ -40,16 +51,6 @@
@endverbatim
******************************************************************************
- * @attention
- *
- * Copyright (c) 2016 STMicroelectronics.
- * All rights reserved.
- *
- * This software is licensed under terms that can be found in the LICENSE file
- * in the root directory of this software component.
- * If no LICENSE file comes with this software, it is provided AS-IS.
- *
- ******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
@@ -58,7 +59,8 @@
/** @addtogroup STM32F2xx_HAL_Driver
* @{
*/
-#if defined(HAL_NOR_MODULE_ENABLED) || defined(HAL_SRAM_MODULE_ENABLED) || defined(HAL_NAND_MODULE_ENABLED) || defined(HAL_PCCARD_MODULE_ENABLED)
+#if defined(HAL_NOR_MODULE_ENABLED) || defined(HAL_NAND_MODULE_ENABLED) || defined(HAL_PCCARD_MODULE_ENABLED) \
+ || defined(HAL_SRAM_MODULE_ENABLED)
/** @defgroup FSMC_LL FSMC Low Layer
* @brief FSMC driver modules
diff --git a/Src/stm32f2xx_ll_gpio.c b/Src/stm32f2xx_ll_gpio.c
index 69d1409..e152426 100644
--- a/Src/stm32f2xx_ll_gpio.c
+++ b/Src/stm32f2xx_ll_gpio.c
@@ -301,3 +301,4 @@
*/
#endif /* USE_FULL_LL_DRIVER */
+
diff --git a/Src/stm32f2xx_ll_i2c.c b/Src/stm32f2xx_ll_i2c.c
index c9eefc8..03148a6 100644
--- a/Src/stm32f2xx_ll_i2c.c
+++ b/Src/stm32f2xx_ll_i2c.c
@@ -222,3 +222,4 @@
*/
#endif /* USE_FULL_LL_DRIVER */
+
diff --git a/Src/stm32f2xx_ll_rcc.c b/Src/stm32f2xx_ll_rcc.c
index b93a8a8..4718b6b 100644
--- a/Src/stm32f2xx_ll_rcc.c
+++ b/Src/stm32f2xx_ll_rcc.c
@@ -9,10 +9,9 @@
* Copyright (c) 2017 STMicroelectronics.
* All rights reserved.
*
- * This software is licensed under terms that can be found in the LICENSE file
- * in the root directory of this software component.
+ * This software is licensed under terms that can be found in the LICENSE file in
+ * the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
- *
******************************************************************************
*/
@@ -401,3 +400,4 @@
*/
#endif /* USE_FULL_LL_DRIVER */
+
diff --git a/Src/stm32f2xx_ll_rng.c b/Src/stm32f2xx_ll_rng.c
index 3328a32..84e6dd5 100644
--- a/Src/stm32f2xx_ll_rng.c
+++ b/Src/stm32f2xx_ll_rng.c
@@ -59,16 +59,26 @@
* - SUCCESS: RNG registers are de-initialized
* - ERROR: not applicable
*/
-ErrorStatus LL_RNG_DeInit(RNG_TypeDef *RNGx)
+ErrorStatus LL_RNG_DeInit(const RNG_TypeDef *RNGx)
{
+ ErrorStatus status = SUCCESS;
+
/* Check the parameters */
assert_param(IS_RNG_ALL_INSTANCE(RNGx));
- /* Enable RNG reset state */
- LL_AHB2_GRP1_ForceReset(LL_AHB2_GRP1_PERIPH_RNG);
+ if (RNGx == RNG)
+ {
+ /* Enable RNG reset state */
+ LL_AHB2_GRP1_ForceReset(LL_AHB2_GRP1_PERIPH_RNG);
- /* Release RNG from reset state */
- LL_AHB2_GRP1_ReleaseReset(LL_AHB2_GRP1_PERIPH_RNG);
- return (SUCCESS);
+ /* Release RNG from reset state */
+ LL_AHB2_GRP1_ReleaseReset(LL_AHB2_GRP1_PERIPH_RNG);
+ }
+ else
+ {
+ status = ERROR;
+ }
+
+ return status;
}
/**
@@ -90,3 +100,4 @@
*/
#endif /* USE_FULL_LL_DRIVER */
+
diff --git a/Src/stm32f2xx_ll_rtc.c b/Src/stm32f2xx_ll_rtc.c
index 595ffaf..a25cd5c 100644
--- a/Src/stm32f2xx_ll_rtc.c
+++ b/Src/stm32f2xx_ll_rtc.c
@@ -15,7 +15,6 @@
*
******************************************************************************
*/
-
#if defined(USE_FULL_LL_DRIVER)
/* Includes ------------------------------------------------------------------*/
@@ -85,11 +84,11 @@
|| ((__VALUE__) == LL_RTC_WEEKDAY_SATURDAY) \
|| ((__VALUE__) == LL_RTC_WEEKDAY_SUNDAY))
-#define IS_LL_RTC_DAY(__DAY__) (((__DAY__) >= 1U) && ((__DAY__) <= 31U))
+#define IS_LL_RTC_DAY(__DAY__) (((__DAY__) >= 1U) && ((__DAY__) <= 31U))
#define IS_LL_RTC_MONTH(__MONTH__) (((__MONTH__) >= 1U) && ((__MONTH__) <= 12U))
-#define IS_LL_RTC_YEAR(__YEAR__) ((__YEAR__) <= 99U)
+#define IS_LL_RTC_YEAR(__YEAR__) ((__YEAR__) <= 99U)
#define IS_LL_RTC_ALMA_MASK(__VALUE__) (((__VALUE__) == LL_RTC_ALMA_MASK_NONE) \
|| ((__VALUE__) == LL_RTC_ALMA_MASK_DATEWEEKDAY) \
@@ -105,14 +104,12 @@
|| ((__VALUE__) == LL_RTC_ALMB_MASK_SECONDS) \
|| ((__VALUE__) == LL_RTC_ALMB_MASK_ALL))
-
#define IS_LL_RTC_ALMA_DATE_WEEKDAY_SEL(__SEL__) (((__SEL__) == LL_RTC_ALMA_DATEWEEKDAYSEL_DATE) || \
((__SEL__) == LL_RTC_ALMA_DATEWEEKDAYSEL_WEEKDAY))
#define IS_LL_RTC_ALMB_DATE_WEEKDAY_SEL(__SEL__) (((__SEL__) == LL_RTC_ALMB_DATEWEEKDAYSEL_DATE) || \
((__SEL__) == LL_RTC_ALMB_DATEWEEKDAYSEL_WEEKDAY))
-
/**
* @}
*/
@@ -128,7 +125,7 @@
/**
* @brief De-Initializes the RTC registers to their default reset values.
- * @note This function doesn't reset the RTC Clock source and RTC Backup Data
+ * @note This function does not reset the RTC Clock source and RTC Backup Data
* registers.
* @param RTCx RTC Instance
* @retval An ErrorStatus enumeration value:
@@ -150,17 +147,13 @@
{
/* Reset TR, DR and CR registers */
LL_RTC_WriteReg(RTCx, TR, 0x00000000U);
-#if defined(RTC_WAKEUP_SUPPORT)
LL_RTC_WriteReg(RTCx, WUTR, RTC_WUTR_WUT);
-#endif /* RTC_WAKEUP_SUPPORT */
- LL_RTC_WriteReg(RTCx, DR, (RTC_DR_WDU_0 | RTC_DR_MU_0 | RTC_DR_DU_0));
+ LL_RTC_WriteReg(RTCx, DR, (RTC_DR_WDU_0 | RTC_DR_MU_0 | RTC_DR_DU_0));
+
/* Reset All CR bits except CR[2:0] */
-#if defined(RTC_WAKEUP_SUPPORT)
LL_RTC_WriteReg(RTCx, CR, (LL_RTC_ReadReg(RTCx, CR) & RTC_CR_WUCKSEL));
-#else
- LL_RTC_WriteReg(RTCx, CR, 0x00000000U);
-#endif /* RTC_WAKEUP_SUPPORT */
- LL_RTC_WriteReg(RTCx, PRER, (RTC_PRER_PREDIV_A | RTC_SYNCH_PRESC_DEFAULT));
+
+ LL_RTC_WriteReg(RTCx, PRER, (RTC_PRER_PREDIV_A | RTC_SYNCH_PRESC_DEFAULT));
LL_RTC_WriteReg(RTCx, ALRMAR, 0x00000000U);
LL_RTC_WriteReg(RTCx, ALRMBR, 0x00000000U);
@@ -763,7 +756,7 @@
* synchronized with RTC APB clock.
* @note The RTC Resynchronization mode is write protected, use the
* @ref LL_RTC_DisableWriteProtection before calling this function.
- * @note To read the calendar through the shadow registers after Calendar
+ * @note To read the calendar through the shadow registers after calendar
* initialization, calendar update or after wakeup from low power modes
* the software must first clear the RSF flag.
* The software must then wait until it is set again before reading
@@ -788,7 +781,7 @@
/* Wait the registers to be synchronised */
tmp = LL_RTC_IsActiveFlag_RS(RTCx);
- while ((timeout != 0U) && (tmp != 0U))
+ while ((timeout != 0U) && (tmp != 1U))
{
if (LL_SYSTICK_IsActiveCounterFlag() == 1U)
{
@@ -801,24 +794,6 @@
}
}
- if (status != ERROR)
- {
- timeout = RTC_SYNCHRO_TIMEOUT;
- tmp = LL_RTC_IsActiveFlag_RS(RTCx);
- while ((timeout != 0U) && (tmp != 1U))
- {
- if (LL_SYSTICK_IsActiveCounterFlag() == 1U)
- {
- timeout--;
- }
- tmp = LL_RTC_IsActiveFlag_RS(RTCx);
- if (timeout == 0U)
- {
- status = ERROR;
- }
- }
- }
-
return (status);
}
diff --git a/Src/stm32f2xx_ll_sdmmc.c b/Src/stm32f2xx_ll_sdmmc.c
index 9bc1d30..3f5e34b 100644
--- a/Src/stm32f2xx_ll_sdmmc.c
+++ b/Src/stm32f2xx_ll_sdmmc.c
@@ -11,6 +11,17 @@
* + Peripheral Control functions
* + Peripheral State functions
*
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2016 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
@verbatim
==============================================================================
##### SDMMC peripheral features #####
@@ -142,17 +153,7 @@
@endverbatim
******************************************************************************
- * @attention
- *
- * Copyright (c) 2018 STMicroelectronics.
- * All rights reserved.
- *
- * This software is licensed under terms that can be found in the LICENSE file
- * in the root directory of this software component.
- * If no LICENSE file comes with this software, it is provided AS-IS.
- *
- ******************************************************************************
- */
+ */
/* Includes ------------------------------------------------------------------*/
#include "stm32f2xx_hal.h"
@@ -305,10 +306,6 @@
/* Set power state to ON */
SDIOx->POWER = SDIO_POWER_PWRCTRL;
- /* 1ms: required power up waiting time before starting the SD initialization
- sequence */
- HAL_Delay(2);
-
return HAL_OK;
}
diff --git a/Src/stm32f2xx_ll_spi.c b/Src/stm32f2xx_ll_spi.c
index 97298fc..097ebf6 100644
--- a/Src/stm32f2xx_ll_spi.c
+++ b/Src/stm32f2xx_ll_spi.c
@@ -26,7 +26,7 @@
#include "stm32_assert.h"
#else
#define assert_param(expr) ((void)0U)
-#endif
+#endif /* USE_FULL_ASSERT */
/** @addtogroup STM32F2xx_LL_Driver
* @{
@@ -519,3 +519,4 @@
*/
#endif /* USE_FULL_LL_DRIVER */
+
diff --git a/Src/stm32f2xx_ll_tim.c b/Src/stm32f2xx_ll_tim.c
index 6afd028..4d067b3 100644
--- a/Src/stm32f2xx_ll_tim.c
+++ b/Src/stm32f2xx_ll_tim.c
@@ -165,7 +165,7 @@
* - SUCCESS: TIMx registers are de-initialized
* - ERROR: invalid TIMx instance
*/
-ErrorStatus LL_TIM_DeInit(TIM_TypeDef *TIMx)
+ErrorStatus LL_TIM_DeInit(const TIM_TypeDef *TIMx)
{
ErrorStatus result = SUCCESS;
@@ -183,91 +183,91 @@
LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_TIM2);
LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_TIM2);
}
-#endif
+#endif /* TIM2 */
#if defined(TIM3)
else if (TIMx == TIM3)
{
LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_TIM3);
LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_TIM3);
}
-#endif
+#endif /* TIM3 */
#if defined(TIM4)
else if (TIMx == TIM4)
{
LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_TIM4);
LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_TIM4);
}
-#endif
+#endif /* TIM4 */
#if defined(TIM5)
else if (TIMx == TIM5)
{
LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_TIM5);
LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_TIM5);
}
-#endif
+#endif /* TIM5 */
#if defined(TIM6)
else if (TIMx == TIM6)
{
LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_TIM6);
LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_TIM6);
}
-#endif
+#endif /* TIM6 */
#if defined (TIM7)
else if (TIMx == TIM7)
{
LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_TIM7);
LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_TIM7);
}
-#endif
+#endif /* TIM7 */
#if defined(TIM8)
else if (TIMx == TIM8)
{
LL_APB2_GRP1_ForceReset(LL_APB2_GRP1_PERIPH_TIM8);
LL_APB2_GRP1_ReleaseReset(LL_APB2_GRP1_PERIPH_TIM8);
}
-#endif
+#endif /* TIM8 */
#if defined(TIM9)
else if (TIMx == TIM9)
{
LL_APB2_GRP1_ForceReset(LL_APB2_GRP1_PERIPH_TIM9);
LL_APB2_GRP1_ReleaseReset(LL_APB2_GRP1_PERIPH_TIM9);
}
-#endif
+#endif /* TIM9 */
#if defined(TIM10)
else if (TIMx == TIM10)
{
LL_APB2_GRP1_ForceReset(LL_APB2_GRP1_PERIPH_TIM10);
LL_APB2_GRP1_ReleaseReset(LL_APB2_GRP1_PERIPH_TIM10);
}
-#endif
+#endif /* TIM10 */
#if defined(TIM11)
else if (TIMx == TIM11)
{
LL_APB2_GRP1_ForceReset(LL_APB2_GRP1_PERIPH_TIM11);
LL_APB2_GRP1_ReleaseReset(LL_APB2_GRP1_PERIPH_TIM11);
}
-#endif
+#endif /* TIM11 */
#if defined(TIM12)
else if (TIMx == TIM12)
{
LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_TIM12);
LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_TIM12);
}
-#endif
+#endif /* TIM12 */
#if defined(TIM13)
else if (TIMx == TIM13)
{
LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_TIM13);
LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_TIM13);
}
-#endif
+#endif /* TIM13 */
#if defined(TIM14)
else if (TIMx == TIM14)
{
LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_TIM14);
LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_TIM14);
}
-#endif
+#endif /* TIM14 */
else
{
result = ERROR;
@@ -711,7 +711,6 @@
MODIFY_REG(tmpbdtr, TIM_BDTR_BKE, TIM_BDTRInitStruct->BreakState);
MODIFY_REG(tmpbdtr, TIM_BDTR_BKP, TIM_BDTRInitStruct->BreakPolarity);
MODIFY_REG(tmpbdtr, TIM_BDTR_AOE, TIM_BDTRInitStruct->AutomaticOutput);
- MODIFY_REG(tmpbdtr, TIM_BDTR_MOE, TIM_BDTRInitStruct->AutomaticOutput);
/* Set TIMx_BDTR */
LL_TIM_WriteReg(TIMx, BDTR, tmpbdtr);
@@ -1186,3 +1185,4 @@
*/
#endif /* USE_FULL_LL_DRIVER */
+
diff --git a/Src/stm32f2xx_ll_usart.c b/Src/stm32f2xx_ll_usart.c
index af2ce9d..d1a4dc9 100644
--- a/Src/stm32f2xx_ll_usart.c
+++ b/Src/stm32f2xx_ll_usart.c
@@ -416,3 +416,5 @@
*/
#endif /* USE_FULL_LL_DRIVER */
+
+
diff --git a/Src/stm32f2xx_ll_usb.c b/Src/stm32f2xx_ll_usb.c
index 665d1de..fbf6f2e 100644
--- a/Src/stm32f2xx_ll_usb.c
+++ b/Src/stm32f2xx_ll_usb.c
@@ -11,18 +11,6 @@
* + Peripheral Control functions
* + Peripheral State functions
*
- @verbatim
- ==============================================================================
- ##### How to use this driver #####
- ==============================================================================
- [..]
- (#) Fill parameters of Init structure in USB_OTG_CfgTypeDef structure.
-
- (#) Call USB_CoreInit() API to initialize the USB Core peripheral.
-
- (#) The upper HAL HCD/PCD driver will call the right routines for its internal processes.
-
- @endverbatim
******************************************************************************
* @attention
*
@@ -34,6 +22,20 @@
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
+ @verbatim
+ ==============================================================================
+ ##### How to use this driver #####
+ ==============================================================================
+ [..]
+ (#) Fill parameters of Init structure in USB_CfgTypeDef structure.
+
+ (#) Call USB_CoreInit() API to initialize the USB Core peripheral.
+
+ (#) The upper HAL HCD/PCD driver will call the right routines for its internal processes.
+
+ @endverbatim
+
+ ******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
@@ -81,7 +83,6 @@
HAL_StatusTypeDef USB_CoreInit(USB_OTG_GlobalTypeDef *USBx, USB_OTG_CfgTypeDef cfg)
{
HAL_StatusTypeDef ret;
-
if (cfg.phy_itface == USB_OTG_ULPI_PHY)
{
USBx->GCCFG &= ~(USB_OTG_GCCFG_PWRDWN);
@@ -317,9 +318,6 @@
/* Restart the Phy Clock */
USBx_PCGCCTL = 0U;
- /* Device mode configuration */
- USBx_DEVICE->DCFG |= DCFG_FRAME_INTERVAL_80;
-
if (cfg.phy_itface == USB_OTG_ULPI_PHY)
{
if (cfg.speed == USBD_HS_SPEED)
@@ -433,7 +431,7 @@
}
/**
- * @brief USB_OTG_FlushTxFifo : Flush a Tx FIFO
+ * @brief USB_FlushTxFifo Flush a Tx FIFO
* @param USBx Selected device
* @param num FIFO number
* This parameter can be a value from 1 to 15
@@ -442,13 +440,28 @@
*/
HAL_StatusTypeDef USB_FlushTxFifo(USB_OTG_GlobalTypeDef *USBx, uint32_t num)
{
- uint32_t count = 0U;
+ __IO uint32_t count = 0U;
+ /* Wait for AHB master IDLE state. */
+ do
+ {
+ count++;
+
+ if (count > 200000U)
+ {
+ return HAL_TIMEOUT;
+ }
+ } while ((USBx->GRSTCTL & USB_OTG_GRSTCTL_AHBIDL) == 0U);
+
+ /* Flush TX Fifo */
+ count = 0U;
USBx->GRSTCTL = (USB_OTG_GRSTCTL_TXFFLSH | (num << 6));
do
{
- if (++count > 200000U)
+ count++;
+
+ if (count > 200000U)
{
return HAL_TIMEOUT;
}
@@ -458,19 +471,34 @@
}
/**
- * @brief USB_FlushRxFifo : Flush Rx FIFO
+ * @brief USB_FlushRxFifo Flush Rx FIFO
* @param USBx Selected device
* @retval HAL status
*/
HAL_StatusTypeDef USB_FlushRxFifo(USB_OTG_GlobalTypeDef *USBx)
{
- uint32_t count = 0;
+ __IO uint32_t count = 0U;
+ /* Wait for AHB master IDLE state. */
+ do
+ {
+ count++;
+
+ if (count > 200000U)
+ {
+ return HAL_TIMEOUT;
+ }
+ } while ((USBx->GRSTCTL & USB_OTG_GRSTCTL_AHBIDL) == 0U);
+
+ /* Flush RX Fifo */
+ count = 0U;
USBx->GRSTCTL = USB_OTG_GRSTCTL_RXFFLSH;
do
{
- if (++count > 200000U)
+ count++;
+
+ if (count > 200000U)
{
return HAL_TIMEOUT;
}
@@ -726,8 +754,21 @@
*/
USBx_INEP(epnum)->DIEPTSIZ &= ~(USB_OTG_DIEPTSIZ_XFRSIZ);
USBx_INEP(epnum)->DIEPTSIZ &= ~(USB_OTG_DIEPTSIZ_PKTCNT);
- USBx_INEP(epnum)->DIEPTSIZ |= (USB_OTG_DIEPTSIZ_PKTCNT &
- (((ep->xfer_len + ep->maxpacket - 1U) / ep->maxpacket) << 19));
+
+ if (epnum == 0U)
+ {
+ if (ep->xfer_len > ep->maxpacket)
+ {
+ ep->xfer_len = ep->maxpacket;
+ }
+
+ USBx_INEP(epnum)->DIEPTSIZ |= (USB_OTG_DIEPTSIZ_PKTCNT & (1U << 19));
+ }
+ else
+ {
+ USBx_INEP(epnum)->DIEPTSIZ |= (USB_OTG_DIEPTSIZ_PKTCNT &
+ (((ep->xfer_len + ep->maxpacket - 1U) / ep->maxpacket) << 19));
+ }
USBx_INEP(epnum)->DIEPTSIZ |= (USB_OTG_DIEPTSIZ_XFRSIZ & ep->xfer_len);
@@ -797,18 +838,34 @@
USBx_OUTEP(epnum)->DOEPTSIZ &= ~(USB_OTG_DOEPTSIZ_XFRSIZ);
USBx_OUTEP(epnum)->DOEPTSIZ &= ~(USB_OTG_DOEPTSIZ_PKTCNT);
- if (ep->xfer_len == 0U)
+ if (epnum == 0U)
{
- USBx_OUTEP(epnum)->DOEPTSIZ |= (USB_OTG_DOEPTSIZ_XFRSIZ & ep->maxpacket);
+ if (ep->xfer_len > 0U)
+ {
+ ep->xfer_len = ep->maxpacket;
+ }
+
+ /* Store transfer size, for EP0 this is equal to endpoint max packet size */
+ ep->xfer_size = ep->maxpacket;
+
+ USBx_OUTEP(epnum)->DOEPTSIZ |= (USB_OTG_DOEPTSIZ_XFRSIZ & ep->xfer_size);
USBx_OUTEP(epnum)->DOEPTSIZ |= (USB_OTG_DOEPTSIZ_PKTCNT & (1U << 19));
}
else
{
- pktcnt = (uint16_t)((ep->xfer_len + ep->maxpacket - 1U) / ep->maxpacket);
- ep->xfer_size = ep->maxpacket * pktcnt;
+ if (ep->xfer_len == 0U)
+ {
+ USBx_OUTEP(epnum)->DOEPTSIZ |= (USB_OTG_DOEPTSIZ_XFRSIZ & ep->maxpacket);
+ USBx_OUTEP(epnum)->DOEPTSIZ |= (USB_OTG_DOEPTSIZ_PKTCNT & (1U << 19));
+ }
+ else
+ {
+ pktcnt = (uint16_t)((ep->xfer_len + ep->maxpacket - 1U) / ep->maxpacket);
+ ep->xfer_size = ep->maxpacket * pktcnt;
- USBx_OUTEP(epnum)->DOEPTSIZ |= USB_OTG_DOEPTSIZ_PKTCNT & ((uint32_t)pktcnt << 19);
- USBx_OUTEP(epnum)->DOEPTSIZ |= USB_OTG_DOEPTSIZ_XFRSIZ & ep->xfer_size;
+ USBx_OUTEP(epnum)->DOEPTSIZ |= USB_OTG_DOEPTSIZ_PKTCNT & ((uint32_t)pktcnt << 19);
+ USBx_OUTEP(epnum)->DOEPTSIZ |= USB_OTG_DOEPTSIZ_XFRSIZ & ep->xfer_size;
+ }
}
if (dma == 1U)
@@ -837,106 +894,64 @@
return HAL_OK;
}
+
/**
- * @brief USB_EP0StartXfer : setup and starts a transfer over the EP 0
- * @param USBx Selected device
- * @param ep pointer to endpoint structure
- * @param dma USB dma enabled or disabled
- * This parameter can be one of these values:
- * 0 : DMA feature not used
- * 1 : DMA feature used
- * @retval HAL status
- */
-HAL_StatusTypeDef USB_EP0StartXfer(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep, uint8_t dma)
+ * @brief USB_EPStoptXfer Stop transfer on an EP
+ * @param USBx usb device instance
+ * @param ep pointer to endpoint structure
+ * @retval HAL status
+ */
+HAL_StatusTypeDef USB_EPStopXfer(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep)
{
+ __IO uint32_t count = 0U;
+ HAL_StatusTypeDef ret = HAL_OK;
uint32_t USBx_BASE = (uint32_t)USBx;
- uint32_t epnum = (uint32_t)ep->num;
/* IN endpoint */
if (ep->is_in == 1U)
{
- /* Zero Length Packet? */
- if (ep->xfer_len == 0U)
+ /* EP enable, IN data in FIFO */
+ if (((USBx_INEP(ep->num)->DIEPCTL) & USB_OTG_DIEPCTL_EPENA) == USB_OTG_DIEPCTL_EPENA)
{
- USBx_INEP(epnum)->DIEPTSIZ &= ~(USB_OTG_DIEPTSIZ_PKTCNT);
- USBx_INEP(epnum)->DIEPTSIZ |= (USB_OTG_DIEPTSIZ_PKTCNT & (1U << 19));
- USBx_INEP(epnum)->DIEPTSIZ &= ~(USB_OTG_DIEPTSIZ_XFRSIZ);
- }
- else
- {
- /* Program the transfer size and packet count
- * as follows: xfersize = N * maxpacket +
- * short_packet pktcnt = N + (short_packet
- * exist ? 1 : 0)
- */
- USBx_INEP(epnum)->DIEPTSIZ &= ~(USB_OTG_DIEPTSIZ_XFRSIZ);
- USBx_INEP(epnum)->DIEPTSIZ &= ~(USB_OTG_DIEPTSIZ_PKTCNT);
+ USBx_INEP(ep->num)->DIEPCTL |= (USB_OTG_DIEPCTL_SNAK);
+ USBx_INEP(ep->num)->DIEPCTL |= (USB_OTG_DIEPCTL_EPDIS);
- if (ep->xfer_len > ep->maxpacket)
+ do
{
- ep->xfer_len = ep->maxpacket;
- }
- USBx_INEP(epnum)->DIEPTSIZ |= (USB_OTG_DIEPTSIZ_PKTCNT & (1U << 19));
- USBx_INEP(epnum)->DIEPTSIZ |= (USB_OTG_DIEPTSIZ_XFRSIZ & ep->xfer_len);
- }
+ count++;
- if (dma == 1U)
- {
- if ((uint32_t)ep->dma_addr != 0U)
- {
- USBx_INEP(epnum)->DIEPDMA = (uint32_t)(ep->dma_addr);
- }
-
- /* EP enable, IN data in FIFO */
- USBx_INEP(epnum)->DIEPCTL |= (USB_OTG_DIEPCTL_CNAK | USB_OTG_DIEPCTL_EPENA);
- }
- else
- {
- /* EP enable, IN data in FIFO */
- USBx_INEP(epnum)->DIEPCTL |= (USB_OTG_DIEPCTL_CNAK | USB_OTG_DIEPCTL_EPENA);
-
- /* Enable the Tx FIFO Empty Interrupt for this EP */
- if (ep->xfer_len > 0U)
- {
- USBx_DEVICE->DIEPEMPMSK |= 1UL << (ep->num & EP_ADDR_MSK);
- }
+ if (count > 10000U)
+ {
+ ret = HAL_ERROR;
+ break;
+ }
+ } while (((USBx_INEP(ep->num)->DIEPCTL) & USB_OTG_DIEPCTL_EPENA) == USB_OTG_DIEPCTL_EPENA);
}
}
else /* OUT endpoint */
{
- /* Program the transfer size and packet count as follows:
- * pktcnt = N
- * xfersize = N * maxpacket
- */
- USBx_OUTEP(epnum)->DOEPTSIZ &= ~(USB_OTG_DOEPTSIZ_XFRSIZ);
- USBx_OUTEP(epnum)->DOEPTSIZ &= ~(USB_OTG_DOEPTSIZ_PKTCNT);
-
- if (ep->xfer_len > 0U)
+ if (((USBx_OUTEP(ep->num)->DOEPCTL) & USB_OTG_DOEPCTL_EPENA) == USB_OTG_DOEPCTL_EPENA)
{
- ep->xfer_len = ep->maxpacket;
- }
+ USBx_OUTEP(ep->num)->DOEPCTL |= (USB_OTG_DOEPCTL_SNAK);
+ USBx_OUTEP(ep->num)->DOEPCTL |= (USB_OTG_DOEPCTL_EPDIS);
- /* Store transfer size, for EP0 this is equal to endpoint max packet size */
- ep->xfer_size = ep->maxpacket;
-
- USBx_OUTEP(epnum)->DOEPTSIZ |= (USB_OTG_DOEPTSIZ_PKTCNT & (1U << 19));
- USBx_OUTEP(epnum)->DOEPTSIZ |= (USB_OTG_DOEPTSIZ_XFRSIZ & ep->xfer_size);
-
- if (dma == 1U)
- {
- if ((uint32_t)ep->xfer_buff != 0U)
+ do
{
- USBx_OUTEP(epnum)->DOEPDMA = (uint32_t)(ep->xfer_buff);
- }
- }
+ count++;
- /* EP enable */
- USBx_OUTEP(epnum)->DOEPCTL |= (USB_OTG_DOEPCTL_CNAK | USB_OTG_DOEPCTL_EPENA);
+ if (count > 10000U)
+ {
+ ret = HAL_ERROR;
+ break;
+ }
+ } while (((USBx_OUTEP(ep->num)->DOEPCTL) & USB_OTG_DOEPCTL_EPENA) == USB_OTG_DOEPCTL_EPENA);
+ }
}
- return HAL_OK;
+ return ret;
}
+
/**
* @brief USB_WritePacket : Writes a packet into the Tx FIFO associated
* with the EP/channel
@@ -1124,7 +1139,7 @@
* This parameter can be a value from 0 to 255
* @retval HAL status
*/
-HAL_StatusTypeDef USB_SetDevAddress(USB_OTG_GlobalTypeDef *USBx, uint8_t address)
+HAL_StatusTypeDef USB_SetDevAddress(USB_OTG_GlobalTypeDef *USBx, uint8_t address)
{
uint32_t USBx_BASE = (uint32_t)USBx;
@@ -1139,7 +1154,7 @@
* @param USBx Selected device
* @retval HAL status
*/
-HAL_StatusTypeDef USB_DevConnect(USB_OTG_GlobalTypeDef *USBx)
+HAL_StatusTypeDef USB_DevConnect(USB_OTG_GlobalTypeDef *USBx)
{
uint32_t USBx_BASE = (uint32_t)USBx;
@@ -1156,7 +1171,7 @@
* @param USBx Selected device
* @retval HAL status
*/
-HAL_StatusTypeDef USB_DevDisconnect(USB_OTG_GlobalTypeDef *USBx)
+HAL_StatusTypeDef USB_DevDisconnect(USB_OTG_GlobalTypeDef *USBx)
{
uint32_t USBx_BASE = (uint32_t)USBx;
@@ -1171,9 +1186,9 @@
/**
* @brief USB_ReadInterrupts: return the global USB interrupt status
* @param USBx Selected device
- * @retval HAL status
+ * @retval USB Global Interrupt status
*/
-uint32_t USB_ReadInterrupts(USB_OTG_GlobalTypeDef *USBx)
+uint32_t USB_ReadInterrupts(USB_OTG_GlobalTypeDef const *USBx)
{
uint32_t tmpreg;
@@ -1184,9 +1199,26 @@
}
/**
+ * @brief USB_ReadChInterrupts: return USB channel interrupt status
+ * @param USBx Selected device
+ * @param chnum Channel number
+ * @retval USB Channel Interrupt status
+ */
+uint32_t USB_ReadChInterrupts(USB_OTG_GlobalTypeDef *USBx, uint8_t chnum)
+{
+ uint32_t USBx_BASE = (uint32_t)USBx;
+ uint32_t tmpreg;
+
+ tmpreg = USBx_HC(chnum)->HCINT;
+ tmpreg &= USBx_HC(chnum)->HCINTMSK;
+
+ return tmpreg;
+}
+
+/**
* @brief USB_ReadDevAllOutEpInterrupt: return the USB device OUT endpoints interrupt status
* @param USBx Selected device
- * @retval HAL status
+ * @retval USB Device OUT EP interrupt status
*/
uint32_t USB_ReadDevAllOutEpInterrupt(USB_OTG_GlobalTypeDef *USBx)
{
@@ -1202,7 +1234,7 @@
/**
* @brief USB_ReadDevAllInEpInterrupt: return the USB device IN endpoints interrupt status
* @param USBx Selected device
- * @retval HAL status
+ * @retval USB Device IN EP interrupt status
*/
uint32_t USB_ReadDevAllInEpInterrupt(USB_OTG_GlobalTypeDef *USBx)
{
@@ -1284,7 +1316,7 @@
* @param USBx Selected device
* @retval HAL status
*/
-HAL_StatusTypeDef USB_ActivateSetup(USB_OTG_GlobalTypeDef *USBx)
+HAL_StatusTypeDef USB_ActivateSetup(USB_OTG_GlobalTypeDef *USBx)
{
uint32_t USBx_BASE = (uint32_t)USBx;
@@ -1341,12 +1373,14 @@
*/
static HAL_StatusTypeDef USB_CoreReset(USB_OTG_GlobalTypeDef *USBx)
{
- uint32_t count = 0U;
+ __IO uint32_t count = 0U;
/* Wait for AHB master IDLE state. */
do
{
- if (++count > 200000U)
+ count++;
+
+ if (count > 200000U)
{
return HAL_TIMEOUT;
}
@@ -1358,7 +1392,9 @@
do
{
- if (++count > 200000U)
+ count++;
+
+ if (count > 200000U)
{
return HAL_TIMEOUT;
}
@@ -1377,6 +1413,7 @@
*/
HAL_StatusTypeDef USB_HostInit(USB_OTG_GlobalTypeDef *USBx, USB_OTG_CfgTypeDef cfg)
{
+ HAL_StatusTypeDef ret = HAL_OK;
uint32_t USBx_BASE = (uint32_t)USBx;
uint32_t i;
@@ -1408,13 +1445,20 @@
}
/* Make sure the FIFOs are flushed. */
- (void)USB_FlushTxFifo(USBx, 0x10U); /* all Tx FIFOs */
- (void)USB_FlushRxFifo(USBx);
+ if (USB_FlushTxFifo(USBx, 0x10U) != HAL_OK) /* all Tx FIFOs */
+ {
+ ret = HAL_ERROR;
+ }
+
+ if (USB_FlushRxFifo(USBx) != HAL_OK)
+ {
+ ret = HAL_ERROR;
+ }
/* Clear all pending HC Interrupts */
for (i = 0U; i < cfg.Host_channels; i++)
{
- USBx_HC(i)->HCINT = 0xFFFFFFFFU;
+ USBx_HC(i)->HCINT = CLEAR_INTERRUPT_MASK;
USBx_HC(i)->HCINTMSK = 0U;
}
@@ -1422,7 +1466,7 @@
USBx->GINTMSK = 0U;
/* Clear any pending interrupts */
- USBx->GINTSTS = 0xFFFFFFFFU;
+ USBx->GINTSTS = CLEAR_INTERRUPT_MASK;
if ((USBx->CID & (0x1U << 8)) != 0U)
{
@@ -1450,7 +1494,7 @@
USB_OTG_GINTMSK_SOFM | USB_OTG_GINTSTS_DISCINT | \
USB_OTG_GINTMSK_PXFRM_IISOOXFRM | USB_OTG_GINTMSK_WUIM);
- return HAL_OK;
+ return ret;
}
/**
@@ -1472,15 +1516,15 @@
if (freq == HCFG_48_MHZ)
{
- USBx_HOST->HFIR = 48000U;
+ USBx_HOST->HFIR = HFIR_48_MHZ;
}
else if (freq == HCFG_6_MHZ)
{
- USBx_HOST->HFIR = 6000U;
+ USBx_HOST->HFIR = HFIR_6_MHZ;
}
else
{
- /* ... */
+ return HAL_ERROR;
}
return HAL_OK;
@@ -1550,7 +1594,7 @@
* @arg HCD_SPEED_FULL: Full speed mode
* @arg HCD_SPEED_LOW: Low speed mode
*/
-uint32_t USB_GetHostSpeed(USB_OTG_GlobalTypeDef *USBx)
+uint32_t USB_GetHostSpeed(USB_OTG_GlobalTypeDef const *USBx)
{
uint32_t USBx_BASE = (uint32_t)USBx;
__IO uint32_t hprt0 = 0U;
@@ -1564,7 +1608,7 @@
* @param USBx Selected device
* @retval current frame number
*/
-uint32_t USB_GetCurrentFrame(USB_OTG_GlobalTypeDef *USBx)
+uint32_t USB_GetCurrentFrame(USB_OTG_GlobalTypeDef const *USBx)
{
uint32_t USBx_BASE = (uint32_t)USBx;
@@ -1606,7 +1650,7 @@
uint32_t HostCoreSpeed;
/* Clear old interrupt conditions for this host channel. */
- USBx_HC((uint32_t)ch_num)->HCINT = 0xFFFFFFFFU;
+ USBx_HC((uint32_t)ch_num)->HCINT = CLEAR_INTERRUPT_MASK;
/* Enable channel interrupts required for this transfer. */
switch (ep_type)
@@ -1667,6 +1711,12 @@
break;
}
+ /* Clear Hub Start Split transaction */
+ USBx_HC((uint32_t)ch_num)->HCSPLT = 0U;
+
+ /* Enable host channel Halt interrupt */
+ USBx_HC((uint32_t)ch_num)->HCINTMSK |= USB_OTG_HCINTMSK_CHHM;
+
/* Enable the top level host channel interrupt. */
USBx_HOST->HAINTMSK |= 1UL << (ch_num & 0xFU);
@@ -1698,7 +1748,8 @@
USBx_HC((uint32_t)ch_num)->HCCHAR = (((uint32_t)dev_address << 22) & USB_OTG_HCCHAR_DAD) |
((((uint32_t)epnum & 0x7FU) << 11) & USB_OTG_HCCHAR_EPNUM) |
(((uint32_t)ep_type << 18) & USB_OTG_HCCHAR_EPTYP) |
- ((uint32_t)mps & USB_OTG_HCCHAR_MPSIZ) | HCcharEpDir | HCcharLowSpeed;
+ ((uint32_t)mps & USB_OTG_HCCHAR_MPSIZ) |
+ USB_OTG_HCCHAR_MC_0 | HCcharEpDir | HCcharLowSpeed;
if ((ep_type == EP_TYPE_INTR) || (ep_type == EP_TYPE_ISOC))
{
@@ -1726,53 +1777,116 @@
uint8_t is_oddframe;
uint16_t len_words;
uint16_t num_packets;
- uint16_t max_hc_pkt_count = 256U;
+ uint16_t max_hc_pkt_count = HC_MAX_PKT_CNT;
- if (((USBx->CID & (0x1U << 8)) != 0U) && (hc->speed == USBH_HS_SPEED))
+ if ((USBx->CID & (0x1U << 8)) != 0U)
{
- /* in DMA mode host Core automatically issues ping in case of NYET/NAK */
- if ((dma == 1U) && ((hc->ep_type == EP_TYPE_CTRL) || (hc->ep_type == EP_TYPE_BULK)))
+ /* in DMA mode host Core automatically issues ping in case of NYET/NAK */
+ if (dma == 1U)
{
- USBx_HC((uint32_t)ch_num)->HCINTMSK &= ~(USB_OTG_HCINTMSK_NYET |
- USB_OTG_HCINTMSK_ACKM |
- USB_OTG_HCINTMSK_NAKM);
- }
+ if ((hc->ep_type == EP_TYPE_CTRL) || (hc->ep_type == EP_TYPE_BULK))
+ {
- if ((dma == 0U) && (hc->do_ping == 1U))
+ USBx_HC((uint32_t)ch_num)->HCINTMSK &= ~(USB_OTG_HCINTMSK_NYET |
+ USB_OTG_HCINTMSK_ACKM |
+ USB_OTG_HCINTMSK_NAKM);
+ }
+ }
+ else
{
- (void)USB_DoPing(USBx, hc->ch_num);
- return HAL_OK;
+ if ((hc->speed == USBH_HS_SPEED) && (hc->do_ping == 1U))
+ {
+ (void)USB_DoPing(USBx, hc->ch_num);
+ return HAL_OK;
+ }
}
-
}
- /* Compute the expected number of packets associated to the transfer */
- if (hc->xfer_len > 0U)
+ if (hc->do_ssplit == 1U)
{
- num_packets = (uint16_t)((hc->xfer_len + hc->max_packet - 1U) / hc->max_packet);
+ /* Set number of packet to 1 for Split transaction */
+ num_packets = 1U;
- if (num_packets > max_hc_pkt_count)
+ if (hc->ep_is_in != 0U)
{
- num_packets = max_hc_pkt_count;
hc->XferSize = (uint32_t)num_packets * hc->max_packet;
}
- }
- else
- {
- num_packets = 1U;
- }
+ else
+ {
+ if (hc->ep_type == EP_TYPE_ISOC)
+ {
+ if (hc->xfer_len > ISO_SPLT_MPS)
+ {
+ /* Isochrone Max Packet Size for Split mode */
+ hc->XferSize = hc->max_packet;
+ hc->xfer_len = hc->XferSize;
- /*
- * For IN channel HCTSIZ.XferSize is expected to be an integer multiple of
- * max_packet size.
- */
- if (hc->ep_is_in != 0U)
- {
- hc->XferSize = (uint32_t)num_packets * hc->max_packet;
+ if ((hc->iso_splt_xactPos == HCSPLT_BEGIN) || (hc->iso_splt_xactPos == HCSPLT_MIDDLE))
+ {
+ hc->iso_splt_xactPos = HCSPLT_MIDDLE;
+ }
+ else
+ {
+ hc->iso_splt_xactPos = HCSPLT_BEGIN;
+ }
+ }
+ else
+ {
+ hc->XferSize = hc->xfer_len;
+
+ if ((hc->iso_splt_xactPos != HCSPLT_BEGIN) && (hc->iso_splt_xactPos != HCSPLT_MIDDLE))
+ {
+ hc->iso_splt_xactPos = HCSPLT_FULL;
+ }
+ else
+ {
+ hc->iso_splt_xactPos = HCSPLT_END;
+ }
+ }
+ }
+ else
+ {
+ if ((dma == 1U) && (hc->xfer_len > hc->max_packet))
+ {
+ hc->XferSize = (uint32_t)num_packets * hc->max_packet;
+ }
+ else
+ {
+ hc->XferSize = hc->xfer_len;
+ }
+ }
+ }
}
else
{
- hc->XferSize = hc->xfer_len;
+ /* Compute the expected number of packets associated to the transfer */
+ if (hc->xfer_len > 0U)
+ {
+ num_packets = (uint16_t)((hc->xfer_len + hc->max_packet - 1U) / hc->max_packet);
+
+ if (num_packets > max_hc_pkt_count)
+ {
+ num_packets = max_hc_pkt_count;
+ hc->XferSize = (uint32_t)num_packets * hc->max_packet;
+ }
+ }
+ else
+ {
+ num_packets = 1U;
+ }
+
+ /*
+ * For IN channel HCTSIZ.XferSize is expected to be an integer multiple of
+ * max_packet size.
+ */
+ if (hc->ep_is_in != 0U)
+ {
+ hc->XferSize = (uint32_t)num_packets * hc->max_packet;
+ }
+ else
+ {
+ hc->XferSize = hc->xfer_len;
+ }
}
/* Initialize the HCTSIZn register */
@@ -1790,6 +1904,65 @@
USBx_HC(ch_num)->HCCHAR &= ~USB_OTG_HCCHAR_ODDFRM;
USBx_HC(ch_num)->HCCHAR |= (uint32_t)is_oddframe << 29;
+ if (hc->do_ssplit == 1U)
+ {
+ /* Set Hub start Split transaction */
+ USBx_HC((uint32_t)ch_num)->HCSPLT = ((uint32_t)hc->hub_addr << USB_OTG_HCSPLT_HUBADDR_Pos) |
+ (uint32_t)hc->hub_port_nbr | USB_OTG_HCSPLT_SPLITEN;
+
+ /* unmask ack & nyet for IN/OUT transactions */
+ USBx_HC((uint32_t)ch_num)->HCINTMSK |= (USB_OTG_HCINTMSK_ACKM |
+ USB_OTG_HCINTMSK_NYET);
+
+ if ((hc->do_csplit == 1U) && (hc->ep_is_in == 0U))
+ {
+ USBx_HC((uint32_t)ch_num)->HCSPLT |= USB_OTG_HCSPLT_COMPLSPLT;
+ USBx_HC((uint32_t)ch_num)->HCINTMSK |= USB_OTG_HCINTMSK_NYET;
+ }
+
+ if (((hc->ep_type == EP_TYPE_ISOC) || (hc->ep_type == EP_TYPE_INTR)) &&
+ (hc->do_csplit == 1U) && (hc->ep_is_in == 1U))
+ {
+ USBx_HC((uint32_t)ch_num)->HCSPLT |= USB_OTG_HCSPLT_COMPLSPLT;
+ }
+
+ /* Position management for iso out transaction on split mode */
+ if ((hc->ep_type == EP_TYPE_ISOC) && (hc->ep_is_in == 0U))
+ {
+ /* Set data payload position */
+ switch (hc->iso_splt_xactPos)
+ {
+ case HCSPLT_BEGIN:
+ /* First data payload for OUT Transaction */
+ USBx_HC((uint32_t)ch_num)->HCSPLT |= USB_OTG_HCSPLT_XACTPOS_1;
+ break;
+
+ case HCSPLT_MIDDLE:
+ /* Middle data payload for OUT Transaction */
+ USBx_HC((uint32_t)ch_num)->HCSPLT |= USB_OTG_HCSPLT_XACTPOS_Pos;
+ break;
+
+ case HCSPLT_END:
+ /* End data payload for OUT Transaction */
+ USBx_HC((uint32_t)ch_num)->HCSPLT |= USB_OTG_HCSPLT_XACTPOS_0;
+ break;
+
+ case HCSPLT_FULL:
+ /* Entire data payload for OUT Transaction */
+ USBx_HC((uint32_t)ch_num)->HCSPLT |= USB_OTG_HCSPLT_XACTPOS;
+ break;
+
+ default:
+ break;
+ }
+ }
+ }
+ else
+ {
+ /* Clear Hub Start Split transaction */
+ USBx_HC((uint32_t)ch_num)->HCSPLT = 0U;
+ }
+
/* Set host channel enable */
tmpreg = USBx_HC(ch_num)->HCCHAR;
tmpreg &= ~USB_OTG_HCCHAR_CHDIS;
@@ -1811,7 +1984,7 @@
return HAL_OK;
}
- if ((hc->ep_is_in == 0U) && (hc->xfer_len > 0U))
+ if ((hc->ep_is_in == 0U) && (hc->xfer_len > 0U) && (hc->do_csplit == 0U))
{
switch (hc->ep_type)
{
@@ -1875,12 +2048,17 @@
{
uint32_t USBx_BASE = (uint32_t)USBx;
uint32_t hcnum = (uint32_t)hc_num;
- uint32_t count = 0U;
+ __IO uint32_t count = 0U;
uint32_t HcEpType = (USBx_HC(hcnum)->HCCHAR & USB_OTG_HCCHAR_EPTYP) >> 18;
uint32_t ChannelEna = (USBx_HC(hcnum)->HCCHAR & USB_OTG_HCCHAR_CHENA) >> 31;
+ uint32_t SplitEna = (USBx_HC(hcnum)->HCSPLT & USB_OTG_HCSPLT_SPLITEN) >> 31;
- if (((USBx->GAHBCFG & USB_OTG_GAHBCFG_DMAEN) == USB_OTG_GAHBCFG_DMAEN) &&
- (ChannelEna == 0U))
+ /* In buffer DMA, Channel disable must not be programmed for non-split periodic channels.
+ At the end of the next uframe/frame (in the worst case), the core generates a channel halted
+ and disables the channel automatically. */
+
+ if ((((USBx->GAHBCFG & USB_OTG_GAHBCFG_DMAEN) == USB_OTG_GAHBCFG_DMAEN) && (SplitEna == 0U)) &&
+ ((ChannelEna == 0U) || (((HcEpType == HCCHAR_ISOC) || (HcEpType == HCCHAR_INTR)))))
{
return HAL_OK;
}
@@ -1896,10 +2074,11 @@
{
USBx_HC(hcnum)->HCCHAR &= ~USB_OTG_HCCHAR_CHENA;
USBx_HC(hcnum)->HCCHAR |= USB_OTG_HCCHAR_CHENA;
- USBx_HC(hcnum)->HCCHAR &= ~USB_OTG_HCCHAR_EPDIR;
do
{
- if (++count > 1000U)
+ count++;
+
+ if (count > 1000U)
{
break;
}
@@ -1923,10 +2102,11 @@
{
USBx_HC(hcnum)->HCCHAR &= ~USB_OTG_HCCHAR_CHENA;
USBx_HC(hcnum)->HCCHAR |= USB_OTG_HCCHAR_CHENA;
- USBx_HC(hcnum)->HCCHAR &= ~USB_OTG_HCCHAR_EPDIR;
do
{
- if (++count > 1000U)
+ count++;
+
+ if (count > 1000U)
{
break;
}
@@ -1974,16 +2154,24 @@
*/
HAL_StatusTypeDef USB_StopHost(USB_OTG_GlobalTypeDef *USBx)
{
+ HAL_StatusTypeDef ret = HAL_OK;
uint32_t USBx_BASE = (uint32_t)USBx;
- uint32_t count = 0U;
+ __IO uint32_t count = 0U;
uint32_t value;
uint32_t i;
(void)USB_DisableGlobalInt(USBx);
- /* Flush FIFO */
- (void)USB_FlushTxFifo(USBx, 0x10U);
- (void)USB_FlushRxFifo(USBx);
+ /* Flush USB FIFO */
+ if (USB_FlushTxFifo(USBx, 0x10U) != HAL_OK) /* all Tx FIFOs */
+ {
+ ret = HAL_ERROR;
+ }
+
+ if (USB_FlushRxFifo(USBx) != HAL_OK)
+ {
+ ret = HAL_ERROR;
+ }
/* Flush out any leftover queued requests. */
for (i = 0U; i <= 15U; i++)
@@ -2006,7 +2194,9 @@
do
{
- if (++count > 1000U)
+ count++;
+
+ if (count > 1000U)
{
break;
}
@@ -2014,10 +2204,12 @@
}
/* Clear any pending Host interrupts */
- USBx_HOST->HAINT = 0xFFFFFFFFU;
- USBx->GINTSTS = 0xFFFFFFFFU;
+ USBx_HOST->HAINT = CLEAR_INTERRUPT_MASK;
+ USBx->GINTSTS = CLEAR_INTERRUPT_MASK;
- return HAL_OK;
+ (void)USB_EnableGlobalInt(USBx);
+
+ return ret;
}
/**
@@ -2054,7 +2246,6 @@
}
#endif /* defined (USB_OTG_FS) || defined (USB_OTG_HS) */
-
/**
* @}
*/
diff --git a/_htmresc/favicon.png b/_htmresc/favicon.png
new file mode 100644
index 0000000..06713ee
--- /dev/null
+++ b/_htmresc/favicon.png
Binary files differ
diff --git a/_htmresc/mini-st.css b/_htmresc/mini-st_2020.css
similarity index 77%
rename from _htmresc/mini-st.css
rename to _htmresc/mini-st_2020.css
index 71fbc14..3d9e81a 100644
--- a/_htmresc/mini-st.css
+++ b/_htmresc/mini-st_2020.css
@@ -1,39 +1,39 @@
@charset "UTF-8";
/*
- Flavor name: Default (mini-default)
- Author: Angelos Chalaris (chalarangelo@gmail.com)
- Maintainers: Angelos Chalaris
- mini.css version: v3.0.0-alpha.3
+ Flavor name: Custom (mini-custom)
+ Generated online - https://minicss.org/flavors
+ mini.css version: v3.0.1
*/
/*
Browsers resets and base typography.
*/
/* Core module CSS variable definitions */
:root {
- --fore-color: #111;
- --secondary-fore-color: #444;
- --back-color: #f8f8f8;
- --secondary-back-color: #f0f0f0;
- --blockquote-color: #f57c00;
- --pre-color: #1565c0;
- --border-color: #aaa;
- --secondary-border-color: #ddd;
- --heading-ratio: 1.19;
+ --fore-color: #03234b;
+ --secondary-fore-color: #03234b;
+ --back-color: #ffffff;
+ --secondary-back-color: #ffffff;
+ --blockquote-color: #e6007e;
+ --pre-color: #e6007e;
+ --border-color: #3cb4e6;
+ --secondary-border-color: #3cb4e6;
+ --heading-ratio: 1.2;
--universal-margin: 0.5rem;
- --universal-padding: 0.125rem;
- --universal-border-radius: 0.125rem;
- --a-link-color: #0277bd;
- --a-visited-color: #01579b; }
+ --universal-padding: 0.25rem;
+ --universal-border-radius: 0.075rem;
+ --background-margin: 1.5%;
+ --a-link-color: #3cb4e6;
+ --a-visited-color: #8c0078; }
html {
- font-size: 14px; }
+ font-size: 13.5px; }
a, b, del, em, i, ins, q, span, strong, u {
font-size: 1em; }
html, * {
- font-family: -apple-system, BlinkMacSystemFont, "Segoe UI", Roboto, Ubuntu, "Helvetica Neue", Helvetica, sans-serif;
- line-height: 1.4;
+ font-family: -apple-system, BlinkMacSystemFont, Helvetica, arial, sans-serif;
+ line-height: 1.25;
-webkit-text-size-adjust: 100%; }
* {
@@ -42,7 +42,10 @@
body {
margin: 0;
color: var(--fore-color);
- background: var(--back-color); }
+ @background: var(--back-color);
+ background: var(--back-color) linear-gradient(#ffd200, #ffd200) repeat-y left top;
+ background-size: var(--background-margin);
+ }
details {
display: block; }
@@ -62,9 +65,9 @@
height: auto; }
h1, h2, h3, h4, h5, h6 {
- line-height: 1.2;
+ line-height: 1.25;
margin: calc(1.5 * var(--universal-margin)) var(--universal-margin);
- font-weight: 500; }
+ font-weight: 400; }
h1 small, h2 small, h3 small, h4 small, h5 small, h6 small {
color: var(--secondary-fore-color);
display: block;
@@ -74,21 +77,15 @@
font-size: calc(1rem * var(--heading-ratio) * var(--heading-ratio) * var(--heading-ratio)); }
h2 {
- font-size: calc(1rem * var(--heading-ratio) * var(--heading-ratio); );
- background: var(--mark-back-color);
- font-weight: 600;
- padding: 0.1em 0.5em 0.2em 0.5em;
- color: var(--mark-fore-color); }
-
+ font-size: calc(1rem * var(--heading-ratio) * var(--heading-ratio) );
+ border-style: none none solid none ;
+ border-width: thin;
+ border-color: var(--border-color); }
h3 {
- font-size: calc(1rem * var(--heading-ratio));
- padding-left: calc(2 * var(--universal-margin));
- /* background: var(--border-color); */
- }
+ font-size: calc(1rem * var(--heading-ratio) ); }
h4 {
- font-size: 1rem;);
- padding-left: calc(4 * var(--universal-margin)); }
+ font-size: calc(1rem * var(--heading-ratio)); }
h5 {
font-size: 1rem; }
@@ -101,7 +98,7 @@
ol, ul {
margin: var(--universal-margin);
- padding-left: calc(6 * var(--universal-margin)); }
+ padding-left: calc(3 * var(--universal-margin)); }
b, strong {
font-weight: 700; }
@@ -111,7 +108,7 @@
border: 0;
line-height: 1.25em;
margin: var(--universal-margin);
- height: 0.0625rem;
+ height: 0.0714285714rem;
background: linear-gradient(to right, transparent, var(--border-color) 20%, var(--border-color) 80%, transparent); }
blockquote {
@@ -121,16 +118,16 @@
color: var(--secondary-fore-color);
margin: var(--universal-margin);
padding: calc(3 * var(--universal-padding));
- border: 0.0625rem solid var(--secondary-border-color);
- border-left: 0.375rem solid var(--blockquote-color);
+ border: 0.0714285714rem solid var(--secondary-border-color);
+ border-left: 0.3rem solid var(--blockquote-color);
border-radius: 0 var(--universal-border-radius) var(--universal-border-radius) 0; }
blockquote:before {
position: absolute;
top: calc(0rem - var(--universal-padding));
left: 0;
font-family: sans-serif;
- font-size: 3rem;
- font-weight: 700;
+ font-size: 2rem;
+ font-weight: 800;
content: "\201c";
color: var(--blockquote-color); }
blockquote[cite]:after {
@@ -160,8 +157,8 @@
background: var(--secondary-back-color);
padding: calc(1.5 * var(--universal-padding));
margin: var(--universal-margin);
- border: 0.0625rem solid var(--secondary-border-color);
- border-left: 0.25rem solid var(--pre-color);
+ border: 0.0714285714rem solid var(--secondary-border-color);
+ border-left: 0.2857142857rem solid var(--pre-color);
border-radius: 0 var(--universal-border-radius) var(--universal-border-radius) 0; }
sup, sub, code, kbd {
@@ -204,7 +201,8 @@
box-sizing: border-box;
display: flex;
flex: 0 1 auto;
- flex-flow: row wrap; }
+ flex-flow: row wrap;
+ margin: 0 0 0 var(--background-margin); }
.col-sm,
[class^='col-sm-'],
@@ -565,9 +563,9 @@
order: 999; } }
/* Card component CSS variable definitions */
:root {
- --card-back-color: #f8f8f8;
- --card-fore-color: #111;
- --card-border-color: #ddd; }
+ --card-back-color: #3cb4e6;
+ --card-fore-color: #03234b;
+ --card-border-color: #03234b; }
.card {
display: flex;
@@ -578,7 +576,7 @@
width: 100%;
background: var(--card-back-color);
color: var(--card-fore-color);
- border: 0.0625rem solid var(--card-border-color);
+ border: 0.0714285714rem solid var(--card-border-color);
border-radius: var(--universal-border-radius);
margin: var(--universal-margin);
overflow: hidden; }
@@ -592,7 +590,7 @@
margin: 0;
border: 0;
border-radius: 0;
- border-bottom: 0.0625rem solid var(--card-border-color);
+ border-bottom: 0.0714285714rem solid var(--card-border-color);
padding: var(--universal-padding);
width: 100%; }
.card > .sectione.media {
@@ -617,17 +615,18 @@
width: auto; }
.card.warning {
-/* --card-back-color: #ffca28; */
--card-back-color: #e5b8b7;
- --card-border-color: #e8b825; }
+ --card-fore-color: #3b234b;
+ --card-border-color: #8c0078; }
.card.error {
- --card-back-color: #b71c1c;
- --card-fore-color: #f8f8f8;
- --card-border-color: #a71a1a; }
+ --card-back-color: #464650;
+ --card-fore-color: #ffffff;
+ --card-border-color: #8c0078; }
.card > .sectione.dark {
- --card-back-color: #e0e0e0; }
+ --card-back-color: #3b234b;
+ --card-fore-color: #ffffff; }
.card > .sectione.double-padded {
padding: calc(1.5 * var(--universal-padding)); }
@@ -637,12 +636,12 @@
*/
/* Input_control module CSS variable definitions */
:root {
- --form-back-color: #f0f0f0;
- --form-fore-color: #111;
- --form-border-color: #ddd;
- --input-back-color: #f8f8f8;
- --input-fore-color: #111;
- --input-border-color: #ddd;
+ --form-back-color: #ffe97f;
+ --form-fore-color: #03234b;
+ --form-border-color: #3cb4e6;
+ --input-back-color: #ffffff;
+ --input-fore-color: #03234b;
+ --input-border-color: #3cb4e6;
--input-focus-color: #0288d1;
--input-invalid-color: #d32f2f;
--button-back-color: #e2e2e2;
@@ -655,13 +654,13 @@
form {
background: var(--form-back-color);
color: var(--form-fore-color);
- border: 0.0625rem solid var(--form-border-color);
+ border: 0.0714285714rem solid var(--form-border-color);
border-radius: var(--universal-border-radius);
margin: var(--universal-margin);
padding: calc(2 * var(--universal-padding)) var(--universal-padding); }
fieldset {
- border: 0.0625rem solid var(--form-border-color);
+ border: 0.0714285714rem solid var(--form-border-color);
border-radius: var(--universal-border-radius);
margin: calc(var(--universal-margin) / 4);
padding: var(--universal-padding); }
@@ -671,7 +670,7 @@
display: table;
max-width: 100%;
white-space: normal;
- font-weight: 700;
+ font-weight: 500;
padding: calc(var(--universal-padding) / 2); }
label {
@@ -716,7 +715,7 @@
box-sizing: border-box;
background: var(--input-back-color);
color: var(--input-fore-color);
- border: 0.0625rem solid var(--input-border-color);
+ border: 0.0714285714rem solid var(--input-border-color);
border-radius: var(--universal-border-radius);
margin: calc(var(--universal-margin) / 2);
padding: var(--universal-padding) calc(1.5 * var(--universal-padding)); }
@@ -763,8 +762,8 @@
[type="radio"]:checked:before {
border-radius: 100%;
content: '';
- top: calc(0.0625rem + var(--universal-padding) / 2);
- left: calc(0.0625rem + var(--universal-padding) / 2);
+ top: calc(0.0714285714rem + var(--universal-padding) / 2);
+ left: calc(0.0714285714rem + var(--universal-padding) / 2);
background: var(--input-fore-color);
width: 0.5rem;
height: 0.5rem; }
@@ -793,7 +792,7 @@
display: inline-block;
background: var(--button-back-color);
color: var(--button-fore-color);
- border: 0.0625rem solid var(--button-border-color);
+ border: 0.0714285714rem solid var(--button-border-color);
border-radius: var(--universal-border-radius);
padding: var(--universal-padding) calc(1.5 * var(--universal-padding));
margin: var(--universal-margin);
@@ -814,7 +813,7 @@
.button-group {
display: flex;
- border: 0.0625rem solid var(--button-group-border-color);
+ border: 0.0714285714rem solid var(--button-group-border-color);
border-radius: var(--universal-border-radius);
margin: var(--universal-margin); }
.button-group > button, .button-group [type="button"], .button-group > [type="submit"], .button-group > [type="reset"], .button-group > .button, .button-group > [role="button"] {
@@ -826,13 +825,13 @@
border-radius: 0;
box-shadow: none; }
.button-group > :not(:first-child) {
- border-left: 0.0625rem solid var(--button-group-border-color); }
+ border-left: 0.0714285714rem solid var(--button-group-border-color); }
@media screen and (max-width: 499px) {
.button-group {
flex-direction: column; }
.button-group > :not(:first-child) {
border: 0;
- border-top: 0.0625rem solid var(--button-group-border-color); } }
+ border-top: 0.0714285714rem solid var(--button-group-border-color); } }
/*
Custom elements for forms and input elements.
@@ -874,29 +873,29 @@
*/
/* Navigation module CSS variable definitions */
:root {
- --header-back-color: #f8f8f8;
- --header-hover-back-color: #f0f0f0;
- --header-fore-color: #444;
- --header-border-color: #ddd;
- --nav-back-color: #f8f8f8;
- --nav-hover-back-color: #f0f0f0;
- --nav-fore-color: #444;
- --nav-border-color: #ddd;
- --nav-link-color: #0277bd;
- --footer-fore-color: #444;
- --footer-back-color: #f8f8f8;
- --footer-border-color: #ddd;
- --footer-link-color: #0277bd;
- --drawer-back-color: #f8f8f8;
- --drawer-hover-back-color: #f0f0f0;
- --drawer-border-color: #ddd;
- --drawer-close-color: #444; }
+ --header-back-color: #03234b;
+ --header-hover-back-color: #ffd200;
+ --header-fore-color: #ffffff;
+ --header-border-color: #3cb4e6;
+ --nav-back-color: #ffffff;
+ --nav-hover-back-color: #ffe97f;
+ --nav-fore-color: #e6007e;
+ --nav-border-color: #3cb4e6;
+ --nav-link-color: #3cb4e6;
+ --footer-fore-color: #ffffff;
+ --footer-back-color: #03234b;
+ --footer-border-color: #3cb4e6;
+ --footer-link-color: #3cb4e6;
+ --drawer-back-color: #ffffff;
+ --drawer-hover-back-color: #ffe97f;
+ --drawer-border-color: #3cb4e6;
+ --drawer-close-color: #e6007e; }
header {
- height: 3.1875rem;
+ height: 2.75rem;
background: var(--header-back-color);
color: var(--header-fore-color);
- border-bottom: 0.0625rem solid var(--header-border-color);
+ border-bottom: 0.0714285714rem solid var(--header-border-color);
padding: calc(var(--universal-padding) / 4) 0;
white-space: nowrap;
overflow-x: auto;
@@ -927,7 +926,7 @@
nav {
background: var(--nav-back-color);
color: var(--nav-fore-color);
- border: 0.0625rem solid var(--nav-border-color);
+ border: 0.0714285714rem solid var(--nav-border-color);
border-radius: var(--universal-border-radius);
margin: var(--universal-margin); }
nav * {
@@ -946,10 +945,10 @@
nav .sublink-1:before {
position: absolute;
left: calc(var(--universal-padding) - 1 * var(--universal-padding));
- top: -0.0625rem;
+ top: -0.0714285714rem;
content: '';
height: 100%;
- border: 0.0625rem solid var(--nav-border-color);
+ border: 0.0714285714rem solid var(--nav-border-color);
border-left: 0; }
nav .sublink-2 {
position: relative;
@@ -957,16 +956,16 @@
nav .sublink-2:before {
position: absolute;
left: calc(var(--universal-padding) - 3 * var(--universal-padding));
- top: -0.0625rem;
+ top: -0.0714285714rem;
content: '';
height: 100%;
- border: 0.0625rem solid var(--nav-border-color);
+ border: 0.0714285714rem solid var(--nav-border-color);
border-left: 0; }
footer {
background: var(--footer-back-color);
color: var(--footer-fore-color);
- border-top: 0.0625rem solid var(--footer-border-color);
+ border-top: 0.0714285714rem solid var(--footer-border-color);
padding: calc(2 * var(--universal-padding)) var(--universal-padding);
font-size: 0.875rem; }
footer a, footer a:visited {
@@ -1013,7 +1012,7 @@
height: 100vh;
overflow-y: auto;
background: var(--drawer-back-color);
- border: 0.0625rem solid var(--drawer-border-color);
+ border: 0.0714285714rem solid var(--drawer-border-color);
border-radius: 0;
margin: 0;
z-index: 1110;
@@ -1060,38 +1059,36 @@
*/
/* Table module CSS variable definitions. */
:root {
- --table-border-color: #aaa;
- --table-border-separator-color: #666;
- --table-head-back-color: #e6e6e6;
- --table-head-fore-color: #111;
- --table-body-back-color: #f8f8f8;
- --table-body-fore-color: #111;
- --table-body-alt-back-color: #eee; }
+ --table-border-color: #03234b;
+ --table-border-separator-color: #03234b;
+ --table-head-back-color: #03234b;
+ --table-head-fore-color: #ffffff;
+ --table-body-back-color: #ffffff;
+ --table-body-fore-color: #03234b;
+ --table-body-alt-back-color: #f4f4f4; }
table {
border-collapse: separate;
border-spacing: 0;
- : margin: calc(1.5 * var(--universal-margin)) var(--universal-margin);
+ margin: 0;
display: flex;
flex: 0 1 auto;
flex-flow: row wrap;
padding: var(--universal-padding);
- padding-top: 0;
- margin: calc(1.5 * var(--universal-margin)) var(--universal-margin); }
+ padding-top: 0; }
table caption {
- font-size: 1.25 * rem;
+ font-size: 1rem;
margin: calc(2 * var(--universal-margin)) 0;
max-width: 100%;
- flex: 0 0 100%;
- text-align: left;}
+ flex: 0 0 100%; }
table thead, table tbody {
display: flex;
flex-flow: row wrap;
- border: 0.0625rem solid var(--table-border-color); }
+ border: 0.0714285714rem solid var(--table-border-color); }
table thead {
z-index: 999;
border-radius: var(--universal-border-radius) var(--universal-border-radius) 0 0;
- border-bottom: 0.0625rem solid var(--table-border-separator-color); }
+ border-bottom: 0.0714285714rem solid var(--table-border-separator-color); }
table tbody {
border-top: 0;
margin-top: calc(0 - var(--universal-margin));
@@ -1109,11 +1106,11 @@
table td {
background: var(--table-body-back-color);
color: var(--table-body-fore-color);
- border-top: 0.0625rem solid var(--table-border-color); }
+ border-top: 0.0714285714rem solid var(--table-border-color); }
table:not(.horizontal) {
overflow: auto;
- max-height: 850px; }
+ max-height: 100%; }
table:not(.horizontal) thead, table:not(.horizontal) tbody {
max-width: 100%;
flex: 0 0 100%; }
@@ -1134,32 +1131,33 @@
border: 0; }
table.horizontal thead, table.horizontal tbody {
border: 0;
+ flex: .2 0 0;
flex-flow: row nowrap; }
table.horizontal tbody {
overflow: auto;
justify-content: space-between;
- flex: 1 0 0;
- margin-left: calc( 4 * var(--universal-margin));
+ flex: .8 0 0;
+ margin-left: 0;
padding-bottom: calc(var(--universal-padding) / 4); }
table.horizontal tr {
flex-direction: column;
flex: 1 0 auto; }
table.horizontal th, table.horizontal td {
- width: 100%;
+ width: auto;
border: 0;
- border-bottom: 0.0625rem solid var(--table-border-color); }
+ border-bottom: 0.0714285714rem solid var(--table-border-color); }
table.horizontal th:not(:first-child), table.horizontal td:not(:first-child) {
border-top: 0; }
table.horizontal th {
text-align: right;
- border-left: 0.0625rem solid var(--table-border-color);
- border-right: 0.0625rem solid var(--table-border-separator-color); }
+ border-left: 0.0714285714rem solid var(--table-border-color);
+ border-right: 0.0714285714rem solid var(--table-border-separator-color); }
table.horizontal thead tr:first-child {
padding-left: 0; }
table.horizontal th:first-child, table.horizontal td:first-child {
- border-top: 0.0625rem solid var(--table-border-color); }
+ border-top: 0.0714285714rem solid var(--table-border-color); }
table.horizontal tbody tr:last-child td {
- border-right: 0.0625rem solid var(--table-border-color); }
+ border-right: 0.0714285714rem solid var(--table-border-color); }
table.horizontal tbody tr:last-child td:first-child {
border-top-right-radius: 0.25rem; }
table.horizontal tbody tr:last-child td:last-child {
@@ -1191,12 +1189,12 @@
display: table-row-group; }
table tr, table.horizontal tr {
display: block;
- border: 0.0625rem solid var(--table-border-color);
+ border: 0.0714285714rem solid var(--table-border-color);
border-radius: var(--universal-border-radius);
- background: #fafafa;
+ background: #ffffff;
padding: var(--universal-padding);
margin: var(--universal-margin);
- margin-bottom: calc(2 * var(--universal-margin)); }
+ margin-bottom: calc(1 * var(--universal-margin)); }
table th, table td, table.horizontal th, table.horizontal td {
width: auto; }
table td, table.horizontal td {
@@ -1211,9 +1209,6 @@
border-top: 0; }
table tbody tr:last-child td, table.horizontal tbody tr:last-child td {
border-right: 0; } }
-:root {
- --table-body-alt-back-color: #eee; }
-
table tr:nth-of-type(2n) > td {
background: var(--table-body-alt-back-color); }
@@ -1234,8 +1229,8 @@
*/
/* Contextual module CSS variable definitions */
:root {
- --mark-back-color: #0277bd;
- --mark-fore-color: #fafafa; }
+ --mark-back-color: #3cb4e6;
+ --mark-fore-color: #ffffff; }
mark {
background: var(--mark-back-color);
@@ -1243,11 +1238,11 @@
font-size: 0.95em;
line-height: 1em;
border-radius: var(--universal-border-radius);
- padding: calc(var(--universal-padding) / 4) calc(var(--universal-padding) / 2); }
+ padding: calc(var(--universal-padding) / 4) var(--universal-padding); }
mark.inline-block {
display: inline-block;
font-size: 1em;
- line-height: 1.5;
+ line-height: 1.4;
padding: calc(var(--universal-padding) / 2) var(--universal-padding); }
:root {
@@ -1314,8 +1309,8 @@
:root {
--modal-overlay-color: rgba(0, 0, 0, 0.45);
- --modal-close-color: #444;
- --modal-close-hover-color: #f0f0f0; }
+ --modal-close-color: #e6007e;
+ --modal-close-hover-color: #ffe97f; }
[type="checkbox"].modal {
height: 1px;
@@ -1368,13 +1363,14 @@
z-index: 1211; }
:root {
- --collapse-label-back-color: #e8e8e8;
- --collapse-label-fore-color: #212121;
- --collapse-label-hover-back-color: #f0f0f0;
- --collapse-selected-label-back-color: #ececec;
- --collapse-border-color: #ddd;
- --collapse-content-back-color: #fafafa;
- --collapse-selected-label-border-color: #0277bd; }
+ --collapse-label-back-color: #03234b;
+ --collapse-label-fore-color: #ffffff;
+ --collapse-label-hover-back-color: #3cb4e6;
+ --collapse-selected-label-back-color: #3cb4e6;
+ --collapse-border-color: var(--collapse-label-back-color);
+ --collapse-selected-border-color: #ceecf8;
+ --collapse-content-back-color: #ffffff;
+ --collapse-selected-label-border-color: #3cb4e6; }
.collapse {
width: calc(100% - 2 * var(--universal-margin));
@@ -1395,13 +1391,13 @@
.collapse > label {
flex-grow: 1;
display: inline-block;
- height: 1.5rem;
+ height: 1.25rem;
cursor: pointer;
- transition: background 0.3s;
+ transition: background 0.2s;
color: var(--collapse-label-fore-color);
background: var(--collapse-label-back-color);
- border: 0.0625rem solid var(--collapse-border-color);
- padding: calc(1.5 * var(--universal-padding)); }
+ border: 0.0714285714rem solid var(--collapse-selected-border-color);
+ padding: calc(1.25 * var(--universal-padding)); }
.collapse > label:hover, .collapse > label:focus {
background: var(--collapse-label-hover-back-color); }
.collapse > label + div {
@@ -1418,7 +1414,7 @@
max-height: 1px; }
.collapse > :checked + label {
background: var(--collapse-selected-label-back-color);
- border-bottom-color: var(--collapse-selected-label-border-color); }
+ border-color: var(--collapse-selected-label-border-color); }
.collapse > :checked + label + div {
box-sizing: border-box;
position: relative;
@@ -1427,13 +1423,13 @@
overflow: auto;
margin: 0;
background: var(--collapse-content-back-color);
- border: 0.0625rem solid var(--collapse-border-color);
+ border: 0.0714285714rem solid var(--collapse-selected-border-color);
border-top: 0;
padding: var(--universal-padding);
clip: auto;
-webkit-clip-path: inset(0%);
clip-path: inset(0%);
- max-height: 850px; }
+ max-height: 100%; }
.collapse > label:not(:first-of-type) {
border-top: 0; }
.collapse > label:first-of-type {
@@ -1450,11 +1446,8 @@
/*
Custom elements for contextual background elements, toasts and tooltips.
*/
-mark.secondary {
- --mark-back-color: #d32f2f; }
-
mark.tertiary {
- --mark-back-color: #308732; }
+ --mark-back-color: #3cb4e6; }
mark.tag {
padding: calc(var(--universal-padding)/2) var(--universal-padding);
@@ -1463,9 +1456,9 @@
/*
Definitions for progress elements and spinners.
*/
-/* Progess module CSS variable definitions */
+/* Progress module CSS variable definitions */
:root {
- --progress-back-color: #ddd;
+ --progress-back-color: #3cb4e6;
--progress-fore-color: #555; }
progress {
@@ -1558,45 +1551,45 @@
filter: invert(100%); }
span.icon-alert {
- background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%23111' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Ccircle cx='12' cy='12' r='10'%3E%3C/circle%3E%3Cline x1='12' y1='8' x2='12' y2='12'%3E%3C/line%3E%3Cline x1='12' y1='16' x2='12' y2='16'%3E%3C/line%3E%3C/svg%3E"); }
+ background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Ccircle cx='12' cy='12' r='10'%3E%3C/circle%3E%3Cline x1='12' y1='8' x2='12' y2='12'%3E%3C/line%3E%3Cline x1='12' y1='16' x2='12' y2='16'%3E%3C/line%3E%3C/svg%3E"); }
span.icon-bookmark {
- background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%23111' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Cpath d='M19 21l-7-5-7 5V5a2 2 0 0 1 2-2h10a2 2 0 0 1 2 2z'%3E%3C/path%3E%3C/svg%3E"); }
+ background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Cpath d='M19 21l-7-5-7 5V5a2 2 0 0 1 2-2h10a2 2 0 0 1 2 2z'%3E%3C/path%3E%3C/svg%3E"); }
span.icon-calendar {
- background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%23111' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Crect x='3' y='4' width='18' height='18' rx='2' ry='2'%3E%3C/rect%3E%3Cline x1='16' y1='2' x2='16' y2='6'%3E%3C/line%3E%3Cline x1='8' y1='2' x2='8' y2='6'%3E%3C/line%3E%3Cline x1='3' y1='10' x2='21' y2='10'%3E%3C/line%3E%3C/svg%3E"); }
+ background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Crect x='3' y='4' width='18' height='18' rx='2' ry='2'%3E%3C/rect%3E%3Cline x1='16' y1='2' x2='16' y2='6'%3E%3C/line%3E%3Cline x1='8' y1='2' x2='8' y2='6'%3E%3C/line%3E%3Cline x1='3' y1='10' x2='21' y2='10'%3E%3C/line%3E%3C/svg%3E"); }
span.icon-credit {
- background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%23111' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Crect x='1' y='4' width='22' height='16' rx='2' ry='2'%3E%3C/rect%3E%3Cline x1='1' y1='10' x2='23' y2='10'%3E%3C/line%3E%3C/svg%3E"); }
+ background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Crect x='1' y='4' width='22' height='16' rx='2' ry='2'%3E%3C/rect%3E%3Cline x1='1' y1='10' x2='23' y2='10'%3E%3C/line%3E%3C/svg%3E"); }
span.icon-edit {
- background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%23111' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Cpath d='M20 14.66V20a2 2 0 0 1-2 2H4a2 2 0 0 1-2-2V6a2 2 0 0 1 2-2h5.34'%3E%3C/path%3E%3Cpolygon points='18 2 22 6 12 16 8 16 8 12 18 2'%3E%3C/polygon%3E%3C/svg%3E"); }
+ background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Cpath d='M20 14.66V20a2 2 0 0 1-2 2H4a2 2 0 0 1-2-2V6a2 2 0 0 1 2-2h5.34'%3E%3C/path%3E%3Cpolygon points='18 2 22 6 12 16 8 16 8 12 18 2'%3E%3C/polygon%3E%3C/svg%3E"); }
span.icon-link {
- background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%23111' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Cpath d='M18 13v6a2 2 0 0 1-2 2H5a2 2 0 0 1-2-2V8a2 2 0 0 1 2-2h6'%3E%3C/path%3E%3Cpolyline points='15 3 21 3 21 9'%3E%3C/polyline%3E%3Cline x1='10' y1='14' x2='21' y2='3'%3E%3C/line%3E%3C/svg%3E"); }
+ background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Cpath d='M18 13v6a2 2 0 0 1-2 2H5a2 2 0 0 1-2-2V8a2 2 0 0 1 2-2h6'%3E%3C/path%3E%3Cpolyline points='15 3 21 3 21 9'%3E%3C/polyline%3E%3Cline x1='10' y1='14' x2='21' y2='3'%3E%3C/line%3E%3C/svg%3E"); }
span.icon-help {
- background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%23111' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Cpath d='M9.09 9a3 3 0 0 1 5.83 1c0 2-3 3-3 3'%3E%3C/path%3E%3Ccircle cx='12' cy='12' r='10'%3E%3C/circle%3E%3Cline x1='12' y1='17' x2='12' y2='17'%3E%3C/line%3E%3C/svg%3E"); }
+ background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Cpath d='M9.09 9a3 3 0 0 1 5.83 1c0 2-3 3-3 3'%3E%3C/path%3E%3Ccircle cx='12' cy='12' r='10'%3E%3C/circle%3E%3Cline x1='12' y1='17' x2='12' y2='17'%3E%3C/line%3E%3C/svg%3E"); }
span.icon-home {
- background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%23111' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Cpath d='M3 9l9-7 9 7v11a2 2 0 0 1-2 2H5a2 2 0 0 1-2-2z'%3E%3C/path%3E%3Cpolyline points='9 22 9 12 15 12 15 22'%3E%3C/polyline%3E%3C/svg%3E"); }
+ background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Cpath d='M3 9l9-7 9 7v11a2 2 0 0 1-2 2H5a2 2 0 0 1-2-2z'%3E%3C/path%3E%3Cpolyline points='9 22 9 12 15 12 15 22'%3E%3C/polyline%3E%3C/svg%3E"); }
span.icon-info {
- background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%23111' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Ccircle cx='12' cy='12' r='10'%3E%3C/circle%3E%3Cline x1='12' y1='16' x2='12' y2='12'%3E%3C/line%3E%3Cline x1='12' y1='8' x2='12' y2='8'%3E%3C/line%3E%3C/svg%3E"); }
+ background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Ccircle cx='12' cy='12' r='10'%3E%3C/circle%3E%3Cline x1='12' y1='16' x2='12' y2='12'%3E%3C/line%3E%3Cline x1='12' y1='8' x2='12' y2='8'%3E%3C/line%3E%3C/svg%3E"); }
span.icon-lock {
- background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%23111' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Crect x='3' y='11' width='18' height='11' rx='2' ry='2'%3E%3C/rect%3E%3Cpath d='M7 11V7a5 5 0 0 1 10 0v4'%3E%3C/path%3E%3C/svg%3E"); }
+ background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Crect x='3' y='11' width='18' height='11' rx='2' ry='2'%3E%3C/rect%3E%3Cpath d='M7 11V7a5 5 0 0 1 10 0v4'%3E%3C/path%3E%3C/svg%3E"); }
span.icon-mail {
- background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%23111' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Cpath d='M4 4h16c1.1 0 2 .9 2 2v12c0 1.1-.9 2-2 2H4c-1.1 0-2-.9-2-2V6c0-1.1.9-2 2-2z'%3E%3C/path%3E%3Cpolyline points='22,6 12,13 2,6'%3E%3C/polyline%3E%3C/svg%3E"); }
+ background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Cpath d='M4 4h16c1.1 0 2 .9 2 2v12c0 1.1-.9 2-2 2H4c-1.1 0-2-.9-2-2V6c0-1.1.9-2 2-2z'%3E%3C/path%3E%3Cpolyline points='22,6 12,13 2,6'%3E%3C/polyline%3E%3C/svg%3E"); }
span.icon-location {
- background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%23111' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Cpath d='M21 10c0 7-9 13-9 13s-9-6-9-13a9 9 0 0 1 18 0z'%3E%3C/path%3E%3Ccircle cx='12' cy='10' r='3'%3E%3C/circle%3E%3C/svg%3E"); }
+ background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Cpath d='M21 10c0 7-9 13-9 13s-9-6-9-13a9 9 0 0 1 18 0z'%3E%3C/path%3E%3Ccircle cx='12' cy='10' r='3'%3E%3C/circle%3E%3C/svg%3E"); }
span.icon-phone {
- background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%23111' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Cpath d='M22 16.92v3a2 2 0 0 1-2.18 2 19.79 19.79 0 0 1-8.63-3.07 19.5 19.5 0 0 1-6-6 19.79 19.79 0 0 1-3.07-8.67A2 2 0 0 1 4.11 2h3a2 2 0 0 1 2 1.72 12.84 12.84 0 0 0 .7 2.81 2 2 0 0 1-.45 2.11L8.09 9.91a16 16 0 0 0 6 6l1.27-1.27a2 2 0 0 1 2.11-.45 12.84 12.84 0 0 0 2.81.7A2 2 0 0 1 22 16.92z'%3E%3C/path%3E%3C/svg%3E"); }
+ background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Cpath d='M22 16.92v3a2 2 0 0 1-2.18 2 19.79 19.79 0 0 1-8.63-3.07 19.5 19.5 0 0 1-6-6 19.79 19.79 0 0 1-3.07-8.67A2 2 0 0 1 4.11 2h3a2 2 0 0 1 2 1.72 12.84 12.84 0 0 0 .7 2.81 2 2 0 0 1-.45 2.11L8.09 9.91a16 16 0 0 0 6 6l1.27-1.27a2 2 0 0 1 2.11-.45 12.84 12.84 0 0 0 2.81.7A2 2 0 0 1 22 16.92z'%3E%3C/path%3E%3C/svg%3E"); }
span.icon-rss {
- background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%23111' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Cpath d='M4 11a9 9 0 0 1 9 9'%3E%3C/path%3E%3Cpath d='M4 4a16 16 0 0 1 16 16'%3E%3C/path%3E%3Ccircle cx='5' cy='19' r='1'%3E%3C/circle%3E%3C/svg%3E"); }
+ background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Cpath d='M4 11a9 9 0 0 1 9 9'%3E%3C/path%3E%3Cpath d='M4 4a16 16 0 0 1 16 16'%3E%3C/path%3E%3Ccircle cx='5' cy='19' r='1'%3E%3C/circle%3E%3C/svg%3E"); }
span.icon-search {
- background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%23111' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Ccircle cx='11' cy='11' r='8'%3E%3C/circle%3E%3Cline x1='21' y1='21' x2='16.65' y2='16.65'%3E%3C/line%3E%3C/svg%3E"); }
+ background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Ccircle cx='11' cy='11' r='8'%3E%3C/circle%3E%3Cline x1='21' y1='21' x2='16.65' y2='16.65'%3E%3C/line%3E%3C/svg%3E"); }
span.icon-settings {
- background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%23111' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Ccircle cx='12' cy='12' r='3'%3E%3C/circle%3E%3Cpath d='M19.4 15a1.65 1.65 0 0 0 .33 1.82l.06.06a2 2 0 0 1 0 2.83 2 2 0 0 1-2.83 0l-.06-.06a1.65 1.65 0 0 0-1.82-.33 1.65 1.65 0 0 0-1 1.51V21a2 2 0 0 1-2 2 2 2 0 0 1-2-2v-.09A1.65 1.65 0 0 0 9 19.4a1.65 1.65 0 0 0-1.82.33l-.06.06a2 2 0 0 1-2.83 0 2 2 0 0 1 0-2.83l.06-.06a1.65 1.65 0 0 0 .33-1.82 1.65 1.65 0 0 0-1.51-1H3a2 2 0 0 1-2-2 2 2 0 0 1 2-2h.09A1.65 1.65 0 0 0 4.6 9a1.65 1.65 0 0 0-.33-1.82l-.06-.06a2 2 0 0 1 0-2.83 2 2 0 0 1 2.83 0l.06.06a1.65 1.65 0 0 0 1.82.33H9a1.65 1.65 0 0 0 1-1.51V3a2 2 0 0 1 2-2 2 2 0 0 1 2 2v.09a1.65 1.65 0 0 0 1 1.51 1.65 1.65 0 0 0 1.82-.33l.06-.06a2 2 0 0 1 2.83 0 2 2 0 0 1 0 2.83l-.06.06a1.65 1.65 0 0 0-.33 1.82V9a1.65 1.65 0 0 0 1.51 1H21a2 2 0 0 1 2 2 2 2 0 0 1-2 2h-.09a1.65 1.65 0 0 0-1.51 1z'%3E%3C/path%3E%3C/svg%3E"); }
+ background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Ccircle cx='12' cy='12' r='3'%3E%3C/circle%3E%3Cpath d='M19.4 15a1.65 1.65 0 0 0 .33 1.82l.06.06a2 2 0 0 1 0 2.83 2 2 0 0 1-2.83 0l-.06-.06a1.65 1.65 0 0 0-1.82-.33 1.65 1.65 0 0 0-1 1.51V21a2 2 0 0 1-2 2 2 2 0 0 1-2-2v-.09A1.65 1.65 0 0 0 9 19.4a1.65 1.65 0 0 0-1.82.33l-.06.06a2 2 0 0 1-2.83 0 2 2 0 0 1 0-2.83l.06-.06a1.65 1.65 0 0 0 .33-1.82 1.65 1.65 0 0 0-1.51-1H3a2 2 0 0 1-2-2 2 2 0 0 1 2-2h.09A1.65 1.65 0 0 0 4.6 9a1.65 1.65 0 0 0-.33-1.82l-.06-.06a2 2 0 0 1 0-2.83 2 2 0 0 1 2.83 0l.06.06a1.65 1.65 0 0 0 1.82.33H9a1.65 1.65 0 0 0 1-1.51V3a2 2 0 0 1 2-2 2 2 0 0 1 2 2v.09a1.65 1.65 0 0 0 1 1.51 1.65 1.65 0 0 0 1.82-.33l.06-.06a2 2 0 0 1 2.83 0 2 2 0 0 1 0 2.83l-.06.06a1.65 1.65 0 0 0-.33 1.82V9a1.65 1.65 0 0 0 1.51 1H21a2 2 0 0 1 2 2 2 2 0 0 1-2 2h-.09a1.65 1.65 0 0 0-1.51 1z'%3E%3C/path%3E%3C/svg%3E"); }
span.icon-share {
- background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%23111' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Ccircle cx='18' cy='5' r='3'%3E%3C/circle%3E%3Ccircle cx='6' cy='12' r='3'%3E%3C/circle%3E%3Ccircle cx='18' cy='19' r='3'%3E%3C/circle%3E%3Cline x1='8.59' y1='13.51' x2='15.42' y2='17.49'%3E%3C/line%3E%3Cline x1='15.41' y1='6.51' x2='8.59' y2='10.49'%3E%3C/line%3E%3C/svg%3E"); }
+ background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Ccircle cx='18' cy='5' r='3'%3E%3C/circle%3E%3Ccircle cx='6' cy='12' r='3'%3E%3C/circle%3E%3Ccircle cx='18' cy='19' r='3'%3E%3C/circle%3E%3Cline x1='8.59' y1='13.51' x2='15.42' y2='17.49'%3E%3C/line%3E%3Cline x1='15.41' y1='6.51' x2='8.59' y2='10.49'%3E%3C/line%3E%3C/svg%3E"); }
span.icon-cart {
- background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%23111' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Ccircle cx='9' cy='21' r='1'%3E%3C/circle%3E%3Ccircle cx='20' cy='21' r='1'%3E%3C/circle%3E%3Cpath d='M1 1h4l2.68 13.39a2 2 0 0 0 2 1.61h9.72a2 2 0 0 0 2-1.61L23 6H6'%3E%3C/path%3E%3C/svg%3E"); }
+ background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Ccircle cx='9' cy='21' r='1'%3E%3C/circle%3E%3Ccircle cx='20' cy='21' r='1'%3E%3C/circle%3E%3Cpath d='M1 1h4l2.68 13.39a2 2 0 0 0 2 1.61h9.72a2 2 0 0 0 2-1.61L23 6H6'%3E%3C/path%3E%3C/svg%3E"); }
span.icon-upload {
- background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%23111' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Cpath d='M21 15v4a2 2 0 0 1-2 2H5a2 2 0 0 1-2-2v-4'%3E%3C/path%3E%3Cpolyline points='17 8 12 3 7 8'%3E%3C/polyline%3E%3Cline x1='12' y1='3' x2='12' y2='15'%3E%3C/line%3E%3C/svg%3E"); }
+ background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Cpath d='M21 15v4a2 2 0 0 1-2 2H5a2 2 0 0 1-2-2v-4'%3E%3C/path%3E%3Cpolyline points='17 8 12 3 7 8'%3E%3C/polyline%3E%3Cline x1='12' y1='3' x2='12' y2='15'%3E%3C/line%3E%3C/svg%3E"); }
span.icon-user {
- background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%23111' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Cpath d='M20 21v-2a4 4 0 0 0-4-4H8a4 4 0 0 0-4 4v2'%3E%3C/path%3E%3Ccircle cx='12' cy='7' r='4'%3E%3C/circle%3E%3C/svg%3E"); }
+ background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Cpath d='M20 21v-2a4 4 0 0 0-4-4H8a4 4 0 0 0-4 4v2'%3E%3C/path%3E%3Ccircle cx='12' cy='7' r='4'%3E%3C/circle%3E%3C/svg%3E"); }
/*
Definitions for utilities and helper classes.
@@ -1604,7 +1597,7 @@
/* Utility module CSS variable definitions */
:root {
--generic-border-color: rgba(0, 0, 0, 0.3);
- --generic-box-shadow: 0 0.25rem 0.25rem 0 rgba(0, 0, 0, 0.125), 0 0.125rem 0.125rem -0.125rem rgba(0, 0, 0, 0.25); }
+ --generic-box-shadow: 0 0.2857142857rem 0.2857142857rem 0 rgba(0, 0, 0, 0.125), 0 0.1428571429rem 0.1428571429rem -0.1428571429rem rgba(0, 0, 0, 0.125); }
.hidden {
display: none !important; }
@@ -1622,7 +1615,7 @@
overflow: hidden !important; }
.bordered {
- border: 0.0625rem solid var(--generic-border-color) !important; }
+ border: 0.0714285714rem solid var(--generic-border-color) !important; }
.rounded {
border-radius: var(--universal-border-radius) !important; }
@@ -1697,4 +1690,14 @@
clip-path: inset(100%) !important;
overflow: hidden !important; } }
-/*# sourceMappingURL=mini-default.css.map */
+/*# sourceMappingURL=mini-custom.css.map */
+
+img[alt="ST logo"] { display: block; margin: auto; width: 75%; max-width: 250px; min-width: 71px; }
+img[alt="Cube logo"] { float: right; width: 30%; max-width: 10rem; min-width: 8rem; padding-right: 1rem;}
+
+.figure {
+ display: block;
+ margin-left: auto;
+ margin-right: auto;
+ text-align: center;
+}
\ No newline at end of file
diff --git a/_htmresc/st_logo.png b/_htmresc/st_logo.png
deleted file mode 100644
index 8b80057..0000000
--- a/_htmresc/st_logo.png
+++ /dev/null
Binary files differ
diff --git a/_htmresc/st_logo_2020.png b/_htmresc/st_logo_2020.png
new file mode 100644
index 0000000..d6cebb5
--- /dev/null
+++ b/_htmresc/st_logo_2020.png
Binary files differ
